Improved bump coplanarity and other applications for die-to-die

Abstract

Techniques for selectively boosting conductive pillar bumps are disclosed. In one aspect, an apparatus includes: a plurality of metal pads; a first set of push-up pads attached to a first set of the plurality of metal pads; a first set of conductive pillar bumps attached to the first set of push-up pads; a second set of conductive pillar bumps attached to a second set of the plurality of metal pads, in which a height of the first set of conductive pillar bumps is shorter than a height of the second set of conductive pillar bumps, and wherein the height of the first set of push-up pads plus the height of the first set of conductive pillar bumps is within a tolerance threshold of the height of the second set of conductive pillar bumps, and solder attached to the first set of conductive pillar bumps and the second set of conductive pillar bumps.

Description

[0001] Public background

[0002] 1. Public Domain

[0003] Aspects of the present disclosure relate generally to semiconductor manufacturing, and more particularly to improving bump coplanarity.

[0004] 2. Description of related technologies

[0005] In advanced packaging processes, copper pillar bumps are used to connect various package components to the die. Bump coplanarity is an important aspect to ensure reliable connections. Bump coplanarity is essentially a measurement of flatness, and more specifically a measurement of bump height variation. Bumps that are not high enough will not connect to the package component, while bumps that are too high may prevent adjacent bumps from connecting. As such, any height non-uniformity in the bump array may affect wafer probing, flip chip assembly, electronic board assembly, and ultimately reliability. In high-performance computing products and other advanced packaging applications, coplanarity becomes particularly important in the context of increased bump density.

[0006] The difference of bump height (i.e., coplanarity) may be a byproduct of the manufacturing process. For example, due to manufacturing tolerances, the amount of copper deposited for manufacturing copper pillars may have some changes. Bump coplanarity may also depend on bump density. For example, the same die may have different bump densities across different regions of the die (wherein different components are attached to the die in different regions). Typically, smaller bumps allow for smaller bump pitches (i.e., the center-to-center distance between the bumps), while larger bumps require larger pitches. Thus, in the case where the same die includes different regions with different bump densities, there may be differences in the coplanarity between different bump regions.

[0007] Overview

[0008] A simplified summary of one or more aspects disclosed herein is given below. Thus, the following summary should neither be considered an exhaustive overview of all contemplated aspects, nor should the following summary be considered to identify key or decisive elements related to all contemplated aspects or to delineate the scope associated with any particular aspect. Accordingly, the sole purpose of the following summary is to present certain concepts related to one or more aspects of the mechanisms disclosed herein in a simplified form prior to the detailed description given below.

[0009] In one aspect, a device includes: a plurality of metal pads; an under-bump metallization (UBM) layer, the UBM layer attached to the plurality of metal pads; a first set of push-up pads, the first set of push-up pads attached to a first portion of the UBM layer, the first portion of the UBM layer attached to a first set of the plurality of metal pads; a first set of conductive pillar bumps, the first set of conductive pillar bumps attached to the first set of push-up pads, wherein each conductive pillar bump in the first set of conductive pillar bumps is attached to a single push-up pad in the first set of push-up pads; a second set of conductive pillar bumps, the second set of conductive pillar bumps attached to the first set of conductive pillar bumps, The block set is attached to a second portion of the UBM layer, the second portion of the UBM layer is attached to a second set of multiple metal pads, wherein each conductive column bump in the second conductive column bump set is attached to a single metal pad in the second metal pad set, wherein the height of the first conductive column bump set is shorter than the height of the second conductive column bump set, and wherein the height of the first push-up pad set plus the height of the first conductive column bump set is within a tolerance threshold of the height of the second conductive column bump set; and solder, which is attached to the first conductive column bump set and the second conductive column bump set.

[0010] In one aspect, a method for selectively pushing up a conductive pillar bump includes: attaching an under-bump metallization (UBM) layer to a plurality of metal pads; attaching a first set of push-up pads to a first portion of the UBM layer, the first portion of the UBM layer being attached to a first set of a plurality of metal pads; attaching a first set of conductive pillar bumps to the first set of push-up pads, wherein each conductive pillar bump in the first set of conductive pillar bumps is attached to a single push-up pad in the first set of push-up pads; attaching a second set of conductive pillar bumps to a second portion of the UBM layer, the second portion of the UBM layer being attached to a second set of a plurality of metal pads, wherein each conductive pillar bump in the second set of conductive pillar bumps is attached to a single metal pad in the second set of metal pads, wherein a height of the first set of conductive pillar bumps is shorter than a height of the second set of conductive pillar bumps, and wherein a height of the first set of push-up pads plus a height of the first set of conductive pillar bumps is within a tolerance threshold of a height of the second set of conductive pillar bumps; and attaching solder to the first set of conductive pillar bumps and the second set of conductive pillar bumps.

[0011] In one aspect, a non-transitory computer-readable medium stores computer-executable instructions that, when executed by one or more devices, cause the one or more devices to perform the following operations: attach an under-bump metallization (UBM) layer to a plurality of metal pads; attach a first set of push-up pads to a first portion of the UBM layer, the first portion of the UBM layer being attached to a first set of a plurality of metal pads; attach a first set of conductive pillar bumps to the first set of push-up pads, wherein each conductive pillar bump in the first set of conductive pillar bumps is attached to a single push-up pad in the first set of push-up pads ; attaching a second conductive column bump set to a second portion of the UBM layer, the UBM layer being attached to a second set of multiple metal pads, wherein each conductive column bump in the second conductive column bump set is attached to a single metal pad in the second metal pad set, wherein a height of the first conductive column bump set is shorter than a height of the second conductive column bump set, and wherein a height of the first push-up pad set plus a height of the first conductive column bump set is within a tolerance threshold of a height of the second conductive column bump set; and attaching solder to the first conductive column bump set and the second conductive column bump set.

[0012] Other objects and advantages associated with the various aspects disclosed herein will be apparent to those skilled in the art based on the accompanying drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The accompanying drawings are presented to aid in describing the various aspects of the disclosure and are provided solely for illustration of the aspects and not limitation thereof.

[0015] Figure 1 is a diagram illustrating the height difference between two example copper pillar bumps according to aspects of the present disclosure.

[0016] Figure 2 is a diagram illustrating a selectively pushed-up copper pillar bump according to aspects of the present disclosure.

[0017] Figure 3 Various stages of fabricating a copper pillar bump with a pushed-up pad in accordance with aspects of the present disclosure are illustrated.

[0018] Figure 4 Example methods of selectively pushing up conductive pillar bumps according to aspects of the present disclosure are illustrated.

[0019] Detailed Description

[0020] Various aspects of the present disclosure are provided in the following description and related drawings for various examples provided for illustrative purposes. Alternative aspects may be designed without departing from the scope of the present disclosure. In addition, well-known elements in the present disclosure will not be described in detail or will be omitted to avoid obscuring the relevant details of the present disclosure.

[0021] The words "exemplary" and / or "example" are used herein to mean "serving as an example, instance, or illustration." Any aspect described herein as "exemplary" and / or "example" is not necessarily to be construed as preferred or superior to other aspects. Likewise, the term "aspects of the disclosure" does not require that all aspects of the disclosure include the discussed feature, advantage, or mode of operation.

[0022] Those skilled in the art will appreciate that the information and signals described below may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referred to throughout the following description may be represented by voltage, current, electromagnetic waves, magnetic fields or magnetic particles, optical fields or optical particles, or any combination thereof, depending in part on the specific application, in part on the desired design, in part on the corresponding technology, etc.

[0023] In addition, some aspects are described in the form of a sequence of actions performed by, for example, elements of a computing device. It will be appreciated that the various actions described herein can be performed by a dedicated circuit (e.g., an application specific integrated circuit (ASIC)), by program instructions being executed by one or more processors, or by a combination of the two. In addition, the sequence of actions described herein may be considered to be fully embodied in any form of non-transient computer-readable storage medium, which stores a corresponding set of computer instructions that, upon execution, will cause or instruct the associated processor of the device to perform the functionality described herein. Thus, various aspects of the present disclosure may be embodied in several different forms, all of which have been conceived to fall within the scope of the claimed subject matter. In addition, for each aspect described herein, the corresponding form of any such aspect may be described herein as, for example, "logic configured to perform the described actions."

[0024] In advanced packaging processes, copper pillar bumps are used to connect various package components to the die. Bump coplanarity is an important aspect to ensure reliable connections. Bump coplanarity is essentially a measurement of flatness, and more specifically a measurement of bump height variation. Bumps that are not high enough will not connect to the package component, while bumps that are too high may prevent adjacent bumps from connecting. As such, any height non-uniformity in the bump array may affect wafer probing, flip chip assembly, electronic board assembly, and ultimately reliability. In high-performance computing products and other advanced packaging applications, coplanarity becomes particularly important in the context of increased bump density.

[0025] The difference of bump height (i.e., coplanarity) may be a byproduct of the manufacturing process. For example, due to manufacturing tolerances, the amount of copper deposited to manufacture copper pillars may vary. Bump coplanarity may also depend on bump density. For example, the same die may have different bump densities across different regions of the die (wherein different components are attached to the die in different regions). Typically, smaller bumps allow for smaller bump pitches (i.e., the center-to-center distance between the bumps), while larger bumps require larger pitches. Thus, in the case where the same die includes different regions with different bump densities, there may be differences in the coplanarity between different bump regions (also referred to as bump arrays).

[0026] The following table illustrates the difference in bump density for two different dies (referred to as "Die A" and "Die B").

[0027]

[0028] Table 1

[0029] In the table above, the bump stack row indicates how the copper pillar bumps are made. The traditional approach to bump formation is to plate all the bumps on the die simultaneously (i.e., deposit one or more metal deposition layers or "plates" onto the die) in one or more plating steps (where each step deposits another layer / plate). The bumps are typically plated on an under-bump metallization (UBM) layer (the die in Table 1 is 25 microns (μm) or 35 μm thick), which is plated on the die pads. For the example die in Table 1, the copper pillar bumps are plated onto the UBM layer by first depositing a 13 μm copper (Cu) layer on the UBM layer, then a 2 μm nickel (Ni) layer, then a 2 μm copper (Cu) layer, and then a 15 μm lead-free (LF) solder layer.

[0030] Note that "plating" is the process of depositing one or more metal layers onto a substrate (eg, a silicon wafer). Plating may also be referred to as "electroplating" or "electrodeposition."

[0031] The following table provides the bump height and coplanarity variations of the two dies in Table 1. More specifically, the following table provides the maximum (Max), minimum (Min), average (Avg), and standard deviation (Std) of the bump height and coplanarity (COP) of the two dies.

[0032]

[0033]

[0034] Table 2

[0035] In the table above, the average bump height gap is 4.21 for Die A and 4.95 for Die B. This average is across both the 25 μm UBM and 35 μm UBM designs.

[0036] Figure 1 1 is a diagram illustrating a height difference between two example copper pillar bumps according to aspects of the present disclosure. Figure 1 As shown in , the bump is plated on the silicon layer (die). First, the metal pad (die pad) is plated or otherwise deposited on the silicon, where the bump will be attached. Next, a hard passivation layer is deposited on the metal pad and the exposed silicon. The UBM layer is then plated or otherwise deposited on the passivation layer on the metal pad. The copper pillar bump is then plated or otherwise deposited on the UBM layer. As described above with reference to Table 1, the copper pillar bump may include one or more copper (and optional nickel) layers (i.e., plates). Alternatively, the copper pillar bump may be some other conductive material, such as aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag) and / or other suitable conductive materials, as known in the art. Finally, solder is deposited on the copper pillar bump.

[0037] like Figure 1 As shown in , the two copper pillar bumps have different heights. The height difference between the "short" bump and the "tall" bump (indicated by the dotted line) may be the result of a design choice or a byproduct of the manufacturing process. For example, the short bump may be smaller because it is located in an area with a higher bump density, or because of the type / size of the component to which it will be connected, or because the UBM layer is thicker under the "tall" bump than under the "short" bump. Alternatively, when the copper pillar bump or UBM layer is plated, the short bump may be smaller due to insufficient copper deposition. If the height difference between the two bumps is above a certain threshold (e.g., 4μm), it may affect whether the short bump can be (reliably) attached to another package component.

[0038] The present disclosure provides a technique for reducing the height difference between copper pillar bumps, thereby improving the coplanarity of the bumps. Specifically, a "push-up pad" can be added under a "short" bump to increase the height of the short bump to within a certain tolerance threshold of the height of a "tall" bump on the same die.

[0039] Figure 2 is a diagram 200 illustrating a selectively pushed-up copper pillar bump in accordance with aspects of the present disclosure. Figure 2 The copper pillar bumps described in Figure 1 The bumps are manufactured using the same general process as described in . Figure 2As shown in FIG. 1 , a “push-up pad” has been plated or otherwise deposited on the UBM layer under the “short” bump, thereby increasing the height of the short bump to within a certain tolerance threshold (indicated by the dashed line) of the “tall” bump on the same die. For example, the tolerance threshold may be 4 μm or less.

[0040] More specifically referring to the manufacturing process, as mentioned above Figure 1 As described, the metal pad (die pad) is plated or otherwise deposited on the silicon layer (die) to which the bump will be attached. Next, a hard passivation layer is deposited on the metal pad and the exposed silicon. The UBM layer is then plated or otherwise deposited on the passivation layer above the metal pad. Next, one or more push-up pads are plated or otherwise deposited on the UBM layer to which the short bump will be attached / deposited in the next step. The push-up pad may include one or more layers of conductive material. For example, the push-up pad may be one or more layers of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag) and / or other suitable conductive materials. The copper pillar bump is then plated or otherwise deposited on the push-up pad and the UBM layer. Like the push-up pad, the copper pillar bump may be one or more layers of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag) and / or other suitable conductive materials known in the art. Finally, solder is deposited on the copper pillar bumps.

[0041] like Figure 2 As shown in , the diameter of the push-up pad is slightly larger than the diameter of the copper pillar bump. This is to allow for some misalignment when the copper pillar bump is deposited onto the push-up pad. In addition, the push-up pad can be circular, square, rectangular or some other shape.

[0042] Figure 3 The various stages of manufacturing a copper pillar bump with a push-up pad according to various aspects of the present disclosure are explained. At stage 310, a silicon wafer with a metal pad and a hard passivation layer is received. The UBM layer is then deposited via, for example, sputter deposition. Sputter deposition or sputter coating is a physical vapor deposition technique that deposits a thin film of metal or other material onto a surface, here a silicon wafer. For layers that are several thousand angstroms thick, sputtering is the preferred method, and for thicker layers, electroplating is the preferred method. However, the present disclosure is not limited to any of these methods.

[0043] In stage 320, a first photoresist (PR) coating is deposited and photopatterned to define the location and size of the push-up pads for the selectively pushed-up copper pillar bumps. That is, the resulting openings in the first PR coating define the locations where the push-up pads will be plated or otherwise deposited onto the UBM layer. The push-up pads are plated in the openings of the first PR coating. As described above, the push-up pads may include one or more layers of conductive materials, such as copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag) and / or other suitable conductive materials. The first PR coating is then removed.

[0044] Note that stage 320 may be repeated to construct a push-up pad having more than one step. More specifically, Figure 2 The push-up pads illustrated in FIG. 1 are single steps. However, if there are more than two copper pillar bump height groups (e.g., due to more than two UBM thicknesses, bump density, etc.), there may be more than two copper pillar bump heights. Thus, some push-up steps may be single steps (for bumps of a first height), other push-up pads may be two steps (for bumps of a second, shorter height), and so on. The diameter of each step may be slightly larger than the subsequently plated steps to allow for some misalignment of these steps. That is, the bottom step (which is deposited on the UBM layer) will be the largest and the top step (on which the copper pillar bump is attached) will be the smallest.

[0045] In stage 330, a second PR coating is deposited and photopatterned to define the location and size of the copper pillar bump. That is, the resulting opening in the second PR coating defines the location where the bump will be plated onto the UBM layer (for tall bumps) or the push-up pad (for short bumps). The copper pillar bump is then plated or otherwise deposited in the opening of the second PR coating. Similarly, solder is plated or otherwise deposited on the copper pillar bump in the opening defined by the second PR coating.

[0046] At step 340, the second PR coating is removed, the UBM layer is etched (to prevent it from extending beyond the base of the push-up pad or copper pillar bump), and the solder is reflowed (heated) to round the solder into the bump.

[0047] As will be appreciated, selectively lifting certain copper pillar bumps overcomes or at least reduces bump size and bump density issues and improves bump coplanarity compared to full bump stack plating. In addition, as will be appreciated, the techniques described herein can be used in semiconductor devices incorporated into any number of different electronic devices.

[0048] Figure 4An example method 400 of selectively pushing up a conductive pillar bump according to various aspects of the present disclosure is illustrated. The method 400 may be performed by various manufacturing machines as known in the art. The method 400 may also be stored as instructions on a (non-transitory) computer readable medium, wherein various manufacturing machines execute the stored instructions to perform the method 400.

[0049] Operation 410 of method 400 includes attaching a UBM layer to a plurality of metal pads, such as in Figure 3 Stage 310.

[0050] Operation 420 of method 400 includes attaching a first set of push-up pads to a first portion of a UBM layer, the first portion of the UBM layer being attached to a first set of a plurality of metal pads, such as in Figure 3 Stage 320.

[0051] Operation 430 of method 400 includes attaching a first set of conductive pillar bumps to a first set of push-up pads, such as in Figure 3 Step 330 , wherein each conductive stud bump in the first set of conductive stud bumps is attached to a single push-up pad in the first set of push-up pads.

[0052] Operation 440 of method 400 includes attaching a second set of conductive pillar bumps to a second portion of the UBM layer, the second portion of the UBM layer being attached to a second set of the plurality of metal pads, such as in Figure 3 Step 330, wherein each conductive column bump in the second conductive column bump set is attached to a single metal pad in the second metal pad set, wherein the height of the first conductive column bump set is shorter than the height of the second conductive column bump set, and wherein the height of the first push-up pad set plus the height of the first conductive column bump set is within a tolerance threshold of the height of the second conductive column bump set.

[0053] Operation 450 includes attaching solder to the first set of conductive stud bumps and the second set of conductive stud bumps, such as in Figure 3 Stage 330.

[0054] As will be appreciated, the technical advantage of method 400 is that selectively pushing up certain copper pillar bumps improves bump coplanarity compared to the entire bump stack plating. In addition, another advantage is lower cost due to thinner PR thickness and shorter plating time for push-up pad plating compared to conventional overall bump stack plating.

[0055] In the above detailed description, it can be seen that different features are grouped together in each example. This disclosure should not be understood as an intention that the example clauses have more features than the features explicitly mentioned in each clause. On the contrary, various aspects of the present disclosure may include less than all the features of the disclosed individual example clauses. Therefore, the attached clauses should be considered to be incorporated into this description, wherein each clause itself may be a separate example. Although each subordinate clause can be cited in each clause with a specific combination of one of the other clauses, the (all) aspects of the subordinate clause are not limited to the specific combination. It will be appreciated that other example clauses may also include a combination of the subject matter of the subordinate clause (all) aspects with any other subordinate clause or independent clause or any feature with other subordinate and independent clauses. Various aspects disclosed herein explicitly include these combinations, unless explicitly expressed or can be easily inferred that it is not intended to be a specific combination (e.g., contradictory aspects, such as defining an element as both an electrical insulator and an electrical conductor). In addition, it is also intended that the various aspects of the clause may be included in any other independent clause, even if the clause is not directly subordinate to the independent clause.

[0056] Implementation examples are described in the following numbered clauses:

[0057] Clause 1. An apparatus comprising: a plurality of metal pads; an under bump metallization (UBM) layer, the UBM layer attached to the plurality of metal pads; a first set of push-up pads, the first set of push-up pads attached to a first portion of the UBM layer, the first portion of the UBM layer attached to a first set of the plurality of metal pads; a first set of conductive pillar bumps, the first set of conductive pillar bumps attached to the first set of push-up pads, wherein each conductive pillar bump in the first set of conductive pillar bumps is attached to a single push-up pad in the first set of conductive pillar bumps; a second set of conductive pillar bumps, the second set of conductive pillar bumps attached to the first set of conductive pillar bumps; A second portion of the UBM layer is attached to the second set of multiple metal pads, wherein each conductive column bump in the second conductive column bump set is attached to a single metal pad in the second metal pad set, wherein the height of the first conductive column bump set is shorter than the height of the second conductive column bump set, and wherein the height of the first push-up pad set plus the height of the first conductive column bump set is within a tolerance threshold of the height of the second conductive column bump set; and solder, which is attached to the first conductive column bump set and the second conductive column bump set.

[0058] Clause 2. The device of clause 1, wherein a diameter of the first set of push-up pads is greater than a diameter of the first set of conductive pillar bumps.

[0059] Clause 3. The apparatus of any of Clauses 1 to 2, wherein: each push-up pad in the first set of push-up pads comprises one or more steps.

[0060] Clause 4. The apparatus of any one of Clauses 1 to 3, further comprising: a third set of conductive stud bumps, the third set of conductive stud bumps attached to the second set of push-up pads.

[0061] Clause 5. The apparatus of Clause 4, wherein each of the first set of push-up pads comprises a single step, each of the second set of push-up pads comprises two or more steps, and a height of the third set of conductive stud bumps is shorter than a height of the first set of conductive stud bumps.

[0062] Clause 6. The device of Clause 5, wherein a diameter of each step of the two or more steps of the second set of push-up pads is greater than a diameter of a subsequent step of the two or more steps.

[0063] Clause 7. The device of any of clauses 1 to 6, wherein: the tolerance threshold is 4 microns or less.

[0064] Clause 8. The apparatus of any one of Clauses 1 to 7, further comprising: a hard passivation layer deposited on the plurality of metal pads.

[0065] Clause 9. The device of any of clauses 1 to 8, wherein: the first set of push-up pads comprises one or more layers of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag), or any combination thereof.

[0066] Clause 10. The device of any of clauses 1 to 9, wherein: the first set of conductive stud bumps and the second set of conductive stud bumps include one or more layers of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag), or any combination thereof.

[0067] Item 11. A method of selectively pushing up a conductive pillar bump, comprising: attaching an under-bump metallization (UBM) layer to a plurality of metal pads; attaching a first set of push-up pads to a first portion of the UBM layer, the first portion of the UBM layer being attached to a first set of a plurality of metal pads; attaching a first set of conductive pillar bumps to the first set of push-up pads, wherein each conductive pillar bump in the first set of conductive pillar bumps is attached to a single push-up pad in the first set of push-up pads; attaching a second set of conductive pillar bumps to a second portion of the UBM layer, the second portion of the UBM layer being attached to a second set of a plurality of metal pads, wherein each conductive pillar bump in the second set of conductive pillar bumps is attached to a single metal pad in the second set of metal pads, wherein a height of the first set of conductive pillar bumps is shorter than a height of the second set of conductive pillar bumps, and wherein a height of the first set of push-up pads plus a height of the first set of conductive pillar bumps is within a tolerance threshold of a height of the second set of conductive pillar bumps; and attaching solder to the first set of conductive pillar bumps and the second set of conductive pillar bumps.

[0068] Clause 12. The method of clause 11, wherein attaching the first set of push-up pads comprises: applying a photoresist coating to the UBM layer; photopatterning the photoresist coating to create openings in the photoresist coating for the first set of push-up pads; plating the first set of push-up pads in the openings in the photoresist coating; and removing the photoresist coating.

[0069] Clause 13. The method of any of clauses 11 to 12, wherein attaching the first set of conductive pillar bumps to the first set of push-up pads comprises: applying a photoresist coating to at least the first set of push-up pads; photopatterning the photoresist coating to create openings in the photoresist coating for the first set of conductive pillar bumps; plating the first set of conductive pillar bumps into the openings in the photoresist coating; and removing the photoresist coating.

[0070] Clause 14. The method of Clause 13, wherein attaching solder to the first set of conductive stud bumps comprises: depositing solder into the openings in the photoresist coating; and reflowing the solder.

[0071] Clause 15. The method of any one of clauses 11 to 14, wherein attaching the second set of conductive pillar bumps comprises: applying a photoresist coating to at least the UBM layer; photopatterning the photoresist coating to create openings in the photoresist coating for the second set of conductive pillar bumps; plating the second set of conductive pillar bumps into the openings in the photoresist coating; and removing the photoresist coating.

[0072] Clause 16. The method of Clause 15, wherein attaching solder to the second set of conductive stud bumps comprises: depositing solder into the openings in the photoresist coating; and reflowing the solder.

[0073] Clause 17. The method of any one of Clauses 11 to 16, further comprising: attaching a third set of conductive stud bumps to the second set of push-up pads.

[0074] Clause 18. The method of Clause 17, wherein: each push-up pad in the first set of push-up pads includes a single step, each push-up pad in the second set of push-up pads includes two or more steps, and a height of the third set of conductive stud bumps is shorter than a height of the first set of conductive stud bumps.

[0075] Clause 19. The method of Clause 18, wherein a diameter of each step of the two or more steps of the second set of push-up pads is greater than a diameter of a subsequent step of the two or more steps.

[0076] Clause 20. The method of any one of Clauses 11 to 19, wherein a diameter of the first set of push-up pads is greater than a diameter of the first set of conductive pillar bumps.

[0077] Clause 21. The method of any of Clauses 11 to 20, wherein each push-up pad in the first set of push-up pads comprises one or more steps.

[0078] Clause 22. The method of any of Clauses 11 to 21, wherein the tolerance threshold is 4 microns or less.

[0079] Clause 23. The method of any of Clauses 11 to 22, further comprising: depositing a hard passivation layer on the plurality of metal pads.

[0080] Clause 24. The method of any of Clauses 11 to 23, wherein the first set of push-up pads comprises one or more layers of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag), or any combination thereof.

[0081] Clause 25. The method of any of Clauses 11 to 24, wherein the first set of conductive stud bumps and the second set of conductive stud bumps include one or more layers of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag), or any combination thereof.

[0082] Clause 26. A non-transitory computer-readable medium having computer-executable instructions stored thereon, which when executed by one or more devices cause the one or more devices to perform the following operations: attach an under bump metallization (UBM) layer to a plurality of metal pads; attach a first set of push-up pads to a first portion of the UBM layer, the first portion of the UBM layer being attached to a first set of the plurality of metal pads; attach a first set of conductive pillar bumps to the first set of push-up pads, wherein each conductive pillar bump in the first set of conductive pillar bumps is attached to a single push-up pad in the first set of push-up pads. pad; attaching a second conductive column bump set to a second portion of the UBM layer, the second portion of the UBM layer being attached to a second set of multiple metal pads, wherein each conductive column bump in the second conductive column bump set is attached to a single metal pad in the second metal pad set, wherein a height of the first conductive column bump set is shorter than a height of the second conductive column bump set, and wherein a height of the first push-up pad set plus a height of the first conductive column bump set is within a tolerance threshold of a height of the second conductive column bump set; and attaching solder to the first conductive column bump set and the second conductive column bump set.

[0083] Clause 27. The non-transitory computer-readable medium of clause 26, wherein the computer-executable instructions that, when executed by the one or more devices, cause the one or more devices to attach the first push-up pad set include computer-executable instructions that, when executed by the one or more devices, cause the one or more devices to: apply a photoresist coating to the UBM layer; photo-pattern the photoresist coating to create openings in the photoresist coating for the first push-up pad set; plate the first push-up pad set in the openings in the photoresist coating; and remove the photoresist coating.

[0084] Clause 28. A non-transitory computer-readable medium as in any of clauses 26 to 27, wherein the computer-executable instructions that, when executed by the one or more devices, cause the one or more devices to attach a first set of conductive pillar bumps to a first set of push-up pads include computer-executable instructions that, when executed by the one or more devices, cause the one or more devices to: apply a photoresist coating to at least the first set of push-up pads; photo-pattern the photoresist coating to create openings in the photoresist coating for the first set of conductive pillar bumps; plate the first set of conductive pillar bumps into the openings in the photoresist coating; and remove the photoresist coating.

[0085] Clause 29. The non-transitory computer-readable medium of clause 28, wherein the computer-executable instructions that, when executed by the one or more devices, cause the one or more devices to attach solder to the first set of conductive pillar bumps include computer-executable instructions that, when executed by the one or more devices, cause the one or more devices to: deposit solder into the openings in the photoresist coating; and reflow the solder.

[0086] Clause 30. A non-transitory computer-readable medium as in any of clauses 26 to 29, wherein when executed by the one or more devices, the computer-executable instructions to attach a second set of conductive pillar bumps include computer-executable instructions that, when executed by the one or more devices, cause the one or more devices to: apply a photoresist coating to at least the UBM layer; photo-pattern the photoresist coating to create openings in the photoresist coating for the second set of conductive pillar bumps; plate the second set of conductive pillar bumps into the openings in the photoresist coating; and remove the photoresist coating.

[0087] Clause 31. The non-transitory computer-readable medium of clause 30, wherein the computer-executable instructions that, when executed by the one or more devices, cause the one or more devices to: attach solder to the second set of conductive pillar bumps include computer-executable instructions that, when executed by the one or more devices, cause the one or more devices to: deposit solder into the openings in the photoresist coating; and reflow the solder.

[0088] Clause 32. The non-transitory computer-readable medium of any of Clauses 26 to 31, further comprising: computer-executable instructions that, when executed by the one or more devices, cause the one or more devices to: attach a third set of conductive stud bumps to the second set of push-up pads.

[0089] Clause 33. The non-transitory computer-readable medium of clause 32, wherein: each of the first set of push-up pads comprises a single step, each of the second set of push-up pads comprises two or more steps, and a height of the third set of conductive stud bumps is shorter than a height of the first set of conductive stud bumps.

[0090] Clause 34. The non-transitory computer-readable medium of Clause 33, wherein a diameter of each step of the two or more steps in the second set of push-up pads is greater than a diameter of a subsequent step of the two or more steps.

[0091] Clause 35. The non-transitory computer readable medium of any one of Clauses 26 to 34, wherein a diameter of the first set of push-up pads is greater than a diameter of the first set of conductive pillar bumps.

[0092] Clause 36. The non-transitory computer-readable medium of any of Clauses 26 to 35, wherein each push-up pad in the first set of push-up pads comprises one or more steps.

[0093] Clause 37. The non-transitory computer readable medium of any of Clauses 26 to 36, wherein the tolerance threshold is 4 microns or less.

[0094] Clause 38. The non-transitory computer-readable medium of any of Clauses 26 to 37, further comprising computer-executable instructions that, when executed by the one or more devices, cause the one or more devices to: deposit a hard passivation layer on the plurality of metal pads.

[0095] Clause 39. The non-transitory computer readable medium of any of Clauses 26 to 38, wherein the first set of push-up pads comprises one or more layers of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag), or any combination thereof.

[0096] Clause 40. The non-transitory computer readable medium of any of Clauses 26 to 39, wherein the first set of conductive stud bumps and the second set of conductive stud bumps comprise one or more layers of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag), or any combination thereof.

[0097] Those skilled in the art will appreciate that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referred to throughout the above description may be represented by voltage, current, electromagnetic waves, magnetic fields or magnetic particles, optical fields or optical particles, or any combination thereof.

[0098] In addition, those skilled in the art will appreciate that the various illustrative logic blocks, modules, circuits, and algorithm steps described in conjunction with the aspects disclosed herein can be implemented as electronic hardware, computer software, or a combination of the two. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps are generally described above in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system. The technician can implement the described functionality in different ways for each specific application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.

[0099] The various illustrative logical blocks, modules, and circuits described in conjunction with the various aspects disclosed herein may be implemented or executed with a general purpose processor, a DSP, an ASIC, an FPGA or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in an alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

[0100] The methods, sequences and / or algorithms described in conjunction with the various aspects disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software module may reside in a random access memory (RAM), a flash memory, a read-only memory (ROM), an erasable programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An example storage medium is coupled to a processor so that the processor can read and write information from / to the storage medium. In an alternative, a storage medium may be integrated into a processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal (e.g., UE). In an alternative, the processor and the storage medium may reside in a user terminal as discrete components.

[0101] In one or more example aspects, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, each function may be stored on or transmitted by a computer-readable medium as one or more instructions or codes. Computer-readable media include both computer storage media and communication media, including any media that facilitates the transfer of a computer program from one place to another. Storage media may be any available media that can be accessed by a computer. As an example and not limitation, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, disk storage or other magnetic storage devices, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer. Similarly, any connection is also properly referred to as a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwaves, the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwaves are included in the definition of the medium. As used herein, disk and disc include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray disc, wherein disk often reproduces data magnetically, while disc reproduces data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0102] Although the foregoing disclosure shows illustrative aspects of the present disclosure, it should be noted that various changes and modifications may be made therein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps, and / or actions in the method claims according to the various aspects of the present disclosure described herein do not have to be performed in any particular order. In addition, although the elements of the present disclosure may be described or claimed in the singular, the plural is also contemplated unless it is explicitly stated to be limited to the singular.

Claims

1. A device comprising: Multiple metal pads; an under bump metallization (UBM) layer attached to the plurality of metal pads; a first set of push-up pads attached to a first portion of the UBM layer, the first portion of the UBM layer attached to a first set of the plurality of metal pads; a first set of conductive stud bumps, the first set of conductive stud bumps being attached to the first set of push-up pads, wherein each conductive stud bump in the first set of conductive stud bumps is attached to a single push-up pad in the first set of push-up pads; a second set of conductive pillar bumps, the second set of conductive pillar bumps being attached to a second portion of the UBM layer, the second portion of the UBM layer being attached to a second set of the plurality of metal pads, wherein each conductive pillar bump in the second set of conductive pillar bumps is attached to a single metal pad in the second set of metal pads, wherein a height of the first set of conductive pillar bumps is shorter than a height of the second set of conductive pillar bumps, and wherein a height of the first set of push-up pads plus a height of the first set of conductive pillar bumps is within a tolerance threshold of a height of the second set of conductive pillar bumps; and Solder is attached to the first set of conductive stud bumps and the second set of conductive stud bumps. 2 . The device of claim 1 , wherein a diameter of the first set of push-up pads is greater than a diameter of the first set of conductive pillar bumps. 3 . The apparatus of claim 1 , wherein each push-up pad in the first set of push-up pads comprises one or more steps.

4. The apparatus of claim 1, further comprising: A third conductive pillar bump set is attached to the second push-up pad set.

5. The device of claim 4, wherein: Each of the push-up pads in the first push-up pad set comprises a single step, Each of the push-up pads in the second push-up pad set includes two or more steps, and The height of the third conductive pillar bump set is shorter than the height of the first conductive pillar bump set. 6 . The apparatus of claim 5 , wherein a diameter of each of the two or more steps of the second set of push-up pads is greater than a diameter of a subsequent step of the two or more steps.

7. The apparatus of claim 1, wherein the tolerance threshold is 4 microns or less.

8. The apparatus of claim 1, further comprising: A hard passivation layer is deposited on the plurality of metal pads.

9. The apparatus of claim 1, wherein the first push-up pad set comprises one or more layers of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag), or any combination thereof.

10. The device of claim 1, wherein the first set of conductive pillar bumps and the second set of conductive pillar bumps comprise one or more layers of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag), or any combination thereof.

11. A method for selectively pushing up a conductive column bump, comprising: attaching an under bump metallization (UBM) layer to the plurality of metal pads; attaching a first set of push-up pads to a first portion of the UBM layer, the first portion of the UBM layer being attached to a first set of the plurality of metal pads; attaching a first set of conductive stud bumps to the first set of push-up pads, wherein each conductive stud bump in the first set of conductive stud bumps is attached to a single push-up pad in the first set of push-up pads; attaching a second set of conductive pillar bumps to a second portion of the UBM layer, the second portion of the UBM layer being attached to a second set of the plurality of metal pads, wherein each conductive pillar bump in the second set of conductive pillar bumps is attached to a single metal pad in the second set of metal pads, wherein a height of the first set of conductive pillar bumps is shorter than a height of the second set of conductive pillar bumps, and wherein a height of the first set of push-up pads plus a height of the first set of conductive pillar bumps is within a tolerance threshold of a height of the second set of conductive pillar bumps; and Solder is attached to the first set of conductive stud bumps and the second set of conductive stud bumps.

12. The method of claim 11, wherein attaching the first set of push-up pads comprises: applying a photoresist coating to the UBM layer; photo-patterning the photoresist coating to create openings in the photoresist coating for the first set of push-up pads; Plating the first set of push-up pads in the openings of the photoresist coating; as well as The photoresist coating is removed.

13. The method of claim 11, wherein attaching the first set of conductive pillar bumps to the first set of push-up pads comprises: applying a photoresist coating to at least said first set of push-up pads; photo-patterning the photoresist coating to create openings in the photoresist coating for the first set of conductive pillar bumps; plating the first set of conductive stud bumps into the openings of the photoresist coating; as well as The photoresist coating is removed.

14. The method of claim 13, wherein attaching the solder to the first set of conductive stud bumps comprises: depositing the solder into the opening in the photoresist coating; as well as The solder is reflowed.

15. The method of claim 11, wherein attaching the second set of conductive pillar bumps comprises: applying a photoresist coating to at least the UBM layer; photo-patterning the photoresist coating to create openings in the photoresist coating for the second set of conductive pillar bumps; plating the second set of conductive pillar bumps into the openings of the photoresist coating; as well as The photoresist coating is removed.

16. The method of claim 15, wherein attaching the solder to the second set of conductive stud bumps comprises: depositing the solder into the opening in the photoresist coating; as well as The solder is reflowed.

17. The method of claim 11, further comprising: A third set of conductive pillar bumps is attached to the second set of push-up pads.

18. The method of claim 17, wherein: Each of the push-up pads in the first push-up pad set comprises a single step, Each of the push-up pads in the second push-up pad set includes two or more steps, and The height of the third conductive pillar bump set is shorter than the height of the first conductive pillar bump set. 19 . The method of claim 18 , wherein a diameter of each of the two or more steps of the second set of push-up pads is greater than a diameter of a subsequent step of the two or more steps. 20 . The method of claim 11 , wherein a diameter of the first set of push-up pads is greater than a diameter of the first set of conductive pillar bumps.

21. The method of claim 11, wherein each push-up pad in the first set of push-up pads comprises one or more steps.

22. The method of claim 11, wherein the tolerance threshold is 4 microns or less.

23. The method of claim 11, further comprising: A hard passivation layer is deposited over the plurality of metal pads.

24. The method of claim 11, wherein the first push-up pad set comprises one or more layers of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag), or any combination thereof.

25. The method of claim 11, wherein the first set of conductive pillar bumps and the second set of conductive pillar bumps comprise one or more layers of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag), or any combination thereof.

26. A non-transitory computer readable medium storing computer executable instructions, which when executed by one or more devices cause the one or more devices to: attaching an under bump metallization (UBM) layer to the plurality of metal pads; attaching a first set of push-up pads to a first portion of the UBM layer, the first portion of the UBM layer being attached to a first set of the plurality of metal pads; attaching a first set of conductive stud bumps to the first set of push-up pads, wherein each conductive stud bump in the first set of conductive stud bumps is attached to a single push-up pad in the first set of push-up pads; attaching a second set of conductive pillar bumps to a second portion of the UBM layer, the second portion of the UBM layer being attached to a second set of the plurality of metal pads, wherein each conductive pillar bump in the second set of conductive pillar bumps is attached to a single metal pad in the second set of metal pads, wherein a height of the first set of conductive pillar bumps is shorter than a height of the second set of conductive pillar bumps, and wherein a height of the first set of push-up pads plus a height of the first set of conductive pillar bumps is within a tolerance threshold of a height of the second set of conductive pillar bumps; and Solder is attached to the first set of conductive stud bumps and the second set of conductive stud bumps.

27. The non-transitory computer readable medium of claim 26, wherein: The computer executable instructions that, when executed by the one or more devices, cause the one or more devices to attach the first set of push-up pads include: computer executable instructions that, when executed by the one or more devices, cause the one or more devices to perform the following operations: applying a photoresist coating to the UBM layer; photo-patterning the photoresist coating to create openings in the photoresist coating for the first set of push-up pads; Plating the first set of push-up pads in the openings of the photoresist coating; and The photoresist coating is removed.

28. The non-transitory computer readable medium of claim 26, wherein: The computer executable instructions that, when executed by the one or more devices, cause the one or more devices to attach the first conductive pillar bump set to the first push-up pad set include: computer executable instructions that, when executed by the one or more devices, cause the one or more devices to perform the following operations: applying a photoresist coating to at least said first set of push-up pads; photo-patterning the photoresist coating to create openings in the photoresist coating for the first set of conductive pillar bumps; plating the first set of conductive stud bumps into the openings of the photoresist coating; and The photoresist coating is removed.

29. The non-transitory computer readable medium of claim 28, wherein: The computer executable instructions that, when executed by the one or more devices, cause the one or more devices to attach the solder to the first set of conductive pillar bumps include: computer executable instructions that, when executed by the one or more devices, cause the one or more devices to: depositing the solder into the openings in the photoresist coating; and The solder is reflowed.

30. The non-transitory computer readable medium of claim 26, wherein: The computer executable instructions that, when executed by the one or more devices, cause the one or more devices to attach the second conductive pillar bump set include: computer executable instructions that, when executed by the one or more devices, cause the one or more devices to perform the following operations: applying a photoresist coating to at least the UBM layer; photo-patterning the photoresist coating to create openings in the photoresist coating for the second set of conductive pillar bumps; plating the second set of conductive stud bumps into the openings of the photoresist coating; and The photoresist coating is removed.

31. The non-transitory computer readable medium of claim 30, wherein: The computer executable instructions that, when executed by the one or more devices, cause the one or more devices to attach the solder to the second set of conductive pillar bumps include: computer executable instructions that, when executed by the one or more devices, cause the one or more devices to: depositing the solder into the openings in the photoresist coating; and The solder is reflowed.

32. The non-transitory computer readable medium of claim 26, further comprising: Computer executable instructions that, when executed by the one or more devices, cause the one or more devices to: A third set of conductive pillar bumps is attached to the second set of push-up pads.

33. The non-transitory computer readable medium of claim 32, wherein: Each of the push-up pads in the first push-up pad set comprises a single step, Each of the push-up pads in the second push-up pad set includes two or more steps, and The height of the third conductive pillar bump set is shorter than the height of the first conductive pillar bump set.

34. The non-transitory computer readable medium of claim 33, wherein: A diameter of each of the two or more steps of the second push-up pad set is greater than a diameter of a subsequent step of the two or more steps.

35. The non-transitory computer readable medium of claim 26, wherein: The diameter of the first push-up pad set is greater than the diameter of the first conductive column bump set.

36. The non-transitory computer readable medium of claim 26, wherein: Each of the push-up pads in the first push-up pad set includes one or more steps.

37. The non-transitory computer readable medium of claim 26, wherein: The tolerance threshold is 4 microns or less.

38. The non-transitory computer readable medium of claim 26, further comprising: Computer executable instructions that, when executed by the one or more devices, cause the one or more devices to: A hard passivation layer is deposited over the plurality of metal pads.

39. The non-transitory computer readable medium of claim 26, wherein: The first push-up pad set includes one or more layers of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag) or any combination thereof.

40. The non-transitory computer readable medium of claim 26, wherein: The first conductive pillar bump set and the second conductive pillar bump set include one or more layers of copper (Cu), aluminum (Al), tin (Sn), nickel (Ni), gold (Au), silver (Ag), or any combination thereof.

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