Method and device for measuring background carrier concentration of high electron mobility transistor

Abstract

The embodiment of the invention provides a method and device for measuring background carrier concentration of a high electron mobility transistor, and belongs to the technical field of semiconductors. The measuring method comprises the steps that unit area reference capacitance and first actually-measured gate source capacitance of the HEMT are obtained, the unit area reference capacitance is capacitance of a unit area laminated structure, and a film layer stacking structure of the laminated structure is the same as a film layer stacking structure of the HEMT; determining an equivalent gate-source capacitance area of the HEMT according to the unit area reference capacitance and the first actually measured gate-source capacitance; determining the unit area calibration capacitance of the HEMT according to the first actually measured gate-source capacitance and the equivalent gate-source capacitance area; and determining the background carrier concentration of the HEMT according to the unit area calibration capacitor and the channel depth of the HEMT. According to the embodiment of the invention, the accuracy of the measured background carrier concentration of the HEMT can be effectively improved.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and in particular to a method and device for measuring background carrier concentration of a high electron mobility transistor. Background Art

[0002] High Electron Mobility Transistor (HEMT) is a heterojunction field effect transistor widely used in various electrical appliances. The background carrier concentration of HEMT is a key indicator of HEMT performance and can be used to judge the structural design and process level of HEMT.

[0003] In the related art, a method for measuring the background carrier concentration of a HEMT includes: obtaining a measured gate-source capacitance and a gate-source capacitance area of ​​the HEMT, determining a unit area capacitance of the HEMT according to the measured gate-source capacitance and the gate-source capacitance area, and determining the background carrier concentration of the HEMT according to the unit area capacitance and the channel depth.

[0004] However, due to the complexity of the actual film layer pattern of HEMT and the different preparation processes of HEMT, problems such as gate metal area deviation may occur, which will lead to large errors in the gate-source capacitance area of ​​HEMT, thus affecting the accuracy of the background carrier concentration of HEMT measured. Summary of the invention

[0005] The embodiment of the present disclosure provides a method and device for measuring the background carrier concentration of a high electron mobility transistor, which can effectively improve the accuracy of the measured background carrier concentration of the HEMT. The technical solution is as follows:

[0006] On the one hand, a method for measuring the background carrier concentration of a HEMT is provided, comprising: obtaining a reference capacitance per unit area and a first measured gate-source capacitance of the HEMT, the reference capacitance per unit area being the capacitance per unit area of ​​a stacked structure, the film layer stacking structure of the stacked structure being the same as the film layer stacking structure of the HEMT; determining an equivalent gate-source capacitance area of ​​the HEMT according to the reference capacitance per unit area and the first measured gate-source capacitance; determining a calibration capacitance per unit area of ​​the HEMT according to the first measured gate-source capacitance and the equivalent gate-source capacitance area; and determining the background carrier concentration of the HEMT according to the calibration capacitance per unit area and a channel depth of the HEMT.

[0007] Optionally, determining the equivalent gate-source capacitance area of ​​the HEMT according to the unit area reference capacitance and the first measured gate-source capacitance includes: obtaining a first corresponding relationship between a two-dimensional electron gas concentration in a channel of the HEMT and a gate-source capacitance area calibration parameter; determining a target gate-source capacitance area calibration parameter according to a target two-dimensional electron gas concentration and the first corresponding relationship, wherein the target two-dimensional electron gas concentration is a weighted average value of the two-dimensional electron gas concentration in the channel of the HEMT with respect to the gate-source capacitance area calibration parameter, or the target two-dimensional electron gas concentration is obtained by performing a Hall test on the two-dimensional electron gas concentration in the channel of the HEMT; and determining the equivalent gate-source capacitance area according to the unit area reference capacitance, the first measured gate-source capacitance, and the target gate-source capacitance area calibration parameter.

[0008] Optionally, the first corresponding relationship is represented by the following formula:

[0009] Cg norm1 =Cgs norm0 ×(1+p)

[0010]

[0011]

[0012] Among them, Cgs norm0 is the reference capacitance per unit area, Cgs norm1 is the unit area capacitance of the HEMT, p is the gate-source capacitance area calibration parameter, Ncv is the carrier concentration of the HEMT, q is the charge, ε0 is the vacuum dielectric constant, ε eff is the relative dielectric constant, V is the voltage, C is the capacitance, ns is the two-dimensional electron gas concentration, and z is the channel depth.

[0013] Optionally, determining a target gate-source capacitance area calibration parameter according to the target two-dimensional electron gas concentration and the first corresponding relationship includes: in the first corresponding relationship, determining the gate-source capacitance area calibration parameter with the smallest absolute value corresponding to the target two-dimensional electron gas concentration as the target gate-source capacitance area calibration parameter.

[0014] Optionally, determining the equivalent gate-source capacitance area according to the reference capacitance per unit area, the first measured gate-source capacitance and the target gate-source capacitance area calibration parameter comprises: determining the equivalent gate-source capacitance area according to the following formula:

[0015]

[0016] Wherein, Area1 is the equivalent gate-source capacitance area, Cgs1 is the first measured gate-source capacitance, and Cgsnorm0 is the reference capacitance per unit area, and p0 is the target gate-source capacitance area calibration parameter.

[0017] Optionally, the target gate-source capacitance area calibration parameter is -0.99 to 1.

[0018] Optionally, the HEMT is made by a first epitaxial wafer, the first epitaxial wafer has a process control monitor (PCM) test area, the stacked structure is located in the PCM test area, and the obtaining of the reference capacitance per unit area includes: obtaining a second measured gate-source capacitance and a measured gate-source capacitance area of ​​the stacked structure; and determining the reference capacitance per unit area according to the second measured gate-source capacitance and the measured gate-source capacitance area.

[0019] Optionally, the HEMT is made by a first epitaxial wafer, the first epitaxial wafer has a PCM test area, the stacked structure is located in the PCM test area, and the obtaining of the reference capacitance per unit area includes: determining the reference capacitance per unit area according to the following formula:

[0020]

[0021] Among them, Cgs norm0 is the reference capacitance per unit area, ε0 is the vacuum dielectric constant, ε n is the relative dielectric constant of each film layer on the channel of the stacked structure, d n is the thickness of each film layer on the channel of the stacked structure.

[0022] On the other hand, a device for measuring background carrier concentration of a HEMT is provided, comprising: an acquisition module, used to acquire a reference capacitance per unit area and a first measured gate-source capacitance of the HEMT, wherein the reference capacitance per unit area is a capacitance per unit area of ​​a stacked structure, and the film layer stacking structure of the stacked structure is the same as the film layer stacking structure of the HEMT; a first determination module, used to determine an equivalent gate-source capacitance area of ​​the HEMT according to the reference capacitance per unit area and the first measured gate-source capacitance; a second determination module, used to determine a calibration capacitance per unit area of ​​the HEMT according to the first measured gate-source capacitance and the equivalent gate-source capacitance area; and a third determination module, used to determine the background carrier concentration of the HEMT according to the calibration capacitance per unit area and a channel depth of the HEMT.

[0023] On the other hand, a device for measuring the background carrier concentration of a HEMT is provided, comprising: a processor; and a memory for storing instructions executable by the processor; wherein the processor is configured to execute the aforementioned method for measuring the background carrier concentration of a HEMT.

[0024] The technical solution provided by the embodiments of the present disclosure has the following beneficial effects:

[0025] In the disclosed embodiment, the reference capacitance per unit area and the first measured gate-source capacitance of the HMET are first obtained, the reference capacitance per unit area is the capacitance of the stacked structure per unit area, the film layer stacking structure of the stacked structure is the same as the film layer stacking structure of the HEMT, and then the equivalent gate-source capacitance area of ​​the HEMT is determined according to the reference capacitance per unit area and the first measured gate-source capacitance. Since the film layer stacking structure of the stacked structure is the same as the film layer stacking structure of the HEMT, the gate-source capacitance area of ​​the HEMT can be calibrated according to the reference capacitance per unit area, reducing the measurement error caused by the complexity of the actual film layer pattern of the HEMT and the gate metal area deviation, so that the equivalent gate-source capacitance area is closer to the actual gate-source capacitance area of ​​the HEMT. Then, according to the first measured gate-source capacitance and the equivalent gate-source capacitance area, the calibration capacitance per unit area of ​​the HEMT is determined, and then the background carrier concentration of the HEMT is determined according to the calibration capacitance per unit area and the channel depth of the HEMT. In this way, the accuracy of the measured background carrier concentration of the HEMT can be effectively improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0027] Figure 1 is a flow chart of a method for measuring background carrier concentration of a HEMT provided by an embodiment of the present disclosure;

[0028] Figure 2 is a flow chart of another method for measuring background carrier concentration of HEMT provided by an embodiment of the present disclosure;

[0029] Figure 3 is a structural schematic diagram of a stacked structure in a PCM test area of ​​a first epitaxial wafer provided by an embodiment of the present disclosure;

[0030] Figure 4 is a schematic diagram of a corresponding relationship curve between a capacitance per unit area and a gate-source voltage of a stacked structure provided by an embodiment of the present disclosure;

[0031] Figure 5 is a schematic diagram of a first corresponding relationship curve between a two-dimensional electron gas concentration in a channel of a HEMT and a gate-source capacitance area calibration parameter provided by an embodiment of the present disclosure;

[0032] Figure 6 It is a schematic diagram of a corresponding relationship curve between the capacitance per unit area and the gate-source voltage of a HEMT provided by an embodiment of the present disclosure;

[0033] Figure 7 is a schematic diagram of a second corresponding relationship curve between carrier concentration and channel depth of a HEMT provided by an embodiment of the present disclosure;

[0034] Figure 8 is a structural block diagram of a device for measuring background carrier concentration of a HEMT provided by an embodiment of the present disclosure;

[0035] Fig. 9 is a structural block diagram of a first determination module provided by an embodiment of the present disclosure;

[0036] Fig.10 It is a structural block diagram of a device for measuring the background carrier concentration of a HEMT provided in an embodiment of the present disclosure.

[0037] Reference numerals:

[0038] 10: channel layer; 20: barrier layer; 30: cap layer; 40: passivation layer; 50: metal electrode layer; 51: first test electrode; 52: second test electrode; 100: acquisition module; 200: first determination module; 201: first acquisition unit; 202: first determination unit; 203: second determination unit; 300: second determination module; 400: third determination module; 500: processor; 600: memory; 1000: measuring device; 2000: measuring equipment. DETAILED DESCRIPTION

[0039] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0040] Unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by persons of ordinary skill in the field to which the present disclosure belongs. The words "first", "second", "third" and similar words used in the patent application specification and claims of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not indicate a quantitative limitation, but indicate the existence of at least one. Words such as "include" and similar words mean that the elements or objects appearing before "include" include the elements or objects listed after "include" and their equivalents, and do not exclude other elements or objects. Words such as "connect" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", etc. are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0041] In order to facilitate understanding of the embodiments of the present disclosure, the structure of an epitaxial wafer used to make a HEMT is briefly introduced below. The epitaxial wafer used to make a HEMT includes a channel layer, a barrier layer, a cap layer, a passivation layer, and a metal electrode layer stacked in sequence. The epitaxial wafer has a functional area, and the functional area is used to perform patterning on the film layer to form various functional structures required for the HEMT to obtain the HEMT. The background carrier concentration of the HEMT corresponds to the carrier concentration of the surface of the channel layer of the HEMT away from the barrier layer.

[0042] Figure 1 1 is a flow chart of a method for measuring the background carrier concentration of a HEMT provided by an embodiment of the present disclosure. Figure 1 As shown, the measurement method includes:

[0043] In step S1001, a reference capacitance per unit area and a first measured gate-source capacitance of the HEMT are obtained.

[0044] The reference capacitance per unit area is the capacitance per unit area of ​​the stacked structure, and the film layer stacking structure of the stacked structure is the same as the film layer stacking structure of the HEMT.

[0045] In step S1002, the equivalent gate-source capacitance area of ​​the HEMT is determined according to the reference capacitance per unit area and the first measured gate-source capacitance.

[0046] In step S1003, a calibration capacitance per unit area of ​​the HEMT is determined according to the first measured gate-source capacitance and the equivalent gate-source capacitance area.

[0047] In step S1004, the background carrier concentration of the HEMT is determined according to the calibration capacitance per unit area and the channel depth of the HEMT.

[0048] In the disclosed embodiment, the reference capacitance per unit area and the first measured gate-source capacitance of the HMET are first obtained, the reference capacitance per unit area is the capacitance of the stacked structure per unit area, the film layer stacking structure of the stacked structure is the same as the film layer stacking structure of the HEMT, and then the equivalent gate-source capacitance area of ​​the HEMT is determined according to the reference capacitance per unit area and the first measured gate-source capacitance. Since the film layer stacking structure of the stacked structure is the same as the film layer stacking structure of the HEMT, the gate-source capacitance area of ​​the HEMT can be calibrated according to the reference capacitance per unit area, reducing the measurement error caused by the complexity of the actual film layer pattern of the HEMT and the gate metal area deviation, so that the equivalent gate-source capacitance area is closer to the actual gate-source capacitance area of ​​the HEMT. Then, according to the first measured gate-source capacitance and the equivalent gate-source capacitance area, the calibration capacitance per unit area of ​​the HEMT is determined, and then the background carrier concentration of the HEMT is determined according to the calibration capacitance per unit area and the channel depth of the HEMT. In this way, the accuracy of the measured background carrier concentration of the HEMT can be effectively improved.

[0049] In the embodiment of the present disclosure, the HEMT may be an enhanced HEMT. The working principle of the HEMT is: utilizing the piezoelectric effect and polarization effect of the channel layer and the barrier layer, a high-mobility two-dimensional electron gas can be generated at the interface of the channel layer and the barrier layer, and the concentration of the two-dimensional electron gas can be controlled by controlling the gate-source voltage to achieve the conduction or shutdown of the HEMT. When the gate-source voltage is less than or equal to the threshold voltage, the enhanced HEMT is in the off state, and when the gate-source voltage is greater than the threshold voltage, the enhanced HEMT is in the on state.

[0050] Figure 2 FIG. 1 is a flow chart of another method for measuring the background carrier concentration of a HEMT provided by an embodiment of the present disclosure. Figure 2 As shown, the measurement method includes:

[0051] In step S2001, a reference capacitance per unit area and a first measured gate-source capacitance of the HEMT are obtained.

[0052] Optionally, the HEMT is made by a first epitaxial wafer, and the first epitaxial wafer has a PCM test area and a functional area. The functional area is used to form the HEMT, the PCM test area is used to form a stacked structure, and the PCM test area is not used to form the HEMT. The film layer stacking structure of the stacked structure is the same as the film layer stacking structure of the HEMT, and the film layer pattern of the stacked structure is different from the film layer pattern of the HEMT. That is, the material, stacking sequence and thickness of the film layer of the stacked structure and the HEMT in the vertical direction are the same. For example, in the vertical direction, the stacked structure and the HEMT both include a channel layer, a barrier layer, a cap layer, a passivation layer and a metal electrode layer stacked in sequence. The film patterns of the stacked structure and the HEMT are different, wherein the patterns of the channel layer, barrier layer, cap layer, passivation layer and metal electrode layer of the stacked structure are roughly the same as the shape of the PCM test area and have a larger area, while the patterns of the various film layers of the HEMT are more complex and have a smaller area. For example, the metal electrode layer of the HEMT includes a gate, a source and a drain, and the film patterns of the gate, source and drain are complex and have a smaller area. The stacked structure in the PCM test area of ​​the first epitaxial wafer is described below in conjunction with the accompanying drawings.

[0053] Figure 3 It is a structural schematic diagram of a stacked structure in a PCM test area of ​​a first epitaxial wafer provided in an embodiment of the present disclosure. Figure 3 Part (a) is a top view of the stacked structure in the PCM test area of ​​the first epitaxial wafer. Figure 3 Part (b) is a schematic cross-sectional view of the stacked structure in the PCM test area of ​​the first epitaxial wafer. Figure 3 As shown, the stacked structure is located in the PCM test area, and the stacked structure includes a channel layer 10, a barrier layer 20, a cap layer 30, a passivation layer 40 and a metal electrode layer 50 stacked in sequence.

[0054] Optionally, the PCM test area is a circular area or a rectangular area.

[0055] In the embodiment of the present disclosure, the PCM test area is a circular area. The outer contours of the orthographic projections of the channel layer 10, the barrier layer 20, the cap layer 30, the passivation layer 40 and the metal electrode layer 50 on the bearing surface are all circular.

[0056] Exemplarily, the metal electrode layer 50 includes a first test electrode 51 and a second test electrode 52, the second test electrode 52 is located at the periphery of the first test electrode 51 and is spaced apart from the first test electrode 51, the second test electrode 52 penetrates the passivation layer 40, the cap layer 30 and the barrier layer 20, and the second test electrode 52 is connected to the channel layer 10.

[0057] Exemplarily, the first test electrode 51 is a cylindrical structure, and the second test electrode 52 is a circular ring structure.

[0058] Exemplarily, the diameter of the PCM test area is 100 μm to 1000 μm.

[0059] Optionally, the channel layer 10 may be a GaN channel layer.

[0060] Exemplarily, the thickness of the channel layer 10 is 200 nm to 500 nm.

[0061] Optionally, the barrier layer 20 may be an AlGaN barrier layer.

[0062] Exemplarily, the barrier layer 20 has a thickness of 20 nm to 30 nm.

[0063] Optionally, the cap layer 30 may be a GaN layer.

[0064] Exemplarily, the cap layer 30 has a thickness of 1 nm to 5 nm.

[0065] Optionally, the passivation layer 40 may be a SiN layer.

[0066] Exemplarily, the thickness of the passivation layer 40 is 10 nm to 100 nm.

[0067] Optionally, the thickness of the first test electrode 51 is 400 nm to 600 nm.

[0068] By way of example, the thickness of the first test electrode 51 may be 400 nm, 500 nm, or 600 nm.

[0069] Optionally, obtaining the reference capacitance per unit area in the above step S2001 may include the following steps:

[0070] The first step is to obtain a second measured gate-source capacitance and a measured gate-source capacitance area of ​​the stacked structure.

[0071] Exemplarily, a capacitance test device can be used to connect the first test electrode 51 and the second test electrode 52 of the stacked structure respectively, obtain the second measured gate-source capacitance when the gate-source voltage is in the voltage range of -25V to 25V, and calculate the measured gate-source capacitance area of ​​the stacked structure according to the diameter of the PCM test area. Here, the second measured gate-source capacitance changes with the gate-source voltage, and the measured gate-source capacitance area is a fixed value.

[0072] Since the film layer pattern of the stacked structure in the PCM test area of ​​the first epitaxial wafer is simple, the influence of the preparation process on the stacked structure is small, and the area of ​​the PCM test area is large, the measured gate-source capacitance area of ​​the stacked structure can be calculated more accurately.

[0073] For example, the frequency of the test signal of the capacitance test device may be 1 kHz to 5 MHz. When the frequency of the test signal is within this range, the capacitance test device can obtain the second measured gate-source capacitance more accurately.

[0074] The second step is to determine a reference capacitance per unit area according to the second measured gate-source capacitance and the measured gate-source capacitance area.

[0075] Exemplarily, the corresponding relationship curve between the capacitance per unit area and the gate-source voltage of the stacked structure can be determined based on the corresponding relationship between the second measured gate-source capacitance and the gate-source voltage and the measured gate-source capacitance area. Then, the reference capacitance per unit area can be determined based on the corresponding relationship curve between the capacitance per unit area and the gate-source voltage of the stacked structure.

[0076] For example, the capacitance per unit area of ​​the stacked structure can be calculated using the following formula (1):

[0077]

[0078] Among them, Cgs norm is the capacitance per unit area of ​​the stacked structure, Area0 is the measured gate-source capacitance area, and Cgs2 is the second measured gate-source capacitance.

[0079] Figure 4 1 is a schematic diagram of a corresponding relationship curve between the capacitance per unit area and the gate-source voltage of a stacked structure provided by an embodiment of the present disclosure. Figure 4 As shown in the figure, as the gate-source voltage Vgs gradually increases, the unit area capacitance Cgs of the stacked structure norm It gradually increases first, and then approaches saturation at the back end, that is, at the back end, as the gate-source voltage Vgs further increases, Cgs norm The size of does not change. Since HEMT is an enhanced HEMT, the characteristics of the stacked structure are the same as those of the enhanced HEMT. As the gate-source voltage gradually increases, the change in the curve corresponds to the HEMT changing from an off state to an on state.

[0080] For example, Cgs can be expressed as norm The terminal saturation value is determined as the reference capacitance per unit area Cgs norm0 .Cgs norm The terminal saturation value is also the capacitance per unit area of ​​the corresponding stacked structure in the on state, so that the reference capacitance per unit area in the normal on state can be determined more accurately.

[0081] Since the functional region for forming the HEMT and the PCM test region for forming the stacked structure are different regions of the first epitaxial wafer, the same film layers of the HEMT and the stacked structure are formed under the same growth conditions. Therefore, the reference capacitance per unit area obtained by the second measured gate-source capacitance and the measured gate-source capacitance area of ​​the stacked structure is more consistent with the actual manufacturing process conditions, which is conducive to reducing errors.

[0082] According to the first step to the second step above, the reference capacitance per unit area can be obtained.

[0083] In another possible implementation, the theoretical capacitance per unit area of ​​the stacked structure in the PCM test region of the first epitaxial wafer may also be calculated, and the calculated theoretical capacitance per unit area may be used as the reference capacitance per unit area.

[0084] Exemplarily, the reference capacitance per unit area may be determined according to the following formula (2).

[0085]

[0086] Among them, Cgs norm0 is the reference capacitance per unit area, ε0 is the vacuum dielectric constant, ε n is the relative dielectric constant of each film layer on the channel of the stacked structure, d n is the thickness of each film layer on the channel of the stacked structure.

[0087] For example, Figure 3 In the stacked structure shown, the barrier layer 20 can be an AlGaN barrier layer, ε1 is the relative dielectric constant of AlGaN, and d1 is the thickness of the barrier layer; the cap layer 30 can be a GaN layer, ε2 is the relative dielectric constant of GaN, and d2 is the thickness of the cap layer; the passivation layer 40 can be a SiN layer, ε3 is the relative dielectric constant of SiN, and d3 is the thickness of the passivation layer; ε4 is the relative dielectric constant of the first test electrode 51 in the metal electrode layer 50, and d4 is the thickness of the first test electrode 51 in the metal electrode layer.

[0088] In this way, the reference capacitance per unit area can also be obtained, and there is no need to use capacitance testing equipment for testing, which can simplify the steps.

[0089] It should be noted that the above formula (2) only calculates other film layers on the channel layer 10, and the channel layer itself does not participate in the calculation.

[0090] For example, the first measured gate-source capacitance of the HEMT can be measured by connecting the gate and source in the metal electrode layer of the HEMT respectively with a capacitance test device, in the same manner as the second measured gate-source capacitance. Similarly, the first measured gate-source capacitance changes with the gate-source voltage of the HEMT.

[0091] In step S2002, a first correspondence between a two-dimensional electron gas concentration in a channel of a HEMT and a gate-source capacitance area calibration parameter is obtained.

[0092] Since the actual film pattern of the HEMT is different from the film pattern of the stacked structure, the actual film pattern of the HEMT is more complicated than the film pattern of the stacked structure. Therefore, the gate-source capacitance area calibration parameter is set to calibrate the gate-source capacitance area of ​​the HEMT.

[0093] Optionally, the first corresponding relationship can be represented by the following formula (3) to formula (5):

[0094] Cg norm1 =Cgs norm0 ×(1+p) (3)

[0095]

[0096]

[0097] Among them, Cgs norm0 is the reference capacitance per unit area, Cgs norm1 is the unit area capacitance of HEMT, p is the gate-source capacitance area calibration parameter, Ncv is the carrier concentration of HEMT, q is the charge, ε0 is the vacuum dielectric constant, ε eff is the relative dielectric constant, V is the voltage, C is the capacitance, ns is the two-dimensional electron gas concentration, and z is the channel depth.

[0098] Here, the gate-source capacitance area calibration parameter p is a preset interval range. Formula (3) reflects the unit area capacitance Cgs of HEMT norm1 The corresponding relationship between the gate-source capacitance area calibration parameter p and the gate-source capacitance area calibration parameter p is shown in formula (4). norm1 Formula (5) reflects the corresponding relationship between the two-dimensional electron gas concentration and the carrier concentration Ncv. Combining formula (3), formula (4) and formula (5), the first corresponding relationship between the two-dimensional electron gas concentration ns and the gate-source capacitance area calibration parameter p can be obtained.

[0099] For example, the relative dielectric constant can be obtained according to the following formula (6):

[0100]

[0101] Among them, ε eff is the relative dielectric constant, ε0 is the vacuum dielectric constant, Cgs norm1 is the capacitance per unit area of ​​HEMT, d mis the thickness of each film layer on the channel of HEMT.

[0102] In step S2003 , a target gate-source capacitance area calibration parameter is determined according to the target two-dimensional electron gas concentration and the first corresponding relationship.

[0103] In a possible implementation manner, the target two-dimensional electron gas concentration is a weighted average value of a two-dimensional electron gas concentration in a channel of the HEMT with respect to a gate-source capacitance area calibration parameter.

[0104] For example, the weighted average value of the two-dimensional electron gas concentration in the channel of the HEMT with respect to the gate-source capacitance area calibration parameter may be determined according to the following formula (7):

[0105]

[0106] Among them, ns ave is the weighted average value of the two-dimensional electron gas concentration in the channel of the HEMT with respect to the gate-source capacitance area calibration parameter, ns is the two-dimensional electron gas concentration, p1 is the lower limit value of the gate-source capacitance area calibration parameter, p2 is the upper limit value of the gate-source capacitance area calibration parameter, and p is the gate-source capacitance area calibration parameter.

[0107] In this way, the weighted average value ns of the two-dimensional electron gas concentration in the HEMT channel with respect to the gate-source capacitance area calibration parameter is calculated. ave Determining the target two-dimensional electron gas concentration can make the target two-dimensional electron gas concentration calculated after setting the gate-source capacitance area calibration parameter p closer to the actual value of the two-dimensional electron gas concentration in the channel of the HEMT, and there is no need to use other additional testing equipment to test the two-dimensional electron gas concentration, which can simplify the steps.

[0108] Exemplarily, the interval range of the gate-source capacitance area calibration parameter p can be set to -0.99 to 1, that is, the lower limit value p1 of the gate-source capacitance area calibration parameter can be -0.99, and the upper limit value p2 of the gate-source capacitance area calibration parameter can be 1. Substituting p1 and p2 into formula (7), the target two-dimensional electron gas concentration can be obtained, that is, the weighted average value ns of the two-dimensional electron gas concentration in the channel of the HEMT with respect to the gate-source capacitance area calibration parameter ave .

[0109] In another possible implementation, the target two-dimensional electron gas concentration is obtained by performing a Hall test on the two-dimensional electron gas concentration in the channel of the HEMT. The method of the Hall test can be referred to in the related art, and the present disclosure will not elaborate on it here. The target two-dimensional electron gas concentration obtained by performing a Hall test on the two-dimensional electron gas concentration in the channel of the HEMT is closer to the actual value of the two-dimensional electron gas concentration in the channel of the HEMT.

[0110] Optionally, step S2003 may include: in the first corresponding relationship, determining the gate-source capacitance area calibration parameter with the smallest absolute value corresponding to the target two-dimensional electron gas concentration as the target gate-source capacitance area calibration parameter. In this way, the calibration amplitude of the gate-source capacitance area of ​​the HEMT by introducing the target gate-source capacitance area calibration parameter can be smaller, which is conducive to making the equivalent gate-source capacitance area determined subsequently closer to the actual gate-source capacitance area of ​​the HEMT.

[0111] Exemplarily, a first correspondence curve can be determined based on the first correspondence, and then, based on the target two-dimensional electron gas concentration, the gate-source capacitance area calibration parameter with the smallest absolute value corresponding to the target two-dimensional electron gas concentration in the first correspondence curve is determined as the target gate-source capacitance area calibration parameter.

[0112] Figure 5 It is a schematic diagram of a first corresponding relationship curve between a two-dimensional electron gas concentration in a channel of a HEMT and a gate-source capacitance area calibration parameter provided by an embodiment of the present disclosure. Figure 5 In the equation, the horizontal axis is the gate-source capacitance area calibration parameter p, and the vertical axis is the two-dimensional electron gas concentration ns. Here, Figure 5 Only the first corresponding relationship curve where the gate-source capacitance area calibration parameter p ranges from -0.5 to 0.5 is shown.

[0113] For example, the target two-dimensional electron gas concentration ns may be used. ave The value of Figure 5 A straight line parallel to the horizontal axis is drawn in the graph, and the horizontal axis corresponding to the intersection point with the smallest absolute value of the horizontal axis among the intersection points of the straight line and the first corresponding relationship curve is determined as the target gate-source capacitance area calibration parameter p0.

[0114] In other embodiments, ns=ns ave Substitute into the first corresponding relationship determined by the above formula (3), formula (4) and formula (5) for calculation, and determine the gate-source capacitance area calibration parameter with the smallest absolute value as the target gate-source capacitance area calibration parameter p0.

[0115] Optionally, the target gate-source capacitance area calibration parameter is -0.99 to 1. This is conducive to making the equivalent gate-source capacitance area obtained subsequently closer to the actual gate-source capacitance area of ​​the HEMT, thereby improving the accuracy of the measured background carrier concentration of the HEMT.

[0116] Exemplarily, the target gate-source capacitance area calibration parameter may be -0.5 to 0.5.

[0117] In step S2004, an equivalent gate-source capacitance area is determined according to the reference capacitance per unit area, the first measured gate-source capacitance and the target gate-source capacitance area calibration parameter.

[0118] Alternatively, the equivalent gate-source capacitance area can be determined according to the following formula (8):

[0119]

[0120] Among them, Area1 is the equivalent gate-source capacitance area, Cgs1 is the first measured gate-source capacitance, and Cgs norm0 is the reference capacitance per unit area, and p0 is the target gate-source capacitance area calibration parameter.

[0121] Through the above steps S2002 to S2004, the equivalent gate-source capacitance area of ​​the HEMT can be determined according to the reference capacitance per unit area and the first measured gate-source capacitance.

[0122] In step S2005, a calibration capacitance per unit area of ​​the HEMT is determined according to the first measured gate-source capacitance and the equivalent gate-source capacitance area.

[0123] Exemplarily, a correspondence curve between the capacitance per unit area and the gate-source voltage of the HEMT can be determined based on the correspondence between the first measured gate-source capacitance and the gate-source voltage and the equivalent gate-source capacitance area, and then a calibration capacitance per unit area of ​​the HEMT can be determined based on the correspondence curve between the capacitance per unit area and the gate-source voltage of the HEMT.

[0124] For example, the capacitance per unit area of ​​a HEMT can be calculated using the following formula (9):

[0125]

[0126] Among them, Cgs norm1 is the unit area capacitance of HEMT, Area1 is the equivalent gate-source capacitance area, and Cgs1 is the first measured gate-source capacitance.

[0127] Figure 6 1 is a schematic diagram of a corresponding relationship curve between the unit area capacitance and the gate-source voltage of a HEMT provided by an embodiment of the present disclosure. Figure 6 As shown in Figure 2, as the gate-source voltage Vgs gradually increases, the unit area capacitance Cgs of the HEMT norm1 It gradually increases first, and then approaches saturation at the back end, that is, at the back end, as the gate-source voltage Vgs further increases, Cgs norm1 The size of does not change. In the process of the gate-source voltage gradually increasing, the change of the curve corresponds to the HEMT changing from the off state to the on state.

[0128] For example, Cgs can be expressed as norm1The terminal saturation value is determined as the calibration capacitance per unit area of ​​the HEMT Cgs norm2 .Cgs norm1 The terminal saturation value is the capacitance per unit area of ​​the HEMT in the on state, so that the calibration capacitance per unit area in the normal on state can be determined more accurately.

[0129] In step S2006, the background carrier concentration of the HEMT is determined according to the calibration capacitance per unit area and the channel depth of the HEMT.

[0130] Optionally, step S2006 may include the following steps:

[0131] In the first step, the capacitance per unit area of ​​the HEMT with different channel depths is determined based on the calibration capacitance per unit area and the channel depth of the HEMT.

[0132] For example, the capacitance per unit area of ​​a HEMT with different channel depths can be determined according to the following formula (10):

[0133]

[0134] Among them, Cgs normz Cgs is the capacitance per unit area of ​​HEMT with different channel depths norm2 is the calibration capacitance per unit area, ε0 is the vacuum dielectric constant, ε GaN is the relative dielectric constant of the GaN channel layer, and z is the channel depth.

[0135] In the second step, a second corresponding relationship between the carrier concentration and the channel depth of the HEMT is determined according to the unit area capacitance of the HEMT at different channel depths.

[0136] For example, Cgs norm1 =Cgs normz Substituting into the above formula (4) and formula (6), the second corresponding relationship between the carrier concentration Ncv of the HEMT and the channel depth is calculated.

[0137] The third step is to determine the background carrier concentration of the HEMT according to the second corresponding relationship.

[0138] Figure 7 is a schematic diagram of a second corresponding relationship curve between carrier concentration and channel depth of a HEMT provided by an embodiment of the present disclosure. Figure 7 As shown, the abscissa of the second corresponding relationship curve is the channel depth z, and the ordinate of the second corresponding relationship curve is the carrier concentration Ncv.

[0139] For example, the second correspondence curve can be determined based on the second correspondence. The background carrier concentration corresponds to the carrier concentration of the surface of the channel layer of the HEMT away from the barrier layer, so the thickness of the channel layer of the HEMT can be determined as the channel depth, and the carrier concentration corresponding to the channel depth in the second correspondence curve is determined as the background carrier concentration of the HEMT.

[0140] Figure 8 1 is a structural block diagram of a device for measuring the background carrier concentration of a HEMT provided by an embodiment of the present disclosure. Figure 8 As shown, the measuring device 1000 includes an acquisition module 100, a first determination module 200, a second determination module 300 and a third determination module 400. The acquisition module 100 is used to acquire a reference capacitance per unit area and a first measured gate-source capacitance of the HEMT, the reference capacitance per unit area being the capacitance of the stacked structure per unit area, and the film layer stacking structure of the stacked structure is the same as the film layer stacking structure of the HEMT. The first determination module 200 is used to determine the equivalent gate-source capacitance area of ​​the HEMT according to the reference capacitance per unit area and the first measured gate-source capacitance. The second determination module 300 is used to determine the calibration capacitance per unit area of ​​the HEMT according to the first measured gate-source capacitance and the equivalent gate-source capacitance area. The third determination module 400 is used to determine the background carrier concentration of the HEMT according to the calibration capacitance per unit area and the channel depth of the HEMT.

[0141] Fig. 9 is a structural block diagram of a first determination module provided by an embodiment of the present disclosure. Fig. 9 As shown, the first determination module 200 includes a first acquisition unit 201, a first determination unit 202 and a second determination unit 203. The first acquisition unit 201 is used to obtain a first correspondence between the two-dimensional electron gas concentration in the channel of the HEMT and the gate-source capacitance area calibration parameter. The first determination unit 202 is used to determine the target gate-source capacitance area calibration parameter according to the target two-dimensional electron gas concentration and the first correspondence. The target two-dimensional electron gas concentration is a weighted average of the two-dimensional electron gas concentration in the channel of the HEMT with respect to the gate-source capacitance area calibration parameter, or the target two-dimensional electron gas concentration is obtained by performing a Hall test on the two-dimensional electron gas concentration in the channel of the HEMT. The second determination unit 203 is used to determine the equivalent gate-source capacitance area according to the reference capacitance per unit area, the first measured gate-source capacitance and the target gate-source capacitance area calibration parameter.

[0142] Optionally, the first determining unit 202 is configured to determine, in the first corresponding relationship, a gate-source capacitance area calibration parameter with a minimum absolute value corresponding to a target two-dimensional electron gas concentration as a target gate-source capacitance area calibration parameter.

[0143] Optionally, the second determining unit 203 is used to determine the equivalent gate-source capacitance area according to the above formula (8).

[0144] It should be noted that the device for measuring the background carrier concentration of the HEMT provided in the above embodiment only uses the division of the above functional modules and functional units as an example when measuring the background carrier concentration of the HEMT. In practical applications, the above functions can be assigned to different functional modules and functional units as needed, that is, the internal structure of the device is divided into different functional modules and functional units to complete all or part of the functions described above. In addition, the device for measuring the background carrier concentration of the HEMT provided in the above embodiment and the embodiment of the method for measuring the background carrier concentration of the HEMT belong to the same concept, and the specific implementation process is detailed in the method embodiment, which will not be repeated here.

[0145] Fig.10 1 is a structural block diagram of a device for measuring the background carrier concentration of a HEMT provided by an embodiment of the present disclosure. Fig.10 As shown, the measuring device 2000 includes a processor 500 and a memory 600. The measuring device 2000 may be a computer device or other types of devices.

[0146] The processor 500 may include one or more processing cores, such as a 5-core processor, an 8-core processor, etc. The processor 500 may be implemented in at least one hardware form of digital signal processing (DSP), field-programmable gate array (FPGA), and programmable logic array (PLA). The processor 500 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a central processing unit (CPU); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 500 may be integrated with a graphics processing unit (GPU), and the GPU is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 500 may also include an artificial intelligence (AI) processor, which is used to process computing operations related to machine learning.

[0147] The memory 600 may include one or more computer-readable storage media, which may be non-transitory. The memory 600 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In some embodiments, the non-transitory computer-readable storage medium in the memory 600 is used to store at least one instruction, which is used to be executed by the processor 500 to implement the method for measuring the background carrier concentration of the HEMT provided in the embodiment of the present disclosure.

[0148] Those skilled in the art will understand that Fig.10 The structure shown in the figure does not constitute a limitation on the device for measuring the background carrier concentration of the HEMT, and may include more or less components than those shown in the figure, or combine some components, or adopt a different arrangement of components.

[0149] Exemplarily, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 600 including instructions, and the instructions can be executed by the processor 500 of the HEMT background carrier concentration measurement device 2000 to perform the above-mentioned HEMT background carrier concentration measurement method. For example, the non-transitory computer-readable storage medium can be a read-only memory, a random access memory, an optical disk, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0150] Exemplarily, a computer program product is also provided, including a computer program / instruction, which, when executed by a processor, implements the method for measuring the background carrier concentration of the HEMT provided in the embodiment of the present disclosure.

[0151] The above description does not limit the present disclosure in any form. Although the present disclosure has been disclosed as above through the embodiments, it is not used to limit the present disclosure. Any technician familiar with the profession can make some changes or modifications to equivalent embodiments of equivalent changes using the technical contents disclosed above without departing from the scope of the technical solution of the present disclosure. However, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present disclosure without departing from the content of the technical solution of the present disclosure still falls within the scope of the technical solution of the present disclosure.

Claims

1. A method for measuring background carrier concentration of a high electron mobility transistor, characterized in that: include: Obtaining a reference capacitance per unit area and a first measured gate-source capacitance of a high electron mobility transistor, wherein the reference capacitance per unit area is a capacitance per unit area of ​​a stacked structure, and a film layer stacking structure of the stacked structure is the same as a film layer stacking structure of the high electron mobility transistor; Determining an equivalent gate-source capacitance area of ​​the high electron mobility transistor according to the reference capacitance per unit area and the first measured gate-source capacitance; Determining a calibration capacitance per unit area of ​​the high electron mobility transistor according to the first measured gate-source capacitance and the equivalent gate-source capacitance area; The background carrier concentration of the high electron mobility transistor is determined according to the calibration capacitance per unit area and the channel depth of the high electron mobility transistor.

2. The measuring method according to claim 1, characterized in that: The step of determining the equivalent gate-source capacitance area of ​​the high electron mobility transistor according to the reference capacitance per unit area and the first measured gate-source capacitance comprises: Acquire a first corresponding relationship between a two-dimensional electron gas concentration in a channel of the high electron mobility transistor and a gate-source capacitance area calibration parameter; determining a target gate-source capacitance area calibration parameter according to a target two-dimensional electron gas concentration and the first corresponding relationship, wherein the target two-dimensional electron gas concentration is a weighted average value of the two-dimensional electron gas concentration in the channel of the high electron mobility transistor with respect to the gate-source capacitance area calibration parameter, or the target two-dimensional electron gas concentration is obtained by performing a Hall test on the two-dimensional electron gas concentration in the channel of the high electron mobility transistor; The equivalent gate-source capacitance area is determined according to the reference capacitance per unit area, the first measured gate-source capacitance and the target gate-source capacitance area calibration parameter.

3. The measuring method according to claim 2, characterized in that: The first corresponding relationship is represented by the following formula: Cgs norm1 =Cgs norm0 ×(1+p) Among them, Cgs norm0 is the reference capacitance per unit area, Cgs norm1 is the capacitance per unit area of ​​the high electron mobility transistor, p is the gate-source capacitance area calibration parameter, Ncv is the carrier concentration of the high electron mobility transistor, q is the charge, ε0 is the vacuum dielectric constant, ε eff is the relative dielectric constant, V is the voltage, C is the capacitance, ns is the two-dimensional electron gas concentration, and z is the channel depth.

4. The measuring method according to claim 3, characterized in that: The step of determining a target gate-source capacitance area calibration parameter according to the target two-dimensional electron gas concentration and the first corresponding relationship includes: In the first corresponding relationship, a gate-source capacitance area calibration parameter with the smallest absolute value corresponding to the target two-dimensional electron gas concentration is determined as the target gate-source capacitance area calibration parameter.

5. The measuring method according to any one of claims 2 to 4, characterized in that: The determining the equivalent gate-source capacitance area according to the reference capacitance per unit area, the first measured gate-source capacitance and the target gate-source capacitance area calibration parameter comprises: The equivalent gate-source capacitance area is determined according to the following formula: Wherein, Area1 is the equivalent gate-source capacitance area, Cgs1 is the first measured gate-source capacitance, and Cgs norm0 is the reference capacitance per unit area, and p0 is the target gate-source capacitance area calibration parameter.

6. The measuring method according to any one of claims 2 to 4, characterized in that: The target gate-source capacitance area calibration parameter is -0.99 to 1.

7. The measuring method according to any one of claims 1 to 4, characterized in that: The high electron mobility transistor is manufactured by a first epitaxial wafer, the first epitaxial wafer has a process control monitor test area, and the stacked structure is located in the process control monitor test area. The obtaining of the reference capacitance per unit area comprises: Obtaining a second measured gate-source capacitance and a measured gate-source capacitance area of ​​the stacked structure; The reference capacitance per unit area is determined according to the second measured gate-source capacitance and the measured gate-source capacitance area.

8. The measuring method according to any one of claims 1 to 4, characterized in that: The high electron mobility transistor is manufactured by a first epitaxial wafer, the first epitaxial wafer has a process control monitor test area, and the stacked structure is located in the process control monitor test area. The obtaining of the reference capacitance per unit area comprises: The reference capacitance per unit area is determined according to the following formula: Among them, Cgs norm0 is the reference capacitance per unit area, ε0 is the vacuum dielectric constant, ε n is the relative dielectric constant of each film layer on the channel of the stacked structure, d n is the thickness of each film layer on the channel of the stacked structure.

9. A device for measuring background carrier concentration of a high electron mobility transistor, characterized in that: include: An acquisition module, used to acquire a reference capacitance per unit area and a first measured gate-source capacitance of a high electron mobility transistor, wherein the reference capacitance per unit area is a capacitance per unit area of ​​a stacked structure, and a film layer stacking structure of the stacked structure is the same as a film layer stacking structure of the high electron mobility transistor; A first determining module, configured to determine an equivalent gate-source capacitance area of ​​the high electron mobility transistor according to the reference capacitance per unit area and the first measured gate-source capacitance; A second determination module, configured to determine a calibration capacitance per unit area of ​​the high electron mobility transistor according to the first measured gate-source capacitance and the equivalent gate-source capacitance area; The third determination module is used to determine the background carrier concentration of the high electron mobility transistor according to the calibration capacitance per unit area and the channel depth of the high electron mobility transistor.

10. A device for measuring background carrier concentration of a high electron mobility transistor, characterized in that: include: processor; a memory for storing processor-executable instructions; The processor is configured to execute the method for measuring the background carrier concentration of a high electron mobility transistor according to any one of claims 1 to 8.

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