High electron mobility transistor epitaxial structure and manufacturing method thereof
By growing a boron-doped buffer layer on a sapphire substrate and gradually reducing the boron component, the lattice and thermal mismatch between GaN and Si substrate is solved, and a high-quality GaN epitaxial structure and a high-performance GaN high electron mobility transistor are achieved.
Patent Information
- Application Number
- CN202411925848.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-25
- Publication Date
- 2025-03-21
- Estimated Expiration
- 2044-12-25
AI Technical Summary
The lattice and thermal mismatch between GaN and Si substrates lead to difficulties in epitaxial processes, and the prepared GaN devices have problems with leakage, reliability and consistency.
A boron-doped first buffer layer is grown on the sapphire substrate, and a boron-free buffer layer is formed by gradually reducing the boron component to zero, followed by a boron-doped second buffer layer, and finally a GaN high-resistance layer and a GaN epitaxial layer are grown in sequence.
It significantly reduces lattice mismatch, improves the crystal quality of the epitaxial layer, reduces the leakage of the device, and improves the consistency of GaN high electron mobility transistors and the operating performance under high current density and high voltage.
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Figure CN119673761A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductors, and in particular to a transistor epitaxial structure and a manufacturing method thereof. Background Art
[0002] Gallium nitride has become a third-generation semiconductor material due to its advantages such as large wide bandgap, low dielectric constant, high electron saturation velocity, spontaneous polarization, and thermal stability. AlGaN / GaN produces a high electron density and large electron mobility two-dimensional electron gas at the material interface. The prepared high electron mobility transistor has significant advantages in high switching frequency, low on-resistance, high current density, and high operating temperature. Limited by the technology and cost of self-supporting substrates, the main way to realize GaN devices is heteroepitaxial growth. In the field of GaN-based power devices, Si substrates have advantages in large size, process technology, and cost, and can realize the integration of microelectronic devices and optoelectronic devices, making it a candidate substrate material for GaN epitaxy, which can promote the development of power devices towards commercialization. However, the large lattice mismatch (17%) and thermal mismatch (116%) between GaN and Si substrates, uncontrolled defect management, and high dislocation density make the epitaxial process difficult. The prepared power devices are difficult to suppress leakage, difficult to achieve high withstand voltage, and have problems such as reliability and consistency. The misfit dislocation between GaN and SiC substrates is only 3.5%, which can significantly reduce the defects of the epitaxial layer, improve the quality of the epitaxial crystal, and reduce device leakage. However, the SiC substrate is expensive, which limits the large-scale mass production of GaN / SiC devices.
[0003] In comparison, the lattice mismatch (16%) and thermal mismatch (25%) between GaN and sapphire substrates are smaller, the substrate price is low, and the sapphire substrate has high insulation characteristics. The technology of epitaxial growth of GaN materials is quite mature, easy to clean and handle, and can grow stably in large sizes. It is currently a common substrate for growing GaN materials, and has been commercialized in the field of light-emitting diodes and successfully applied on a large scale. However, the reliability and consistency of related devices still need to be further improved.
[0004] Therefore, there is an urgent need for a transistor epitaxial structure and a manufacturing method thereof that can solve the above problems. Summary of the invention
[0005] The purpose of the present invention is to provide a high electron mobility transistor epitaxial structure and a manufacturing method thereof, which can effectively improve the defect density of the device, reduce leakage, and improve the stability and consistency of the device.
[0006] In order to achieve the above-mentioned objectives, the present invention provides a method for manufacturing an epitaxial structure of a high electron mobility transistor, comprising: providing a sapphire substrate; growing a boron-doped first buffer layer on the sapphire substrate: during growth, gradually reducing the boron component in the reaction material from a first preset value to 0 within a first preset time, and continuing to grow for a second preset time after the boron component is reduced to 0, so that in the first buffer layer, x gradually becomes smaller, and the boron component gradually decreases to 0 from bottom to top; growing a second buffer layer of GaN that is not doped with boron on the first buffer layer, the growth rate of the second buffer layer is lower than the growth rate of the first buffer layer, and the thickness of the second buffer layer is greater than the thickness of the first buffer layer; and sequentially growing a GaN high resistance layer and a GaN epitaxial layer on the second buffer layer.
[0007] Preferably, the first buffer layer is B with x decreasing from bottom to top. x Q 1-x N buffer layer, element Q is a metal element. Of course, the first buffer layer can also be other structures containing boron and nitrogen elements.
[0008] Specifically, the element Q is the element aluminum or the element gallium, and the first buffer layer is a B layer with x decreasing from bottom to top. x Al 1-x N buffer layer or B with x decreasing from bottom to top x Ga 1-x N buffer layer.
[0009] Preferably, when growing a boron-doped first buffer layer on the sapphire substrate, the V / III ratio is 1500, the first preset time is 5 to 25 minutes, the second preset time is 5 minutes, the first preset value is 0.6, the growth temperature is 850-1150 degrees Celsius, the growth gas pressure is 100-500mbar, the growth rate is 100nm / h to 300nm / h, and the thickness of the first buffer layer after growth is completed is 15-35nm.
[0010] Preferably, when growing the second buffer layer, the growth temperature is 900 degrees Celsius, the growth pressure is 100 mbar, the growth rate is 2 μm / h, and the thickness of the second buffer layer after the growth is completed is 200-500 nm.
[0011] Preferably, the GaN high resistance layer is a C-doped GaN high resistance layer, and the GaN epitaxial layer is a GaN channel layer, a barrier layer and a GaN cap layer sequentially grown on the GaN high resistance layer. The GaN high resistance layer can effectively inhibit the current from passing through the buffer layer, reduce leakage, and improve device performance.
[0012] Specifically, when growing a C-doped GaN high-resistance layer on the second buffer layer, ammonia and trimethylgallium are used as nitrogen sources and gallium sources, respectively, and hexene is used as a doping source. During the growth, the growth temperature is slowly increased to 1000 degrees Celsius, and the growth pressure is slowly changed to 75mbar. When the temperature and pressure change, ammonia, trimethylgallium and hexene are introduced; after the growth, the C doping concentration in the GaN high-resistance layer is 5E18-1E19cm -3 , the thickness of GaN high resistance layer is 500-1500nm.
[0013] Specifically, sequentially growing a GaN channel layer, a barrier layer and a GaN cap layer on the GaN high resistance layer specifically includes: using ammonia and trimethylgallium as a nitrogen source and a gallium source, respectively, controlling the growth temperature at 1080 degrees Celsius and the growth pressure at 200 mbar, and growing the GaN channel layer on the GaN high resistance layer at a growth rate of 2.5 μm / h, wherein the thickness of the GaN channel layer is 150-300 nm; using ammonia, trimethylgallium and trimethylaluminum as a nitrogen source, a gallium source and an aluminum source, respectively, raising the temperature from 1080 degrees Celsius to 1090 degrees Celsius, reducing the growth pressure from 200 mbar to 50 mBar, and growing Al on the GaN channel layer at a growth rate of 0.8 μm / h. y Ga 1-y N, the barrier layer in which y ranges from 18% to 28%, and the thickness is 20-30nm; under the condition of growing the barrier layer, the trimethylaluminum source is turned off, and the growth is continued for a third preset time to grow the GaN cap layer on the barrier layer, and the thickness of the GaN cap layer is 3-5nm.
[0014] The present invention also provides a high electron mobility transistor epitaxial structure, comprising a sapphire substrate, a boron-doped first buffer layer, a boron-free GaN second buffer layer, a GaN high resistance layer and a GaN epitaxial layer, which are sequentially formed on the sapphire substrate; the boron component of the first buffer layer gradually decreases from bottom to top, and a boron-free buffer layer of a preset thickness is formed on the top of the first buffer layer.
[0015] Preferably, the first buffer layer is B with x decreasing from bottom to top. x Q 1-x N buffer layer, element Q is a metal element.
[0016] Specifically, the element Q is the element aluminum or the element gallium, and the first buffer layer is a B layer with x decreasing from bottom to top. x Al 1-x N buffer layer or B with x decreasing from bottom to top x Ga 1-x N buffer layer, the top of the first buffer layer is an AlN layer or a GaN layer.
[0017] Preferably, the thickness of the sapphire substrate is 550-1000 μm, the thickness of the first buffer layer is 15-35 nm, and the thickness of the second buffer layer is 200-500 nm.
[0018] Preferably, the GaN high resistance layer is a C-doped GaN high resistance layer, and the GaN epitaxial layer is a GaN channel layer, a barrier layer and a GaN cap layer sequentially grown on the GaN high resistance layer. The GaN high resistance layer can effectively inhibit the current from passing through the buffer layer, reduce leakage, and improve device performance.
[0019] Specifically, the C doping concentration in the GaN high resistance layer is 5E18-1E19cm -3 , the thickness of GaN high resistance layer is 500-1500nm.
[0020] Specifically, the barrier layer is Al y Ga 1-y N barrier layer.
[0021] More specifically, the thickness of the GaN channel layer is 150-300 nm, and the Al y Ga 1-y The range of y in the N barrier layer is 18% to 28%, the thickness is 20-30 nm, and the thickness of the GaN cap layer is 3-5 nm.
[0022] Compared with the prior art, since the first buffer layer contains boron, the lattice mismatch between it and the sapphire substrate is extremely low, and is lower than the lattice mismatch between gallium nitride and sapphire. Therefore, the present invention deposits a boron-doped first buffer layer on the sapphire substrate before epitaxially growing GaN, and adjusts the ratio of B in growing the first buffer layer. It is possible to grow a buffer layer with strict lattice matching on the sapphire substrate, and then gradually reduce the boron doping component until it is zero, and finally grow a buffer structure that does not contain boron. Compared with directly growing GaN, the present invention can significantly reduce the lattice mismatch and improve the crystal quality of the epitaxial layer, thereby reducing dislocations and reducing device leakage, and improving the consistency of GaN high electron mobility transistors, as well as their working performance under high current density and high voltage. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 It is a flow chart of the method for manufacturing the epitaxial structure of a high electron mobility transistor in Example 1 of the present invention.
[0024] Figure 2 It is a structural diagram of the epitaxial structure of the high electron mobility transistor in Example 1 of the present invention.
[0025] Figure 3It is a structural diagram of the epitaxial structure of the high electron mobility transistor in Example 2 of the present invention. DETAILED DESCRIPTION
[0026] In order to explain the technical content, structural features, achieved objectives and effects of the present invention in detail, the following is a detailed description in conjunction with the implementation methods and the accompanying drawings.
[0027] Embodiment 1: refer to Figure 1 The present invention discloses a method for manufacturing a high electron mobility transistor epitaxial structure, comprising steps S1 to S5.
[0028] S1, providing a sapphire substrate 10. In this embodiment, the thickness of the sapphire substrate 10 is 550-1000 μm. The diameter of the sapphire substrate 10 is 100 or 150 mm.
[0029] S2 , growing a boron-doped first buffer layer 20 on the sapphire substrate 10 .
[0030] In step S2, during growth, the boron component in the reaction material is gradually reduced from the first preset value to 0 in the first preset time, and the growth is continued for a second preset time after the boron component is reduced to 0, so that in the first buffer layer 20, x gradually becomes smaller, and the boron component is gradually reduced from bottom to top to 0. When the boron-doped first buffer layer 20 is grown on the sapphire substrate 10, the V / III ratio is 1500, the first preset time is 5 to 25 minutes, the second preset time is 5 minutes, the first preset value x is 0.6, the growth temperature is 850-1150 degrees Celsius, the growth pressure is 100-500mbar, the growth rate is 100nm / h to 300nm / h, and the thickness of the first buffer layer 20 after the growth is completed is 15-35nm.
[0031] Specifically, in this embodiment, the first buffer layer 20 is a B layer with x decreasing from bottom to top. x Al 1-x N buffer layer, the top of the first buffer layer 20 is an AlN layer. Of course, the first buffer layer 20 can also be other structures containing boron and nitrogen elements. The first preset value is 0.6, the first preset time is 25 minutes, and the second preset time is 5 minutes.
[0032] B x Al 1-xWhen the N buffer layer is grown: ammonia, triethylboron, and trimethylaluminum are used as nitrogen source, boron source, and aluminum source, respectively. The V / III ratio is 1500. The B component is first fixed at 0.6, and then linearly reduced to 0 within 25 minutes of growth time. Finally, after reaching 0, AlN growth is continued for 5 minutes. The growth temperature is fixed at 900 degrees Celsius, the growth pressure is 100mbar, and the growth rate is controlled at 100nm / h. That is to say, during the entire production process, the growth rate will gradually increase to around 100nm / h and will not exceed 100nm / h. x Al 1-x The thickness of the N buffer layer is 30 nm. The thickness of the AlN layer on the top of the first buffer layer 20 is about 5 nm.
[0033] S3, growing a second buffer layer 30 of GaN not doped with boron on the first buffer layer 20, wherein the growth rate of the second buffer layer 30 is lower than that of the first buffer layer 20, and the thickness of the second buffer layer 30 is greater than that of the first buffer layer 20.
[0034] When growing the second buffer layer 30, ammonia and trimethylgallium are used as nitrogen source and gallium source respectively, the growth temperature is 900 degrees Celsius, the growth pressure is 100mbar, the growth rate is 2μm / h, and the thickness of the second buffer layer 30 after growth is 200-500nm. In this embodiment, the thickness of the second buffer layer 30 is 350nm.
[0035] S4 , sequentially growing a GaN high resistance layer 40 on the second buffer layer 30 .
[0036] The GaN high resistance layer 40 is a C-doped GaN high resistance layer 40. The GaN high resistance layer 40 can effectively inhibit the current from passing through the buffer layer, reduce leakage, and improve device performance.
[0037] Specifically, when growing the C-doped GaN high-resistance layer 40 on the second buffer layer 30, ammonia and trimethylgallium are used as nitrogen source and gallium source respectively, and hexene is used as doping source. During the growth, the growth temperature is slowly increased to 1000 degrees Celsius, and the growth pressure is slowly changed to 75mbar. When the temperature and pressure change, ammonia, trimethylgallium and hexene are introduced. The C doping concentration can be obtained by SIMS test. After the growth, the C doping concentration in the GaN high-resistance layer 40 is 5E18-1E19cm -3 , the GaN high resistance layer 40 has a thickness of 500-1500nm.
[0038] S5 , growing a GaN epitaxial layer 50 on the GaN high resistance layer 40 .
[0039] The GaN epitaxial layer 50 includes a GaN channel layer 51 , a barrier layer 52 and a GaN cap layer 53 which are sequentially grown on the GaN high resistance layer 40 .
[0040] Specifically, sequentially growing a GaN channel layer 51, a barrier layer 52 and a GaN cap layer 53 on the GaN high resistance layer 40 specifically includes: using ammonia and trimethylgallium as a nitrogen source and a gallium source respectively, controlling the growth temperature at 1080 degrees Celsius and the growth pressure at 200 mbar, growing the GaN channel layer 51 on the first buffer layer 20 at a growth rate of 2.5 μm / h, and the thickness of the GaN channel layer 51 is 150-300 nm. Using ammonia, trimethylgallium and trimethylaluminum as a nitrogen source, a gallium source and an aluminum source respectively, raising the temperature from 1080 degrees Celsius to 1090 degrees Celsius, reducing the growth pressure from 200 mbar to 50 mBar, and growing Al on the GaN channel layer 51 at a growth rate of 0.8 μm / h. y Ga 1-y The barrier layer 52 of N, the range of y in the barrier layer 52 is 18% to 28%, the thickness is 20-30nm, the thickness of the barrier layer 52 can be measured by the XRR method, and the components of the barrier layer 52 can be obtained by the XRD method. Under the condition of growing the barrier layer 52, the trimethylaluminum source is turned off, and the growth is continued for a third preset time to grow the GaN cap layer 53 on the barrier layer 52, the thickness of the GaN cap layer 53 is 3-5nm, and the thickness of the GaN cap layer 53 can be measured by the XRR method.
[0041] refer to Figure 1 and Figure 2 The above method can be used to produce a high electron mobility transistor epitaxial structure. The high electron mobility transistor epitaxial structure includes a sapphire substrate 10, a boron-doped first buffer layer 20, a boron-free GaN second buffer layer 30, a GaN high resistance layer and a GaN epitaxial layer 50 formed on the sapphire substrate 10 in sequence; the boron component of the first buffer layer 20 gradually decreases from bottom to top, and a boron-free buffer layer of a preset thickness is formed on the top of the first buffer layer 20. The first buffer layer 20 is a B layer with x gradually decreasing from bottom to top. x Al 1-x N buffer layer. The top of the first buffer layer 20 is an AlN layer.
[0042] The thickness of the sapphire substrate 10 is 550-1000 μm, the thickness of the first buffer layer 20 is 15-35 nm, and the thickness of the second buffer layer 30 is 200-500 nm. The GaN high resistance layer 40 is a C-doped GaN high resistance layer 40, and the GaN epitaxial layer 50 is a GaN channel layer 51, a barrier layer 52, and a GaN cap layer 53 sequentially grown on the GaN high resistance layer 40.
[0043] In this embodiment, the C doping concentration in the GaN high resistance layer 40 is 5E18-1E19cm -3 The GaN high resistance layer 40 has a thickness of 500-1500 nm. The barrier layer 52 is Al y Ga 1-y The thickness of the GaN channel layer 51 is 150-300 nm. y Ga 1-y The range of y in the N barrier layer 52 is 18% to 28%, and the thickness is 20-30 nm. The thickness of the GaN cap layer 53 is 3-5 nm.
[0044] Embodiment 2: refer to Figure 3 Different from the embodiment 1, in this embodiment, the first buffer layer 20a is a B layer with x decreasing from bottom to top. x Ga 1-x N buffer layer, the top of the first buffer layer 20 is a GaN layer. The first preset value x is 0.6, the first preset time length is 15 minutes, and the second preset time length is 5 minutes.
[0045] B x Ga 1-x When the N buffer layer grows: ammonia, triethylboron, and trimethylaluminum are used as nitrogen source, boron source, and aluminum source, respectively. The V / III ratio is 1500. The component of B is first fixed at 0.6, and then linearly reduced to 0 within a growth time of 15 minutes. Finally, GaN is grown for 5 minutes. The growth temperature is fixed at 900 degrees Celsius, the growth pressure is 100 mbar, and the growth rate is less than or equal to 300nm / h.
[0046] The lattice mismatch between BN, AlN and GaN and the sapphire substrate 10 is -8.9%, 13% and 16% respectively. It can be found that if GaN is grown directly on the sapphire substrate 10, a high defect density will be generated due to the high lattice mismatch, thus affecting the device performance. The lattice mismatch between BN and sapphire is a negative value, while the lattice mismatch between AlN, GaN and sapphire are all positive values. Therefore, the present invention deposits a boron-doped buffer layer (first buffer layer 20, 20a) on the sapphire substrate 10 before epitaxially growing GaN, and adjusts the ratio of B when growing the first buffer layer 20, 20a. This can achieve a buffer layer with strict lattice matching grown on the sapphire substrate 10, and then gradually reduces the doping component of boron to zero, and finally grows a layer of AlN or directly grows GaN. Compared with directly growing GaN, the present invention can significantly reduce the lattice mismatch and improve the crystal quality of the epitaxial layer, thereby reducing dislocations and device leakage, and improving the consistency of the GaN high electron mobility transistor, as well as the working performance under high current density and high voltage.
[0047] The above disclosure is only the preferred embodiment of the present invention, which certainly cannot be used to limit the scope of rights of the present invention. Therefore, equivalent changes made according to the scope of the patent application of the present invention are still within the scope covered by the present invention.
Claims
1. A method for manufacturing a high electron mobility transistor epitaxial structure, characterized in that: include: Providing a sapphire substrate; Growing a boron-doped first buffer layer on the sapphire substrate: during the growth, gradually reducing the boron component in the reaction material from a first preset value x to 0 within a first preset time, and continuing to grow for a second preset time after the boron component is reduced to 0, so that in the first buffer layer, x gradually becomes smaller and the boron component gradually decreases to 0 from bottom to top; Growing a second buffer layer of GaN not doped with boron on the first buffer layer, wherein the growth rate of the second buffer layer is lower than the growth rate of the first buffer layer, and the thickness of the second buffer layer is greater than the thickness of the first buffer layer; A GaN high resistance layer and a GaN epitaxial layer are sequentially grown on the second buffer layer.
2. The method for manufacturing a high electron mobility transistor epitaxial structure according to claim 1, wherein: The first buffer layer is a B layer with x decreasing from bottom to top. x Q 1-x N buffer layer, element Q is a metal element.
3. The method for manufacturing a high electron mobility transistor epitaxial structure according to claim 2, wherein: The element Q is the element aluminum or the element gallium, and the first buffer layer is B with x decreasing from bottom to top. x Al 1-x N buffer layer or B with x decreasing from bottom to top x Ga 1-x N buffer layer.
4. The method for manufacturing a high electron mobility transistor epitaxial structure according to claim 1, wherein: When growing a boron-doped first buffer layer on the sapphire substrate, the V / III ratio is 1500, the first preset time is 5 to 25 minutes, the second preset time is 5 minutes, the first preset value x is 0.6, the growth temperature is 850-1150 degrees Celsius, the growth gas pressure is 100-500mbar, the growth rate is 100nm / h to 300nm / h, and the thickness of the first buffer layer after growth is completed is 15-35nm.
5. The method for manufacturing a high electron mobility transistor epitaxial structure according to claim 1, wherein: When growing the second buffer layer, the growth temperature is 900 degrees Celsius, the growth pressure is 100 mbar, the growth rate is 2 μm / h, and the thickness of the second buffer layer after the growth is completed is 200-500 nm.
6. The method for manufacturing a high electron mobility transistor epitaxial structure according to claim 1, wherein: The GaN high resistance layer is a C-doped GaN high resistance layer, and the GaN epitaxial layer is a GaN channel layer, a barrier layer and a GaN cap layer sequentially grown on the GaN high resistance layer.
7. The method for manufacturing a high electron mobility transistor epitaxial structure according to claim 6, wherein: When growing a C-doped GaN high-resistance layer on the second buffer layer, ammonia and trimethylgallium are used as nitrogen source and gallium source respectively, and hexene is used as a doping source. During the growth, the growth temperature is slowly increased to 1000 degrees Celsius, and the growth pressure is slowly changed to 75mbar. When the temperature and pressure change, ammonia, trimethylgallium and hexene are introduced; after the growth, the C doping concentration in the GaN high-resistance layer is 5E18-1E19cm -3 , the thickness of GaN high resistance layer is 500-1500nm.
8. The method for manufacturing a high electron mobility transistor epitaxial structure according to claim 6, wherein: The step of sequentially growing a GaN channel layer, a barrier layer and a GaN cap layer on the GaN high resistance layer specifically includes: Ammonia and trimethylgallium are used as nitrogen source and gallium source respectively, the growth temperature is controlled at 1080 degrees Celsius, the growth pressure is controlled at 200 mbar, and the GaN channel layer is grown on the GaN high resistance layer at a growth rate of 2.5 μm / h, and the thickness of the GaN channel layer is 150-300 nm; Ammonia, trimethylgallium, and trimethylaluminum were used as nitrogen source, gallium source, and aluminum source, respectively. The temperature was raised from 1080 degrees Celsius to 1090 degrees Celsius, and the growth pressure was reduced from 200 mbar to 50 mbar. Al was grown on the GaN channel layer at a growth rate of 0.8 μm / h. y Ga 1-y The barrier layer of N, wherein the range of y in the barrier layer is 18% to 28% and the thickness is 20-30 nm; The trimethylaluminum source is turned off under the condition of growing the barrier layer, and the growth is continued for a third preset time to grow the GaN cap layer on the barrier layer, wherein the thickness of the GaN cap layer is 3-5 nm.
9. A high electron mobility transistor epitaxial structure, characterized in that: It includes a sapphire substrate, a first boron-doped buffer layer, a second boron-free GaN buffer layer, a GaN high-resistance layer and a GaN epitaxial layer, which are sequentially formed on the sapphire substrate; the boron component of the first buffer layer gradually decreases from bottom to top, and a boron-free buffer layer of a preset thickness is formed on the top of the first buffer layer.
10. The high electron mobility transistor epitaxial structure according to claim 9, characterized in that: The first buffer layer is a B layer with x decreasing from bottom to top. x Q 1-x N buffer layer, element Q is a metal element.
11. The high electron mobility transistor epitaxial structure according to claim 10, characterized in that: The element Q is the element aluminum or the element gallium, and the first buffer layer is B with x decreasing from bottom to top. x Al 1-x N buffer layer or B with x decreasing from bottom to top x Ga 1-x N buffer layer, the top of the first buffer layer is an AlN layer or a GaN layer.
12. The high electron mobility transistor epitaxial structure according to claim 9, wherein: The thickness of the sapphire substrate is 550-1000 μm, the thickness of the first buffer layer is 15-35 nm, and the thickness of the second buffer layer is 200-500 nm.
13. The high electron mobility transistor epitaxial structure according to claim 10, characterized in that: The GaN high resistance layer is a C-doped GaN high resistance layer, and the epitaxial functional layer is a GaN channel layer, a barrier layer and a GaN cap layer sequentially grown on the GaN high resistance layer.
14. The high electron mobility transistor epitaxial structure according to claim 13, wherein: The C doping concentration in the GaN high resistance layer is 5E18-1E19cm -3 , the thickness of GaN high resistance layer is 500-1500nm.
15. The high electron mobility transistor epitaxial structure according to claim 13, wherein: The barrier layer is Al y Ga 1-y N barrier layer.
16. The high electron mobility transistor epitaxial structure according to claim 13, characterized in that: The thickness of the GaN channel layer is 150-300 nm, and the Al y Ga 1-y The range of y in the N barrier layer is 18% to 28%, the thickness is 20-30 nm, and the thickness of the GaN cap layer is 3-5 nm.
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