Data driver

Abstract

The invention relates to a data driver circuit, in particular a laser driver. The driver is configured to receive an input signal and generate a respective driver output signal to drive an output device, such as a laser. A bias generator has a first output branch connected to an output node of the bias generator, and a first control loop is configured to control a current in the first output branch to have a explicit relationship with a bandgap reference current to provide a first bias current for biasing the output device. A driver output node is coupled to the driver and also to the output node of the bias generator to output the driver output signal and the first bias current to the output device.

Description

Technical Field

[0001] The present disclosure relates to apparatus and methods for data drivers, particularly laser drivers for driving lasers for optical communications. Background Art

[0002] Optical data transmission has a variety of applications.For optical data transmission, optical radiation is modulated to encode the data to be transmitted, and the modulated optical radiation is typically transmitted to a receiver via an optical link, such as via one or more fiber optic cables.

[0003] Modulated optical radiation may be generated by driving an optical source, typically a laser, to provide a suitably modulated output signal. The modulation may be a modulation of the amplitude of the output optical signal, i.e. a variation of the intensity, wherein the amplitude is varied to form a series of symbols encoding the data. In some cases, the amplitude modulation may be, for example, binary modulation, such that the symbols have high or low amplitudes to encode 1 and 0 respectively (or vice versa), but in some cases the amplitude may be modulated to more than two different defined levels, for example, PAM4 modulation involves modulating each symbol to one of four different amplitude levels in order to encode two bits of data. Thus, the laser driver is arranged to receive the input data to be transmitted and drive the laser to provide the required modulated optical output.

[0004] Laser drivers may often be implemented as integrated circuits, but conventional laser drivers may often use external (ie, off-chip) components such as inductors and / or capacitors, which may increase the size and cost of the driver.

[0005] Other data transmission methods (such as transmitting electrical signals over a suitable wired link) may also use similar data drivers.

[0006] Embodiments of the present disclosure relate to methods and apparatus for data drivers, particularly laser drivers. Summary of the invention

[0007] According to some embodiments, a driver circuit is provided, comprising: a driver configured to receive an input signal and generate a corresponding driver output signal to drive an output device; a bias generator comprising a first output branch connected to an output node of the bias generator, wherein a first control loop is configured to control a current in the first output branch to have a clear relationship with a bandgap reference current to provide a first bias current for biasing the output device; and a driver output node connected to the driver and the output nodes of the bias generator to output the driver output signal and the first bias current to the output device.

[0008] In some implementations, the first output branch of the bias generator may include a first resistor, and the first control loop may be configured to control the current in the first output branch so that a voltage across the first resistor is equal to a voltage across a second resistor, wherein the voltage across the second resistor is defined by the bandgap reference current flowing through the second resistor. The first resistor and the second resistor may be configured to have matched unit resistances.

[0009] In some implementations, the output branch may include a first transistor connected in series between a supply voltage and the first resistor, and the first control loop may include a first operational amplifier for driving the first transistor. A second transistor may be connected in series with the second resistor between the supply voltage and a bandgap reference current source for generating the bandgap reference current. The first control loop may also include a second operational amplifier for driving the second transistor, wherein a first input terminal and a second input terminal of the first operational amplifier are respectively connected to the high sides of the first resistor and the second resistor, and a first input terminal and a second input terminal of the second operational amplifier are respectively connected to the low sides of the first resistor and the second resistor.

[0010] The first control loop may have a certain bandwidth so that at the modulation frequency of the driver output signal, the first output branch operates as a terminal impedance of the driver output signal. In a certain example, the first output branch may include a third resistor connected in series between the first resistor and the output node of the bias generator, and the series resistance of the first resistor and the third resistor may match the terminal impedance of the driver output signal.

[0011] In some implementations, the output node of the bias generator can be coupled to a driver output terminal through an inductor. The inductor can be an integrated inductor formed as part of an integrated circuit together with the bias generator and the driver.

[0012] In some implementations, the bias generator may further include a current generator having a second output branch connected to an output node of the bias generator, wherein the current generator is configured to generate a driver bias current in the second output branch to bias the output current. In some implementations, the driver may include a first driver circuit branch having an input transistor driven by the input signal so that a current in the first driver circuit branch is equal to a clear tail current modified by the driver output signal, and the current generator of the bias generator may be configured to generate a driver bias current equal to the clear tail current. The current generator may be configured to receive a control current related to the clear tail current. In some implementations, the current generator may include a first current generator resistor in the second output branch, and the current generator may be configured to control the current in the second output path so that a voltage across the first current generator resistor matches a voltage across a second current generator resistor, wherein the voltage across the second current generator resistor is defined by the control current, and a ratio of the first generator resistor to the second generator resistor matches a ratio between the control current and the clear tail current.

[0013] In some examples, the driver may be a differential to single-ended shunt driver.

[0014] In some implementations, the driver may be a laser driver for driving a laser as an output device. In this case, the first control loop may be configured to track changes in the laser forward voltage so that the first bias current is independent of the laser forward voltage. One aspect also relates to an apparatus comprising a driver circuit and a laser coupled to the driver via the driver circuit. The laser may include a vertical cavity surface emitting laser diode.

[0015] On the other hand, a driver circuit is provided, comprising: a driver configured to receive an input signal and generate a corresponding driver output signal to drive an output device; a bias generator comprising a first control loop, the first control loop being configured to control a current in a first output branch to provide a first temperature-stable bias current for biasing the output device; and a driver output node connected to the driver and the output node of the bias generator to output the driver output signal and the first bias current to the output device; wherein the first control loop has a bandwidth such that the first output branch acts as a terminal impedance for the driver output signal at a modulation frequency of the driver output signal.

[0016] The first output branch of the bias generator may be coupled to the driver output terminal via an integrated inductor, the integrated inductor and the bias generator and the driver together forming part of an integrated circuit.

[0017] The description herein describes various features and example implementations of the present invention. Generally speaking, unless these features are clearly incompatible, it will be understood that any feature can be implemented in combination with any one or more other features. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to better explain various embodiments and examples of the present disclosure and principles, example implementations and operations thereof, reference will now be made to the following drawings by way of example, in which:

[0019] Figure 1 An example of a laser driver according to an embodiment is illustrated; and

[0020] Figure 2 Another example of a laser driver is illustrated in more detail. DETAILED DESCRIPTION

[0021] Embodiments of the present disclosure relate to data drivers, and in particular data drivers, ie, laser drivers, that can be used to drive a laser for optical communications (ie, as part of an optical transmitter or transceiver).

[0022] Figure 1 An example of a data driver device according to an embodiment is illustrated, in which the data driver device is a laser driver device 100. The laser driver device 100 includes a driver 101 for receiving an input data signal and generating a corresponding output drive signal to drive a laser 102 via a driver output terminal 103. The laser 102 may, for example, include a VCSEL (vertical cavity surface emitting laser) diode. In at least some applications, the laser driver device may be implemented as an integrated circuit, but the laser 102 may be an external (i.e., off-chip) component connected between the driver output terminal 103 and the ground terminal 104. In this example, the driver 101 is a differential to single-ended shunt driver that receives a differential input V INP and V INN and generates a corresponding current signal I for driving the laser 102 MOD , as understood by those skilled in the art.

[0023] The laser driver device further comprises a bias generator 105 for biasing the laser 102 and the driver 101. The bias generator 105 comprises a bias current I for generating a bandgap reference bias current I for biasing the laser 102. BIASNested control loops.

[0024] The bias generator 105 includes a bias current I BIAS The first output circuit branch includes a first resistor R1. The control loop includes a first operational amplifier 106 and a second operational amplifier 107, which are configured in a nested arrangement to control the current through the first resistor R1 so that the voltage across the first resistor R1 is equal to the voltage across the second resistor R2, which is determined by the bandgap reference current I BG Definition. Bandgap reference current I BG The reference current is generated by a bandgap reference current source 108 connected in series with a second resistor R2 (referred to herein as a reference circuit branch).

[0025] Therefore, the current I through the first resistor R1 BIAS is adjusted to be equal to I BG The product of the ratio of the resistors R1 and R2. If, for example, R2 = K*R1, where K is a constant, the bias current will be I BIAS =K*I BG Given.

[0026] exist Figure 1 In the example of , the first operational amplifier 106 is configured to drive a first transistor 109, which is connected in series with a first resistor in the first output circuit branch, and the second operational amplifier 107 is configured to drive a second transistor 110, which is connected in series with a second resistor R2 in the reference circuit branch (on the side of R2 opposite to the current source 108).

[0027] The first input terminal (which may be the inverting input terminal) of the first operational amplifier 106 is connected to the node N1a of the first output circuit branch, which in this example is located between the first transistor 109 and the first resistor R1. The second input terminal (which may be the non-inverting input terminal) of the first operational amplifier 106 is connected to the node N2a of the reference current branch (in this case, between the second transistor 110 and the second resistor R2).

[0028] The first input terminal (which may be the non-inverting input terminal) of the second operational amplifier 107 is connected to the node N1b of the first output circuit branch, which in this example is located on the other side of the first resistor R1 opposite to the node N1a. The second input terminal (which may be the inverting input terminal) of the second operational amplifier 107 is connected to the node N2b of the reference current branch (in this case, between the second transistor 110 and the second resistor R2).

[0029] Essentially, the second operational amplifier 107 forms part of a control loop that drives the second transistor 110 to control the voltage at the node N2b to match the voltage at the node N1b, while the first operational amplifier forms another control loop that controls the current I through the resistor R1. BIAS , so that the voltage at node N1a matches the voltage at node N2a. In this way, the current I BIAS The voltage across R1 is adjusted to match the voltage caused by the bandgap current I BG The voltage across R2 is caused.

[0030] exist Figure 1 In the example of , the first output circuit branch also includes a resistor R3 connected in series between the first resistor R1 and the output node 111, and the node N1b is located between the resistor R1 and the resistor R3. As will be described in more detail below, the resistor R3 can be selected to provide an overall desired resistance for the first output circuit branch together with the resistor R1 so that the signal from the driver 101 is terminated at the output node 111. The second operational amplifier 107 can be connected to this node N1b via a resistor R4, the size of which effectively masks the input capacitance of the operational amplifier 107. Figure 1 In the example of , the first operational amplifier 106 is connected to the node N2a via a path including a resistor RP and a capacitor CP connected to , and as can be appreciated by those skilled in the art, the values ​​RP and CP can set at least one parameter of the overall loop response.

[0031] As described above, this control loop is arranged to generate a bias current I in the first output branch. BIAS , the bias current and the bandgap reference current I BG Have a clear relationship.

[0032] Those skilled in the art will appreciate that the bandgap reference current I BG is a stable current that does not vary with temperature or supply voltage, and therefore the bias current I BIAS is also stable and does not substantially vary with temperature or power supply. As will be appreciated by those skilled in the art, the bandgap reference current source 108 may be implemented to provide the bandgap reference current in a variety of ways, for example, the bandgap voltage may be applied to a well-defined resistor, which may be an integrated resistor whose resistance value does not substantially vary with temperature, such as a tantalum resistor. In some cases, the bandgap current I BG The absolute value of can be calibrated after manufacturing through appropriate testing and trimming to minimize the impact of manufacturing process variations. Resistors R1 and R2 can also be designed and laid out as part of the circuit to have matched unit resistances, that is, any process or temperature variation will affect the unit resistance of both resistors in the same way, making the bias current I related to the ratio of the two resistorsBIAS Will not be affected by any process or temperature variations of these resistors.

[0033] Therefore, the bias generator 105 is operable to generate a bias current I having a defined value BIAS , and the bias current is stable with respect to changes in supply voltage or temperature, and can also be substantially unaffected by changes in the manufacturing process.

[0034] This bias current I BIAS is supplied to the output node 111 of the bias generator 105, which is connected to the driver output terminal 103, and the same current is supplied to the laser 102. The control loop tracks any slow voltage changes at the driver output terminal 103, so the bias current I BIAS It is not affected by the forward bias voltage of the laser 102, that is, the bias current I BIAS is constant and independent of the laser forward voltage.

[0035] Figure 1 The bias generator of the example further includes a current generator 112, which is used to generate a current I for the driver. DRIVE As will be appreciated by those skilled in the art, the driver 101 operates to provide current modulation based on the differential input signal such that the current I DRIVE -I MOD flows through the driver, and the driver output is a current signal I MOD , which is related to the bias current I BIAS The current generator 112 is configured to supply the driver bias current I DRIVE is supplied to output node 111. This reduces the maximum current in each individual current generating branch (i.e., the first output circuit branch and the second output circuit branch) compared to using a single branch that generates two currents. This can increase the headroom for transistors in each branch, thereby providing better linearity at higher modulation currents. Current generator 112 presents a high impedance, so that the current used to generate I BIAS The resistors R1 and R3 of the first output circuit branch define the effective AC termination resistance. The driver bias current I DRIVE The laser bias current I can be generated by BIAS A control loop is generated by connecting nested loops in parallel, as will be discussed in more detail below.

[0036] Therefore, the bias generator 105 uses negative feedback to provide a stable bias current that is substantially unaffected by supply voltage, temperature, and / or manufacturing process variations (i.e., PVT variations) while delivering a suitable driver signal (e.g., a drive signal for PAM4 modulation) to the laser. The bias current may also be substantially unaffected by any changes in the forward voltage of the laser.

[0037] exist Figure 1 In the example of , the output node 111 of the bias generator is coupled to the output node via an inductor L1. The inductor L1 may be implemented by an integrated inductor, i.e., by an integrated component formed as part of an integrated circuit together with the bias generator 105 and the driver 101. This avoids direct connection of the parasitic capacitance of the bias generator 105 to the driver output terminal 103, which may adversely affect the bandwidth of the driver device. The inductor L1 may effectively mask at least part of the parasitic effects of the bias generator on the output terminal 103, and thus reduce the parasitic loading of the output terminal 103, which may limit the bandwidth.

[0038] The nested control loop of the bias generator 105 can be configured to have a limited bandwidth, for example, a bandwidth below about 100 kHz. This means that for higher frequencies expected for data modulation rates, the I of the bias generator 105 generating DC BIAS The circuit branch of will effectively behave as a fixed resistance. Therefore, the bias generator 105 can be configured to act as an AC termination resistor for the driver 101.

[0039] The first operational amplifier 106 provides a DC voltage bias for the first transistor 109, and the effective series impedance of the first transistor 109 is relatively low, so the series resistors R1 and R3 dominate. Therefore, the effective AC termination resistor R T Given as R T ≈R1+R3. These resistor values ​​can therefore be selected to provide a suitable termination impedance. This allows the bias generator 105 to also provide a suitable termination resistance for the driver 101 without requiring any external (ie, off-chip) components and without losing any DC power.

[0040] Figure 2 Another example of a laser driver device 100 is shown, which illustrates an example of a driver 101 and a current source 112 in more detail. Figure 2 In, and about Figure 1 Similar parts to those discussed are indicated by the same reference numerals.

[0041] Figure 2The driver 101 is shown to include first and second input transistors 201a and 201b in respective first and second driver circuit branches, each branch also including respective cascode transistors 202a and 202b in this example. The input transistors 201a and 201b are driven by a differential input signal. Transistors 203a and 203b are coupled to first and second nodes Nda and Ndb of the first and second driver circuit branches to each pass a clear tail current I TAIL . The first and second nodes Nda and Ndb of the first and second driver circuit branches are connected to each other via resistors and parallel capacitances and are also connected to ground via respective capacitors. One of the first and second current branches (the second current branch in this example) is connected (via inductor L1 in this example) to the output terminal 111 of the bias generator 105 to provide a bias current for the driver circuit branch, while the other branch (the first driver circuit branch in this example) receives current from the supply voltage VCC1 via transistor 205. In use, the driver 101 shunts or directs current to / from the relevant current branch in response to the differential input signal, and thus the current through the second driver circuit branch is equal to the explicit tail current as modified by the driver output signal, i.e., equal to I TAIL -I MOD , where the driver output signal I MOD Depends on the differential input signal.

[0042] The tail current I of each branch in the first branch and the second branch TAIL is defined by the controlled current through transistor 206, in this example using a current mirror. TAIL Related control current I C1 The current generator 112 is also supplied to the bias generator, in this example by current mirroring via transistor 207. The current generator 112 has a first current generator resistor RG1 in the second output circuit branch, and the operational amplifier 208 controls the transistor 209 so that the voltage across the resistor RG1 is the same as the voltage across the second current generator resistor RG2, wherein the voltage across RG2 is controlled by the control current I C1 The ratio between the first current generator resistor RG1 and the second current generator resistor RG2 is defined by the resistor RG2. C1 With tail current I TAIL Therefore, the output of the current generator 112 is the bias current I DRIVE , which is related to the tail current I of the second current branch of the driver 101 TAIL Match and change with it.

[0043] The driving bias current I generated in the first output circuit branch of the bias generator 105 DRIVE (=I TAIL ) and the stable bias current I generated in the first output circuit branch BIAS The combined bias generator output node 111 outputs. As described above, the operation of the driver 101 means that the second driver circuit branch of the driver extracts a current equal to I from the current output of the bias generator 105. TAIL -I MOD This means that the current entering the laser 102 is equal to I BIAS +I MOD .

[0044] Please note, Figure 1 and Figure 2 The examples have been discussed with respect to laser drivers for driving a laser to provide a modulated light output, and the drivers of embodiments of the present invention are well suited as laser drivers. However, the same principles can be applied to other data transmission schemes, such as wired parallel to serial data transmission, and embodiments of the present disclosure also relate to drivers for other types of data transmission.

[0045] Thus, the driver of the embodiments of the present disclosure provides a DC bias for an output device (such as a laser). The driver can be implemented as an integrated circuit (IC) and provide a bias from an IC power supply (i.e., a chip power supply) without any external (i.e., off-chip) components. The bias generator can also provide AC termination for the driver without the need for external components. The driver can use on-chip components, such as inductors, to reduce any parasitic loading at the driver output terminals in order to maintain a relatively high bandwidth of the driver. The bias current of the output device is stable and adjustable and can be substantially unaffected by variations in the supply voltage or temperature or manufacturing process. Using parallel feedback loops to independently bias the output device and the driver can also provide greater headroom for transistors of separate loops, thereby achieving better linearity.

[0046] Thus, a high performance data driver, in particular a laser driver, is provided which can be implemented without any external or off-chip components. This may allow the data driver to be integrated into high density modules and / or reduce material costs. The bias current may also be independent of the forward voltage.

[0047] It will be appreciated that the above examples and embodiments are given by way of example only, and those skilled in the art will appreciate that modifications, variations, additions or alterations may be made to the specific embodiments described, or that alternative embodiments may be implemented, without departing from the scope of the appended claims.

[0048] It should be noted that as used herein, unless otherwise expressly stated, the word "comprising" does not exclude the presence of other elements or steps than those listed, the reference to a singular element or feature does not exclude the possibility of a plurality of such elements or features, and the recitation of different features or elements in the appended claims does not necessarily mean separate components; a single component or unit may perform the functions of multiple elements recited in the claims. Any reference signs in the claims should not be construed as limiting their scope.

Claims

1. A driver circuit, comprising: a driver configured to receive an input signal and generate a corresponding driver output signal to drive an output device; a bias generator comprising a first output branch connected to an output node of the bias generator, wherein a first control loop is configured to control a current in the first output branch to have a well-defined relationship with a bandgap reference current to provide a first bias current for biasing the output device; as well as A driver output node is coupled to the driver and the output node of the bias generator to output the driver output signal and the first bias current to the output device.

2. The driver circuit of claim 1 , wherein the first output branch of the bias generator comprises a first resistor, and wherein the first control loop is configured to control the current in the first output branch so that a voltage across the first resistor is equal to a voltage across a second resistor, wherein the voltage across the second resistor is defined by the bandgap reference current flowing through the second resistor. 3 . The driver circuit of claim 2 , wherein the first resistor and the second resistor are configured to have matched unit resistances.

4. The driver circuit of claim 2, wherein the output branch comprises a first transistor connected in series between a supply voltage and the first resistor, and the first control loop comprises a first operational amplifier for driving the first transistor.

5. The driver circuit of claim 4 , wherein a second transistor is connected in series with the second resistor between the supply voltage and a bandgap reference current source for generating the bandgap reference current, and the first control loop comprises a second operational amplifier for driving the second transistor, wherein a first input terminal and a second input terminal of the first operational amplifier are respectively connected to high sides of the first resistor and the second resistor, and a first input terminal and a second input terminal of the second operational amplifier are respectively connected to low sides of the first resistor and the second resistor.

6. The driver circuit as claimed in claim 1, wherein the first control loop has a certain bandwidth so that at the modulation frequency of the driver output signal, the first output branch works as a terminal impedance of the driver output signal.

7. The driver circuit of claim 1 , wherein the first output branch comprises a third resistor connected in series between the first resistor and the output node of the bias generator, and wherein a series resistance of the first resistor and the third resistor matches a terminal impedance of the driver output signal.

8. The driver circuit of claim 1, wherein the output node of the bias generator is coupled to a driver output terminal through an inductor.

9. The driver circuit of claim 8, wherein the inductor is an integrated inductor, the integrated inductor together with the bias generator and the driver being formed as part of an integrated circuit.

10. The driver circuit of claim 1, wherein the bias generator further comprises a current generator having a second output branch connected to the output node of the bias generator, wherein the current generator is configured to generate a driver bias current in the second output branch to bias the output current.

11. The laser driver circuit of claim 10, wherein the driver comprises a first driver circuit branch having an input transistor driven by the input signal such that a current in the first driver circuit branch is equal to an explicit tail current modified by the driver output signal, and wherein the current generator of the bias generator is configured to generate the driver bias current to be equal to the explicit tail current.

12. The laser driver circuit of claim 11, wherein the current generator is configured to receive a control current related to the explicit tail current.

13. A driver circuit as described in claim 11, wherein the current generator includes a first current generator resistor in the second output branch, and the current generator is configured to control the current in the second output path so that the voltage across the first current generator resistor matches the voltage across the second current generator resistor, wherein the voltage across the second current generator resistor is defined by the control current, and the ratio of the first generator resistor to the second generator resistor matches the ratio between the control current and the explicit tail current.

14. The driver circuit of claim 1, wherein the driver is a differential to single-ended shunt driver.

15. The driver circuit of claim 1, wherein the driver is a laser driver for driving a laser as the output device.

16. The driver circuit of claim 15, wherein the first control loop is configured to track changes in a laser forward voltage such that the first bias current is independent of the laser forward voltage.

17. An apparatus comprising the driver circuit of claim 15 and a laser coupled to a driver via the driver circuit.

18. The apparatus of claim 17, wherein the laser comprises a vertical cavity surface emitting laser diode.

19. A driver circuit comprising: a driver configured to receive an input signal and generate a corresponding driver output signal to drive an output device; a bias voltage generator comprising a first control loop configured to control a current in the first output branch to provide a first temperature stable bias current for biasing the output device, and a driver output node coupled to the driver and to the output node of the bias generator to output the driver output signal and the first bias current to the output device; The first control loop has a certain bandwidth, so that the first output branch acts as the terminal impedance of the driver output signal at the modulation frequency of the driver output signal.

20. The driver circuit of claim 19, wherein the first output branch of the bias generator is coupled to the driver output terminal through an integrated inductor, the integrated inductor and the bias generator and the driver together forming part of an integrated circuit.

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