A method and related devices for controlling the midpoint potential of a diode-clamped three-level grid-connected inverter.

Abstract

The embodiment of the application discloses a midpoint potential control method and related device based on a diode clamped three-level grid-connected inverter, and the method comprises the following steps: generating an initial three-phase modulation wave through a current loop closed-loop control method according to collected three-phase current values and three-phase voltage values of a grid side of the diode clamped three-level grid-connected inverter; calculating a zero sequence component required for midpoint potential balance according to an initial modulation waveform generated by the initial three-phase modulation wave, the three-phase current values and a voltage value of a voltage dividing capacitor of a direct current side of the diode clamped three-level grid-connected inverter; superimposing the zero sequence component required for midpoint potential balance and the initial modulation waveform to obtain a final modulation wave; and generating a driving signal matched with each phase bridge arm of the diode clamped three-level grid-connected inverter according to the final modulation wave. The application is beneficial to balancing the midpoint voltage, reducing the distortion of the alternating current side output waveform, reducing the voltage stress of the device and prolonging the service life of the power device.

Description

Technical Field

[0001] This invention relates to the field of power electronic systems technology, and in particular to a method and related device for controlling the midpoint potential of a diode-clamped three-level grid-connected inverter. Background Technology

[0002] With the continuous development of power electronics technology, the demand for high-voltage, high-power power electronic equipment is becoming increasingly urgent. Three-level inverters have been widely used due to their advantages over two-level inverters, such as lower output voltage harmonic content and lower requirements for device withstand voltage levels. However, this also brings many problems, with midpoint voltage imbalance being particularly prominent. In diode-clamped three-level grid-connected inverters, because the midpoints of the two voltage-dividing capacitors connected in series on the DC side are connected to the midpoint of the clamping diode on the bridge arm, the charging and discharging of the two voltage-dividing capacitors during system operation causes fluctuations in the midpoint voltage. Simultaneously, differences in the parameters of the voltage-dividing capacitors also cause midpoint voltage imbalance. All of these factors contribute to distortion of the AC side output waveform, increase voltage stress on devices, and affect the lifespan of power devices. Summary of the Invention

[0003] This application provides a method and related device for controlling the midpoint potential of a diode-clamped three-level grid-connected inverter. This method helps to balance the voltage between the midpoint of the two series-connected voltage divider capacitors on the DC side and the midpoint of the clamping diode on the bridge arm, thereby reducing the distortion of the AC side output waveform, reducing the voltage stress on the device, and improving the service life of the power device.

[0004] The first aspect of this application provides a method for controlling the midpoint potential of a diode-clamped three-level grid-connected inverter, the method comprising:

[0005] An initial three-phase modulation wave is generated based on the three-phase current and three-phase voltage values ​​collected from the grid side of the diode-clamped three-level grid-connected inverter using a current loop closed-loop control method.

[0006] The zero-sequence component required for neutral point potential balance is calculated based on the initial modulation waveform generated by the initial three-phase modulation wave, the three-phase current value, and the voltage value of the voltage divider capacitor on the DC side of the diode-clamped three-level grid-connected inverter.

[0007] The zero-sequence component required for the midpoint potential balance is superimposed on the initial modulation waveform to obtain the final modulation wave;

[0008] The final modulated wave generates a drive signal that matches each phase arm of the diode-clamped three-level grid-connected inverter.

[0009] Optionally, the method of generating an initial three-phase modulation wave based on the collected three-phase current and three-phase voltage values ​​on the grid side of the diode-clamped three-level grid-connected inverter via current loop closed-loop control includes:

[0010] The three-phase current and three-phase voltage values ​​on the grid side of the diode-clamped three-level grid-connected inverter are collected, and the three-phase current and three-phase voltage values ​​are static AC quantities.

[0011] The three-phase current and three-phase voltage values ​​are transformed to obtain two-phase current and two-phase voltage values, which are rotating DC values.

[0012] The two-phase voltage control signal is determined by the current loop closed-loop control method based on the two-phase current value, the two-phase voltage value and the given two-phase current reference value.

[0013] The two-phase voltage control signal is inversely transformed to obtain the initial three-phase modulation wave.

[0014] Optionally, the transformation of the three-phase current values ​​and three-phase voltage values ​​to obtain two-phase current values ​​and two-phase voltage values ​​includes:

[0015] The phase information is obtained from the three-phase voltage values ​​using a phase-locked loop to obtain the phase angle;

[0016] Based on the phase angle, the three-phase current values ​​and three-phase voltage values ​​are subjected to Clark transformation and Park transformation to obtain two-phase current values ​​and two-phase voltage values.

[0017] Optionally, the method for determining the two-phase voltage control signal based on the two-phase current values, the two-phase voltage values, and a given two-phase current reference value via the current loop closed-loop control includes:

[0018] The proportional-integral controller in the current loop calculates the two-phase voltage reference value based on the difference between the two-phase current value and the given two-phase current reference value;

[0019] The two-phase voltage reference values ​​are used as feedforward compensation, and the two-phase rotating coordinate axis control equations are decoupled to obtain the two-phase voltage control signal.

[0020] Optionally, before calculating the zero-sequence component required for neutral point potential balance based on the initial modulation waveform generated from the initial three-phase modulation wave, the three-phase current values, and the voltage values ​​of the voltage divider capacitors on the DC side of the diode-clamped three-level grid-connected inverter, the method further includes:

[0021] Determine the maximum and minimum voltage values ​​of the three-phase voltages;

[0022] The zero-sequence component of the discontinuous pulse width modulation is determined based on the allocation factor of the given total action time, the maximum voltage value, and the minimum voltage value.

[0023] The zero-sequence component of the discontinuous pulse width modulation is superimposed on the initial three-phase modulation wave to generate the initial modulation waveform.

[0024] Optionally, the step of calculating the zero-sequence component required for neutral point potential balance based on the initial modulation waveform generated from the initial three-phase modulation wave, the three-phase current value, and the voltage value of the voltage divider capacitor on the DC side of the diode-clamped three-level grid-connected inverter includes:

[0025] Obtain the capacitance value of the voltage divider capacitor on the DC side of the diode-clamped three-level grid-connected inverter and collect the voltage value of the voltage divider capacitor;

[0026] The difference in initial charge of the voltage divider capacitors is determined based on the difference in voltage values ​​and the difference in capacitance values ​​of the voltage divider capacitors.

[0027] The current flowing into the midpoint is determined based on the three-phase current values ​​and the switching function of the bridge arm switching transistors in the diode-clamped three-level grid-connected inverter.

[0028] Calculate the average charge flowing into the midpoint before and after the injection of the zero-sequence component based on the current flowing toward the midpoint.

[0029] The zero-sequence component required for midpoint potential balance is calculated based on the difference in average charge flowing into the midpoint before and after the injection of the zero-sequence component, and the difference in initial charge of the voltage divider capacitors.

[0030] Optionally, generating a drive signal matching each phase arm of the diode-clamped three-level grid-connected inverter based on the final modulation wave includes:

[0031] The final modulated wave is compared with the two in-phase carrier waves in the diode-clamped three-level grid-connected inverter;

[0032] If the final modulated wave is greater than the upper carrier of the two carriers, a first driving signal is generated, which is used to drive one of the switches of the upper bridge arm corresponding to the upper carrier to turn on; if the final modulated wave is less than or equal to the upper carrier of the two carriers, a second driving signal is generated, which is used to drive one of the switches of the upper bridge arm corresponding to the upper carrier to turn off.

[0033] If the final modulated wave is greater than the lower carrier of the two carriers, a third driving signal is generated, which is used to drive the other switch of the upper bridge arm corresponding to the upper carrier to turn on; if the final modulated wave is less than or equal to the lower carrier of the two carriers, a fourth driving signal is generated, which is used to drive the other switch of the upper bridge arm corresponding to the upper carrier to turn off.

[0034] The switching transistor of the lower bridge arm corresponding to the lower carrier is complementary to the switching transistor of the upper bridge arm corresponding to the upper carrier.

[0035] A second aspect of this application provides a midpoint potential control device based on a diode-clamped three-level grid-connected inverter, the device comprising:

[0036] The initial modulation wave generation unit is used to generate an initial three-phase modulation wave based on the three-phase current and three-phase voltage values ​​collected from the grid side of the diode-clamped three-level grid-connected inverter using a current loop closed-loop control method.

[0037] The zero-sequence component calculation unit is used to calculate the zero-sequence component required for neutral point potential balance based on the initial modulation waveform generated by the initial three-phase modulation wave, the three-phase current value, and the voltage value of the voltage divider capacitor on the DC side of the diode-clamped three-level grid-connected inverter.

[0038] The final modulation wave generation unit is used to superimpose the zero-sequence component required for the midpoint potential balance with the initial modulation waveform to obtain the final modulation wave.

[0039] A drive signal generation unit is used to generate a drive signal that matches each phase arm of the diode-clamped three-level grid-connected inverter based on the final modulation wave.

[0040] A third aspect of this application provides an electronic device, including: a processor and a memory;

[0041] The processor is connected to a memory, wherein the memory is used to store computer programs and the processor is used to invoke the computer programs to execute the methods as described in the first aspect of the embodiments of this application.

[0042] A fourth aspect of this application provides a computer-readable storage medium storing a computer program, the computer program including program instructions, which, when executed by a processor, perform the method as described in the first aspect of this application.

[0043] As can be seen in this embodiment, firstly, an initial three-phase modulation wave is generated based on the three-phase current and three-phase voltage values ​​of the grid side of the diode-clamped three-level grid-connected inverter using a current loop closed-loop control method. Then, the zero-sequence component required for midpoint potential balance is calculated based on the initial modulation waveform generated from this initial three-phase modulation wave, the three-phase current values, and the voltage values ​​of the voltage divider capacitors on the DC side of the diode-clamped three-level grid-connected inverter. Finally, the zero-sequence component required for midpoint potential balance is superimposed on the initial modulation waveform to obtain the final modulation wave. A drive signal matching each phase arm in the diode-clamped three-level grid-connected inverter is generated based on the final modulation wave. This zero-sequence component required for midpoint potential balance can balance the midpoint voltage imbalance caused by the charging and discharging of the two voltage divider capacitors, as well as the midpoint voltage imbalance caused by differences in the voltage divider capacitor parameters, thereby reducing the distortion of the AC side output waveform, reducing the voltage stress on the devices, and improving the service life of the power devices. Attached Figure Description

[0044] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0045] Figure 1 The diagram shows the topology of a switching model of a diode-clamped three-level inverter according to an embodiment of this application.

[0046] Figure 2 This application shows a schematic diagram of the structure of a new energy grid-connected inverter system according to an embodiment of the present application;

[0047] Figure 3 A flowchart illustrating a method for controlling the midpoint potential of a diode-clamped three-level grid-connected inverter according to an embodiment of this application is shown.

[0048] Figure 4 This paper illustrates a control block diagram of vector control after dq-axis decoupling according to an embodiment of this application;

[0049] Figure 5 This paper shows the zero-sequence component distribution diagram of the DPWM1 strategy provided in one embodiment of the present application when the voltage vector is located in different sectors;

[0050] Figure 6 This paper illustrates the magnitude relationship of a three-phase sine wave in each sector according to an embodiment of this application.

[0051] Figure 7A topology diagram of a three-level DC-side circuit according to an embodiment of this application is shown;

[0052] Figure 8 A schematic diagram of co-directional carrier modulation provided in one embodiment of this application is shown;

[0053] Figure 9(a) shows a schematic diagram of the upper and lower capacitor voltage waveforms using a conventional DPWM strategy according to an embodiment of this application;

[0054] Figure 9(b) shows a schematic diagram of the upper and lower capacitor voltage waveforms using the modulation strategy provided in this application according to an embodiment of this application;

[0055] Figure 10(a) shows a schematic diagram of the upper and lower capacitor voltage waveforms using a conventional DPWM strategy provided in another embodiment of this application;

[0056] Figure 10(b) shows a schematic diagram of the upper and lower capacitor voltage waveforms using the modulation strategy provided in this application according to another embodiment of this application;

[0057] Figure 11(a) shows a schematic diagram of Fourier analysis of AC current measurement waveform using a conventional DPWM strategy provided in another embodiment of this application;

[0058] Figure 11(b) shows a schematic diagram of Fourier analysis of an AC current measurement waveform using the modulation strategy provided in this application according to another embodiment of this application;

[0059] Figure 12 A schematic diagram comparing the total loss of a system under SPWM, SVPWM, DPWM and modulation strategies provided in this application is shown in one embodiment of this application.

[0060] Figure 13 A schematic diagram of the structure of a midpoint potential control device based on a diode-clamped three-level grid-connected inverter provided in one embodiment of this application is shown.

[0061] Figure 14 A schematic diagram of the structure of a computer device provided in one embodiment of this application is shown. Detailed Implementation

[0062] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0063] Please refer to Figure 1The figure illustrates the topology of a switching model of a diode-clamped three-level inverter according to an embodiment of this application. As shown, a weak AC power grid is connected to the diode-clamped three-level inverter via a filter. Compared to a two-level inverter, the diode-clamped three-level inverter adds two voltage-dividing capacitors to the DC side. and Each phase has two switching transistors on its upper and lower arms, and the midpoints of these two transistors are connected to the midpoint of a capacitor via clamping diodes. The filter includes a filter inductance L on the grid side and a line equivalent resistance R. , , The three-phase current flowing through the power grid side, , , The three-phase voltage flowing through the grid side is given. Ignoring DC-side voltage fluctuations in a diode-clamped three-level inverter, an ideal DC source is used. Replaces diode-clamped three-level inverter power supplies.

[0064] In a three-level inverter, each phase's upper and lower arms have two identical switching transistors. The three phases have the same structure. Taking phase A as an example, based on its on / off mode, it forms three different operating states, defined as P state, O state, and N state. Among these, P state represents the switching transistor... and Conduction, and Off; the 0 state indicates that the switching transistor is off. or Conduction, and Off; N state indicates the switching transistor. and Conduction, and Turn off. The same applies to phases B and C. From the above analysis, it can be seen that the four switching transistors output three different levels depending on their switching state combinations: 0 .

[0065] Please refer to Figure 2 This document illustrates a schematic diagram of a new energy grid-connected inverter system according to an embodiment of this application. The new energy grid-connected inverter system consists of two parts: a main circuit and a controller. The topology diagram of the main circuit is shown below. Figure 2 The upper part is shown. For a description of the main circuit, please refer to [link / reference needed]. Figure 1 Details will not be elaborated here. The controller topology diagram is as follows: Figure 2 The lower half is shown. The grid-connected common coupling point (PCC) of the main circuit and controller is located at... Between the AC low-voltage power grid and the mains grid. The specific control process is as follows:

[0066] First, the three-phase voltage is collected by sensors. , , and three-phase current , , Then , , The input is fed into a phase-locked loop (PLL), which can acquire phase information in real time and output the phase angle. Then according to Three-phase current , , It can be converted into two-phase current through Clark and Park. , Three-phase voltage , , It can be converted into a two-phase voltage using Clark and Park. , Among them, the three phases are the three axes abc of the stationary coordinate system, and the two phases are the two coordinate axes dq of the rotating coordinate system.

[0067] Then, and the given reference current value After comparison, the data is fed into a proportional-integral (PI) controller, where two-phase voltages are introduced into the PI control loop. As a feedforward compensation, the same operation is performed on the q-axis component. Finally, the coupling between the d-axis and q-axis is decoupled to generate a two-phase voltage control signal. and Two-phase voltage control signal and It can be converted into three-phase voltage through the inverse transformation of Clark and Park. , , Three-phase voltage , , The initial modulation waveform is then generated using the Discontinuous Pulse Width Modulation (DPWM) module. , and .

[0068] Secondly, sample the two voltage divider capacitors. and voltage value and ,Will , , , , , , and The zero-sequence component is fed into the zero-sequence component calculation module to calculate the zero-sequence component required for the midpoint potential balance strategy.

[0069] Finally, the zero-sequence component is superimposed on the initial modulation waveform to obtain the final modulation waveform, which is then sent to the PWM module to generate a drive signal that matches each phase arm. This drive signal controls the power devices to turn on and off.

[0070] Please refer to Figure 3 This document illustrates a flowchart of a midpoint potential control method for a diode-clamped three-level grid-connected inverter according to an embodiment of this application. This method can be applied to... Figure 1 The switching model of the diode-clamped three-level inverter shown is as follows: Figure 2 The new energy grid-connected inverter system shown may include the following steps:

[0071] Step 301: Generate an initial three-phase modulation wave based on the three-phase current and three-phase voltage values ​​collected from the grid side of the diode-clamped three-level grid-connected inverter using a current loop closed-loop control method.

[0072] The current loop closed-loop control method is a technique used to ensure that the system output current accurately follows a given reference current. It maintains high accuracy and stability by detecting and adjusting the current in real time. For example, the three-phase current and three-phase voltage values ​​are acquired by sensors.

[0073] In power electronic converters, the modulated wave refers to the reference waveform used to generate a pulse width modulation (PWM) signal. PWM is a widely used technology in power electronics and motor control, controlling output voltage or current by changing the pulse width. PWM technology can be divided into two main types: Continuous Pulse Width Modulation (CPWM) and Discontinuous Pulse Width Modulation (DPWM). In CPWM, the pulse width of the PWM signal is adjusted according to the comparison result of the reference signal and the carrier signal in each switching cycle. During each switching cycle, the switching element frequently turns on and off to track changes in the reference signal. In DPWM, the pulse width of the PWM signal remains constant for certain time periods, and the switching element remains in a fixed state (either fully on or fully off). This reduces switching losses and electromagnetic interference by decreasing the number of switching operations.

[0074] Specifically, the current loop closed-loop control method generates an initial three-phase modulation wave based on the collected three-phase current and three-phase voltage values ​​on the grid side of the diode-clamped three-level grid-connected inverter, including:

[0075] The three-phase current and three-phase voltage values ​​on the grid side of the diode-clamped three-level grid-connected inverter are collected, and the three-phase current and three-phase voltage values ​​are static AC quantities.

[0076] The three-phase current and three-phase voltage values ​​are transformed to obtain two-phase current and two-phase voltage values, which are rotating DC values.

[0077] The two-phase voltage control signal is determined by the current loop closed-loop control method based on the two-phase current value, the two-phase voltage value and the given two-phase current reference value.

[0078] The two-phase voltage control signal is inversely transformed to obtain the initial three-phase modulation wave.

[0079] Specifically, the transformation of the three-phase current values ​​and three-phase voltage values ​​to obtain two-phase current values ​​and two-phase voltage values ​​includes:

[0080] The phase information of the q-axis in the two-phase voltage values ​​is obtained by using a phase-locked loop to obtain the phase angle;

[0081] Based on the phase angle, the three-phase current values ​​are subjected to Clarke transform and Park transform to obtain the two-phase current values.

[0082] For example, three-phase voltage values ​​are collected by sensors. , , and three-phase current values , , The voltage is first converted into a two-phase voltage by Clark transformation and then by Park transformation. , and two-phase current , The Clark transform is as follows:

[0083]

[0084] The Clark transform is used to convert a three-phase stationary coordinate system into a two-phase perpendicular stationary coordinate system, wherein... This represents the corresponding physical quantity, current or voltage. These are the components projected onto the α and β axes, respectively. The Park transform is as follows:

[0085]

[0086] in They are projected onto respectively Components of the axis, yes shaft and The included angle of the axes, under the condition of grid voltage orientation, It is also the output angle of the PLL, which is determined by the three-phase voltage values. , , Obtain.

[0087] Specifically, the current loop closed-loop control method determines the two-phase voltage control signal based on the two-phase current values, the two-phase voltage values, and a given two-phase current reference value, including:

[0088] The proportional-integral controller in the current loop calculates the two-phase voltage reference value based on the difference between the two-phase current value and the given two-phase current reference value;

[0089] The two-phase voltage reference values ​​are used as feedforward compensation, and the two-phase rotating coordinate axis control equations are decoupled to obtain the two-phase voltage control signal.

[0090] Among them, the proportional-integral (PI) controller is a commonly used control algorithm, widely applied in industrial automation and control systems. The PI controller combines the advantages of proportional and integral control, achieving a good balance between steady-state error and dynamic response.

[0091] For example, please refer to Figure 4 This illustrates a control block diagram of vector control after dq-axis decoupling according to an embodiment of this application. The given two-phase current reference values ​​are... and The differences between the two-phase current values ​​and the given two-phase current reference values ​​are respectively and Based on the mathematical formula of the proportional-integral controller in the current loop, the reference values ​​of the two-phase voltages can be calculated. and :

[0092]

[0093]

[0094] in, This is the proportional adjustment coefficient for the current loop. This is the integral adjustment coefficient of the current loop. For the Laplace operator.

[0095] Then the two-phase voltage reference value and As feedforward compensation, and by decoupling the two-phase rotating coordinate axis control equations, two-phase voltage control signals are obtained. and :

[0096]

[0097] For example, for two-phase voltage control signals and By performing the inverse transformations of the Park and Clark transformations, the initial three-phase modulated wave can be obtained.

[0098] Step 302: Calculate the zero-sequence component required for neutral point potential balance based on the initial modulation waveform generated by the initial three-phase modulation wave, the three-phase current value, and the voltage value of the voltage divider capacitor on the DC side of the diode-clamped three-level grid-connected inverter.

[0099] Furthermore, before calculating the zero-sequence component required for neutral point potential balance based on the initial modulation waveform generated from the initial three-phase modulation wave, the three-phase current values, and the voltage values ​​of the voltage divider capacitors on the DC side of the diode-clamped three-level grid-connected inverter, the method further includes:

[0100] Determine the maximum and minimum voltage values ​​of the three-phase voltages;

[0101] The zero-sequence component of the discontinuous pulse width modulation is determined based on the allocation factor of the given total action time, the maximum voltage value, and the minimum voltage value.

[0102] The zero-sequence component of the discontinuous pulse width modulation is superimposed on the initial three-phase modulation wave to generate the initial modulation waveform.

[0103] For example, taking DPWM1 as an example, Figure 5 This paper illustrates the zero-sequence component distribution diagram of the DPWM1 strategy provided in one embodiment of this application when the voltage vector is located in different sectors. Figure 6 This diagram illustrates the magnitude relationship of a three-phase sine wave in various sectors according to an embodiment of this application. Three-phase voltage values. 、 、 The maximum and minimum voltage values ​​are respectively and Based on this, it can be used and The distribution of the zero-sequence component of the DPWM1 strategy is shown in Table 1 below:

[0104] Table 1 shows the distribution of the zero-sequence component of the DPWM1 strategy.

[0105]

[0106] Other DPWM strategies are similar, hence the following zero-sequence components. :

[0107]

[0108] in, The distribution factor for the total action time of the positive and negative small vectors. For modulation. Within one fundamental frequency period, according to different intervals... Alternatively, option 1 can be used to obtain the zero-sequence voltage required for the corresponding DPWM strategy. Superimposing this zero-sequence voltage onto the initial three-phase modulation wave yields the initial modulation waveform of the DPWM strategy. , and .

[0109] Specifically, the calculation of the zero-sequence component required for neutral point potential balance based on the initial modulation waveform generated from the initial three-phase modulation wave, the three-phase current value, and the voltage value of the voltage divider capacitor on the DC side of the diode-clamped three-level grid-connected inverter includes:

[0110] Obtain the capacitance value of the voltage divider capacitor on the DC side of the diode-clamped three-level grid-connected inverter and collect the voltage value of the voltage divider capacitor;

[0111] The difference in initial charge of the voltage divider capacitors is determined based on the difference in voltage values ​​and the difference in capacitance values ​​of the voltage divider capacitors.

[0112] The current flowing into the midpoint is determined based on the three-phase current values ​​and the switching function of the bridge arm switching transistors in the diode-clamped three-level grid-connected inverter.

[0113] Calculate the average charge flowing into the midpoint before and after the injection of the zero-sequence component based on the current flowing toward the midpoint.

[0114] The zero-sequence component required for midpoint potential balance is calculated based on the difference in average charge flowing into the midpoint before and after the injection of the zero-sequence component, and the difference in initial charge of the voltage divider capacitors.

[0115] For example, see Figure 7 This diagram illustrates the topology of a three-level DC-side circuit according to an embodiment of this application. The capacitance value of each voltage divider capacitor is C, and the initial voltage values ​​of the voltage divider capacitors are respectively... 、 Then, according to the formula for calculating charge, the difference in initial charge between the two can be obtained. :

[0116]

[0117] If we denote the direction of the current flowing out of the midpoint as positive, then analyzing the current at the midpoint, we have:

[0118]

[0119] in, The current flowing out of the midpoint, The current flowing through the capacitor above. The current flowing through the capacitor below. and This represents the current voltage value of the voltage divider capacitor.

[0120] Based on the above formula, the difference in charge increment between the upper and lower capacitors caused by the midpoint current within time t can be derived as follows:

[0121]

[0122] in, and This reflects the changes in the voltage of the upper and lower capacitors during the time period from 0 to t.

[0123] It can be seen that the midpoint current This will cause fluctuations in the charge of the upper and lower capacitors, and a midpoint current will be generated when the output is at zero level. This means that when each phase of a three-level inverter is at a zero output level, it affects the charge on the upper and lower capacitors, thus affecting the midpoint current. The expression can also be obtained from the three-phase load current:

[0124]

[0125] in, (x=a,b,c) is the switching function of the bridge arm switches in a diode-clamped three-level grid-connected inverter, and its expression is:

[0126]

[0127] See Figure 8 This illustrates a schematic diagram of co-carrier modulation provided in one embodiment of this application. From Figure 8 It can be seen that within one switching cycle, the switching function changes in two ways. Regardless of which way, according to the principle of similar triangles, the following relationship can be derived:

[0128]

[0129] in, This indicates the duration of the O state within one switching cycle. It is a symbolic function.

[0130] For example, according to the above formula, the average charge flowing into the midpoint before the zero-sequence component is injected is:

[0131]

[0132] The average charge flowing into the midpoint after the zero-sequence component is injected is:

[0133]

[0134] in, For the switching cycle, , and This is the initial modulation waveform. and Is , and The final modulation waveform after injecting zero-sequence components. , is the average current over a switching cycle.

[0135] For example, the difference between the average charge flowing into the midpoint before and after the injection of the zero-sequence component is:

[0136]

[0137] in, The injected zero-sequence component brings about [something] within one switching cycle. The average current required for the change in charge , It is a symbolic function.

[0138] Assuming that after the zero-sequence component is injected, the average charge on the upper and lower capacitors remains equal in each switching cycle, that is, the zero-sequence component brings an increase in the midpoint charge. It made up for and :

[0139]

[0140] Then it can be determined by the difference in average charge flowing into the midpoint before and after the injection of the zero-sequence component. And the difference in initial charge of the voltage divider capacitors. The zero-sequence component required to calculate the midpoint potential equilibrium :

[0141]

[0142] in, , is the switching frequency of the grid-connected inverter system.

[0143] Step 303: Superimpose the zero-sequence component required for the midpoint potential balance with the initial modulation waveform to obtain the final modulation wave.

[0144] Step 304: Generate a drive signal that matches each phase arm of the diode-clamped three-level grid-connected inverter based on the final modulation wave.

[0145] Specifically, the step of generating a drive signal matching each phase arm of the diode-clamped three-level grid-connected inverter based on the final modulation wave includes:

[0146] The final modulated wave is compared with the two in-phase carrier waves in the diode-clamped three-level grid-connected inverter;

[0147] If the final modulated wave is greater than the upper carrier of the two carriers, a first driving signal is generated, which is used to drive one of the switches of the upper bridge arm corresponding to the upper carrier to turn on; if the final modulated wave is less than or equal to the upper carrier of the two carriers, a second driving signal is generated, which is used to drive one of the switches of the upper bridge arm corresponding to the upper carrier to turn off.

[0148] If the final modulated wave is greater than the lower carrier of the two carriers, a third driving signal is generated, which is used to drive the other switch of the upper bridge arm corresponding to the upper carrier to turn on; if the final modulated wave is less than or equal to the lower carrier of the two carriers, a fourth driving signal is generated, which is used to drive the other switch of the upper bridge arm corresponding to the upper carrier to turn off.

[0149] The switching transistor of the lower bridge arm corresponding to the lower carrier is complementary to the switching transistor of the upper bridge arm corresponding to the upper carrier.

[0150] For example, one of the switches in the upper bridge arm corresponding to the upper carrier is The other switching transistor is One of the switches in the lower bridge arm corresponding to the lower carrier is The other switching transistor is , This represents the three phases a, b, and c.

[0151] To verify the feasibility of this application, a grid-connected system with a midpoint-clamped three-level inverter was built in PLECS. The parameters are shown in Table 2. The specific verification process is as follows:

[0152] Table 2 Simulation System Parameters

[0153]

[0154] When there is no initial potential difference in the DC-side capacitor, the voltage waveforms of the upper and lower capacitors are shown in Figure 9(a) and Figure 9(b) respectively, using the traditional DPWM strategy and the modulation strategy provided by this invention. It can be seen that the solution provided by this application can significantly reduce the fluctuation of the midpoint potential.

[0155] When an initial potential difference exists in the DC-side capacitor, the voltage waveforms of the upper and lower capacitors are shown in Figures 10(a) and 10(b) respectively, using the traditional DPWM strategy and the modulation strategy provided by this invention. It can be seen that in Figure 10(a), although the traditional DPWM strategy also has a certain midpoint potential balancing capability, the fluctuation of the midpoint potential after balancing is large, and the balancing speed is also slow. The solution provided by this application can quickly achieve midpoint potential balancing and has a strong midpoint voltage regulation capability.

[0156] Figure 11(a) and 11(b) The Fourier analysis of AC current measurement waveforms using the traditional DPWM strategy and the modulation strategy provided by this invention is shown. As can be seen from the figure, the harmonic content of the AC current measurement waveform under the modulation strategy provided by this invention is slightly reduced compared with the traditional DPWM strategy.

[0157] Figure 12 The figure shows a comparison of the total system losses under SPWM, SVPWM, DPWM and the modulation strategy provided by the present invention. As can be seen from the figure, although the switching loss of the modulation strategy of the present invention is higher than that of the traditional DPWM strategy, it is lower than that of SPWM and SVPWM strategies, and achieves midpoint potential balance under low switching loss.

[0158] In summary, it can be seen that in this embodiment, firstly, an initial three-phase modulation wave is generated based on the three-phase current and three-phase voltage values ​​of the grid side of the diode-clamped three-level grid-connected inverter using a current loop closed-loop control method; then, the zero-sequence component required for midpoint potential balance is calculated based on the initial modulation waveform generated from the initial three-phase modulation wave, the three-phase current values, and the voltage values ​​of the voltage divider capacitors on the DC side of the diode-clamped three-level grid-connected inverter; finally, the zero-sequence component required for midpoint potential balance is superimposed with the initial modulation waveform to obtain the final modulation wave; and a drive signal matching each phase arm in the diode-clamped three-level grid-connected inverter is generated based on the final modulation wave. This zero-sequence component required for midpoint potential balance can balance the midpoint voltage imbalance caused by the charging and discharging of the two voltage divider capacitors, as well as the midpoint voltage imbalance caused by differences in the voltage divider capacitor parameters, thereby reducing the distortion of the AC side output waveform, reducing the voltage stress on the devices, and improving the service life of the power devices.

[0159] Figure 13 This illustration shows a schematic diagram of a midpoint potential control device based on a diode-clamped three-level grid-connected inverter according to an embodiment of this application, applied to a new energy grid-connected AC inverter system. The device includes:

[0160] The initial modulation wave generation unit 1301 is used to generate an initial three-phase modulation wave based on the three-phase current value and three-phase voltage value of the grid side of the diode clamped three-level grid-connected inverter through a current loop closed-loop control method.

[0161] The zero-sequence component calculation unit 1302 is used to calculate the zero-sequence component required for neutral point potential balance based on the initial modulation waveform generated by the initial three-phase modulation wave, the three-phase current value, and the voltage value of the voltage divider capacitor on the DC side of the diode clamped three-level grid-connected inverter.

[0162] The final modulation wave generation unit 1303 is used to superimpose the zero-sequence component required for the midpoint potential balance with the initial modulation waveform to obtain the final modulation wave.

[0163] The drive signal generation unit 1304 is used to generate a drive signal that matches each phase arm of the diode-clamped three-level grid-connected inverter based on the final modulation wave.

[0164] Figure 14 The diagram illustrates the structure of a computer device according to an embodiment of this application, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the functions of the computer system based on the midpoint potential control method of a diode-clamped three-level grid-connected inverter in any of the above embodiments.

[0165] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a computer, causes the computer to perform the functions of the computer system based on the midpoint potential control method of a diode-clamped three-level grid-connected inverter in any of the above embodiments.

[0166] This application also provides a computer program product containing instructions that, when executed by a computer, cause the computer to perform the functions of the computer system based on the midpoint potential control method of a diode-clamped three-level grid-connected inverter in any of the above embodiments.

[0167] It is understood that the specific examples in this application are only intended to help those skilled in the art better understand the implementation methods of this application, and are not intended to limit the scope of the invention.

[0168] It is understood that in the various embodiments of this application, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not limit the implementation process of the embodiments of this application in any way.

[0169] It is understood that the various implementation methods described in this application can be implemented individually or in combination, and the implementation methods in this application are not limited in this respect.

[0170] Unless otherwise stated, all technical and scientific terms used in the embodiments of this application have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "and / or" as used in this application includes any and all combinations of one or more of the associated listed items. The singular forms "a," "the," and "the" as used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0171] It is understood that the processor in the embodiments of this application can be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method embodiments can be completed by the integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method.

[0172] It is understood that the memory in the embodiments of this application may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Specifically, non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory may be random access memory (RAM). It should be noted that the memory in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0173] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0174] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the aforementioned method implementations, and will not be repeated here.

[0175] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0176] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0177] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0178] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0179] The above are merely specific embodiments of this application, but the scope of protection of this invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this invention should be determined by the scope of the claims.

Claims

1. A neutral point potential control method for a diode-clamped three-level grid-connected inverter, characterized by, The method comprises: generating an initial three-phase modulation wave through a current loop closed-loop control method according to the collected three-phase current value and three-phase voltage value of the grid-side of the diode clamped three-level grid-connected inverter; obtaining the capacitance value of the voltage dividing capacitor of the DC side of the diode clamped three-level grid-connected inverter and collecting the voltage value of the voltage dividing capacitor; determining a difference in initial charge amount of the voltage dividing capacitors based on the difference in voltage value of the voltage dividing capacitors and the capacitance value of the voltage dividing capacitors , the capacitance value of the voltage dividing capacitors is C, and the initial voltage values of the voltage dividing capacitors are respectively 、 ; determining the current flowing into the neutral point according to the three-phase current values and the switching functions of the bridge arm switching tubes in the diode-clamped three-level grid-connected inverter , (x = a, b, c) is the switching function of the bridge arm switching tube in the diode-clamped three-level grid-connected inverter, 、 、 is the three-phase current value of the grid side of the diode-clamped three-level grid-connected inverter; The average charge flowing into the midpoint before and after injecting the zero sequence component is calculated according to the current flowing into the midpoint, respectively; the average charge flowing into the midpoint before injecting the zero sequence component , the average charge flowing into the midpoint after injecting the zero sequence component , wherein, is a switching period, , and is an initial modulation waveform, and is a final modulation waveform after injecting the zero sequence component on the basis of , and , and is an average current in a switching period; The zero sequence component needed for balancing the midpoint potential is calculated according to the difference between the average charge flowing into the midpoint before and after the injection of the zero sequence component, and the difference between the initial charge amount of the voltage dividing capacitor wherein is the switching frequency of the grid-connected inverter system, and is the voltage value of the voltage dividing capacitor at the current time, , is a sign function; superimposing the zero sequence component required for the midpoint potential balance on the initial modulation waveform to obtain a final modulation wave; generating a driving signal matched with each phase bridge arm of the diode clamped three-level grid-connected inverter according to the final modulation wave.

2. The method of claim 1, wherein, The generating of the initial three-phase modulation wave through the current loop closed-loop control method according to the collected three-phase current value and three-phase voltage value of the grid-side of the diode clamped three-level grid-connected inverter comprises: collecting the three-phase current value and three-phase voltage value of the grid-side of the diode clamped three-level grid-connected inverter, wherein the three-phase current value and three-phase voltage value are static alternating currents; transforming the three-phase current value and three-phase voltage value to obtain two-phase current value and two-phase voltage value, wherein the two-phase current value and two-phase voltage value are rotating direct currents; determining a two-phase voltage control signal through a current loop closed-loop control method according to the two-phase current value and two-phase voltage value and a given two-phase current reference value; inverting the two-phase voltage control signal to obtain an initial three-phase modulation wave.

3. The method of claim 2, wherein, The transforming of the three-phase current value and three-phase voltage value to obtain two-phase current value and two-phase voltage value comprises: obtaining phase information through a phase-locked loop according to the three-phase voltage value to obtain a phase angle; performing Clarke transformation and Park transformation on the three-phase current value and three-phase voltage value according to the phase angle to obtain two-phase current value and two-phase voltage value.

4. The method of claim 2, wherein, The determining of the two-phase voltage control signal through the current loop closed-loop control method according to the two-phase current value and two-phase voltage value and the given two-phase current reference value comprises: calculating a two-phase voltage reference value through a proportional-integral controller of the current loop according to the difference between the two-phase current value and the given two-phase current reference value; taking the two-phase voltage reference value as feedforward compensation and decoupling a two-phase rotating coordinate axis control equation to obtain a two-phase voltage control signal.

5. The method according to any one of claims 1 to 4, characterized in that, The method further comprises: determining the maximum voltage value and minimum voltage value of the three-phase voltage value; determining a zero sequence component of discontinuous pulse width modulation according to a distribution factor of a given total action time, the maximum voltage value and the minimum voltage value, wherein the distribution factor is 0 or 1; superimposing the zero sequence component of discontinuous pulse width modulation on the initial three-phase modulation wave to generate an initial modulation waveform.

6. The method according to any one of claims 1 to 4, characterized in that, The generating of the driving signal matched with each phase bridge arm of the diode clamped three-level grid-connected inverter according to the final modulation wave comprises: comparing the final modulation wave with two carriers in the same phase of the diode clamped three-level grid-connected inverter; If the final modulation wave is greater than the upper carrier wave of the two carrier waves, a first drive signal is generated, the first drive signal being used to drive one of the switch tubes of the upper bridge arm corresponding to the upper carrier wave to turn on; if the final modulation wave is less than or equal to the upper carrier wave of the two carrier waves, a second drive signal is generated, the second drive signal being used to drive the other switch tube of the upper bridge arm corresponding to the upper carrier wave to turn off; If the final modulation wave is greater than the lower carrier wave of the two carrier waves, a third drive signal is generated, the third drive signal being used to drive the other switch tube of the upper bridge arm corresponding to the upper carrier wave to turn on; if the final modulation wave is less than or equal to the lower carrier wave of the two carrier waves, a fourth drive signal is generated, the fourth drive signal being used to drive the other switch tube of the upper bridge arm corresponding to the upper carrier wave to turn off; The switch tubes of the lower bridge arm corresponding to the lower carrier wave and the switch tubes of the upper bridge arm corresponding to the upper carrier wave are complementary to turn on.

7. A midpoint potential control device based on a diode-clamped three-level grid-connected inverter, characterized in that, The device is applied to the method in any one of claims 1-6, and the device comprises: An initial modulation wave generation unit is configured to generate an initial three-phase modulation wave by a current loop closed-loop control method according to collected three-phase current values and three-phase voltage values of a grid side of the diode clamped three-level grid-connected inverter. A zero sequence component calculation unit is configured to calculate a zero sequence component required for balancing a midpoint potential according to an initial modulation waveform generated by the initial three-phase modulation wave, the three-phase current values, and a voltage value of a voltage dividing capacitor of a direct current side of the diode clamped three-level grid-connected inverter. A final modulation wave generation unit is configured to superimpose the zero sequence component required for balancing the midpoint potential and the initial modulation waveform to obtain a final modulation wave. A drive signal generation unit is configured to generate a drive signal matched with each phase bridge arm of the diode clamped three-level grid-connected inverter according to the final modulation wave.

8. An electronic device, comprising: The device comprises: A processor and a memory; The processor and the memory are connected, wherein the memory is configured to store a computer program, and the processor is configured to invoke the computer program to execute the method in any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program, the computer program comprising program instructions, the program instructions being executed by a processor to execute the method in any one of claims 1-6.

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