Radio frequency power supply and test analysis method thereof

Abstract

The application relates to a radio frequency power supply and a test analysis method thereof, the radio frequency power supply comprising a main controller; a slave controller which adjusts and controls the output of the radio frequency power supply according to the instruction of the main controller or a preset algorithm, so as to realize the logical function of the radio frequency power supply through programming; a DDS source which generates a signal source with specific waveform and frequency; an ADC detection module which collects the analog signal of the radio frequency power supply and converts the analog signal into a digital signal; a DAC attenuation module which converts a digital control signal into an analog control signal, so as to adjust the output signal of the radio frequency power supply, the DAC attenuation module adopts a low-speed operational amplifier, so that the second power value obtained by the DDS source searching the power corresponding table is one-to-one corresponding to the first power value by increasing the response time; a PA power amplification module which amplifies the output signal of the radio frequency power supply, so as to meet the power demand of the load; and a coupling / VI sensor which transmits and couples the signal and real-timely monitors the voltage and current values in the power supply system.

Description

Technical Field

[0001] This disclosure relates to the field of power supply technology, and in particular to an radio frequency power supply and its testing and analysis method. Background Technology

[0002] RF power supplies exhibit significant nonlinear characteristics. The DDS source output is a linear system with a frequency resolution of 500MHz / 32bit, a phase resolution of 360 degrees / 14bit, and an amplitude resolution of 10mA / 10bit. It also offers three output modes: single-mode, modulation, and linear sweep frequency / phase / amplitude. The DAC attenuation output is approximately considered a linear system. However, because the PA power amplifier uses an LDMOS transistor, its gain depends not only on the quiescent operating point but also on the input power. It can be divided into a gain expansion region in the low-power output segment, a gain stability region in the mid-power segment, and a gain compression region in the high-power segment. (See [reference needed]). Figure 1-4 The characteristic curves shown are, along with normalized graphs of the DAC output value, output power, and coupler forward power acquisition signal during open-loop operation.

[0003] However, while VIsensor boasts good stability and high linearity, it is susceptible to the influence of the ADC detector board's input impedance, power level, and operating frequency. The two-channel signal link of the ADC detector board must ensure consistency in amplitude and phase response; otherwise, detection accuracy will be affected. Tests revealed inconsistent gain between the two signals. Fourth, power resolution. Theoretically, products with different power levels (3kW / 6kW / 10kW / 24kW) have different resolutions. Currently, the system's adjustable methods include: 10-bit DDS amplitude modulation, 13-bit DDS phase modulation, and 16-bit DAC attenuation. Excluding the maximum and minimum value ranges at both ends, the truly adjustable and usable range is not large. PID control uses DAC attenuation output. Currently, the circuit (BAP70Q) has a step response of around 10µs. Due to the system's output nonlinearity, the PID proportional gain coefficient should be adjusted accordingly for different power levels.

[0004] Furthermore, multi-stage power control cannot meet the requirements by simply adjusting the DAC attenuation (response time is in the nanosecond range). Therefore, the power can be adjusted by changing the amplitude of the DDS source output, or by using two-channel synthesis and adjusting the phase of one of the channels to achieve output power control. The AD9959's time resolution (minimum 8ns) is sufficient, and its phase and amplitude also meet the requirements. Due to the nonlinear characteristics of the system loop, a lookup table can be used to set the second power value.

[0005] However, due to different settings of the first power value, the same DDS output, after being attenuated by the DAC, represents different power values. Therefore, the same second power lookup table output will appear, representing different power values ​​under different first power values. In other words, the DDS lookup table (amplitude, phase) is not unique and has different values ​​due to different attenuation of the BAP70Q, which will cause adjustment fluctuations when the power level changes. Summary of the Invention

[0006] The purpose of this invention is to provide a radio frequency power supply and its testing and analysis method, which aims to at least partially solve the aforementioned technical problems.

[0007] To achieve the above objectives, a first aspect of this disclosure provides a radio frequency (RF) power supply, the RF power supply comprising:

[0008] The system consists of a main controller (MCU), a slave controller (FPGA), a DDS source, an ADC detection module, a DAC attenuation module, a PA power amplifier module, and a coupling / VI sensor.

[0009] The main controller MCU is used for communication control, system protection, and protocol conversion.

[0010] The FPGA, acting as a programmable logic device, adjusts and controls the output of the RF power supply according to the instructions or preset algorithms of the MCU, so as to realize the logic function of the RF power supply through programming.

[0011] The DDS source is used to generate a signal source with specific waveforms and frequencies;

[0012] The ADC detection module is used to acquire the analog signal of the radio frequency power supply and convert the analog signal into a digital signal;

[0013] The DAC attenuation module is used to convert digital control signals into analog control signals to adjust the output signal of the RF power supply. The DAC attenuation module uses a low-speed operational amplifier to increase the response time so that the second power value obtained by the DDS source from the power correspondence table corresponds one-to-one with the first power value. The first power value is the expected output power value under different scenarios, and the second power value is the actual output power value corresponding to the first power value. The power correspondence table provides the correspondence between the expected output power value and the actual output power value of the DDS source. The first power value is used to determine the power range that the signal source output by the DDS source can represent after DAC conversion and attenuation.

[0014] The PA power amplifier module is used to amplify the output signal of the radio frequency power supply to meet the power requirements of the load.

[0015] The coupling / VI sensor is used for signal transmission and coupling, as well as for real-time monitoring of voltage and current values ​​in the power supply system.

[0016] In one possible implementation, the DAC attenuation module includes: operational amplifier U24B, resistors R338, R242, R245, R244, variable resistor VR2, and capacitor C262, wherein the operational amplifier has a 0dB open-loop gain-bandwidth product of 1M and a closed-loop bandwidth of 100k.

[0017] Wherein, the first end of resistor R338 is connected to the first end of resistor R242 to form a first connection point; the second end of resistor R338 is connected to the signal source output terminal of the DDS source; the second end of resistor R242 is connected to the output terminal of the switch; the first end of capacitor C262 is connected to the first connection point; and the second end of capacitor C262 is grounded.

[0018] The output terminal of the operational amplifier U24B is connected to the first terminal of the resistor R245 and the sliding contact terminal of the variable resistor VR2, and is configured as the output terminal of the DAC attenuation module. The second terminal of the resistor R245 and the fixed first contact terminal of the variable resistor VR2 are connected to form a second connection point, and the fixed second contact terminal of the variable resistor VR2 is left floating.

[0019] The non-inverting input terminal of the operational amplifier U24B is connected to the first connection point, the inverting input terminal of the operational amplifier U24B is connected to the first terminal of the resistor R242, the second terminal of the resistor R242 is grounded, and the first terminal of the resistor R242 is connected to the second connection point.

[0020] In one possible implementation, the operational amplifier is an LM358.

[0021] In one possible implementation, the resistor R242 is 30Ω, the resistor R245 is 1.5KΩ±1, the resistor R244 is 1KΩ±1, and the capacitor C262 is 0.1uF.

[0022] A second aspect of this disclosure provides a radio frequency (RF) power supply testing and analysis method, applied to the RF power supply described in any one of the first aspects, the method comprising:

[0023] A series bias and multiple parallel biases are provided to the radio frequency power supply, wherein the series bias is 2B70_Vctrl and the multiple parallel biases are all 300kHz-4GHz, in order to test and analyze impulse response, overshoot, and oscillation to obtain a first test result, and to test the effect of 2B70_Vctrl inductor and capacitor on step and oscillation to obtain a second test result.

[0024] Adjust the amplitude of the DDS source output to adjust the actual output power value of the RF power supply, or use two-channel synthesis and adjust the phase of any channel to adjust the actual output power value of the RF power supply.

[0025] In one possible implementation, the method further includes:

[0026] The PID proportional coefficient is dynamically adjusted according to different power levels;

[0027] The digital signal input of the DAC attenuation module is 8192-65535, and the in-band output power is 12dBm.

[0028] The input voltage is determined by the PA power amplifier module to determine the quiescent operating point. Under a certain temperature, the correspondence between the input digital signal of the DAC attenuation module and the output of the power amplifier is tested to obtain the power correspondence table.

[0029] In one possible implementation, dynamically adjusting the PID proportional coefficient according to different power levels includes:

[0030] Discretize the power levels according to their different power levels;

[0031] The PID proportional coefficient is dynamically adjusted based on the discretized power level.

[0032] In one possible implementation, the method further includes:

[0033] The input-output characteristic curves of the coupled / VI sensor are tested, wherein the input-output characteristic curves are constructed based on power, frequency, and temperature.

[0034] In one possible implementation, the method further includes:

[0035] The detector board is tested to ensure its amplitude and phase are consistent with the signal output by the RF power supply, and the maximum output signal of the RF power supply is tested in order to adjust the detector board.

[0036] In one possible implementation, the method further includes:

[0037] A handshake signal is added between the main controller MCU and the slave controller FPGA to provide query, reset, and interrupt functions, thereby enhancing the robustness of the RF power supply.

[0038] This invention provides an radio frequency power supply and its testing and analysis method. Compared with the prior art, it has the following advantages:

[0039] By integrating the main controller MCU, slave controller FPGA, DDS source, ADC detection module, DAC attenuation module, PA power amplification module, and coupling / VI sensor, a highly integrated design is achieved. The modules work collaboratively, ensuring system stability and efficiency. The MCU, as the core of communication control and system protection, is responsible for protocol conversion and overall scheduling, while the FPGA, as a programmable logic device, can flexibly adjust the RF power supply output according to the MCU's instructions or preset algorithms, realizing programmability and high customization of the logic functions.

[0040] Furthermore, the DAC attenuation module employs a low-speed operational amplifier. By increasing the response time, this ensures a one-to-one correspondence between the second power value obtained from the DDS source's power lookup table and the first power value. This effectively solves the regulation fluctuation problem caused by system loop nonlinearity, improving the accuracy and stability of power control. The power lookup table provides the correspondence between the expected output power value and the actual output power value, enabling the RF power supply to output the expected power value under different scenarios.

[0041] This RF power supply supports multiple power levels and achieves a wide power regulation range through various adjustment methods such as DDS amplitude modulation, phase modulation, and DAC attenuation. In terms of multi-level power control, by adjusting the amplitude of the DDS source output or employing two-channel synthesis technology, the requirement for nanosecond-level response time is met, further improving the system's regulation capability and adaptability.

[0042] Other features and advantages of this disclosure will be described in detail in the following detailed description section. Attached Figure Description

[0043] The accompanying drawings are provided to further illustrate the present disclosure and form part of the specification. They are used together with the following detailed description to explain the present disclosure, but do not constitute a limitation thereof. In the drawings:

[0044] Figure 1 This is a circuit diagram of a DAC attenuation module shown in the embodiment of the specification.

[0045] Figure 2 This is a schematic diagram illustrating a large-signal open-loop voltage gain according to an embodiment in the specification.

[0046] Figure 3 This is a schematic diagram illustrating a frequency-phase-amplitude relationship according to an embodiment of the specification.

[0047] Figure 4 This is a schematic diagram showing a comparison of peripheral circuit parameters according to an embodiment of the specification.

[0048] Figure 5 This is a circuit diagram of a BAP70Q signal link shown in the embodiment of the specification.

[0049] Figure 6 This is a flowchart illustrating a radio frequency power supply test and analysis method according to an embodiment in the specification.

[0050] Figure 7 This is a schematic diagram showing a comparison of circuit parameters before and after optimization, according to an embodiment in the specification.

[0051] Figure 8 This is a schematic diagram showing a comparison of circuit parameters before and after optimization, according to an embodiment in the specification.

[0052] Figure 9 This is a schematic diagram showing a comparison of circuit parameters before and after optimization, according to an embodiment in the specification.

[0053] Figure 10 This is a schematic diagram showing a comparison of circuit parameters before and after optimization, according to an embodiment in the specification.

[0054] Figure 11 This is a schematic diagram showing a comparison of PID coefficients before and after adjustment, according to an embodiment in the instruction manual. Detailed Implementation

[0055] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0056] The specific embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit this disclosure.

[0057] This disclosure provides a radio frequency power supply, specifically, the radio frequency power supply includes:

[0058] The system consists of a main controller (MCU), a slave controller (FPGA), a DDS source, an ADC detection module, a DAC attenuation module, a PA power amplifier module, and a coupling / VI sensor.

[0059] Among them, the main controller MCU (Microcontroller Unit): A microcontroller unit is an integrated circuit chip that uses very large-scale integrated circuit technology to integrate a central processing unit (CPU) with data processing capabilities, random access memory (RAM), read-only memory (ROM), various I / O ports and interrupt systems, timers / counters and other functions (and may also include display driver circuits, pulse width modulation circuits, analog multiplexers, A / D converters and other circuits) onto a single silicon chip to form a small but complete microcomputer system.

[0060] From the controller FPGA (Field-Programmable Gate Array): A field-programmable gate array is a semi-custom circuit that addresses the shortcomings of custom circuits while overcoming the limitation of the limited gate count of traditional programmable devices. FPGA employs the concept of a Logic Cell Array (LCA), which internally comprises three parts: Configurable Logic Blocks (CLBs), Input / Output Blocks (IOBs), and interconnects.

[0061] DDS (Direct Digital Synthesis) is a new frequency synthesis technique that directly synthesizes the desired waveform based on the concept of phase. DDS is short for Direct Digital Frequency Synthesizer, and it is a new frequency synthesis method that directly synthesizes the desired waveform from a phase perspective.

[0062] ADC Detection Module (Analog-to-Digital Converter): An analog-to-digital converter is a device that can convert continuously changing analog signals into discrete digital signals.

[0063] DAC (Digital-to-Analog Converter) module: A digital-to-analog converter is a circuit that converts digital signals into analog signals. In this article, the DAC is also used to implement signal attenuation.

[0064] PA (Power Amplifier) ​​module: A power amplifier, or simply "amplifier," is an amplifier that can produce maximum power output to drive a load (such as a loudspeaker) under a given distortion rate. The power amplifier plays a pivotal role in the entire audio system, acting as a "coordinator" and, to a certain extent, determining whether the system can provide good sound quality.

[0065] Coupling / VI sensor (Voltage / Current Sensor): A voltage / current sensor used to monitor voltage and current values ​​in a power supply system in real time. Coupling refers to the process of transmitting a signal from one part of a circuit to another.

[0066] The main controller MCU is used for communication control, system protection, and protocol conversion.

[0067] In this embodiment, the MCU is responsible for the overall communication control, system protection, and protocol conversion of the RF power supply. It controls the operating status of each module by receiving external commands or internal algorithms, ensuring the stable operation of the RF power supply.

[0068] For example, when the RF power supply receives an external start signal, the MCU will analyze the signal and, according to a preset algorithm or instruction, start the DDS source to generate a signal source with a specific waveform and frequency. At the same time, it will monitor the analog signal fed back by the ADC detection module to ensure the stability and accuracy of the output signal.

[0069] The FPGA, acting as a programmable logic device, adjusts and controls the output of the RF power supply according to the instructions or preset algorithms of the MCU, so as to realize the logic function of the RF power supply through programming.

[0070] In this embodiment of the disclosure, the FPGA, as a programmable logic device, adjusts and controls the output of the RF power supply according to the instructions or preset algorithms of the MCU. The FPGA implements the logical functions of the RF power supply through programming, such as signal generation, signal attenuation, and power amplification.

[0071] For example, during the output regulation of the RF power supply, the FPGA can dynamically adjust the output frequency and waveform of the DDS source, as well as the attenuation coefficient of the DAC attenuation module, according to the instructions of the MCU, thereby achieving precise control of the RF power supply output.

[0072] The DDS source is used to generate a signal source with specific waveforms and frequencies;

[0073] In this embodiment, the DDS source generates a corresponding signal source based on preset waveform and frequency parameters. It utilizes components such as a phase accumulator, waveform memory, D / A converter, and low-pass filter to achieve digital signal synthesis.

[0074] For example, when a 1MHz sine wave signal needs to be generated, the DDS source will calculate the phase value of each sampling point through a phase accumulator according to the preset frequency parameters, then use the waveform memory to find the corresponding amplitude value, and finally output a continuous sine wave signal through a D / A converter and a low-pass filter.

[0075] The ADC detection module is used to acquire the analog signal of the radio frequency power supply and convert the analog signal into a digital signal;

[0076] In this embodiment of the disclosure, the ADC detection module acquires the analog signal of the radio frequency power supply and converts it into a digital signal. It uses an analog-to-digital converter to convert the continuous analog signal into a discrete digital signal for subsequent digital signal processing.

[0077] For example, when monitoring the output power of an RF power supply, the ADC detection module acquires the analog signal (such as voltage or current) output by the RF power supply and converts it into a digital signal. Then, an MCU or FPGA can process these digital signals to calculate the output power.

[0078] The DAC attenuation module is used to convert digital control signals into analog control signals to adjust the output signal of the RF power supply. The DAC attenuation module uses a low-speed operational amplifier to increase the response time so that the second power value obtained by the DDS source from the power correspondence table corresponds one-to-one with the first power value. The first power value is the expected output power value under different scenarios, and the second power value is the actual output power value corresponding to the first power value. The power correspondence table provides the correspondence between the expected output power value and the actual output power value of the DDS source. The first power value is used to determine the power range that the signal source output by the DDS source can represent after DAC conversion and attenuation.

[0079] In this embodiment, the DAC attenuation module converts the digital control signal into an analog control signal to adjust the output signal of the RF power supply. It employs a low-speed operational amplifier, increasing the response time to ensure that the second power value obtained from the DDS source power lookup table corresponds one-to-one with the first power value.

[0080] For example, when adjusting the output power of the RF power supply, the MCU looks up the corresponding digital control signal in a power mapping table based on a preset first power value (expected output power value). Then, the DAC attenuation module converts this digital control signal into an analog control signal, adjusting the gain or attenuation coefficient of the operational amplifier to precisely regulate the RF power supply output signal. Because a low-speed operational amplifier is used, the DAC attenuation module has a relatively long response time, but it ensures a one-to-one correspondence between the second power value (actual output power value) and the first power value.

[0081] The PA power amplifier module is used to amplify the output signal of the radio frequency power supply to meet the power requirements of the load.

[0082] In this embodiment of the disclosure, the PA power amplifier module amplifies the output signal of the radio frequency power supply to meet the power requirements of the load. It uses a power amplifier to amplify the input radio frequency signal to a sufficient power level to drive the load (such as an antenna, speaker, etc.).

[0083] For example, in a wireless communication system, the output signal of the radio frequency power supply may be too weak to directly drive the antenna for signal transmission. In this case, the PA power amplifier module will amplify the signal to a sufficient power level so that the antenna can effectively transmit the signal.

[0084] The coupling / VI sensor is used for signal transmission and coupling, as well as for real-time monitoring of voltage and current values ​​in the power supply system.

[0085] In this embodiment of the disclosure, the coupling / VI sensor is used for signal transmission and coupling, as well as real-time monitoring of voltage and current values ​​in the power supply system. It utilizes principles such as electromagnetic induction or resistive voltage division to convert the voltage and current values ​​in the power supply system into measurable signals (such as voltage or current) for subsequent processing and analysis.

[0086] For example, when monitoring the operating status of an RF power supply, the coupling / VI sensor monitors the voltage and current values ​​in the power system in real time. When the voltage or current value exceeds a preset threshold, the sensor will issue an alarm signal so that timely measures can be taken to protect the power system from damage. Simultaneously, the sensor can also send the monitored data to an MCU or FPGA for further processing and analysis.

[0087] The analog circuit algorithm for the coupled / VI sensor is based on the fundamental principle of electromagnetic field induction. Sampling the current flowing through the conductor can be done using inductive coupling, while sampling the load voltage can be done using capacitive coupling. A specially wound coil acts as a current sensor, and adding circular electrodes inside it can act as a voltage sensor. Currently, the self-made sensor combines capacitive and inductive effects, outputting two signals including common-mode and differential-mode signals. Based on the sensor's principle, the following explanation is provided.

[0088] The sensor outputs two signals, A1 and A2, respectively. Once the sensor structure, turns ratio, and materials are fixed, the magnitude and phase of the two output signals are theoretically only related to the input and output. To accurately measure the load impedance, the sensor needs to be calibrated. First, it is assumed that the outputs A1 and A2 are linear (actually functions of frequency and power). Their curves are tested at a fixed frequency, and they should be a fixed ratio on a standard 50-ohm load (if they are actually functions of power and frequency, then compensation should be made).

[0089] Depending on the implementation method, it can be divided into two types: analog implementation and digital implementation. The digital implementation has already completed digital down-conversion and decimation filtering, and processed the baseband signal. In order to solve the problem of unknown RF frequency that changes rapidly due to load changes, especially when real-time monitoring of matching circuits and plasma loads is required, analog circuits can be used to implement down-conversion, thereby using a low-speed, high-resolution baseband DC sampling chip.

[0090] Let A1 be the input of channel 1 and A2 be the input of channel 2, which are voltage U1 and current signal I1 (represented by voltage signal), respectively, as shown in the figure below. Then, a resistor-capacitor voltage divider phase shifter network is used to generate voltage signal U2 and current signal I2, respectively. Digital down-conversion and impedance power calculation are realized through analog multipliers and low-pass filters.

[0091] Let the current signal i1 = I m ·cos(ωt), voltage signal u1=U m ·cos(ωt+α), where α is the phase difference between voltage and current, then i2=I m ·cos(ωt+β), u2=U m ·cos(ωt+α-(π / 2-β)). Given an operating frequency of f = 13.56MHz, then X C2 =1 / (2·π·f·c²)=1 / (2·pi·13.56·68e-6)=172.6Ω, β=49°. To reduce error, the phase shift angle can be 45°. Then, select the nearest values ​​according to the resistor and capacitor sequence. The resistor and capacitor values ​​of the two phase shift branches are equal to achieve a 90-degree phase shift of the synthesized signal. The calculation is as follows: LPF=low pass filter, analog low-pass filter. In actual implementation, an RC low-pass network can be used.

[0092] P r =LPF(u1·i1)=0.5·U m ·I m ·cos(α)=U·I·cos(α)

[0093] P i =LPF(u2·i2)=0.5·U m ·I m ·cos(π / 2-α)=U·I.sin(α)

[0094] I 2 =LPF(i1·i1)

[0095] The above three signals are analog operations, using analog multipliers and low-pass filters to achieve quadrature down-conversion. This method features high precision, simple structure, and the ability to use low-speed, high-resolution ADCs for sampling before performing other operations in the digital domain.

[0096]

[0097] When normalizing the calibration using a standard 50-ohm load, then

[0098] Z0 = 50Ω

[0099]

[0100] Therefore, the normalized impedance is calculated as follows:

[0101]

[0102] The calculation formula for FPGA implementation, where the correction coefficient k is the ratio of the amplitudes of the two signals A1 and A2, To correct the phase under standard load, the phase difference between the two signals A1 and A2, as well as the phase shift of the ADC signal link, should be minimized. Measurements must be performed for each sensor. Currently, the two installed sensors have significantly different scaling factors; one has an amplitude ratio of approximately 6.8, and the other approximately 2.5. Simultaneously, the consistency of the two signals on the signal detector board must be ensured; the amplification factor and phase shift must be as consistent as possible, otherwise errors will occur.

[0103]

[0104] Symbols used only for calculation

[0105] Symbols used only for calculation

[0106]

[0107] P L =P r

[0108]

[0109] P R =P O -P L

[0110] For the digital circuit algorithm of the coupled / VI sensor, in order to accurately measure the load impedance, the sensor needs to be calibrated. First, it is assumed that the outputs A1 and A2 are linear, and that their ratio should be constant under a standard 50-ohm load (compensation is needed if the actual ratio is a function of power and frequency). Let the input of channel 1 be A1 and the input of channel 2 be A2, then:

[0111]

[0112] When normalizing the calibration using a standard 50-ohm load, then

[0113] Z0 = 50Ω

[0114]

[0115] (To stabilize this coefficient, R1 is best to be purely resistive)

[0116] Therefore, the normalized impedance is calculated as follows:

[0117]

[0118]

[0119] because Since the voltage and current are linear functions of frequency, when setting the power, the voltage and current sensor outputs for the same power value will change with the frequency. Therefore, the frequency coefficient must be compensated in reverse when calculating the power. Looking at the current inductor output formula, its value is a straight line crossing zero. However, because the sensor's operating frequency covers 2-60MHz, it cannot be completely considered a straight line crossing zero. But it can be treated as a perfectly straight line near a certain center frequency. During power calibration, only the power at the center frequency needs to be verified; the voltage and current coefficients will be automatically adjusted at other frequencies.

[0120] The calculation formula is 0≤Cor≤2 (ideally Cor≤1). In this formula, the current correction multiplier is a straight line with a negative slope passing through the point (f0,1). By adjusting the value of Cor, its slope can be adjusted to compensate for the positive slope of the current output frequency, so that the current value at any frequency is a constant value when calculating power.

[0121] Meanwhile, since the reflection coefficient is related to the source impedance and the impedance of each load, the influence of the source impedance must be considered when calculating the forward power.

[0122] The following are the calculation formulas for FPGA implementation, where the correction coefficient k is the ratio of the amplitudes of the two signals A1 and A2. When correcting the phase under standard load, the phase difference between the two signals A1 and A2, as well as the phase shift of the ADC signal link, should be as small as possible. At the same time, the consistency of the two signals on the signal detector board must be ensured; the amplification factor and phase shift must be as consistent as possible, otherwise errors will occur.

[0123]

[0124] P R =P O -P L

[0125] The above technical solution achieves a highly integrated design by integrating the main controller MCU, slave controller FPGA, DDS source, ADC detection module, DAC attenuation module, PA power amplification module, and coupling / VI sensor. The modules work collaboratively to ensure system stability and efficiency. The MCU, as the core of communication control and system protection, is responsible for protocol conversion and overall scheduling, while the FPGA, as a programmable logic device, can flexibly adjust the RF power supply output according to the MCU's instructions or preset algorithms, achieving programmability and high customization of the logic functions.

[0126] Furthermore, the DAC attenuation module employs a low-speed operational amplifier. By increasing the response time, this ensures a one-to-one correspondence between the second power value obtained from the DDS source's power lookup table and the first power value. This effectively solves the regulation fluctuation problem caused by system loop nonlinearity, improving the accuracy and stability of power control. The power lookup table provides the correspondence between the expected output power value and the actual output power value, enabling the RF power supply to output the expected power value under different scenarios.

[0127] This RF power supply supports multiple power levels and achieves a wide power regulation range through various adjustment methods such as DDS amplitude modulation, phase modulation, and DAC attenuation. In terms of multi-level power control, by adjusting the amplitude of the DDS source output or employing two-channel synthesis technology, the requirement for nanosecond-level response time is met, further improving the system's regulation capability and adaptability.

[0128] In one possible implementation, see [link to relevant documentation] Figure 1 As shown, the DAC attenuation module includes: operational amplifier U24B, resistor R338, resistor R242, resistor R245, resistor R244, variable resistor VR2, and capacitor C262. The operational amplifier has a 0dB open-loop gain-bandwidth product of 1M and a closed-loop bandwidth of 100k.

[0129] Wherein, the first end of resistor R338 is connected to the first end of resistor R242 to form a first connection point; the second end of resistor R338 is connected to the signal source output terminal of the DDS source; the second end of resistor R242 is connected to the output terminal of the switch; the first end of capacitor C262 is connected to the first connection point; and the second end of capacitor C262 is grounded.

[0130] The output terminal of the operational amplifier U24B is connected to the first terminal of the resistor R245 and the sliding contact terminal of the variable resistor VR2, and is configured as the output terminal of the DAC attenuation module. The second terminal of the resistor R245 and the fixed first contact terminal of the variable resistor VR2 are connected to form a second connection point, and the fixed second contact terminal of the variable resistor VR2 is left floating.

[0131] The non-inverting input terminal of the operational amplifier U24B is connected to the first connection point, the inverting input terminal of the operational amplifier U24B is connected to the first terminal of the resistor R242, the second terminal of the resistor R242 is grounded, and the first terminal of the resistor R242 is connected to the second connection point.

[0132] In this embodiment, resistors R338 and R242 are connected in series to form a voltage divider circuit, which is used to divide the signal provided by the signal source output terminal of the DDS source and send it to the non-inverting input terminal of the operational amplifier U24B.

[0133] Capacitor C262 is connected in parallel between the output terminal (i.e., the first connection point) of the voltage divider circuit and ground to filter out high-frequency noise and improve the stability of the circuit.

[0134] Operational amplifier U24B forms a feedback circuit, with its output connected to the sliding contact of resistor R245 and variable resistor VR2 to form an attenuated output signal. Its 0dB open-loop gain-bandwidth product is 1MHz, and its closed-loop bandwidth is approximately 100kHz, resulting in a relatively long response time, which optimizes the output of the RF power supply.

[0135] The variable resistor VR2 is used to adjust the attenuation coefficient; by changing the position of the sliding contact, the amplitude of the output signal can be altered. The second terminal (ground terminal) of resistor R242 is also connected to the inverting input of operational amplifier U24B, forming negative feedback and helping to stabilize the circuit's output.

[0136] When the DDS source provides a digital control signal, this signal is fed into the non-inverting input of operational amplifier U24B after passing through a voltage divider circuit consisting of resistors R338 and R242. Operational amplifier U24B outputs an amplified or attenuated signal based on the voltage difference between the non-inverting and inverting inputs (grounded via resistor R242). Since the inverting input is grounded, the output signal primarily depends on the voltage at the non-inverting input. The output signal is then attenuated by passing through resistor R245 and variable resistor VR2. The attenuation factor is determined by the resistance values ​​of resistors R245 and VR2. Capacitor C262 is used to filter out high-frequency noise, ensuring the stability of the output signal.

[0137] In one possible implementation, the operational amplifier is an LM358.

[0138] In one possible implementation, the resistor R242 is 30Ω, the resistor R245 is 1.5KΩ±1, the resistor R244 is 1KΩ±1, and the capacitor C262 is 0.1uF.

[0139] See Figure 2-4 As shown, Figure 2 The diagram shows that the open-loop voltage gain of the large signal gradually decreases, and Figure 3 The relationship between frequency, phase, and magnitude of the output is obtained. Figure 4 The comparison results of the peripheral circuit parameters before and after the main control board adopts LM358 are shown.

[0140] This disclosure also provides a radio frequency power supply testing and analysis method, applied to the radio frequency power supply described in any of the foregoing embodiments, through... Figure 5 The BAP70Q signal link shown can provide series bias and multiple parallel biases, see [link to documentation]. Figure 6 As shown, the method includes:

[0141] In step S11, a series bias and multiple parallel biases are provided to the RF power supply, wherein the series bias is 2B70_Vctrl and the multiple parallel biases are all 300kHz-4GHz, in order to test and analyze impulse response, overshoot, and oscillation to obtain a first test result, and to test the effect of 2B70_Vctrl inductor and capacitor on step and oscillation to obtain a second test result.

[0142] Among them, series bias: In a circuit, series bias refers to applying a bias voltage or current in series to a circuit element in order to control or regulate the operating state of the element.

[0143] Parallel bias: In contrast to series bias, parallel bias applies bias voltage or current to circuit elements in parallel, and is also used to control or regulate the operating state of the elements.

[0144] Impulse response: The system's response to a transient input signal (such as an impulse signal). In radio frequency power supplies, impulse response reflects the power supply's ability to handle sudden signals.

[0145] Overshoot: The phenomenon where a signal briefly exceeds its steady-state value before reaching it. In radio frequency power supplies, overshoot can lead to unnecessary energy release or signal distortion.

[0146] Oscillation: Periodic voltage or current variations in a circuit. In radio frequency power supplies, unwanted oscillations can lead to signal quality degradation or power instability.

[0147] DDS (Direct Digital Synthesis Source): A direct digital synthesis source is a signal source capable of generating high-precision, programmable frequency and phase signals.

[0148] Two-channel synthesis: This involves combining signals from two or more channels to produce the desired output signal. In radio frequency power supplies, this can be used to regulate output power or to implement other complex signal modulations.

[0149] In this embodiment of the disclosure, different types of biases are required to test the performance of the RF power supply. Series biases (such as 2B70_Vctrl) are used to control the operating point of a specific component (such as a transistor or amplifier) ​​in the power supply. Multiple parallel biases (such as signals in the 300kHz-4GHz range) are used to simulate various frequency components that may be encountered in real-world applications to test the power supply's impulse response, overshoot, and oscillation characteristics.

[0150] For example, suppose an RF power supply contains a power amplifier. Its operating point can be adjusted using a series bias (e.g., 2B70_Vctrl) to ensure optimal amplifier operation. Simultaneously, multiple parallel bias signals (e.g., 300kHz, 1GHz, 4GHz, etc.) can be input to the amplifier to observe its response to signals of different frequencies. These tests yield initial test results, including characteristics such as impulse response, overshoot, and oscillation.

[0151] In this embodiment of the disclosure, the presence of components such as inductors and capacitors in the RF power supply can affect the stability of the power supply. To understand the impact of these components on power supply performance, specific tests can be performed. By changing the value of 2B70_Vctrl, the response of the inductors and capacitors to a step input signal and the resulting oscillations can be observed.

[0152] For example, suppose there is an RF power supply circuit containing an inductor L and a capacitor C. The response of the inductor and capacitor to a step input signal can be observed by changing the value of 2B70_Vctrl. If significant oscillations appear in the response, it may be necessary to adjust the values ​​of the inductor or capacitor to improve the stability of the power supply. Through these tests, a second set of test results can be obtained to understand the impact of the inductor and capacitor on the power supply performance.

[0153] In step S12, the amplitude of the DDS source output is adjusted to adjust the actual output power value of the RF power supply, or two-channel synthesis is used to adjust the phase of any channel to adjust the actual output power value of the RF power supply.

[0154] In this embodiment, the actual output power of the RF power supply can be adjusted by changing the output amplitude of the DDS source or by using two-channel synthesis. By changing the output amplitude of the DDS source, the output power of the RF power supply can be directly controlled. Alternatively, by using two-channel synthesis, the desired output power value can be generated by combining signals from two or more channels. By adjusting the phase of any channel, the amplitude and phase of the synthesized signal can be changed, thereby adjusting the output power.

[0155] For example, suppose there is an RF power supply whose output power needs to be adjusted via a DDS source. The output power of the RF power supply can be directly controlled by changing the output amplitude of the DDS source. Alternatively, if a two-channel synthesis method is used to adjust the output power, the desired output power value can be generated by combining the signals from the two channels. For instance, if it is necessary to double the output power, the phases of the two channels can be adjusted to be the same (i.e., in-phase synthesis), thus doubling the amplitude of the synthesized signal and achieving output power adjustment.

[0156] Furthermore, for a comparison of the circuit parameters before and after optimization, regarding the characteristics of the BAP70Q and the current operating frequency of the circuit, please refer to [link / reference needed]. Figure 7-10 As shown.

[0157] In one possible implementation, the method further includes:

[0158] The PID proportional coefficient is dynamically adjusted according to different power levels;

[0159] The PID proportional coefficient (PID) determines the system's response speed to error signals in a PID (proportional-integral-derivative) control system. In radio frequency (RF) power supplies, adjusting the PID proportional coefficient can optimize the power supply's dynamic performance and stability.

[0160] In this embodiment of the disclosure, a PID control system is used in the RF power supply to regulate the output voltage or current to maintain a stable output power. However, different power levels may require different PID proportional coefficients to optimize performance. Therefore, the PID proportional coefficients can be dynamically adjusted according to the current power level. This typically involves two steps: first, discretizing the power level into several intervals; and then, setting an appropriate PID proportional coefficient for each interval.

[0161] For example, suppose an RF power supply needs to operate at three power levels: 10W, 20W, and 30W. These three power levels can be discretized into three ranges, and a different PID scaling factor can be set for each range. For instance, in the 10W range, a smaller PID scaling factor might be chosen to improve system stability; while in the 30W range, a larger PID scaling factor might be chosen to speed up system response. In this way, the PID scaling factor can be dynamically adjusted according to the current power level, thereby optimizing the performance of the RF power supply.

[0162] The digital signal input of the DAC attenuation module is 8192-65535, and the in-band output power is 12dBm.

[0163] Similar to the previous section, the DAC attenuation module converts digital signals into analog signals and controls output power through attenuation. To determine the correspondence between the digital signal input of the DAC attenuation module and the power amplifier output, it is necessary to test the power amplifier output power under different digital signal inputs at a defined temperature. This typically involves the following steps: First, setting the digital signal input range of the DAC attenuation module (e.g., 8192-65535); then, measuring the power output value of the power amplifier under each digital signal input; finally, recording these measurements and generating a power correspondence table.

[0164] For example, suppose the digital signal input range of the DAC attenuation module is 8192-65535, and the defined in-band output power is 12dBm. The amplifier output power can be tested at 25°C for different digital signal inputs (e.g., 8192, 16384, 32768, 65535, etc.). For instance, when the digital signal input is 8192, the amplifier output power might be 10dBm; when the digital signal input is 65535, the amplifier output power might be 14dBm. By recording these measurement results and generating a power correspondence table, the digital signal input value of the DAC attenuation module can be set according to the required output power in practical applications.

[0165] The input voltage is determined by the PA power amplifier module to determine the quiescent operating point. Under a certain temperature, the correspondence between the input digital signal of the DAC attenuation module and the output of the power amplifier is tested to obtain the power correspondence table.

[0166] The static operating point (SOP) in electronic devices refers to the circuit's operating state when there is no input signal. In radio frequency (RF) power supplies, determining the SOP is crucial for ensuring power supply stability and efficiency.

[0167] A power mapping table records the correspondence between different input signals (such as the digital signal from a DAC attenuation module) and the output power of the power amplifier. In RF power supplies, the power mapping table is used to achieve precise power control.

[0168] In this embodiment of the disclosure, the input voltage of the PA power amplifier module in the RF power supply has a significant impact on its output power and efficiency. To determine the quiescent operating point, it is necessary to measure the power amplifier output power and efficiency at different input voltages under a defined temperature. Then, the input voltage that achieves the optimal balance between the power amplifier output power and efficiency can be selected as the quiescent operating point.

[0169] For example, suppose you are testing a PA power amplifier module at 25°C. You can gradually increase the input voltage and measure the amplifier's output power and efficiency at each input voltage. For instance, at an input voltage of 3V, the amplifier's output power might be 10W with an efficiency of 50%; at an input voltage of 4V, the output power might be 15W with an efficiency of 60%. By comparing the output power and efficiency values ​​at different input voltages, you can select an input voltage (such as 3.5V) that achieves the optimal balance between the two as the quiescent operating point. This ensures that the RF power supply operates in a stable and efficient state.

[0170] See Figure 11 As shown, after optimizing the circuit parameters and adjusting the PID coefficient, the multi-power regulation time is around 100us by relying solely on 70Q. Therefore, theoretically, the forward power can be stabilized within 100us-200us.

[0171] In one possible implementation, dynamically adjusting the PID proportional coefficient according to different power levels includes:

[0172] Discretize the power levels according to their different power levels;

[0173] Among them, power level discretization divides a continuous power range into several discrete power levels or intervals so that each interval can be controlled and optimized individually.

[0174] In this embodiment of the disclosure, in the application of radio frequency power supplies, different application scenarios or load conditions may require different output powers, thus necessitating flexible power control. To simplify the control logic and improve the system's response speed, the continuous power range can be divided into several discrete power levels. Each power level corresponds to a specific output power range, and different control parameters (such as PID proportional coefficients) can be set as needed.

[0175] For example, assuming the output power range of the RF power supply is 0-100W, this range can be divided into five discrete power levels: 0-20W, 20-40W, 40-60W, 60-80W, and 80-100W. Each power level corresponds to a specific PID scaling factor setting. For instance, at lower power levels (0-20W), a smaller PID scaling factor might be chosen to maintain system stability; while at higher power levels (80-100W), a larger PID scaling factor might be chosen to respond quickly to load changes.

[0176] The PID proportional coefficient is dynamically adjusted based on the discretized power level.

[0177] In this embodiment of the disclosure, once the power levels are discretized, different PID proportional coefficients can be set for each power level. In practical applications, the RF power supply control system monitors the output power in real time and dynamically adjusts the PID proportional coefficients according to the current power level. This dynamic adjustment ensures that the RF power supply maintains stable output under different load conditions and responds quickly to load changes.

[0178] Continuing the example above, suppose the current output power of the RF power supply is 30W, belonging to the second power level (20-40W). According to the preset control strategy, the control system will adjust the PID proportional coefficient to a value suitable for this power level. If the output power suddenly increases to 65W, entering the fourth power level (60-80W), the control system will immediately detect this change and automatically adjust the PID proportional coefficient to a new value suitable for this power level. In this way, the RF power supply can always maintain a stable output and quickly adapt to load changes.

[0179] In summary, by discretizing the power levels and dynamically adjusting the PID proportional coefficient based on the discretized power levels, the RF power supply can achieve precise control of the output power, while improving the system's stability and response speed.

[0180] In one possible implementation, the method further includes:

[0181] The input-output characteristic curves of the coupled / VI sensor are tested, wherein the input-output characteristic curves are constructed based on power, frequency, and temperature.

[0182] In this embodiment of the disclosure, under the condition of open-loop RF output, power linearity data of the RF power sensor is collected according to different output powers to obtain power test data of the sensor channel and ADC signal acquisition link channel under different output powers in multiple power test indicators.

[0183] Based on multiple test frequency points set for the sensor, frequency linearity data of the RF power sensor is acquired to obtain frequency test acquisition data of the sensor channel and ADC signal acquisition link channel corresponding to the multiple test frequency points.

[0184] Based on the power test acquisition data of the sensor channel and the ADC signal acquisition link channel under different output powers for multiple power test indicators, as well as the power meter calibration data, the power test results corresponding to different output powers are determined.

[0185] Based on the frequency test data collected from the sensor channels and ADC signal acquisition link channels corresponding to the multiple test frequency points, frequency test results corresponding to different frequency indicators are obtained.

[0186] The step of acquiring frequency linearity data of the RF power sensor based on multiple test frequency points set for the sensor, and obtaining frequency test acquisition data of the sensor channel and ADC signal acquisition link channel corresponding to the multiple test frequency points, includes:

[0187] The parameters of the target module in the RF power supply are adjusted according to multiple test frequency points set on average within a preset frequency range.

[0188] The output signals of the sensor channels and the ADC signal acquisition link channels corresponding to multiple test frequency points are collected.

[0189] The step of adjusting the parameter values ​​of the target module in the RF power supply based on multiple test frequency points set on average within a preset frequency range includes:

[0190] Based on multiple test frequency points set on average within a preset frequency range, the parameter values ​​of the DAC attenuation module in the RF power supply are adjusted so that the output power of the RF power supply is fixed at the preset power.

[0191] The step of obtaining frequency test results corresponding to different frequency indicators based on the frequency test acquisition data of the sensor channels and ADC signal acquisition link channels corresponding to multiple test frequency points includes:

[0192] The power value is calculated based on the output signals of the sensor channel and the ADC signal acquisition link channel, and the frequency response of the sensor channel and the ADC signal acquisition link channel is tested.

[0193] The parameter value of the DAC attenuation module is 1500W.

[0194] The step of adjusting the parameter values ​​of the target module in the RF power supply based on multiple test frequency points set on average within a preset frequency range includes:

[0195] Based on multiple test frequency points set on average within a preset frequency range, the signal source of the DDS source in the RF power supply is adjusted to a preset fixed value.

[0196] The step of obtaining frequency test results corresponding to different frequency indicators based on the frequency test acquisition data of the sensor channels and ADC signal acquisition link channels corresponding to multiple test frequency points includes:

[0197] The power value is calculated based on the output signals of the sensor channel and the ADC signal acquisition link channel, and the frequency response of the ADC signal acquisition link channel is tested.

[0198] The signal source of the DDS source is 18dBm.

[0199] The preset frequency range is 12.882M-14.238M.

[0200] Among these, several power test parameters include: forward power, reverse power, VSWR, current, and voltage;

[0201] In the case of open-loop RF output, power linearity data is acquired for the RF power sensor according to different output powers to obtain power test acquisition data of the sensor channel and ADC signal acquisition link channel under different output powers, including:

[0202] With open-loop RF output, the output power is linearly adjusted to achieve stable power amplifier output after each output power switch. The forward power, reverse power, and VSWR of the power meter are recorded.

[0203] After IQ demodulation, filtering, and extraction, the test acquisition data of the sensor channel and the ADC signal acquisition link channel on the current and voltage are recorded at different output powers.

[0204] In one possible implementation, the method further includes:

[0205] The detector board is tested to ensure its amplitude and phase are consistent with the signal output by the RF power supply, and the maximum output signal of the RF power supply is tested in order to adjust the detector board.

[0206] The detector board is used to detect the amplitude and phase of radio frequency signals. It typically contains detectors and other related circuitry to convert radio frequency signals into measurable DC voltage or current.

[0207] In this embodiment, the detector board is a key component in the radio frequency (RF) power supply system used to monitor the amplitude and phase of the output signal. To ensure that the output signal of the RF power supply accurately reflects its actual operating state, the detector board needs to be calibrated and tested. First, by comparing the signal output by the RF power supply with the signal detected by the detector board, the consistency of the detector board in amplitude and phase can be evaluated. Second, testing the maximum output signal of the RF power supply verifies the performance of the detector board under high-power conditions. If deviations or instability are found in the detector board, appropriate adjustments can be made to ensure its accuracy.

[0208] For example, suppose an RF power supply has an output power range of 0-100W and is equipped with a detector board to monitor the amplitude and phase of the output signal. During manufacturing or maintenance, a signal generator can be used to generate an RF signal with known amplitude and phase as the input to the RF power supply. Then, the signal output by the RF power supply and the signal detected by the detector board are observed and recorded. By comparing the differences in amplitude and phase between the two, the consistency of the detector board can be evaluated. Furthermore, the input power of the RF power supply can be gradually increased until its maximum output power is reached to test the performance of the detector board under high-power conditions. If a deviation is found in the detector board, it can be corrected by adjusting its internal circuit parameters or calibrating its measurement range.

[0209] In one possible implementation, the method further includes:

[0210] A handshake signal is added between the main controller MCU and the slave controller FPGA to provide query, reset, and interrupt functions, thereby enhancing the robustness of the RF power supply.

[0211] The handshake signal is used to confirm that both the master controller MCU and the slave controller FPGA are ready to transmit data or perform operations, ensuring the correct transmission and execution of data or commands.

[0212] In this embodiment of the disclosure, in the RF power supply system, the main controller (MCU) is typically responsible for the overall control logic and data processing, while the slave controller (FPGA) is responsible for specific signal processing and control tasks. To ensure the reliability of communication and data transmission between the two, a handshake signal can be added. The handshake signal is a bidirectional communication mechanism used to confirm that both parties are ready to transmit data or perform operations. Through the handshake signal, the MCU can query the FPGA's status, reset the FPGA, or trigger an interrupt operation, thereby achieving precise control of the FPGA. This mechanism can greatly improve the robustness and reliability of the RF power supply.

[0213] For example, suppose an RF power supply system has an MCU as the master controller, responsible for controlling RF signal generation, power regulation, and status monitoring; and an FPGA as the slave controller, responsible for processing the digital part of the RF signal, such as modulation, demodulation, and filtering. To enhance system robustness, handshake signals can be added between the MCU and FPGA. For instance, when the MCU needs to query the current status of the FPGA, it can send a query request signal to the FPGA. After receiving the request, the FPGA will return a status signal to the MCU to confirm its current operating status. If the MCU needs to reset the FPGA, it can send a reset signal to the FPGA. After receiving the reset signal, the FPGA will perform a reset operation and return an acknowledgment signal to the MCU. Furthermore, if the FPGA detects any abnormal situation or needs to interrupt the MCU's current operation, it can send an interrupt signal to the MCU. After receiving the interrupt signal, the MCU will immediately stop its current operation and switch to handling the interrupt event. In this way, communication and data transmission between the MCU and FPGA become more reliable and stable, thereby enhancing the robustness of the RF power supply.

[0214] The preferred embodiments of the present disclosure have been described in detail above with reference to the accompanying drawings. However, the present disclosure is not limited to the specific details of the above embodiments. Within the scope of the technical concept of the present disclosure, various changes, modifications, substitutions and variations can be made to these embodiments, and all such changes, modifications, substitutions and variations fall within the protection scope of the present disclosure.

[0215] It should also be noted that the various specific technical features described in the above embodiments can be combined in any suitable manner without contradiction, and such combinations should also be considered as part of this disclosure. To avoid unnecessary repetition, this disclosure will not further describe the various possible combinations. The technical scope of this application is not limited to the contents of the specification, but must be determined according to the scope of the claims.

Claims

1. A radio frequency power supply characterized by, The radio frequency power supply comprises: A main controller MCU, a slave controller FPGA, a DDS source, an ADC detection module, a DAC attenuation module, a PA power amplification module, and a coupling / VI sensor; The main controller MCU is used for communication control, system protection, and protocol conversion; The slave controller FPGA, as a programmable logic device, adjusts and controls the output of the radio frequency power supply according to the instructions or preset algorithms of the main controller MCU, so as to realize the logic function of the radio frequency power supply through programming; The DDS source is used for generating a signal source with a specific waveform and frequency according to preset waveform and frequency parameters; The ADC detection module is used for collecting analog signals of the radio frequency power supply and converting the analog signals into digital signals; The DAC attenuation module is used for converting a digital control signal into an analog control signal to adjust the output signal of the radio frequency power supply, wherein the DAC attenuation module adopts a low-speed operational amplifier to make the second power value obtained by the DDS source searching a power corresponding table correspond to the first power value by increasing the response time, wherein the first power value is an expected output power value in different scenarios, the second power value is an actual output power value corresponding to the first power value, the power corresponding table provides the corresponding relationship between the expected output power value and the actual output power value of the DDS source, and the first power value is used to determine the power range that can be represented by the signal source output by the DDS source after DAC conversion and attenuation; The PA power amplification module is used for amplifying the output signal of the radio frequency power supply to meet the power demand of the load; The coupling / VI sensor is used for signal transmission and coupling, and real-time monitoring of voltage and current values in the power supply system.

2. The radio frequency power source of claim 1, wherein, The DAC attenuation module comprises an operational amplifier U24B, a resistor R338, a resistor R242, a resistor R245, a resistor R244, a variable resistor VR2, and a capacitor C262, wherein the open-loop gain bandwidth product of the operational amplifier is 1M, and the closed-loop bandwidth is 100k; The first end of the resistor R338 is connected with the first end of the resistor R242 to form a first connection point; the second end of the resistor R338 is connected with the signal source output end of the DDS source, the second end of the resistor R242 is connected with the output end of a switch, the first end of the capacitor C262 is connected with the first connection point, and the second end of the capacitor C262 is grounded; The output end of the operational amplifier U24B is connected with the first end of the resistor R245 and the sliding contact end of the variable resistor VR2 at the same time, and is configured as the output end of the DAC attenuation module; the second end of the resistor R245 and the fixed first contact end of the variable resistor VR2 are connected to form a second connection point, and the fixed second contact end of the variable resistor VR2 is suspended. The non-inverting input end of the operational amplifier U24B is connected with the first connecting point, the inverting input end of the operational amplifier U24B is connected with the first end of the resistor R242, the second end of the resistor R242 is grounded, and the first end of the resistor R242 is connected with the second connecting point.

3. The radio frequency power supply of claim 2, wherein, The operational amplifier is LM358.

4. The radio frequency power supply of claim 2, wherein, The resistor R242 is 30Ω, the resistor R245 is 1.5KΩ±1, the resistor R244 is 1KΩ±1, and the capacitor C262 is 0.1uF.

5. A method of radio frequency power supply test analysis, characterized by, The method is applied to the radio frequency power supply in any one of claims 1-4, and the method comprises: providing a series bias and a plurality of parallel biases to the radio frequency power supply, wherein the series bias is 2B70_Vctrl, and each of the plurality of parallel biases is 300kHz-4GHz, so as to test and analyze the impact of the step response, overshoot and oscillation, to obtain a first test result, and to test the impact of the inductance and capacitance of 2B70_Vctrl on the step and oscillation, to obtain a second test result; adjusting the amplitude of the output of the DDS source, so as to adjust the actual output power value of the radio frequency power supply, or adjusting the phase of any one channel by using two-channel synthesis, so as to adjust the actual output power value of the radio frequency power supply.

6. The method of claim 5, wherein the test analysis of the radio frequency power supply is performed by a computer. The method further comprises: dynamically adjusting the PID proportion coefficient according to different power levels; wherein the digital signal input of the DAC attenuation module is 8192-65535, and the in-band output determines the power value to be 12dbm; determining the input voltage through the PA power amplification module, so as to determine the static operating point, so that the corresponding relationship between the input of the digital signal of the DAC attenuation module and the output of the power amplifier is tested at a certain temperature, and the power corresponding table is obtained.

7. The method of claim 6, wherein the test analysis of the radio frequency power supply is performed by a computer system. The dynamically adjusting the PID proportion coefficient according to different power levels comprises: discretizing the power levels according to different power levels; dynamically adjusting the PID proportion coefficient according to the discretized power levels.

8. The method of claim 5-7, wherein, The method further comprises: testing the input-output characteristic curve of the coupling / VI sensor, wherein the input-output characteristic curve is constructed according to power, frequency and temperature.

9. The method of claim 5-7, wherein, The method further comprises: testing the consistency of the amplitude and phase of the detection plate with the output signal of the radio frequency power supply, and testing the maximum output signal of the radio frequency power supply, so as to adjust the detection plate.

10. The method of claim 5-7, wherein, The method further comprises: adding a handshake signal between the master controller MCU and the slave controller FPGA, so as to provide query, reset and interruption functions, thereby enhancing the robustness of the radio frequency power supply.

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