Photoelectric memory capacitor device and preparation method thereof

Abstract

The invention provides a memory device with electric memcapacitor and optical memcapacitor behaviors, which comprises an upper electrode and a lower electrode, and further comprises a heterostructure positioned between the upper electrode and the lower electrode, and the heterostructure sequentially comprises an n-type metal oxide semiconductor film layer and a heavily doped p-type silicon semiconductor layer from top to bottom. According to the memcapacitor physical model with the width modulated potential barrier region, the device is excited by using an electric signal or an optical signal, so that the ionization oxygen vacancy concentration in the potential barrier region is increased, the width of the potential barrier region is reduced, and the capacitance value of the device is increased. According to the invention, the photoelectric memcapacitor device is successfully constructed by using a heterostructure, and the regulation and control of the device capacitance by an electric signal and an optical signal are realized, so that the memory behaviors of an electric memcapacitor and an optical memcapacitor are realized in a single device.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor information devices, and mainly to a memory device with both photoelectric memory and capacitance characteristics and a preparation method thereof. Background Art

[0002] After the concept of memristor was proposed and gradually accepted by people, the concept of memcapacitor was derived from memristor. Memcapacitor, in simple terms, is a device with the memory characteristics of a capacitor. Analogous to a memristor, the capacitance of a memcapacitor is not only related to the instantaneous value of the applied voltage or charge stimulus, but also to the entire history of the applied stimulus, that is, it has the memory characteristics of a capacitor.

[0003] Photoelectric memcapacitors will make corresponding capacitance changes for light stimulation and electrical stimulation, and memorize the corresponding electrical stimulation or light stimulation through the change of capacitance. At the same time, memcapacitors can read their capacitance value under 0V bias, which has greater advantages in low static power consumption and lossless reading. In addition, by utilizing the open-circuit characteristics of capacitor devices, the crosstalk problem faced by the two-terminal memory devices during integration can be overcome, which is conducive to the development of low-power, high-density neuromorphic computing networks. This feature makes memcapacitors have broad application prospects in the fields of information devices and electronic information.

[0004] At present, the research on this type of photoelectric memristor device is still in its infancy. In particular, the research on the memristor behavior of the device under light stimulation has not been clearly proposed, and no clear physical model of the device controlled by light has been proposed. Therefore, designing and preparing a memory device with both photoelectric memristor characteristics has certain guiding significance for the research on photoelectrically controlled memristor devices.

[0005] There are also some difficulties in the research of photoelectrically controlled memristor devices. First, the structure and materials of the device need to be determined to ensure that the device can have capacitive memory characteristics under light and electrical stimulation; second, the physical model of the photoelectric memristor device needs to be studied so that it can be precisely controlled under the stimulation of electric field and light; finally, the manufacturing process needs to be determined to ensure that the prepared device has good stability and reliability. Summary of the invention

[0006] In view of the deficiencies in the prior art, the present invention provides a memory device having both photoelectric and memorizable properties and a method for preparing the same, which solves the problem that the capacitive memory properties of the existing devices are unstable and cannot be regulated by both light stimulation and electrical stimulation.

[0007] According to an embodiment of the present invention, a memory device having both electrical and optical memristive behavior includes an upper electrode and a lower electrode, and also includes a heterostructure located between the upper electrode and the lower electrode, wherein the heterostructure is, from top to bottom, an n-type metal oxide semiconductor thin film layer and a heavily doped p-type silicon semiconductor layer.

[0008] Preferably, the thickness of the n-type metal oxide semiconductor layer is 200-300 nm, the thickness of the heavily doped p-type silicon semiconductor substrate layer is 0.5 mm, and the resistivity is 0.002 Ω*cm.

[0009] Preferably, the thickness of the upper electrode is 100-200 nm, and the thickness of the lower electrode is 100-200 nm.

[0010] Preferably, the n-type metal oxide semiconductor layer is a ZnO thin film or a TiO2 thin film.

[0011] Preferably, the lower electrode is metal Al, and the upper electrode is inert metal Pt, Au or Ni.

[0012] The present invention also provides an embodiment, a method for preparing a memory device having both photoelectric and memristive characteristics, comprising the following steps:

[0013] Step 1: clean the heavily doped p-type silicon substrate layer to ensure that the surface is clean and free of impurities;

[0014] Step 2, depositing upward on the surface of the silicon substrate by magnetron sputtering to finally obtain a metal oxide semiconductor layer;

[0015] Step three, continue to deposit on the metal oxide semiconductor layer using magnetron sputtering, and finally obtain a metal film layer as a metal upper electrode.

[0016] Step 4: Continue to deposit upward on the surface of the silicon substrate using magnetron sputtering to eventually obtain a metal film layer as a metal lower electrode.

[0017] The specific conditions of magnetron sputtering in step 2 are as follows: the sputtering gas is high-purity argon and high-purity oxygen, the gas ratio is argon: oxygen = 18:2, the sputtering power is 80W, and the back vacuum is less than 2.0×10 -4 Pa, the growth pressure is 3Pa.

[0018] The specific conditions of magnetron sputtering in step 3 are: the sputtering gas is high-purity argon, the sputtering power is 60W, and the back vacuum is less than 8.0×10 -4 Pa, and the growth pressure is 1.5Pa.

[0019] The specific conditions of magnetron sputtering in step 4 are: the sputtering gas is high-purity argon, the sputtering power is 60W, and the back vacuum is less than 8.0×10 -4Pa, and the growth pressure is 1.5Pa.

[0020] Preferably, the sputtering target in step two is a ZnO ceramic target or a TiO2 ceramic target, the sputtering target in step three is a Ni target, and the sputtering target in step four is an Al target.

[0021] Preferably, the temperature of magnetron sputtering in step 2, step 3 and step 4 is room temperature.

[0022] Preferably, the step three is a Ni film, which is distributed in a square array and has a size of 100×100 μm.

[0023] Preferably, the Al film in step four is distributed in a square array and has a size of 100×100 μm.

[0024] Compared with the prior art, the present invention has the following beneficial effects:

[0025] 1. By constructing p + -Si / n-ZnO heterostructure devices use electric and optical field excitation to modulate the width / height of the barrier region, and then to regulate the capacitance, thereby realizing the memory behavior of the capacitor in a single device.

[0026] 2. A physical model of interface barrier width modulation is proposed to explain the regulation mechanism of device capacitance by light. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 The schematic diagram is a working principle diagram of the memory capacitance characteristic of the device of the present invention under light stimulation.

[0028] Figure 2 When the device of the present invention is subjected to continuous forward voltage scanning, the device capacitance gradually decreases.

[0029] Figure 3 The device capacitance of the device of the present invention gradually increases under continuous reverse voltage scanning.

[0030] Figure 4 The device of the present invention is shown in FIG. 1 , and the forward voltage regulates the device capacitance at different frequencies.

[0031] Figure 5 The light response of the capacitor of the device of the present invention under continuous irradiation of light of different wavelengths.

[0032] Figure 6 It is the regulation behavior of the device capacitance by the optical signal when the device of the present invention is irradiated with light of different wavelengths. DETAILED DESCRIPTION

[0033] The following drawings disclose the embodiments of the present invention. For the purpose of clear description, many practical details will be described together in the following description. However, it should be understood that these practical details should not be used to limit the present invention. That is, in some embodiments of the present invention, these practical details are not necessary. In addition, in order to simplify the drawings, some conventional structures and elements will be depicted in a simple schematic manner in the drawings.

[0034] Example

[0035] This embodiment includes a memory device, including an upper electrode and a lower electrode, and also includes a heterostructure located between the upper electrode and the lower electrode. The heterostructure is composed of an n-type metal oxide semiconductor thin film layer and a heavily doped p-type silicon semiconductor layer from top to bottom.

[0036] First, Al metal is selected as the lower electrode, which is easier to form ohmic contact with the p-type Si wafer. The p-type semiconductor is a heavily doped p-type Si wafer. The n-type oxide semiconductor layer is selected as ZnO thin film, and the upper electrode is selected as inert Ni metal.

[0037] The specific working principle is:

[0038] like Figure 1 As shown in (a), due to p + -The difference between the Fermi levels of Si and ZnO, p + -Si / ZnO interface forms a barrier region, the width of which determines the capacitance of the device; Figure 1 As shown in (b), under the action of 360nm light, V O The captured electrons will be excited to form V O 2+ (V O →V O 2+ +2e - ), which reduces the width of the barrier region, causing the device capacitance to gradually increase as the ultraviolet light is turned on; Figure 1 As shown in (c), after removing the light, the electrons move to p + -Si / ZnO interface migration, thereby reducing V O 2+ concentration and widens the barrier region (V O 2+ +2e - →V O ), at this time, the capacitance of the device will relax, but it does not return to the initial value, but remains in an intermediate state. Therefore, the device realizes the photomemory capacitance characteristic.

[0039] Preparation of memory devices:

[0040] Select p+ -Si wafers were ultrasonically cleaned with acetone, anhydrous ethanol and deionized water, and then dried with nitrogen before being used as substrates. + -Si substrate, a 200nm thick ZnO film was grown on the substrate, and then a 100nm thick Ni metal film was grown on the ZnO film by magnetron sputtering as the upper electrode. + A 100nm thick Al metal film is grown on the Si substrate as the lower electrode.

[0041] Specifically, the specific preparation conditions of ZnO thin film are: back vacuum: less than 2.0×10 -4 Pa; sputtering gas: high-purity argon and high-purity oxygen, the gas ratio is argon: oxygen = 18:2; growth pressure 3Pa; sputtering power: 80W; sputtering target: ZnO ceramic target; substrate temperature: room temperature.

[0042] The specific preparation conditions of Ni metal film are: back vacuum: less than 8.0×10 -4 Pa; sputtering gas: high purity argon (Ar); growth pressure 1.5Pa; sputtering power: 60W; sputtering target: Ni target; substrate temperature: room temperature. The shape is a rectangular array distribution and the size is 100×100μm.

[0043] The specific preparation conditions of Al metal film are as follows: Back vacuum: less than 8.0×10 -4 Pa; sputtering gas: high purity argon (Ar); growth pressure 1.5Pa; sputtering power: 60W; sputtering target: Al target; substrate temperature: room temperature. The shape is a rectangular array distribution and the size is 100×100μm.

[0044] The following experiments were carried out using the prepared devices:

[0045] In this embodiment, Figure 2 and Figure 3 As shown in the figure, under continuous positive and negative voltage scanning, the capacitance hysteresis curve of the device can be observed. Under continuous scanning of positive voltage, the device capacitance continues to decrease; conversely, under continuous scanning of negative voltage, the device capacitance continues to increase. The decrease and increase of capacitance correspond to the forgetting and memory processes of the memory device, respectively.

[0046] like Figure 4 As shown in the figure, under the voltage sweep of 0-3V, different frequencies are used to read the capacitance of the device. As the frequency increases, the capacitance decreases at a constant rate. The higher the frequency, the smaller the capacitance. Because at high frequencies, the internal degrees of freedom do not have enough time to respond to external disturbances, which shows the dependence of capacitance on the test frequency.

[0047] like Figure 5As shown in the figure, the response of the capacitance of the memory device under continuous irradiation of light of different wavelengths is shown. The capacitance of the device under light is significantly higher than that in the dark, and the device capacitance shows the largest increase under 360nm light.

[0048] like Figure 6 As shown in the figure, when 5 light pulses are applied to the device continuously, the capacitance continues to increase with the increase of the number of light pulses (5s). After the light is removed, the capacitance of the device is still higher than the initial state, that is, this light-induced enhancement is non-volatile, which proves its light-controlled memory capacitance behavior.

[0049] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solution of the present invention, which should be included in the scope of the claims of the present invention.

Claims

1. A memory device having both electrical and optical memory behaviors, characterized in that: It comprises an upper electrode and a lower electrode, and also comprises a heterogeneous structure located between the upper electrode and the lower electrode. The heterogeneous structure comprises an n-type metal oxide semiconductor film layer and a heavily doped p-type silicon semiconductor layer from top to bottom.

2. The memory device having both electrical and optical memory behavior as claimed in claim 1, characterized in that: The thickness of the n-type metal oxide semiconductor layer is 200-300nm; the thickness of the heavily doped p-type silicon semiconductor substrate layer is 0.5mm, and the resistivity is 0.002Ω·cm.

3. The memory device having both electrical and optical memory behavior as claimed in claim 1, characterized in that: The thickness of the upper electrode is 100-200 nm, and the thickness of the lower electrode is 100-200 nm.

4. The memory device having both electrical and optical memory behavior as claimed in claim 1, characterized in that: The n-type metal oxide semiconductor layer is a ZnO film or a TiO2 film.

5. The memory device having both electrical and optical memory behavior as claimed in claim 1, characterized in that: The lower electrode is metal Al, and the upper electrode is inert metal Pt, Au or Ni.

6. A method for preparing a behavioral memory device having both electrical memory and optical memory, characterized in that: The steps include: Step 1: clean the heavily doped p-type silicon substrate layer to ensure that the surface is clean and free of impurities; Step 2, depositing upward on the surface of the silicon substrate by magnetron sputtering to finally obtain a metal oxide semiconductor layer; Step three, continue to deposit on the metal oxide semiconductor layer using magnetron sputtering, and finally obtain a metal film layer as a metal upper electrode. Step 4: Continue to deposit upward on the surface of the silicon substrate using magnetron sputtering to eventually obtain a metal film layer as a metal lower electrode.

7. The method for preparing a behavioral memory device having both electrical and optical memory as claimed in claim 6, characterized in that: The specific conditions of magnetron sputtering in step 2 are as follows: the sputtering gas is high-purity argon and high-purity oxygen, the gas ratio is argon: oxygen = 18:2, the sputtering power is 80W, and the back vacuum is less than 2.0×10 -4 Pa, and the growth pressure is 3 Pa. The specific conditions of magnetron sputtering in step 3 are: the sputtering gas is high-purity argon, the sputtering power is 60W, and the back vacuum is less than 8.0×10 -4 Pa, and the growth pressure is 1.5 Pa. The specific conditions of magnetron sputtering in step 4 are: the sputtering gas is high-purity argon, the sputtering power is 60W, and the back vacuum is less than 8.0×10 -4 Pa, and the growth pressure is 1.5Pa.

8. The method for preparing a behavioral memory device having both electrical and optical memory as claimed in claim 6, characterized in that: The sputtering target in step 2 is a ZnO ceramic target or a TiO2 ceramic target, the sputtering target in step 3 is a Ni target, and the sputtering target in step 4 is an Al target.

9. The method for preparing a behavioral memory device having both electrical and optical memory as claimed in claim 6, characterized in that: The temperature of magnetron sputtering in step 2, step 3 and step 4 is room temperature.

10. The method for preparing a behavioral memory device having both electrical and optical memory as claimed in claim 6, characterized in that: The metal film layer in step three is a Ni film, which is distributed in a rectangular array and has a size of 100×100 μm; the metal film layer in step four is an Al film, which is distributed in a rectangular array and has a size of 100×100 μm.

Images