Preparation method of bipolar transistor type silicon-based optical detector with independent absorption region and metasurface structure

Abstract

The invention relates to a preparation method of a bipolar transistor type silicon-based optical detector with an independent absorption region and a metasurface structure. The detector comprises a top silicon layer (secondary collector region), an n-type silicon layer (collector region), a p-type germanium-silicon layer (base region) and an n-type polycrystalline silicon layer (emitter region) which are arranged on an SOI substrate. And the absorption region is an n-type polycrystalline silicon layer. The method comprises the following steps: epitaxially growing multiple layers of materials on an SOI (Silicon On Insulator) substrate, wherein the multiple layers of materials comprise a Si layer / Si collector region, a SiGe layer / SiGe base region and a polycrystalline silicon layer / polycrystalline Si emitter region; etching the polycrystalline silicon layer and filling SiO2 to form an isolation region; etching to form an emitter region mesa and a collector region mesa, depositing a passivation insulating layer, etching and preparing an electrode contact hole, sputtering and depositing, and manufacturing a metal electrode; and manufacturing a metasurface structure in the polycrystalline silicon layer of the absorption region. According to the device, light detection absorption and photocurrent amplification are separated, structural parameters of an absorption region and the junction area of the bipolar transistor are optimized respectively, high-speed response is achieved, the light absorption efficiency is high, and the absorption detection wavelength is expanded to 1300-1550 nm.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor optoelectronic technology, and in particular relates to a method for preparing a bipolar transistor-type silicon-based photodetector with an independent absorption region and a supersurface structure. Background Art

[0002] In an era with huge demand for digital services, high-performance computing between chips, high-speed Internet, cloud computing and big data have become an indispensable part. Large bandwidth and data rate provide convenience for the growing demand for high data capacity and the demand for it is constantly expanding. Optical communication technology based on wavelength division multiplexing (WDM) is developing towards maturity and internationalization, and will realize true optical networking in the future. Short-distance high-speed optical transmission suitable for applications such as optical interconnection and optical sensing requires higher data rates and larger data capacity. Photodetectors are key components in high-speed optical communication systems, so high-speed and high-responsivity photodetectors are of great significance to the development of future optical communication systems. However, the cost consumption issue cannot be ignored, and performance requirements and cost consumption need to be taken into account at the same time. Therefore, silicon-based high-speed and efficient chip-level photodetectors that can be monolithically integrated with ultra-large-scale CMOS integrated circuits have become the focus of research. Commonly used silicon-based photodetectors include PiN type, APD type, transistor type, etc. PiN type photodetectors have low internal gain, and APD type photodetectors face the problem of high driving voltage. HPT (heterojunction bipolar phototransistor) type photodetectors only require a small operating voltage and have a high current amplification factor. For heterojunction bipolar phototransistors, on the one hand, in order to meet high absorption efficiency, sufficient absorption region surface area and device thickness are required. On the other hand, the resulting increase in junction area leads to an increase in junction capacitance, and the increase in longitudinal dimensions also increases the carrier transport distance, which is bound to reduce the device's operating speed. How to solve the contradiction between high-speed operation and high-efficiency absorption is the focus of research on HPT applications. Summary of the invention

[0003] In view of the deficiencies in the prior art, the object of the present invention is to provide a method for preparing a bipolar transistor-type silicon-based photodetector with an independent absorption region and a supersurface structure.

[0004] The present invention provides a method for preparing a bipolar transistor-type silicon-based photodetector with an independent absorption region and a supersurface structure that takes into account both high-speed response and high-efficiency light absorption efficiency, comprising the following steps:

[0005] (1) An SOI substrate is used, which includes a bottom silicon layer, a silicon dioxide BOX layer and a top silicon layer. An n-type Si layer, a p-type SiGe layer and an n-type polysilicon layer are sequentially epitaxially grown on the SOI substrate.

[0006] (2) Etch the n-type polysilicon layer and fill the SiO2 An isolation region is formed, which is divided into a transistor portion and an absorption region portion.

[0007] (3) In the transistor part, the polysilicon emitter region, SiGe base region, and Si collector region are etched to form emitter and collector region mesas.

[0008] (4) Growth of SiO 2 A passivation insulating layer is made to protect the device surface from oxidation and to isolate the emitter region, base region, and collector region from each other.

[0009] (5) In the transistor part, electrode contact holes of the emitter region and the collector region are prepared by etching; in the absorption part, electrode contact holes of the n-type polysilicon layer are prepared by etching.

[0010] (6) Metal electrodes are made on both the transistor part and the absorption region to form ohmic contacts.

[0011] (7) A super surface structure is fabricated in the polysilicon layer in the absorption region; the super surface structure includes periodically arranged air holes and Si medium; the air hole diameter d is 150-450nm, and the super surface structure period L is between 300-650nm. The polysilicon layer is etched to a depth equal to the thickness of the n-type polysilicon layer.

[0012] Furthermore, the thickness of the n-type polysilicon layer in step (1) is 100-150nm. The thickness of the p-type SiGe layer is in the range of 30-40nm, and the thickness of the n-type Si layer is in the range of 500-600nm. Furthermore, the growth method for making the isolation region in step (2) is PECVD, and the thickness is the thickness of the n-type polysilicon layer.

[0013] Furthermore, the etching method in step (3) is ICP etching.

[0014] Furthermore, the metal electrode in step (6) needs to be prepared by overlay, sputtering and thermal annealing.

[0015] Furthermore, the metal in step (6) is Ti / Pt / Au, and the metal electrode forms an ohmic contact with the device.

[0016] Furthermore, the method for making the super surface structure in step (7) is electron beam exposure.

[0017] Compared with the prior art, the beneficial technical effects of the present invention are:

[0018] The invention provides a method for preparing a bipolar transistor-type silicon-based photodetector with an independent absorption region and a super-surface structure, which has the following advantages: the device uses Si-based materials, and the SiGe / Si HBT preparation process is compatible with the BiCMOS technology, is easy for optoelectronic integration, and can meet the requirement of low cost; the amplification region and the absorption region of the device are separated, and a super-surface structure is added to the polysilicon layer of the device absorption region to realize the lateral transmission of vertically incident light, improve the light absorption efficiency without increasing the longitudinal size of the device, and expand the wavelength of light absorbed by the detector to 1300-1550nm; the heterojunction transistor is responsible for amplifying the photogenerated current, and light absorption is not considered, so the transistor size can optimize the design of the strip width and junction area, reduce the capacitor charging and discharging time, improve the device working speed, and alleviate the contradiction between the device responsiveness and the working speed.

[0019] In summary, the bipolar transistor-type silicon-based photodetector with an independent absorption region and a metasurface structure proposed in the present invention has the advantages of taking into account the responsiveness, sensitivity and operating speed of light detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] FIG1( a ) shows a schematic diagram of the three-dimensional structure of the detector, and FIG1( b ) shows a longitudinal cross-sectional view of the detector.

[0021] Figure 2 This is the distribution diagram of the electric field components inside the device when the metasurface structure has a period of 650nm and a diameter of 450nm under 1300nm incident light. Where (a) the lateral distribution of the electric field component of the incident light wave at z = 0 (b) Longitudinal distribution of the electric field component of the incident light wave (c) Transverse distribution of the electric field component of the incident light wave at z = 200 nm

[0022] Figure 3 is the lateral potential distribution of SiGe base region

[0023] Component number description 1 Heterojunction Bipolar Transistor 11n-type polysilicon layer 12p-type SiGe layer 13n-type Si layer 14 Emitter 15 Collector 2 Independent pn junction absorption region 21Supersurface structure 22n-type polysilicon layer electrode 3SOI substrate 31 Top silicon layer 32 Silicon dioxide BOX layer 33 Low-doped silicon substrate 4Silicon dioxide isolation area Reference numeral 11 is an epitaxial n-type polysilicon layer, which is a polysilicon emitter region in the transistor portion and an n-type polysilicon layer in the absorption region portion. Reference numeral 12 is an epitaxial p-type SiGe layer, which is a SiGe base region in the transistor portion and a p-type SiGe layer in the absorption region portion. Reference numeral 13 denotes an epitaxial n-type Si layer, which is a Si collector region in the transistor portion and an n-type Si layer in the absorption region portion. Reference numeral 31 is the top silicon layer in the SOI substrate portion, while the transistor portion serves as a silicon sub-collector region. DETAILED DESCRIPTION

[0024] The technical solutions in the embodiments of the present invention will be described clearly and completely below. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0025] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0026] The present invention provides a method for preparing a bipolar transistor-type silicon-based photodetector with an independent absorption region and a periodic light control unit, comprising the following steps:

[0027] (1) On SOI substrate 3 (33-Si substrate; 32-SiO 2 31-On the top silicon layer, an n-type Si layer 13, a p-type SiGe layer 12, and an n-type polysilicon layer 11 are sequentially epitaxially grown.

[0028] (2) Etching the n-type polysilicon layer 11 and filling the SiO 2 An isolation region is formed, which is divided into a transistor portion and an absorption region portion.

[0029] (3) In the transistor part, the polysilicon emitter region, SiGe base region, and Si collector region are etched to form the emitter region mesa and the collector region mesa.

[0030] (4) Deposition of a passivation insulating layer.

[0031] (5) Etching is performed to prepare the electrode contact holes of the n-type polysilicon layer 11 in the emitter, collector and absorption region of the transistor.

[0032] (6) Sputtering a metal film and photolithography to produce metal electrodes (15 - collector electrode; 14 - emitter electrode; 22 - n-type polysilicon layer electrode) to form an ohmic contact.

[0033] (7) Fabricate a metasurface structure 21 as a light control unit.

[0034] Example 1

[0035] The present invention provides a method for preparing a bipolar transistor-type silicon-based photodetector with an independent absorption region and a supersurface structure, comprising the following steps:

[0036] (1) A 6-inch diameter (100)-faced Si wafer with a thickness of about 750 μm is selected. Oxygen ion implantation is performed in the Si wafer to form a high-concentration oxygen implantation layer, followed by high-temperature annealing to allow the implanted oxygen to react with silicon to form SiO 2 The insulating layer is then ground and polished to obtain the SOI substrate 3. The thickness of the BOX layer is 50 nm, the thickness of the top silicon layer 31 is 1 μm, and the doping concentration is 3×10 20 cm -3 -8×10 21 cm -3 Low pressure chemical vapor deposition (LPCVD) is used to grow n-type Si layer 13 with a thickness of 550nm, SiH 4 As the Si source, the growth temperature is 700℃; As is the n-type doping impurity source. Then, a p-type SiGe layer 12 with a thickness of 40nm is grown on the Si collector region 13 by reduced pressure chemical vapor deposition (RPCVD). The reaction source is SiH 4 and GeH 4 , the growth temperature is 600℃, B is used as the p-type doping impurity source. Finally, low pressure chemical vapor deposition (LPCVD) is used to grow an n-type polysilicon layer 11 with a thickness of 150nm on the p-type SiG layer 12. 4 As Si source, the growth temperature is 700°C; As is the n-type doping impurity source.

[0037] (2) In the n-type polysilicon layer 11, ICP is used to etch the polysilicon and fill the SiO 2 , isolating the transistor part and the absorption region part.

[0038] (3) Based on the above structure, photolithography is performed on the transistor part and dry etching (ICP) is used to etch the polysilicon emitter region with an etching depth of 150nm. The etching conditions are: source power 350W, RF power 5W, etching gas CF 4 , flow rate 40cm 3 / min, etching passivation gas CHF 3 , flow rate 100cm 3 / min, etching time 80 seconds. Then, dry etching (ICP) was used to etch the SiGe base region, with an etching depth of 40nm. The etching conditions were: source power 350W, RF power 5W, etching gas CF 4 , flow rate 40cm 3 / min, etching passivation gas CHF 3 , flow rate 100cm 3 / min, etching time 30 seconds. Finally, photolithography and dry etching (ICP) were used to etch the collector mesa, with an etching depth of 550nm. Etching conditions: source power 450W, RF power 10W, etching gas CF 4 , flow rate 50cm 3 / min, etching passivation gas CHF 3 , flow rate 110cm 3 / min, etching time 100 seconds.

[0039] (4) Deposition of passivation insulating SiO 2 layer, and then the insulating layer SiO 2 The film is photolithographically etched and the contact holes are etched by wet etching. Etching solution: BOE solution is composed of 49% HF aqueous solution: 40% NH 4 F aqueous solution = 1:6 (volume ratio) mixed. Corrosion time 30s.

[0040] (5) Based on the structure of step (4), Ti / Pt / Au is deposited by sputtering, and photolithography is performed to prepare contact electrodes to form ohmic contacts with the device. The thickness of each metal layer is: Ti (50nm) / Pt (50nm) / Au (100nm). The deposition conditions are: sputtering voltage 4kV, working gas pressure 8Pa, target current density 0.3mA / cm 2 Finally, rapid thermal annealing was performed at 950°C for 15s.

[0041] (6) Based on step (5), the metasurface structure 21 is made by electron beam exposure under the following conditions: the electron beam photoresist type is selected as AR-P 679.04, the coating speed is 1000-2500r, the pre-baking condition is 140-160°C, and the baking is carried out on a hot plate for 3 minutes. The electron beam acceleration voltage is 10-20kV, the aperture is 10-30um, and the exposure dose is 90-110μC / cm 2 The developer is an organic solvent with a volume ratio of MIBK:IPA=1:3, and the developing time is 45s-60s. Finally, a bipolar transistor-type silicon-based photodetector with independent absorption regions and a metasurface structure is obtained.

[0042] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A method for preparing a bipolar transistor-type silicon-based photodetector with an independent absorption region and a metasurface structure, characterized in that: (1) Using an SOI substrate, the SOI substrate includes a bottom silicon layer, a silicon dioxide BOX layer and a top silicon layer, and sequentially epitaxially growing an n-type Si layer, a p-type SiGe layer and an n-type polysilicon layer on the SOI substrate; (2) Etching the n-type polysilicon layer and filling it with SiO2 to form an isolation region, which is divided into a transistor part and an absorption region; In the transistor region, the top silicon layer is used as the sub-collector region of the transistor, the n-type Si layer is used as the Si collector region of the transistor, the p-type SiGe layer is used as the SiGe base region of the transistor, and the n-type polysilicon layer is used as the emitter region of the transistor; In the absorption region, the n-type polysilicon layer serves as the main absorption region; (3) In the transistor part, the polysilicon emitter region, SiGe base region, and Si collector region are etched to form emitter and collector region mesas; (4) Grow SiO2 to make a passivation insulating layer to protect the device surface from oxidation and to isolate the emitter region, base region, and collector region from each other; (5) In the transistor part, electrode contact holes of the emitter region and the collector region are prepared by etching; in the absorption region part, electrode contact holes of the n-type polysilicon layer are prepared by etching; (6) Metal electrodes are made on both the transistor part and the absorption region to form ohmic contacts; (7) Fabricating a super surface structure in the n-type polysilicon layer in the absorption region; comprising periodically arranged air holes and Si medium; the aperture d of the air holes is 150-450nm, the period L of the super surface structure is between 300-650nm, and the depth of the holes is the thickness of the n-type polysilicon layer.

2. The preparation method according to claim 1, characterized in that: The thickness of the n-type polysilicon layer in step (1) is in the range of 100-150 nm, and the doping concentration is in the range of 1×10 21 cm -3 -5×10 21 cm -3 ; The thickness of the p-type SiGe layer ranges from 30-40nm, and the doping concentration ranges from 3×10 19 cm -3 -6×10 20 cm -3 ; The thickness of the n-type Si layer ranges from 500nm to 600nm, and the doping concentration ranges from 1×10 17 cm -3 to 5×10 17 cm -3 between.

3. The preparation method according to claim 1, characterized in that: In step (2), the isolation region is filled with SiO2, the growth method is PECVD, and the film thickness is the thickness of the n-type polysilicon layer.

4. The preparation method according to claim 1, characterized in that: In step (3), the etching method is ICP, etching the polysilicon emitter region, SiGe base region, and Si collector region. The etching conditions are: source power 350-450W, RF power 5-10W, etching gas CF4, flow rate 40-50cm 3 / min, etching passivation gas CHF3, flow rate 100-110cm 3 / min.

5. The preparation method according to claim 1, characterized in that: In step (6), the metal electrode needs to be prepared by overlay, sputtering, and thermal annealing, and the metal is Ti / Pt / Au; the thermal annealing temperature is 700-1000°C and the time is 15-20s.

6. The preparation method according to claim 1, characterized in that: The method for making the metasurface structure in step (7) is electron beam exposure, which must be carried out under the following conditions: AR-P 679.04 electron beam photoresist is selected, the coating speed is 1000-2500r, the pre-baking condition is 140-160℃, and the baking is carried out on a hot plate for 3min; the electron beam acceleration voltage is 10-20kV, the aperture is 10-30um, and the exposure dose is 90-110μC / cm 2 The developer is an organic solvent with a volume ratio of MIBK:IPA=1:3, and the developing time is 45s-60s.

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