Preparation method of LED chip structure and LED chip structure

Abstract

The application provides a preparation method of an LED chip structure and the LED chip structure, and comprises the following steps: providing an LED epitaxial wafer; performing pixel isolation on the LED epitaxial layer; forming an electrode lead-out structure, the top surface of which is higher than the first semiconductor layer; the bottom surface contacts the electrode lead-out position of the pixel unit; bonding a first temporary substrate on the electrode lead-out structure; stripping the substrate; based on the LED chip unit area, cutting the LED epitaxial layer and the first temporary substrate to form a plurality of separated LED chip units; providing a second temporary substrate, which is made of the same material as the driving substrate; bonding the LED chip units to the second temporary substrate; and removing the first temporary substrate. The technical scheme of the application realizes Die to wafer, then wafer to wafer bonding, the two substrates are made of the same material, the offset caused by the difference in thermal expansion during the bonding process is avoided, the waste of Die is reduced, and the performance is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of LEDs, and in particular to a method for preparing an LED chip structure and the LED chip structure. Background Art

[0002] With the rapid development of micro-array chips or pixel matrix microLED chip technology, the requirements for GaN materials and processes are constantly increasing. Sapphire-based GaN materials, due to their relatively low dislocation density, can meet the high performance requirements of today's microLEDs. Therefore, more and more LEDs are being manufactured using sapphire.

[0003] However, most microLED drivers are silicon-based CMOS. If the LED and driver are bonded using a wafer-to-wafer method, the different thermal expansion coefficients of the sapphire and silicon substrates will cause significant bond offset during the thermal bonding process. In addition, the driver chip on the driver substrate is not distributed throughout the entire substrate. Generally, the driver chip is only arranged in the middle, with other circuit structures and connections on the edges. In contrast, the LED chips on the LED substrate are distributed throughout the substrate. After bonding to the driver substrate, only the LED chips in the middle are functional, while the LED chips on the edges are inoperative, resulting in significant waste. Summary of the Invention

[0004] The present invention provides a method for preparing an LED chip structure and an LED chip structure, so as to solve the problems of large bonding offset and waste of edge LED chips in the prior art.

[0005] In order to solve the above technical problems, the present invention is achieved through the following technical solutions:

[0006] According to a first aspect of the present invention, there is provided a method for preparing an LED chip structure, comprising:

[0007] An LED epitaxial wafer is provided; the LED epitaxial wafer comprises: a substrate and an LED epitaxial layer located on the substrate; the LED epitaxial layer comprises a first semiconductor layer, a quantum well structure, and a second semiconductor layer distributed sequentially from bottom to top;

[0008] An isolation trench is formed in the LED epitaxial layer, wherein the isolation trench isolates the LED epitaxial layer into a plurality of pixel units; the LED epitaxial layer includes a plurality of LED chip unit regions, and each of the LED chip unit regions includes at least one pixel unit;

[0009] After the pixel isolation, an electrode lead-out structure is formed on one side of the LED epitaxial layer, a top surface of the electrode lead-out structure is higher than the second semiconductor layer; a bottom surface of the electrode lead-out structure contacts an electrode lead-out position of the pixel unit; the electrode lead-out structure includes: a positive electrode lead-out structure and a negative electrode lead-out structure, each pixel unit to be operated corresponds to one positive electrode lead-out structure; each LED chip unit area includes at least one negative electrode lead-out structure;

[0010] After the electrode lead-out structure is prepared, a first temporary substrate is bonded on the electrode lead-out structure;

[0011] After the first temporary substrate is bonded, the substrate is peeled off;

[0012] Based on the LED chip unit area, the LED epitaxial layer and the first temporary substrate are cut to form a plurality of separated LED chip units;

[0013] A second temporary substrate is provided, a material of the second temporary substrate is the same as a material of the driving substrate;

[0014] The LED chip unit is bonded on the second temporary substrate in a manner that the first temporary substrate faces upward; positions of the LED chip unit on the second temporary substrate correspond to positions of the driving chip on the driving substrate one by one;

[0015] After the LED chip unit is bonded on the second temporary substrate, the first temporary substrate is removed.

[0016] Optionally, in the second temporary substrate, a passivation wall is provided on the second temporary substrate, the passivation wall forms a plurality of grids on the second temporary substrate, grid spaces correspond to positions of the driving chip on the driving substrate one by one; a height of the passivation wall is lower than a thickness of the LED chip unit;

[0017] The LED chip unit is bonded on the second temporary substrate in a manner that the first temporary substrate faces upward specifically includes:

[0018] The LED chip unit is placed in the grid in a manner that the first temporary substrate faces upward and is bonded on the second temporary substrate; the LED chip unit corresponds to the grid one by one.

[0019] Optionally, after the first temporary substrate is removed, the preparation method further includes:

[0020] The electrode lead-out structure of the LED chip unit on the second temporary substrate is aligned and bonded with an electrode bump of the driving chip on the driving substrate;

[0021] After the alignment bonding, the second temporary substrate is removed;

[0022] After the second temporary substrate is removed, a bottom filling material is filled in the isolation groove.

[0023] Optionally, in the step of forming the isolation groove in the LED epitaxial layer, the isolation groove sequentially penetrates the second semiconductor layer, the quantum well structure and part of the first semiconductor layer.

[0024] Optionally, between the step of forming the isolation groove in the LED epitaxial layer and the step of forming the electrode lead-out structure on one side of the LED epitaxial layer, further comprising:

[0025] A first passivation layer is formed on the sidewall of the isolation groove and the edge surface of the second semiconductor layer;

[0026] The bottom surface of the electrode lead-out structure contacts the electrode lead-out position of the pixel unit, specifically:

[0027] The bottom surface of the positive electrode lead-out structure contacts the middle surface of the second semiconductor layer; and the bottom surface of the negative electrode lead-out structure contacts the first semiconductor layer at the bottom of the isolation groove.

[0028] Optionally, in the step of forming the isolation groove in the LED epitaxial layer, the isolation groove sequentially penetrates the second semiconductor layer, the quantum well structure and the first semiconductor layer.

[0029] Optionally, between the step of forming the isolation groove in the LED epitaxial layer and the step of forming the electrode lead-out structure on one side of the LED epitaxial layer, further comprising:

[0030] A second passivation layer is formed; the second passivation layer at least covers the sidewall of the second semiconductor layer and the quantum well structure of the pixel unit to be worked;

[0031] After the second passivation layer is formed, a metal interconnection layer is formed on the substrate; the metal interconnection layer is used to electrically connect the first semiconductor layers of the pixel units;

[0032] The bottom surface of the electrode lead-out structure contacts the electrode lead-out position of the pixel unit, specifically:

[0033] The bottom surface of the positive electrode lead-out structure contacts the surface of the first semiconductor layer of the pixel unit to be worked; and the bottom surface of the negative electrode lead-out structure contacts the metal interconnection layer.

[0034] Optionally, the sidewall of the first semiconductor layer of the pixel unit has at least one step.

[0035] Optionally, before the cutting and separating and the placing of the LED chip unit into the grid with the first temporary substrate facing upward, the method further comprises: the LED chip unit is attached to a blue film.

[0036] Optionally, the substrate is a sapphire substrate.

[0037] Optionally, the second temporary substrate is a silicon substrate.

[0038] According to a second aspect of the present application, there is provided an LED chip structure prepared by any of the above-mentioned methods.

[0039] The present application provides a method for preparing an LED chip structure and the LED chip structure. The method comprises the steps of: cutting an LED into a plurality of LED chip units; transferring the LED chip units to a second temporary substrate made of the same material as a driving substrate; placing the LED chip units on the second temporary substrate at positions corresponding to driving chips of the driving substrate; and aligning and bonding the LED chip units on the second temporary substrate with the driving chips of the driving substrate. The present application has the advantages that: the LED chip units are placed only on the second temporary substrate at positions corresponding to the driving chips of the driving substrate, so that the waste of the LED chip units is avoided; the Die can be selected during the Dieto wafer process, so that the performance of the LED chip structure can be improved; the LED chip units on the second temporary substrate are aligned and bonded with the driving chips of the driving substrate, so that the bonding efficiency is high; the second temporary substrate and the driving substrate have the same material and the same thermal expansion coefficient, so that there is no offset problem caused by the difference in thermal expansion during the bonding process; and the second temporary substrate on which the LED chip units are located during the bonding process is not the substrate used during the preparation process, so that the substrate used during the preparation process can have a different material from the driving substrate, and the substrate can be selected according to the need to improve the performance of the LED. BRIEF DESCRIPTION OF DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0041] Figures 1a to 1h The structure schematic diagram of each step of the method for preparing the LED chip structure of an embodiment of the present application;

[0042] Figures 2a to 2h The structure schematic diagram of each step of the method for preparing the LED chip structure of another embodiment of the present application;

[0043] Figures 3a to 3b Structure diagram of each step of the preparation method of the LED chip structure of another embodiment of the present application;

[0044] Figures 4a to 4b Structure diagram of each step of the preparation method of the LED chip structure of another embodiment of the present application;

[0045] Explanation of reference numerals:

[0046] 11-substrate;

[0047] 21-first semiconductor layer;

[0048] 211-step;

[0049] 22-quantum well structure;

[0050] 23-second semiconductor layer;

[0051] 24-isolation trench;

[0052] 251-positive electrode structure;

[0053] 252-negative electrode structure;

[0054] 253-metal interconnection layer;

[0055] 26-passivation layer;

[0056] 31-first temporary substrate;

[0057] 41-LED chip unit;

[0058] 51-second temporary substrate;

[0059] 511-passivation wall;

[0060] 61-driving substrate;

[0061] 611-electrode bump;

[0062] 71-underfill material. DETAILED DESCRIPTION

[0063] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0064] In the description of the present application, it should be understood that the terms "upper", "lower", "upper end", "lower end", "lower surface", "upper surface" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0065] In the description of the present application, the terms "first", "second" are only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features.

[0066] In the description of the present application, the meaning of "a plurality of" is a plurality, for example, two, three, four, etc., unless otherwise explicitly specified and limited.

[0067] In the description of the present application, unless otherwise explicitly specified and limited, the term "connection" and the like should be broadly understood, for example, it can be fixedly connected, or detachably connected, or integrated; it can be mechanically connected, or electrically connected or can communicate with each other; it can be directly connected, or indirectly connected through an intermediate medium, or it can be the internal communication or interaction relationship of two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0068] The technical solutions of the present application will be described in detail below with specific examples. The following specific examples can be combined with each other, and the same or similar concepts or processes can not be described in some examples.

[0069] In view of the shortcomings of the sapphire-based LED and silicon-based drive in the above background art, some assumptions are given in the prior art, mainly as follows: (1) using silicon-based LED, and then bonding the silicon-based LED and the silicon-based drive in a wafer-to-wafer manner, although it can avoid the problem of large bonding deviation caused by the difference in material thermal expansion coefficient, but the dislocation density of silicon-based is too large, the performance of the LED is poor, and it cannot meet the performance and reliability requirements of the LED device; in addition, there is still a problem of waste of edge LED; (2) bonding LED and drive in a Die-to-Die manner, although the deviation in the bonding process is reduced, but the production efficiency is greatly reduced one by one, the cost is also greatly increased, and it cannot be effectively industrialized.

[0070] Therefore, the application provides a preparation method of an LED chip structure, which comprises the following steps:

[0071] providing an LED epitaxial wafer; the LED epitaxial wafer comprises a substrate and an LED epitaxial layer on the substrate; the LED epitaxial layer comprises a first semiconductor layer, a quantum well structure and a second semiconductor layer arranged in sequence from bottom to top;

[0072] forming an isolation groove in the LED epitaxial layer, the isolation groove separates the LED epitaxial layer into a plurality of pixel units; the LED epitaxial layer comprises a plurality of LED chip unit regions, and each LED chip unit region comprises at least one pixel unit;

[0073] after the pixel isolation, forming an electrode lead-out structure on one side of the LED epitaxial layer, a top surface of the electrode lead-out structure is higher than the second semiconductor layer; a bottom surface of the electrode lead-out structure contacts an electrode lead-out position of the pixel unit; the electrode lead-out structure comprises a positive electrode lead-out structure and a negative electrode lead-out structure, and each pixel unit to be worked corresponds to a positive electrode lead-out structure; each LED chip unit region comprises at least one negative electrode lead-out structure;

[0074] after the preparation of the electrode lead-out structure, bonding a first temporary substrate on the electrode lead-out structure;

[0075] after the bonding of the first temporary substrate, peeling off the substrate;

[0076] based on the LED chip unit regions, cutting the LED epitaxial layer and the first temporary substrate to form a plurality of separated LED chip units;

[0077] providing a second temporary substrate, the material of the second temporary substrate is the same as that of a driving substrate;

[0078] bonding the LED chip units on the second temporary substrate in a manner that the first temporary substrate faces upwards; the positions of the LED chip units on the second temporary substrate correspond to the positions of driving chips on the driving substrate one by one;

[0079] after the bonding of the LED chip units on the second temporary substrate, removing the first temporary substrate.

[0080] In order to make the above-mentioned purposes, features and advantages of the application more obvious and easy to understand, the specific embodiments of the application will be described in detail below with reference to the drawings.

[0081] Figures 1a to 1h The figure is a structure diagram of each step of the preparation method of the LED chip structure of an embodiment of the application.

[0082] Figures 2a to 2h The figure is a structure diagram of each step of the preparation method of the LED chip structure of another embodiment of the application.

[0083] Referring to Figure 1a , 2a , the LED epitaxial wafer is provided; the LED epitaxial wafer comprises a substrate 11 and an LED epitaxial layer on the substrate; the LED epitaxial layer comprises a first semiconductor layer 21, a quantum well structure 22 and a second semiconductor layer 23 arranged in sequence from bottom to top.

[0084] As an embodiment, the substrate is a sapphire substrate, and the LED has high performance due to low dislocation density.

[0085] Referring to Figure 1b , 2b , the isolation groove 24 is formed in the LED epitaxial layer, and the isolation groove separates the LED epitaxial layer into a plurality of pixel units. The LED epitaxial layer comprises a plurality of LED chip unit regions, and each LED chip unit region comprises at least one pixel unit; that is, the subsequent LED epitaxial layer can be cut into a plurality of LED chip units, and each LED chip unit comprises at least one pixel unit.

[0086] As an embodiment, the isolation groove 24 can be formed by ICP dry etching process.

[0087] As an embodiment, the first semiconductor layer 21 can be used as the negative electrode of the pixel unit, and the second semiconductor layer 22 can be used as the positive electrode of the pixel unit.

[0088] In an embodiment, the isolation groove can penetrate part of the LED epitaxial layer, and the isolation groove stops in the first semiconductor layer. Referring to Figure 1b , the isolation groove 24 penetrates the second semiconductor layer 23, the quantum well structure 22 and part of the first semiconductor layer 21. Since the isolation groove only isolates part of the first semiconductor layer, the remaining first semiconductor layer is still an integral whole, that is, the pixel units are common cathodes.

[0089] In another embodiment, the isolation groove can penetrate the entire LED epitaxial layer. Referring to Figure 2b , the isolation groove 24 penetrates the second semiconductor layer 23, the quantum well structure 22 and the first semiconductor layer 21 in sequence.

[0090] Referring to Figure 1c , 2c , after the pixels are isolated, an electrode lead-out structure is formed on one side of the LED epitaxial layer, and the top surface of the electrode lead-out structure is higher than the second semiconductor layer; the bottom surface of the electrode lead-out structure contacts the electrode lead-out position of the pixel unit. The electrode lead-out structure comprises a positive electrode lead-out structure 251 and a negative electrode lead-out structure 252, and each pixel unit to be worked corresponds to a positive electrode lead-out structure 251; each LED chip unit region comprises at least one negative electrode lead-out structure 252.

[0091] In one embodiment, since the isolation groove only isolates part of the first semiconductor layer, the remaining first semiconductor layer is still an entirety, i.e. a common cathode has been achieved between the pixel units, and the negative electrode can be led out at the position of the first semiconductor layer exposed at the bottom of the isolation groove. When the LED chip region includes multiple pixel units, the negative electrode structure can be led out between every two adjacent pixel units. Please refer to Figure 1c In different embodiments, the negative electrode structure can also be led out at only one position or any suitable position.

[0092] In a preferred embodiment, before the negative electrode structure is led out, a passivation layer 26 is formed on the sidewall of the isolation groove 24 for insulation. The passivation layer can make the negative electrode structure easier to set, without worrying about contacting the quantum well structure and the second semiconductor layer, resulting in short circuit.

[0093] In another embodiment, since the isolation groove penetrates through the entire LED epitaxial layer, the adjacent pixel units are completely isolated, and the negative electrodes of the pixel units can be connected by setting a metal interconnection layer 253 to achieve a common cathode. Please refer to Figure 2c Specifically, the metal interconnection layer is formed on the substrate to electrically connect the first semiconductor layers between the pixel units, and the bottom surface of the negative electrode leading-out structure 252 contacts the metal interconnection layer.

[0094] In a preferred embodiment, the negative electrode can be led out through the pixel units located at the edge of the LED chip unit region, which includes the pixel units to be worked and other pixel units. Since the first semiconductor layer is located underneath and is not easy to lead out, after the metal interconnection layer is led out to the surface of the pixel units at the edge, the space for setting the electrode leading-out structure is relatively large, making it easier to set. Before the metal interconnection layer is formed, a passivation layer needs to be formed on the sidewall and surface of the second semiconductor layer of the pixel units and on the sidewall of the quantum well structure for insulation, i.e. the other pixel units are only used for negative electrode connection and do not form a positive-negative loop, and the subsequent ones are not working.

[0095] In a preferred embodiment, before forming the metal interconnection layer, a passivation layer is also formed on the second semiconductor layer of the pixel unit to be operated, the sidewall of the quantum well structure, and the edge surface of the second semiconductor layer. In this way, the metal interconnection layer can extend to the sidewall of the isolation trench and the edge surface of the second semiconductor layer, the contact area of the metal interconnection layer with the pixel unit is larger, and the edge surface of the second semiconductor layer is planar, so that the connection of the metal interconnection layer is more stable. If the metal interconnection layer is arranged only around the sidewall of the first semiconductor layer, first, the contact area of the metal interconnection layer with the pixel unit is relatively small, and the electrical connection is unstable; second, the metal interconnection layer is prone to falling off, resulting in failure of the electrical connection.

[0096] To further enhance the insulation effect, the passivation layer also extends to part of the sidewall of the first semiconductor layer, i.e., covers the joint position between the quantum well structure and the first semiconductor layer. Please refer to Figure 2c .

[0097] In a preferred embodiment, after being isolated by the isolation trench, the first semiconductor layer of the pixel unit includes at least one step 211, and the metal interconnection layer also covers the surface of the step. Please refer to Figure 2c . Since the sidewall of the first semiconductor layer is relatively straight, the metal interconnection layer is prone to falling off, resulting in failure of the electrical connection; in this embodiment, a step is formed on the sidewall of the first semiconductor layer, and the surface of the step is planar, so that the metal interconnection layer at this position is more stable, further improving the electrical performance.

[0098] Please refer to Figure 1d , 2d , after the electrode lead-out structure is prepared, the first temporary substrate 31 is bonded on the electrode lead-out structure.

[0099] Please refer to Figure 1e , 2e , after the first temporary substrate 31 is bonded, the substrate 11 is peeled off.

[0100] As an implementation manner, the peeling off of the substrate 11 can adopt a laser peeling manner.

[0101] In different embodiments, the peeling off of the substrate 11 can also adopt a chemical wet peeling manner.

[0102] Please refer to Figure 1f , 2f , based on the unit area of the LED chip, the LED epitaxial layer and the first temporary substrate are cut to form a plurality of separated LED chip units 41.

[0103] As an implementation manner, the cutting can adopt a laser cutting process or a plasma dry cutting process.

[0104] In this example, the cutting is performed by a laser cutting process. Figure 1e , Figure 2eThe dotted line position is the cutting position for cutting. Figures 1b to 1e middle, Figures 2b to 2e The figure only illustrates a portion of the LED epitaxial layer. In different embodiments, the number of pixel units divided by the epitaxial layer may not be the same as shown in the figure, and the cutting position may not be the same as shown in the figure. The size of each LED chip unit and the number of pixel units included can be freely set as needed.

[0105] Please refer to Figure 1g 、 2g The LED chip unit 41 is bonded to the second temporary substrate 51 with the first temporary substrate facing upward. The position of the LED chip unit on the second temporary substrate corresponds to the position of the driver chip on the driver substrate. The material of the second temporary substrate is the same as that of the driver substrate.

[0106] In one embodiment, the driving substrate is a silicon substrate, and the second temporary substrate is also a silicon substrate.

[0107] Please refer to Figure 1h 、 2h After the LED chip unit is bonded to the second temporary substrate 51 , the first temporary substrate 31 is removed.

[0108] In one embodiment, the second temporary substrate 51 includes a passivation wall 511, which forms a plurality of grids on the second temporary substrate. The grid spaces correspond to the positions of the driver chips on the driver substrate. The height of the passivation wall is lower than the thickness of the LED chip unit. Figure 1g 、 2g The provision of the passivation wall 511 can facilitate the positioning of the LED chip unit and prevent it from moving during the bonding process, further reducing the offset during the bonding process.

[0109] Furthermore, the LED chip unit is bonded to the second temporary substrate with the first temporary substrate facing upwards as follows:

[0110] The LED chip units are placed into the grid with the first temporary substrate facing upwards, and bonded to the second temporary substrate; the LED chip units correspond to the grids one by one.

[0111] In one embodiment, after removing the first temporary substrate, the preparation method further includes:

[0112] Please refer to Figure 3a 、 4a The electrode lead-out structure of the LED chip unit on the second temporary substrate 51 is aligned and bonded with the electrode bumps 611 of the driver chip on the driver substrate 61 .

[0113] Please refer to Figure 3b 、 4bAfter the alignment bonding, the second temporary substrate 51 is removed.

[0114] After the second temporary substrate is removed, a bottom filling material (such as an underfill adhesive) is filled between each pixel unit and the electrode bump 611.

[0115] In one embodiment, between the cutting of the LED chip units and the bonding of the LED chip units to the second temporary substrate with the first temporary substrate facing upward, the method further comprises: pasting the LED chip units on a blue film, which can protect the surface of the LED chip units.

[0116] In one embodiment, an LED chip structure is also provided, which is prepared by the preparation method of any one of the above embodiments.

[0117] In summary, the preparation method of the LED chip structure and the LED chip structure provided by the present application have the following advantages: the LED is cut into one LED chip unit, which is then transferred to a second temporary substrate made of the same material as the driving substrate, so that Die to wafer is achieved; the LED chip unit is only placed on the second temporary substrate at a position corresponding to the driving chip of the driving substrate, so that the other circuits or connection positions of the driving substrate are not occupied by the LED chip unit, thereby avoiding the waste of the LED chip unit; in the Die to wafer process, the Die can be selected, so that the performance of the LED chip structure can be improved; in addition, the LED chip on the second temporary substrate is aligned and bonded with the driving chip on the driving substrate, so that wafer to wafer bonding is achieved, the bonding efficiency is high, and since the second temporary substrate and the driving substrate are made of the same material, the thermal expansion coefficients of the two are the same, so that there is no offset problem caused by the difference in thermal expansion during the bonding process; further, the second temporary substrate on which the LED chip unit is located is not the substrate during the preparation process, and the substrate during the preparation process can be made of a material different from that of the driving substrate, so that a substrate that can make the LED have better performance, such as a sapphire substrate, can be selected.

[0118] In the description of the present specification, the description of the terms "one embodiment", "one example", "a specific implementation process", "one example" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the described specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0119] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit the present application; although the present application has been described in detail with reference to the above embodiments, those skilled in the art should understand that the technical solutions recorded in the above embodiments can be modified, or some or all of the technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method of fabricating an LED chip structure, characterized by, The application relates to a preparation method of an LED chip unit. The LED epitaxial wafer comprises a substrate and an LED epitaxial layer on the substrate; the LED epitaxial layer comprises a first semiconductor layer, a quantum well structure and a second semiconductor layer arranged in sequence from bottom to top; An isolation groove is formed in the LED epitaxial layer, and the isolation groove separates the LED epitaxial layer into a plurality of pixel units; the LED epitaxial layer comprises a plurality of LED chip unit regions, and each LED chip unit region comprises at least one pixel unit; After the pixel isolation, an electrode lead-out structure is formed on one side of the LED epitaxial layer, the top surface of the electrode lead-out structure is higher than the second semiconductor layer, the bottom surface of the electrode lead-out structure contacts the electrode lead-out position of the pixel unit, the electrode lead-out structure comprises a positive electrode lead-out structure and a negative electrode lead-out structure, and each pixel unit to be worked corresponds to the positive electrode lead-out structure; and each LED chip unit region comprises at least one negative electrode lead-out structure; After the electrode lead-out structure is prepared, a first temporary substrate is bonded on the electrode lead-out structure; After the first temporary substrate is bonded, the substrate is peeled off; Based on the LED chip unit region, the LED epitaxial layer and the first temporary substrate are cut into a plurality of separated LED chip units; A second temporary substrate is provided, and the material of the second temporary substrate is the same as that of a driving substrate; The LED chip unit is bonded to the second temporary substrate with the first temporary substrate facing upwards; the position of the LED chip unit on the second temporary substrate corresponds to the position of a driving chip on the driving substrate in a one-to-one manner; After the LED chip unit is bonded to the second temporary substrate, the first temporary substrate is removed. In the second temporary substrate, a passivation wall is arranged on the second temporary substrate, the passivation wall forms a plurality of grids on the second temporary substrate, the grid space corresponds to the position of a driving chip on a driving substrate in a one-to-one manner, and the height of the passivation wall is lower than the thickness of the LED chip unit; 2. The production method according to claim 1, characterized by, The LED chip unit is bonded to the second temporary substrate with the first temporary substrate facing upwards, specifically as follows: The LED chip unit is placed in the grid with the first temporary substrate facing upwards and is bonded to the second temporary substrate; the LED chip unit corresponds to the grid in a one-to-one manner. After the first temporary substrate is removed, the preparation method further comprises:

3. The preparation method according to claim 1, characterized in that The electrode lead-out structure of the LED chip unit on the second temporary substrate is aligned and bonded with the electrode bump of the driving chip on the driving substrate; After the alignment and bonding, the second temporary substrate is removed; After the second temporary substrate is removed, a bottom filling material is filled in the isolation groove. In the step of forming the isolation groove in the LED epitaxial layer, the isolation groove penetrates the second semiconductor layer, the quantum well structure and part of the first semiconductor layer in sequence.

4. The preparation method according to claim 1, characterized in that Between the step of forming the isolation groove in the LED epitaxial layer and the step of forming the electrode lead-out structure on one side of the LED epitaxial layer, the following steps are further included.

5. The preparation method according to claim 4, characterized in that ​ A first passivation layer is formed on the sidewall of the isolation groove; The bottom surface of the electrode lead-out structure contacts the electrode lead-out position of the pixel unit, and specifically, the bottom surface of the positive electrode lead-out structure contacts the surface of the first semiconductor layer of the pixel unit to be worked, and the bottom surface of the negative electrode lead-out structure contacts the metal interconnection layer. The bottom surface of the positive electrode lead-out structure contacts the surface of the first semiconductor layer of the pixel unit to be worked, and the bottom surface of the negative electrode lead-out structure contacts the metal interconnection layer.

6. The method of claim 1, wherein, The isolation groove is formed in the LED epitaxial layer, and the isolation groove penetrates the second semiconductor layer, the quantum well structure and the first semiconductor layer in sequence.

7. The production method according to claim 6, wherein Between the formation of the isolation groove in the LED epitaxial layer and the formation of the electrode lead-out structure on one side of the LED epitaxial layer, further comprising: A second passivation layer is formed, and the second passivation layer covers at least the sidewall of the second semiconductor layer and the quantum well structure of the pixel unit to be worked. After the second passivation layer is formed, a metal interconnection layer is formed on the substrate, and the metal interconnection layer is used to electrically connect the first semiconductor layer of the pixel unit. The bottom surface of the electrode lead-out structure contacts the electrode lead-out position of the pixel unit, and specifically, the bottom surface of the positive electrode lead-out structure contacts the surface of the first semiconductor layer of the pixel unit to be worked, and the bottom surface of the negative electrode lead-out structure contacts the metal interconnection layer. The sidewall of the first semiconductor layer of the pixel unit has at least one step, and the metal interconnection layer covers the surface of the step.

8. The preparation method according to claim 7, characterized in that Between the cutting and the bonding of the LED chip unit to the second temporary substrate with the first temporary substrate facing upward, further comprising that the LED chip unit is attached to a blue film.

9. The method of claim 1, wherein, The substrate is a sapphire substrate.

10. The production method according to any one of claims 1 to 9, characterized by, Prepared by the preparation method according to any one of claims 1 to 10.

11. An LED chip structure, characterized by The preparation method according to any one of claims 1 to 10.

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