Display device

Abstract

An embodiment of the present invention discloses a display device. The display device includes: a first substrate; a plurality of pixels disposed on the first substrate; a second substrate on the plurality of pixels; a sealing portion surrounding the plurality of pixels and located between the first substrate and the second substrate; a first wiring extending in a first direction from an outer contour of the plurality of pixels; and a second wiring partially surrounding the plurality of pixels on a plane, in which the second wiring includes an extension portion arranged side by side with the first wiring in the first direction between the first wiring and an edge of the first substrate, in which the sealing portion fills a region between the extension portion and the first wiring.

Description

[0001] This application is a divisional application of a patent application with an application date of May 22, 2020, application number 202010441810.6, and invention name “Display Device”. Technical Field

[0002] An embodiment of the present invention relates to a display device. Background Art

[0003] Recently, there is a trend to remove physical keys and the like from the front of a display device and to expand a display area where an image is displayed, and research is being continued to reduce a non-display area, which is an area where an image is not displayed. In addition, if the non-display area of ​​a display device is reduced, the spacing between wirings arranged in the non-display area is inevitably reduced, and therefore, the risk of short circuits between wirings is increased. Summary of the invention

[0004] Embodiments of the present invention provide a display device in which a non-display area is reduced and a short circuit between wirings can be prevented.

[0005] According to one aspect of the present invention, a display device includes: a first substrate; a plurality of pixels arranged on the first substrate; a second substrate located on the plurality of pixels; a sealing portion surrounding the plurality of pixels and located between the first substrate and the second substrate; a first wiring extending along a first direction along the outline of the plurality of pixels; and a second wiring partially surrounding the plurality of pixels on a plane, wherein the second wiring includes an extension portion arranged side by side with the first wiring along the first direction between the first wiring and an edge of the first substrate, wherein the sealing portion can fill an area between the extension portion and the first wiring.

[0006] In this embodiment, the sealing portion may overlap a portion of the extension portion and a portion of the first wiring, and contact a side surface of the extension portion and a side surface of the first wiring arranged opposite to each other in a region between the extension portion and the first wiring.

[0007] In this embodiment, the outer edge of the extension portion may be located at the outer contour of the sealing portion.

[0008] In this embodiment, on a plane, an outer edge of the extension portion may be located between the sealing portion and a corner of the second substrate.

[0009] In this embodiment, the side surface of the extension portion and the side surface of the first wiring that face each other may be located at different heights from each other.

[0010] In this embodiment, a depression in a concave shape is arranged in a region between the extension portion and the first wiring, and the side surface of the extension portion may be located in the depression.

[0011] In this embodiment, a blocking pattern is further arranged on the second substrate. In a plane, the blocking pattern may be arranged to cover the side surface of the extension portion facing the first wiring.

[0012] In this embodiment, the blocking pattern includes a light-transmissive first region and an opaque second region located at at least one side of the first region, and the second region may be arranged to cover a side surface of the extension portion.

[0013] In this embodiment, the second wiring has a structure in which a first layer, a second layer, and a third layer are sequentially stacked, the first layer and the third layer may include Ti, and the second layer may include Al.

[0014] According to another aspect of the present invention, a display device includes: a first substrate, provided with a display area, a peripheral area around the display area, and a pad area arranged in the peripheral area; a second substrate, located on the first substrate and having an area smaller than that of the first substrate; a sealing portion, surrounding the display area, arranged between the first substrate and the second substrate; a first wiring, arranged in the peripheral area, extending along a first direction between one side of the display area adjacent to the pad area and the pad area; a second wiring, partially surrounding the display area; and a blocking pattern, located on the second substrate, wherein the second wiring includes an extension portion extending along the first direction between the first wiring and the pad area, and in a plane, the blocking pattern is arranged to cover the side of the extension portion toward the first wiring, and the outer edge of the extension portion can be located between the sealing portion and the corner of the second substrate.

[0015] According to the embodiments of the present invention, even if the non-display area of ​​the display device is reduced, a short circuit between wirings can be effectively prevented. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 FIG. 1 is a plan view schematically showing an example of a display device according to an embodiment of the present invention.

[0017] Figure 2 is an equivalent circuit diagram of a certain (sub) pixel in a display device according to an embodiment of the present invention.

[0018] Figure 3 It is schematically shown Figure 1 An example of a cross-sectional view of the II' section.

[0019] Figure 4It is schematically shown Figure 1 A plan view of an example of section A.

[0020] Figure 5 It is schematically shown Figure 4 An example of a cross-sectional view of the II-II' section.

[0021] Figure 6 It is schematically shown Figure 4 A cross-sectional view of another example of the II-II' cross section.

[0022] Figure 7 It is schematically shown Figure 1 A plan view of another example of Section A.

[0023] Figure 8 It is schematically shown Figure 7 An example cross-sectional view of a III-III' section.

[0024] Fig. 9 It is schematically shown Figure 7 A cross-sectional view of another example of the III-III' cross section.

[0025] Fig.10 It is schematically shown Figure 1 A plan view of yet another example of part A. DETAILED DESCRIPTION

[0026] The present invention can be modified in many ways and can have many embodiments, but specific embodiments are shown in the drawings and described in detail in the detailed description. The effects and features of the present invention and methods of achieving these will be described by reference to the attached drawings. Figure 1 However, the present invention is not limited to the embodiments disclosed below, but can be implemented in various forms.

[0027] In the following embodiments, the terms "first" and "second" are not used in a limiting sense but are used for the purpose of distinguishing one constituent element from other constituent elements.

[0028] In the following embodiments, as long as other meanings are not clearly indicated in the context, expressions in the singular include expressions in the plural.

[0029] In the following embodiments, terms such as including or having indicate the presence of features or constituent elements described in the specification, and do not preclude the possibility of adding one or more other features or constituent elements.

[0030] In the following embodiments, when mentioning that a part of a film, region, component, etc. is located on or above another part, it includes not only the case where it is immediately above the other part, but also the case where other films, regions, components, etc. are present in between.

[0031] For the convenience of explanation, the size of the components in the drawings may be exaggerated or reduced. For example, for the convenience of explanation, the size and thickness of each component shown in the drawings are arbitrarily shown, and therefore the present invention is not necessarily limited to the contents shown in the drawings.

[0032] In the case where a certain embodiment can be implemented in different ways, a specific process sequence can be performed in a different order than described. For example, two processes described in succession can be performed substantially simultaneously, or in a reverse order to the described order.

[0033] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. When describing with reference to the accompanying drawings, the same or corresponding components are given the same reference numerals.

[0034] Figure 1 is a plan view schematically showing an example of a display device according to an embodiment of the present invention, Figure 2 is an equivalent circuit diagram of a certain (sub) pixel in a display device according to an embodiment of the present invention.

[0035] Reference Figure 1 The display device 10 according to an embodiment of the present invention has a display area DA for displaying an image and a peripheral area PA located around the display area DA. This can be understood as the first substrate 100 is provided with such a display area DA and the peripheral area PA.

[0036] In the display area DA, (sub) pixels P connected to the scan lines SL extending in the X direction and the data lines DL extending in the Y direction crossing the X direction are arranged. Each (sub) pixel P includes a light emitting element and can emit red, green, blue or white light. Each (sub) pixel P can include an organic light emitting element as the light emitting element.

[0037] Reference Figure 2 , one (sub) pixel P may include a pixel circuit PC connected to the scan line SL and the data line DL and an organic light emitting element OLED connected to the pixel circuit PC.

[0038] The pixel circuit PC may include a driving thin film transistor Td, a switching thin film transistor Ts, and a storage capacitor Cst. The switching thin film transistor Ts is connected to the scan line SL and the data line DL, and can transfer a data signal input through the data line DL to the driving thin film transistor Td according to a scan signal input through the scan line SL.

[0039] The storage capacitor Cst is connected between the switching thin film transistor Ts and the driving voltage supply line PL, and may store a voltage corresponding to a difference between a voltage received from the switching thin film transistor Ts and a driving voltage ELVDD supplied to the driving voltage supply line PL.

[0040] The driving thin film transistor Td is connected to the driving voltage supply line PL and the storage capacitor Cst, and can control the driving current flowing from the driving voltage supply line PL through the organic light emitting element OLED corresponding to the voltage value stored in the storage capacitor Cst. The organic light emitting element OLED can emit light with a predetermined brightness according to the driving current. The organic light emitting element OLED can emit, for example, red, green, blue or white light.

[0041] In addition, although Figure 2 The case where a (sub) pixel P includes two thin film transistors Ts and Td and a storage capacitor Cst is described, but the present invention is not limited to this. As another embodiment, the pixel circuit PC of the (sub) pixel P can be changed to various forms such as including more than three thin film transistors or including more than two storage capacitors.

[0042] Refer again Figure 1 , the surrounding area PA may surround the display area DA. That is, the surrounding area PA may be understood as an area surrounding the (sub) pixel P. The pad area 40, the first wiring 60, the second wiring 70, the driving part, etc. may be arranged in the surrounding area PA. The driving part may include a light emitting driving circuit, a scanning driving circuit, etc.

[0043] The pad area 40 is an area where various electronic components or printed circuit substrates are electrically attached, and is arranged at an edge of the first substrate 100, and includes a plurality of terminals 41, 42, and 45. The pad area 40 is arranged on one side of the display area DA in the peripheral area PA, and is not covered by the insulating layer but exposed, so that it can be electrically connected to a flexible printed circuit substrate on which a data driving circuit is installed.

[0044] The first wiring 60 may be arranged on the peripheral area PA. The first wiring 60 may extend along the first direction X at the outer contour of the (sub) pixel P. For example, the first wiring 60 may be arranged between one side of the display area DA adjacent to the pad area 40 and the pad area 40, and may be formed to be longer than one side of the display area DA. The first wiring 60 may be a driving power supply wiring. Therefore, the driving voltage ELVDD supplied through the terminal 42 may be supplied to each (sub) pixel P through the driving voltage supply line PL connected to the first wiring 60.

[0045] The second wiring 70 is arranged on the peripheral area PA and may partially surround the display area DA. This may also be interpreted as the second wiring 70 partially surrounding the plurality of (sub) pixels P on a plane. For example, the second wiring 70 is in the form of a ring with one side of the display area DA adjacent to the pad area 40 open, and may extend along the edge of the first substrate 100 except for the edge where the pad area 40 is arranged. The second wiring 70 may be a common power supply wiring. Therefore, the second wiring 70 may be connected to the terminal 45 to supply a common power ELVSS to the common electrode of the organic light emitting element OLED of the (sub) pixel P.

[0046] The second substrate 300 is located on the plurality of (sub) pixels P in a manner overlapping the first substrate 100, and a sealing portion surrounding the plurality of (sub) pixels P and used to attach the first substrate 100 to the second substrate 300 may be arranged between the first substrate 100 and the second substrate 300. The second substrate 300 may have an area smaller than that of the first substrate 100, and the pad region 40 arranged at one edge of the first substrate 100 may not be covered by the second substrate 300.

[0047] An input sensing unit that generates an input signal by contact of an external touch input unit such as a user's hand or a pen may be disposed on the second substrate 300. The input sensing unit may be directly formed on the upper surface of the second substrate 300. As an example, the input sensing unit may be a capacitive type that generates a change in capacitance by touch.

[0048] Figure 3 It is schematically shown Figure 1 An example of a cross-sectional view of the II' section.

[0049] Reference Figure 3 , the pixel circuit PC and the light emitting element 200 may be arranged in the display area DA on the first substrate 100 , and the second wiring 70 and the like may be arranged in the peripheral area PA on the first substrate 100 .

[0050] The first substrate 100 may be formed using a variety of materials such as glass material, metal material, or plastic material (such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), etc.). The second substrate 300 may include a transparent material. For example, the second substrate 300 may be formed using a variety of materials such as glass material or plastic material (such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), etc.). The first substrate 100 and the second substrate 300 may include the same material or include materials different from each other.

[0051] A buffer layer 101 may be formed on the first substrate 100. The buffer layer 101 may block foreign matter or moisture that penetrates through the first substrate 100. For example, the buffer layer 101 may include silicon oxide (SiO x )、Silicon Nitride(SiN x ) and / or an inorganic substance of silicon oxynitride (SiON), and may be formed as a single layer or a multi-layer. The buffer layer 101 may be formed in the display area DA and the peripheral area PA.

[0052] The display area DA on the first substrate 100 may be arranged with a thin film transistor 130, a storage capacitor 140, and a light emitting element 200 electrically connected thereto. As an example, the light emitting element 200 may be an organic light emitting element. Figure 3 The thin film transistor 130 may correspond to a driving thin film transistor ( Figure 2 Td), the storage capacitor 140 corresponds to the reference Figure 2 The storage capacitor ( Figure 2 Cst).

[0053] The thin film transistor 130 includes a semiconductor layer 134 and a gate electrode 136. The semiconductor layer 134 may include, for example, polycrystalline silicon. The semiconductor layer 134 may include a channel region 131 overlapping the gate electrode 136 and a source region 132 and a drain region 133 arranged on both sides of the channel region 131 and doped with impurities having a concentration higher than that of the channel region 131. Here, the impurities may include N-type impurities or P-type impurities. The source region 132 and the drain region 133 may be understood as the source electrode and the drain electrode of the thin film transistor 130. As another embodiment, the semiconductor layer 134 may include amorphous silicon or include an organic semiconductor substance. As yet another embodiment, the semiconductor layer 134 may include an oxide semiconductor.

[0054] In addition, as mentioned above Figure 2 The pixel circuit PC may further include a switch thin film transistor ( Figure 2 Furthermore, the semiconductor layer 134 of the thin film transistor 130 and the switch thin film transistor ( Figure 2 The semiconductor layers of the thin film transistor 130 and the switching thin film transistor (Ts) may include different materials from each other. Figure 2 One of the semiconductor layers of the semiconductor layer (Ts) may include an oxide semiconductor, and the other may include polycrystalline silicon.

[0055] A gate insulating layer 103 may be disposed between the semiconductor layer 134 and the gate electrode 136. The gate insulating layer 103 may be a material such as silicon oxynitride (SiON), silicon oxide (SiO x ) and / or silicon nitride (SiN x ) is an inorganic insulating layer, and the inorganic insulating layer can be a single layer or a multi-layer.

[0056] The storage capacitor 140 includes a lower electrode 144 and an upper electrode 146 that overlap each other. A first interlayer insulating layer 105 may be disposed between the lower electrode 144 and the upper electrode 146.

[0057] The first interlayer insulating layer 105 is a layer having a predetermined dielectric constant, and may be a material such as silicon oxynitride (SiON), silicon oxide (SiO x ) and / or silicon nitride (SiN x ) of the inorganic insulating layer, and can be a single layer or a multi-layer. Figure 3 The storage capacitor 140 overlaps with the thin film transistor 130, and the lower electrode 144 is the gate electrode 136 of the thin film transistor 130, but the present invention is not limited thereto. As another embodiment, the storage capacitor 140 may not overlap with the thin film transistor 130, and the lower electrode 144 may be an independent component separated from the gate electrode 136 of the thin film transistor 130.

[0058] The storage capacitor 140 may be covered by a second interlayer insulating layer 107. The second interlayer insulating layer 107 may be a layer such as silicon oxynitride (SiON), silicon oxide (SiO x ) and / or silicon nitride (SiN x ) of the inorganic insulating layer, and can be a single layer or a multi-layer.

[0059] The driving voltage supply line PL may be disposed on the first organic insulating layer 111. The driving voltage supply line PL includes aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed in a multi-layer or a single layer. As an embodiment, the driving voltage supply line PL may be configured as a multi-layer structure of Ti / Al / Ti.

[0060] Figure 3 The embodiment further includes a lower driving voltage supply line PL1 disposed below the first organic insulating layer 111. The lower driving voltage supply line PL1 is electrically connected to the driving voltage supply line PL through a contact hole penetrating the first organic insulating layer 111, thereby preventing a voltage drop of the driving voltage ELVDD provided through the driving voltage supply line PL. The lower driving voltage supply line PL1 may include the same material as the data line DL. For example, the lower driving voltage supply line PL1 and the data line DL include aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed into a multilayer or a single layer. As an embodiment, the lower driving voltage supply line PL1 and the data line DL may be formed into a multilayer structure such as Ti / Al / Ti or TiN / Al / Ti.

[0061] The first organic insulating layer 111 includes an organic insulator. The organic insulator may include a general polymer (such as an imide polymer, polymethylmethacrylate (PMMA), polystyrene (PS), etc.), a polymer derivative having a phenolic group, an acrylic polymer, an aromatic ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer, and a mixture thereof. As an embodiment, the first organic insulating layer 111 may include polyimide.

[0062] The driving voltage supply line PL is covered by the second organic insulating layer 113, and the second organic insulating layer 113 may include general polymers (such as imide polymers, polymethylmethacrylate (PMMA: Polymethylmethacrylate), polystyrene (PS: Polystylene), etc.), polymer derivatives with phenolic groups, acrylic polymers, aromatic ether polymers, amide polymers, fluorine polymers, paraxylene polymers, vinyl alcohol polymers, and mixtures thereof. As an embodiment, the second organic insulating layer 113 may include polyimide.

[0063] A pixel electrode 210 is disposed on the second organic insulating layer 113. A pixel defining film 120 is disposed on the pixel electrode 210, and the pixel defining film 120 may define a light emitting area by having an opening corresponding to a pixel, that is, having an opening that exposes at least the central portion of the pixel electrode 210. In addition, the pixel defining film 120 may prevent arcing from occurring between the edge of the pixel electrode 210 and the common electrode 230 by increasing the distance between them. The pixel defining film 120 may be formed using, for example, an organic material such as polyimide or hexamethyldisiloxane (HMDSO).

[0064] The intermediate layer 220 may include a low molecular weight substance or a high molecular weight substance. In the case of including a low molecular weight substance, the intermediate layer 220 may have a structure in which a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), an electron injection layer (EIL), etc. are stacked in a single structure or a composite structure, and may include a variety of organic substances such as copper phthalocyanine (CuPc), N, N'-di (naphthalene-1-yl) -N, N'-diphenyl-benzidine (NPB: N, N'-Di (naphthalene-1-yl) -N, N'-diphenyl-benzidine), tris (8-hydroxyquinoline) aluminum (Alq3: tris-8-hydroxyquinoline aluminum), etc. These layers may be formed by a vacuum evaporation method.

[0065] In the case where the intermediate layer 220 includes a polymer substance, the intermediate layer 220 may have a structure including a hole transport layer (HTL) and a light emitting layer (EML). In this case, the hole transport layer includes PEDOT (polyethylenedioxythiophene), and the light emitting layer may include polymer substances such as poly-p-phenylenevinylene (PPV: Poly-Phenylenevinylene) and polyfluorene. The structure of the intermediate layer 220 is not limited to the above content, and may have a variety of structures. For example, at least one of the layers constituting the intermediate layer 220 may be formed as a whole on the plurality of pixel electrodes 210. Alternatively, the intermediate layer 220 may include a layer patterned in a manner corresponding to the plurality of pixel electrodes 210, respectively.

[0066] The common electrode 230 is disposed on the upper portion of the display area DA and may be disposed to cover the display area DA. That is, the common electrode 230 may be formed as one body in a manner of covering a plurality of pixels.

[0067] A filling material (not shown) may be disposed between the common electrode 230 and the second substrate 300. The filling material (not shown) may include, for example, one or more of a photocurable epoxy resin or an acrylate resin, but the present invention is not limited thereto.

[0068] In addition, the peripheral area PA on the first substrate 100 may be arranged with a second wiring 70 and the like. The second wiring 70 may include the same material as the driving voltage supply line PL. For example, the second wiring 70 may be configured as a multilayer structure of Ti / Al / Ti. The second wiring 70 may be arranged along the periphery area PA except for the pad area ( Figure 1 The second wiring 70 extends to the remaining edges of the first substrate 100 beyond the edge of the first substrate 100 where 40) is located. At these remaining edges, the outer ends of the second wiring 70 are covered by the sealing portion 400, and the inner ends on the opposite side of the outer ends can be covered by the conductive film 212.

[0069] The conductive film 212 may include the same material as the pixel electrode 210. The conductive film 212 may be connected to the common electrode 230, thereby connecting the second wiring 70 to the common electrode 230. As another embodiment, the second wiring 70 may extend along the display area DA side to directly contact the common electrode 230.

[0070] The sealing part 400 is bonded to the first substrate 100 and the second substrate 300. The sealing part 400 may include glass frit or epoxy resin. Glass frit may be understood as a 2The main material includes a slurry such as a laser absorber or an infrared absorber, an organic binder, a filler for reducing the thermal expansion coefficient, etc. The glass material of the slurry can be solidified by removing the organic binder and moisture through a drying and firing process. The laser or infrared absorbing material may include a transition metal compound. The glass material is solidified by laser, etc. to form a sealing portion 400. In the case of Figure 1 In the plan view shown, the sealing portion 400 may surround the display area DA. Accordingly, the space defined by the first substrate 100, the second substrate 300 and the sealing portion 400 is blocked from the outside, thereby preventing external moisture or impurities from penetrating into the inside of the display device 10.

[0071] Furthermore, the sealing portion 400 may extend along the second wiring 70 to cover the outer end of the second wiring 70, and overlap with a portion of the second wiring 70 to be in direct contact. Therefore, compared with the case where the sealing portion 400 is located further outside the second wiring 70, the display device ( Figure 1 10) The area of ​​the surrounding area PA.

[0072] The input sensing unit 500 may be disposed on the second substrate 300. The input sensing unit 500 may be directly formed on the upper surface of the second substrate 300. As an example, the input sensing unit 500 may be a capacitive type that generates a change in capacitance by touch.

[0073] Figure 4 It is schematically shown Figure 1 An example floor plan of Part A, Figure 5 It is schematically shown Figure 4 An example of a cross-sectional view of a II-II' section, Figure 6 It is schematically shown Figure 4 A cross-sectional view of another example of the II-II' cross section.

[0074] like Figure 4 As shown, in order to connect with the terminal ( Figure 1 45), the second wiring 70 may be bent in a form surrounding the end of the first wiring 60, and the bent portion may be arranged side by side with the first wiring 60 along the first direction X. That is, the second wiring 70 is in the display area ( Figure 1 DA) and pad area ( Figure 1 The extension portion 72 is located between the first wiring 60 and the edge of the first substrate 100.

[0075] In addition, in the surrounding area ( Figure 1As the distance D between the extension portion 72 and the first wiring 60 decreases with the trend of decreasing the PA, the sealing portion 400 may be arranged to overlap the extension portion 72 on a plane. At this time, if the sealing portion 400 is irradiated with laser to form the sealing portion 400, heat is applied to the extension portion 72 located at the lower portion of the sealing portion 400, and thus a short circuit may occur between the second wiring 70 and the first wiring 60.

[0076] More specifically, the second wiring 70 may have a structure in which a first layer 71 including Ti, a second layer 73 including Al, and a third layer 75 including Ti are stacked. Since the melting point of Al is lower than the melting temperature of the sealing portion 400, when the sealing portion 400 is irradiated with laser, Al is melted out of the second layer 73, and thus a short circuit may occur between the second wiring 70 and the first wiring 60. Therefore, in order to prevent this phenomenon, as shown in FIG. Figure 5 As shown, the sealing portion 400 may fill a region between the extension portion 72 and the first wiring 60 .

[0077] As an example, the sealing portion 400 may overlap a portion of the extension portion 72 and a portion of the first wiring 60 in a plane, and may contact the side 70a of the extension portion 72 and the side 60a of the first wiring 60 that are arranged opposite to each other in the area between the extension portion 72 and the first wiring 60. Therefore, when the laser is irradiated to the sealing portion 400, Al is blocked from melting out from the side 70a of the extension portion 72, so even if the distance D between the extension portion 72 and the first wiring 60 is reduced, the second wiring 70 and the first wiring 60 can be prevented from being short-circuited.

[0078] As another example, Figure 6 As shown, by making the side surface 70a of the extension portion 72 and the side surface 60a of the first wiring 60 facing each other at different heights, the second wiring 70 and the first wiring 60 can be prevented from being short-circuited due to the melting of Al. As an example, by forming a concave trap T in the region between the extension portion 72 and the first wiring 60, and making the side surface 70a of the extension portion 72 facing the first wiring 60 located in the trap T, the side surface 70a of the extension portion 72 can be located at a height lower than the side surface 60a of the first wiring 60 facing the extension portion 72.

[0079] The recess T may be formed by removing a portion of the inorganic layer disposed below the first wiring 60 and the extension 72. Figure 6 An example is shown in which a step difference is generated between the first interlayer insulating layer 105 and the second interlayer insulating layer 107 by removing a portion of the buffer layer 101 and the gate insulating layer 103 , but the invention is not limited thereto and a recessed T may also be formed by removing a portion of the first interlayer insulating layer 105 and / or the second interlayer insulating layer 107 .

[0080] If the side surface 70a of the extension portion 72 is located within the depression T as described above, even if Al melts out from the side surface 70a of the extension portion 72, the depression T can block the melted Al from reaching the side surface 60a of the first wiring 60, thereby more effectively preventing the second wiring 70 and the first wiring 60 from being short-circuited due to the melting of Al when forming the sealing portion 400.

[0081] In addition, if Figure 4 As shown, the outer edge 70b of the extension portion 72 may be located at the outer contour of the sealing portion 400. That is, between the first wiring 60 and the pad region ( Figure 1 The outer edge 70b of the extension portion 72 arranged side by side with the first wiring 60 along the first direction X between the pad area 40 of the second substrate 300 can be located between the corners of the sealing portion 400 and the second substrate 300 on the plane. Therefore, by inducing external static electricity to the extension portion 72, static electricity can be blocked from flowing into the input sensing unit 500, etc., thereby preventing static electricity from flowing into the input sensing unit ( Figure 3 In addition, the static electricity induced to the extension portion 72 is widely diffused in the second wiring 70, so that the display device ( Figure 1 The display device 10) has an impact.

[0082] Figure 7 It is schematically shown Figure 1 Another example of a plan view of part A, Figure 8 It is schematically shown Figure 7 An example of a cross-sectional view of a III-III' section, Fig. 9 It is schematically shown Figure 7 A cross-sectional view of another example of the III-III' cross section, Fig.10 It is schematically shown Figure 1 A plan view of yet another example of part A.

[0083] First, refer to Figure 7 and Figure 8 , in the display area ( Figure 1 Display area DA) and pad area ( Figure 1 The second wiring 70 includes an extension portion 72 arranged side by side with the first wiring 60, and the sealing portion 400 may extend in the first direction X at a position overlapping with the extension portion 72. In addition, when the sealing portion 400 is irradiated with laser in order to form the sealing portion 400 as described above, Al may be melted from the extension portion 72 to cause a short circuit between the second wiring 70 and the first wiring 60. In order to prevent this phenomenon, a blocking pattern 600 may be arranged on the second substrate 300.

[0084] The blocking pattern 600 is formed in forming the input sensing unit ( Figure 3 When the input sensing unit 500 is used, the input sensing unit ( Figure 3 The blocking pattern 600 may be formed of the same material as the wiring of the input sensing unit 500, so as to have conductivity. As an example, the blocking pattern 600 may be formed of an opaque metal material.

[0085] The blocking pattern 600 can control the range of the cured sealing portion 400 by blocking the irradiated laser, and is arranged to cover the side 70a of the extension portion 72 facing the first wiring 60 in a plane, thereby preventing Al from being melted out from the side 70a of the extension portion 72 when the laser is irradiated to the sealing portion 400. Therefore, a short circuit between the second wiring 70 and the first wiring 60 can be prevented.

[0086] As another example, Fig. 9 As shown, the blocking pattern 600 may include a plurality of regions 610 and 620. As an example, the blocking pattern 600 may include a first region 610 having light transmittance and a second region 620 located at least on one side of the first region 610. The second region 620 may be formed of an opaque metal material to block the irradiated laser. The first region 610 may be formed of a metal material that is connected to the input sensing unit ( Figure 3 The second area 620 may be formed of the same material as the touch pattern of the input sensing unit 500. Figure 3 The input sensing unit 500 is formed of the same material as the wiring.

[0087] The blocking pattern 600 is arranged at the edge of the sealing portion 400 to control the solidification range of the sealing portion 400 . In particular, the second region 620 is arranged to overlap with the side surface 70 a of the extension portion 72 on a plane, thereby preventing Al from melting out from the side surface 70 a of the extension portion 72 .

[0088] also, Fig. 9 An example is shown in which the second region 620 is also arranged on the other side of the first region 610. The second region 620 arranged on the other side of the first region 610 may be located in the central region of the laser irradiated to the sealing portion 400. Therefore, the profile of the irradiated laser may be changed into a form in which the energy is reduced in the central region of the Gaussian distribution by the second region 620 arranged on the other side of the first region 610, and thus the sealing portion 400 may be uniformly cured as a whole.

[0089] As described above, the blocking pattern 600 is formed on the second substrate 300 in a manner that covers the side surface 70a of the extension portion 72 in a planar manner, so that even when laser light is irradiated to form the sealing portion 400, Al can be prevented from being melted out from the side surface 70a of the extension portion 72. However, as described above, the blocking pattern 600 can be formed of a metal material, and the surrounding area ( Figure 1The blocking pattern 600 and the input sensing unit ( Figure 3 The spacing between the input sensing units 500 may be reduced, and thus the blocking pattern 600 may become a barrier for external static electricity to flow into the input sensing units ( Figure 3 The path of the input sensing unit 500).

[0090] However, according to the present invention, since the outer edge 70b of the extension portion 72 arranged side by side with the first wiring 60 is located outside the sealing portion 400, external static electricity is induced to the second wiring 70, and thus static electricity can be prevented from flowing into the input sensing unit 500, etc. through the blocking pattern 600. That is, on a plane, the extension portion 72 can be located further outside than the blocking pattern 600.

[0091] In addition, although Figures 7 to 9 The example in which the sealing portion 400 is located only on the extension portion 72 is shown, but the present invention is not limited thereto. Fig.10 As shown, the sealing portion 400 that adheres the first substrate 100 and the second substrate 300 is arranged in a manner overlapping with a portion of the extension portion 72 and a portion of the driving power supply wiring 60 to fill the space between them, and a blocking pattern 600 is also formed on the second substrate 300, so that a short circuit between the second wiring 70 and the driving power supply wiring 60 can be more reliably prevented. And, Figure 6 The depression T described in the figure may be located between the extension portion 72 and the driving power supply wiring 60 , the side of the extension portion 72 facing the driving power supply wiring 60 may be located in the depression T, and the outer edge 70 b of the extension portion 72 may be located at the outer contour of the sealing portion 400 .

[0092] As described above, although the present invention is described with reference to an embodiment shown in the accompanying drawings, it is only exemplary, and a technician with ordinary knowledge in the corresponding field can understand that various modifications and variations of the embodiments can be made accordingly. Therefore, the true technical protection scope of the present invention should be determined according to the technical ideas of the claims recorded.

Claims

1. A display device, comprising: a first substrate; A plurality of pixels are located on the first substrate; A second substrate, located on the plurality of pixels; a sealing portion surrounding the plurality of pixels and disposed between the first substrate and the second substrate; A first electrode extending outside the plurality of pixels along a first direction; as well as a second electrode partially surrounding the plurality of pixels in a plan view, wherein the second electrode includes an extension portion arranged parallel to the first direction between the first electrode and an edge of the first substrate, The sealing portion is provided between the extending portion and the first electrode, and the sealing portion overlaps at least a portion of the first electrode and the second electrode.

2. The display device according to claim 1, wherein: The sealing portion overlaps a first portion of the first electrode and a second portion of the extending portion of the second electrode, and contacts a side surface of the extending portion and a side surface of the first electrode arranged opposite to each other in a region between the extending portion and the first electrode.

3. The display device according to claim 2, wherein: An outer edge of the extending portion is disposed outside the sealing portion.

4. The display device according to claim 2, wherein: In a plan view, an outer edge of the extension portion is disposed between the sealing portion and a corner of the second substrate.

5. The display device according to claim 1, wherein: The side surfaces of the extension portion and the side surfaces of the first electrode facing each other are located at different heights.

6. The display device according to claim 5, wherein: A depression having a concave shape is provided between the extension portion and the first electrode, and the side surface of the extension portion is provided in the depression.

7. The display device according to claim 1, further comprising: A blocking pattern is located on the second substrate, Wherein, in a plan view, the blocking pattern covers a side surface of the extension portion facing the first electrode.

8. The display device according to claim 7, wherein: The blocking pattern includes a first region having light transmittance and a second region which is opaque and disposed on at least one side of the first region, and The second region covers the side surface of the extending portion.

9. The display device according to claim 1, wherein: Each of the plurality of pixels includes a thin film transistor and an organic light emitting element electrically coupled to the thin film transistor.

10. The display device according to claim 1, wherein: The second electrode has a structure in which a first layer, a second layer, and a third layer are sequentially stacked, the first layer and the third layer include Ti, and the second layer includes Al.

11. A display device, comprising: a first substrate including a display area, a peripheral area around the display area, and a pad area in the peripheral area; a second substrate, located on the first substrate and exposing the pad region of the first substrate; a sealing portion surrounding the display area and located between the first substrate and the second substrate; a first electrode located in the peripheral region and extending along a first direction between the pad region and the display region; a second electrode partially surrounding the display area and including an extension extending along the first direction between the first electrode and the pad area; as well as a blocking pattern disposed on the second substrate so as to overlap with a corner of the sealing portion facing the first electrode, The sealing portion overlaps with at least a portion of the second electrode.

12. The display device according to claim 11, wherein: In a plan view, the blocking pattern is positioned to cover a side of the extension portion facing the first electrode, and an outer edge of the extension portion is located between the sealing portion and a corner of the second substrate.

13. The display device according to claim 11, further comprising: a pressure sensing unit, located on the second substrate, The blocking pattern includes a material that is the same as a material of the wiring of the pressure sensing unit.

14. The display device according to claim 13, wherein: The extending portion is disposed at a further outer side of the blocking pattern in a plan view.

15. The display device according to claim 11, wherein: The blocking pattern includes a first region having light transmittance and a second region which is opaque and disposed on at least one side of the first region, and The second region covers a side surface of the extension portion facing the first electrode.

16. The display device according to claim 11, wherein: The sealing portion is provided between the extending portion and the first electrode.

17. The display device according to claim 16, wherein: The sealing portion overlaps a portion of the extending portion and a portion of the first electrode, and contacts a side surface of the extending portion and a side surface of the first electrode that are arranged opposite to each other in a region between the extending portion and the first electrode.

18. The display device according to claim 11, wherein: A depression having a concave shape is provided between the extension portion and the first electrode, and a side surface of the extension portion facing the first electrode is provided in the depression so that the side surface of the extension portion is provided at a height lower than a height of a side surface of the first electrode facing the extension portion.

19. The display device according to claim 11, wherein: The sealing portion extends along the second electrode, covers an outer end portion of the second electrode, and is in direct contact with the second electrode.

20. The display device according to claim 11, wherein: A plurality of pixels are disposed in the display area, each of the plurality of pixels including a thin film transistor and an organic light emitting element electrically coupled to the thin film transistor.

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