Chip testing system

Abstract

The invention provides a chip test system. The chip test system comprises a main control module, a constant current source module, N first analog switch modules, N second analog switch modules and a signal acquisition and conversion module, the main control module comprises a first digital-to-analog conversion unit and a second digital-to-analog conversion unit; the input end of the constant current source module is connected with the second digital-to-analog conversion unit, the output end of the constant current source module and the first digital-to-analog conversion unit are connected with the N first analog switch modules through the first selection switch, and an analog alternating current signal or an analog direct current signal can be provided for an element to be tested by switching the first selection switch; the input end of the signal acquisition and conversion module is connected with the N second analog switch modules, and the output end of the signal acquisition and conversion module is connected with the main control module. The testing system is high in integration, small in size and convenient to carry, and a plurality of devices do not need to be purchased to build the testing system. The device can carry out an analog AC signal test, and also can carry out an analog DC signal test.

Description

Technical Field

[0001] The present invention relates to the technical field of chip testing, and in particular to a chip testing system. Background Art

[0002] According to the main application scenarios of chips and the similarities and differences in signal processing, chips are mainly divided into RF chips, analog chips, and digital chips. In the design of these three types of chips, analog signal processing and testing are usually included. As the degree of chip integration continues to increase, chips are beginning to develop in the direction of higher speed / high frequency, larger-scale digital integration, etc., and it is becoming increasingly important to verify and improve the design through chip testing. In chip testing, the test of chip analog signals is a very important link.

[0003] Traditionally, analog signal testing of chips is mainly completed by semiconductor finished product testing (Final Test, FT for short) after chip packaging is completed. FT testing is divided into automatic test equipment (ATE, Automatic Test Equipment) testing and chip socket board testing. Among them, the chip socket board testing system is often completed by building a hardware system. In this testing process, the test of analog signals often uses equipment such as signal source generators, oscilloscopes, source meters, etc. For multiple analog signal tests, equipment such as switch array acquisition cards are often used.

[0004] Existing test solutions often use multiple desktop devices to test chips. Usually, these desktop devices need to be purchased separately. Then, to build a test system with these devices, it is often necessary to purchase multiple multi-channel data acquisition cards to form a switch array, so as to automatically switch and control the input signal variables and output signal variables of multiple chips. This not only increases the difficulty of building the entire test system, but also makes building a test system very cumbersome. Moreover, these devices are large in size, which is particularly inconvenient for testing high-order chips. Building a test system takes up a lot of space and has poor portability.

[0005] In view of this, it is necessary to propose a chip testing system to solve the above problems. Summary of the invention

[0006] The purpose of the present invention is to provide a chip testing system to improve the existing testing needs to purchase multiple devices and carry out cumbersome test system construction, and the test system composed of multiple devices is large in size.

[0007] The present invention provides a chip testing system, comprising: a main control module, a constant current source module, N first analog switch modules, N second analog switch modules and a signal acquisition conversion module, where N is a positive integer; The main control module includes a first digital-to-analog conversion unit for providing an analog AC signal and a second digital-to-analog conversion unit for providing an adjustable reference voltage signal to the constant current source module; The input end of the constant current source module is connected to the second digital-to-analog conversion unit, and the constant current source module is used to output an analog DC current signal. The output end of the constant current source module and the first digital-to-analog conversion unit are connected to N first analog switch modules through a first selection switch. The first analog switch module is used to connect to the element to be tested. By switching the first selection switch, an analog AC signal or an analog DC current signal can be provided to the element to be tested. The input end of the signal acquisition conversion module is connected to N second analog switch modules, and the second analog switch module is used to connect to the element under test. The output end of the signal acquisition conversion module is connected to the main control module, and the main control module is also connected to N first analog switch modules and N second analog switch modules respectively.

[0008] The beneficial effect of the chip testing system provided by the present invention is that: a test system integrating a main control module, a constant current source module, N first analog switch modules, N second analog switch modules and a signal acquisition conversion module is designed, and the chip test can be directly performed using the test system without purchasing multiple devices to build a test system. The test system has high integration, small size and is easy to carry. By switching the first selection switch, an analog AC signal or an analog DC current signal can be provided to the component to be tested. The present invention can perform both an analog AC signal test on the component to be tested and an analog DC current signal test on the component to be tested. The first analog switch module and the second analog switch module are scalable, and more analog signals can be added for testing. Compared with adding a multi-channel data acquisition card, the R&D cost and economic cost of the test system are greatly reduced.

[0009] In a possible embodiment, the first analog switch module includes M first signal path switches arranged in parallel, and the first signal path switches are used to connect to the element under test; The second analog switch module includes M second signal path switches arranged in parallel, the second signal path switches are used to connect to the element under test, and M is a positive integer.

[0010] In a possible embodiment, the constant current source module includes a first operational amplifier, a second operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor and a fifth resistor; The positive phase input terminal of the first operational amplifier is connected to one end of the first resistor, the other end of the first resistor is the input end of the constant current source module, the negative phase input terminal of the first operational amplifier is connected to one end of the second resistor, the other end of the second resistor is grounded, the output terminal of the first operational amplifier is connected to one end of the third resistor, the other end of the third resistor is the output end of the constant current source module, one end of the fourth resistor is connected to one end of the third resistor, and the other end of the fourth resistor is connected to one end of the second resistor; The output end of the second operational amplifier is connected to one end of the fifth resistor, the other end of the fifth resistor is connected to one end of the first resistor, the positive input end of the second operational amplifier is connected to the other end of the third resistor, and the negative input end of the second operational amplifier is connected to one end of the fifth resistor.

[0011] The beneficial effect is that the constant current source module provides a stable, controllable, high input impedance and low noise current output through precise resistor configuration and the use of operational amplifiers, which is crucial to ensure the accuracy and reliability of chip testing.

[0012] In a possible embodiment, the test system further includes: The temperature control module is connected to the constant current source module and is used to control the temperature of the constant current source module within a set temperature range.

[0013] The beneficial effect is that the temperature control module monitors the temperature of the constant current source module in real time and controls it within the set temperature range, ensuring the stable operation of the constant current source module. This is crucial to maintaining the performance of the constant current source module, because temperature changes may affect the performance of the circuit and the stability and accuracy of the output current.

[0014] In a possible embodiment, the signal acquisition and conversion module includes a signal conditioning circuit and an analog-to-digital converter. The signal conditioning circuit is used to denoise and amplify the signal. The input end of the signal conditioning circuit is connected to N second analog switch modules, the output end of the signal conditioning circuit is connected to the input end of the analog-to-digital converter, and the output end of the analog-to-digital converter is connected to the main control module.

[0015] The beneficial effect is that the design of the signal acquisition and conversion module effectively improves the quality of the signal, enhances the anti-interference ability, and ensures the accurate acquisition and conversion accuracy of the signal.

[0016] In a possible embodiment, the signal conditioning circuit includes a third operational amplifier, a fourth operational amplifier, a sixth resistor, a seventh resistor, an eighth resistor and a capacitor; The positive phase input terminal of the third operational amplifier is connected to one end of the sixth resistor, and the other end of the sixth resistor is the input terminal of the signal conditioning circuit, one end of the capacitor is connected to one end of the sixth resistor, and the other end of the capacitor is grounded, the negative phase input terminal of the third operational amplifier is connected to one end of the seventh resistor, and the other end of the seventh resistor is grounded, one end of the eighth resistor is connected to one end of the seventh resistor, and the other end of the eighth resistor is connected to the output terminal of the third operational amplifier, the output terminal of the third operational amplifier is connected to the positive phase input terminal of the fourth operational amplifier, the negative phase input terminal of the fourth operational amplifier is connected to the output terminal of the fourth operational amplifier, and the output terminal of the fourth operational amplifier is the output terminal of the signal conditioning circuit.

[0017] The beneficial effects are: the design of the signal conditioning circuit provides functions such as input impedance matching, decoupling, negative feedback stabilization, two-stage amplification, internal feedback gain adjustment, common-mode noise suppression and output impedance matching. These technical effects together improve the quality of the signal, enhance the anti-interference ability, and ensure the accurate acquisition and conversion of the signal.

[0018] In a possible embodiment, the test system further includes: A first low voltage dropout linear regulator connected to the main control module; A second low voltage drop linear regulator is connected to the constant current source module; A third low voltage dropout linear regulator is connected to the signal acquisition and conversion module; a fourth low voltage dropout linear regulator, connected to the N first analog switch modules, the N second analog switch modules and the first selection switch respectively; A power interface module is respectively connected to the first low voltage dropout linear regulator, the second low voltage dropout linear regulator, the third low voltage dropout linear regulator and the fourth low voltage dropout linear regulator. The power interface module is used to supply power to the first to fourth low voltage dropout linear regulators, and the first to fourth low voltage dropout linear regulators respectively supply power to the devices connected thereto.

[0019] The beneficial effect is that by equipping each key module of the test system with an independent low-voltage difference linear regulator, a stable power supply can be achieved, power consumption can be reduced, noise can be reduced, protection functions can be improved, voltage can be accurately adjusted, and design can be simplified, thereby improving the performance and reliability of the entire test system.

[0020] In a possible embodiment, the input end of the constant current source module is connected to the second digital-to-analog conversion unit and the first row of pins through a second selection switch, the first row of pins is used to connect an external circuit capable of providing an adjustable reference voltage signal, and by switching the second selection switch, the adjustable reference voltage signal can be provided to the constant current source module through the external circuit or the second digital-to-analog conversion unit.

[0021] The beneficial effect is that by switching the second selection switch, the constant current source module can selectively receive an adjustable reference voltage signal from the second digital-to-analog conversion unit or an external circuit. This design provides higher flexibility and allows the system to switch signal sources as needed.

[0022] In a possible embodiment, N of the second analog switch modules are connected to the input end and the second row of pins of the signal acquisition conversion module through a third selection switch, and the second row of pins is used to connect an external detection instrument. By switching the third selection switch, the test signal output by the component under test can be converted into a digital signal through the signal acquisition conversion module to input into the main control module for processing or the test signal can be tested through the external detection instrument.

[0023] The beneficial effect is that by switching the third selection switch, the test system of the present solution or an external testing instrument can be selectively used to test the component under test. This design provides higher flexibility and allows the system to switch other external testing instruments as needed.

[0024] In a possible embodiment, the main control module is connected to a host computer for communication so as to feed back the test results to the host computer for analysis and processing.

[0025] The beneficial effect is that the main control module transmits the data obtained from the test to the host computer, and the host computer can monitor and analyze the data. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 FIG. 4 is a schematic diagram of a chip testing system of the present invention.

[0027] Figure 2 It is a schematic diagram of a constant current source module and a temperature control module in the chip testing system of the present invention.

[0028] Figure 3 It is a schematic diagram of a signal acquisition conversion module and a main control module in the chip testing system of the present invention.

[0029] Figure 4 It is a schematic diagram of power supply of each low voltage drop linear regulator and power interface module in the chip testing system of the present invention.

[0030] Figure 5It is a schematic diagram of the chip testing system of the present invention when performing a simulated DC signal test.

[0031] Explanation of the accompanying drawings: 111, first operational amplifier; 112, second operational amplifier; 113, first resistor; 114, second resistor; 115, third resistor; 116, fourth resistor; 117, fifth resistor; 121, third operational amplifier; 122, fourth operational amplifier; 123, sixth resistor; 124, seventh resistor; 125, eighth resistor; 126, capacitor. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0033] Existing test schemes often use multiple desktop devices for chip testing. Desktop devices are not only inconvenient to carry, but also the test environment required for multiple devices is relatively cumbersome. In addition, building these desktop devices for testing also requires high costs, which adds unnecessary economic costs. Chip testing often involves a large number of chip testing. At this time, manually replacing chips for a chip test system built for a single chip requires a lot of manpower and time costs. It is often necessary to purchase multiple multi-channel data acquisition cards to form a switch array, so as to automatically switch and control the input signal variables and output signal variables of multiple chips. This not only increases the difficulty of building the entire test system, but also increases the cost of building the test system. Although desktop equipment can provide higher test stability and accuracy, in some chip testing occasions with low accuracy requirements, the manpower and economic costs of building a chip test system cannot be ignored. At the same time, considering the automatic testing of multiple chips, the communication between desktop devices and the development of automatic test programs are also relatively cumbersome, and the software platforms of multiple devices will be used for control, and the consistency of the software platforms is poor.

[0034] In summary, the multi-chip testing system in the prior art has the following defects: 1. Testing requires a lot of equipment, and the test system is cumbersome to set up, which requires high manpower and economic costs; 2. The software development cost of the test system composed of multiple multi-channel data acquisition cards is high, and the control coordination requirements between multiple devices are high, making the software difficult to develop; 3. Multiple test equipment is inconvenient to carry, and the test system construction takes up a large space and has poor portability.

[0035] In view of the problems existing in the prior art, an embodiment of the present invention provides a chip testing system. Figure 1 The test system includes: a main control module, a constant current source module, N first analog switch modules, N second analog switch modules and a signal acquisition conversion module, where N is a positive integer. The main control module includes a first digital-to-analog conversion unit for providing an analog AC signal and a second digital-to-analog conversion unit for providing a stable adjustable reference voltage signal to the constant current source module. The input end of the constant current source module is connected to the second digital-to-analog conversion unit, and the constant current source module is used to output an analog DC current signal. The output end of the constant current source module and the first digital-to-analog conversion unit are connected to the N first analog switch modules through a first selection switch. The first analog switch module is used to connect to the component to be tested, and the analog AC signal or the analog DC current signal can be provided to the component to be tested by switching the first selection switch. The input end of the signal acquisition conversion module is connected to the N second analog switch modules, and the second analog switch module is used to connect to the component to be tested. The output end of the signal acquisition conversion module is connected to the main control module, and the main control module is also connected to the N first analog switch modules and the N second analog switch modules respectively.

[0036] By integrating multiple functional modules of a main control module, a constant current source module, N first analog switch modules, N second analog switch modules and a signal acquisition conversion module into one test system, the chip test can be directly performed using the test system, without the need to purchase multiple devices, thus reducing the procurement cost, and without the need to tediously build the test system, thus saving labor costs and time costs. The test system has high integration, occupies less space, and is easy to carry. Traditional test systems may need to be equipped with special hardware for each type of test signal (such as an AC signal and a DC current signal). However, the present invention can flexibly provide an analog AC signal or an analog DC current signal to the component to be tested by switching the first selection switch, thus reducing hardware redundancy, because it is no longer necessary to purchase and integrate hardware components separately for each signal type, thus improving the versatility and applicability of the test. Compared with adding a multi-channel data acquisition card, the present invention expands the test capability by integrating an analog switch module, thus avoiding the high procurement cost of a data acquisition card. Compared with a data acquisition card that relies on a fixed number of channels, the scalability based on the analog switch module provides greater flexibility and adaptability. The test system can be easily expanded according to actual needs without major hardware upgrades or replacements, which greatly reduces the production cost of the test system.

[0037] In one embodiment, see Figure 1The first analog switch module includes M first signal path switches arranged in parallel, and the first signal path switch is used to connect to the component under test through a DuPont line or a bullnose socket; the second analog switch module includes M second signal path switches arranged in parallel, and the second signal path switch is used to connect to the component under test through a DuPont line or a bullnose socket, and M is a positive integer.

[0038] The first analog switch module can provide excitation signals to M DUTs through M first signal path switches, and the second analog switch module can receive test signals from M DUTs through M second signal path switches, thereby realizing testing of multi-level DUTs.

[0039] In one embodiment, see Figure 2 The constant current source module includes a first operational amplifier 111, a second operational amplifier 112, a first resistor 113, a second resistor 114, a third resistor 115, a fourth resistor 116 and a fifth resistor 117. The positive phase input terminal of the first operational amplifier 111 is connected to one end of the first resistor 113, the other end of the first resistor 113 is the input terminal of the constant current source module, the negative phase input terminal of the first operational amplifier 111 is connected to one end of the second resistor 114, the other end of the second resistor 114 is grounded, the output terminal of the first operational amplifier 111 is connected to one end of the third resistor 115, the other end of the third resistor 115 is the output terminal of the constant current source module, one end of the fourth resistor 116 is connected to one end of the third resistor 115, and the other end of the fourth resistor 116 is connected to one end of the second resistor 114. The output end of the second operational amplifier 112 is connected to one end of the fifth resistor 117, the other end of the fifth resistor 117 is connected to one end of the first resistor 113, the positive phase input end of the second operational amplifier 112 is connected to the other end of the third resistor 115, and the negative phase input end of the second operational amplifier 112 is connected to one end of the fifth resistor 117. The resistance values ​​of the first resistor 113, the second resistor 114, the fourth resistor 116 and the fifth resistor 117 are equal.

[0040] The first operational amplifier 111 is configured as a voltage follower, with its positive input terminal connected to the first resistor 113 (i.e., the input terminal of the constant current source module), and the negative input terminal is grounded through the second resistor 114 to form a feedback loop. This configuration ensures that the output voltage of the first operational amplifier 111 is almost equal to its input voltage Vref (ignoring the tiny input offset voltage of the operational amplifier). One end of the third resistor 115 is connected to the output of the first operational amplifier 111, and the other end is used as the output of the constant current source module. Since the output voltage of the first operational amplifier 111 is approximately equal to Vref, the current I flowing through the third resistor 115 can be calculated by Ohm's law as I=Vref / Rref, where Vref is the voltage value of the input terminal of the constant current source module, Rref is the resistance value of the third resistor 115, and the current value I is stable when Vref and Rref remain constant. The second operational amplifier 112 is configured as a differential amplifier for monitoring and adjusting the output current. Its positive phase input terminal is connected to the output of the third resistor 115 (i.e., the constant current source output), and its negative phase input terminal is connected to the first resistor 113 (i.e., the input terminal of the constant current source module) through the fifth resistor 117. Since the fourth resistor 116 is connected in parallel with the second resistor 114 and the fifth resistor 117 (and the resistance values ​​are equal), this forms a voltage divider, so that the negative phase input terminal of the second operational amplifier 112 receives a voltage feedback proportional to the output current. If the output current deviates from the set value, the second operational amplifier 112 will generate an error signal, which is fed back to the input terminal of the first operational amplifier 111 through its output and the fifth resistor 117, thereby adjusting the output voltage (i.e., a voltage almost equal to Vref) to maintain the stability of the output current.

[0041] The constant current source module adopts a negative feedback mechanism, and ensures the stability of the output current through the combination of an operational amplifier and a resistor. Due to the characteristics of high input impedance and low output impedance of the operational amplifier, as well as the stability of the negative feedback mechanism, the constant current source module can provide a high-precision constant current output. The fast response characteristics of the operational amplifier enable the constant current source module to quickly respond to changes in input voltage or load, thereby maintaining a constant output current. Through reasonable resistor selection and operational amplifier configuration, the constant current source module can effectively avoid self-oscillation and ensure the stability of the circuit. Compared with complex constant current source circuits, the constant current source module adopts a relatively simple circuit structure and common electronic components, thereby reducing costs.

[0042] In one embodiment, see Figure 2The test system also includes: a temperature control module, which is connected to the constant current source module and is used to control the temperature of the constant current source module within a set temperature range. This temperature control design has a certain compensation capability for the loop resistance change caused by temperature change, and can avoid the loop resistance and reference resistance changes caused by temperature change, thereby effectively controlling the temperature change of the entire constant current source loop, so that the constant current source can output high-precision current values ​​in different ambient temperature occasions, increasing the accuracy of the constant current source module.

[0043] For example, the temperature control module uses a thermoelectric cooler (TEC) temperature control patch, which uses a heat conduction mechanism to transfer heat from one side to the other. By applying heat to one side of the TEC temperature control patch, the heat is transferred to the other side through heat conduction, thereby achieving temperature regulation and control. TEC temperature control patches usually have a temperature sensing function that can monitor the temperature in real time and adjust it. When the temperature exceeds the preset threshold, the TEC temperature control patch automatically adjusts the heat transfer to maintain a constant temperature. This automatic adjustment function helps to achieve stable and precise temperature control.

[0044] In one embodiment, see Figure 1 The input end of the constant current source module is connected to the second digital-to-analog conversion unit and the first row of pins through the second selection switch. The first row of pins is used to connect an external circuit that can provide an adjustable reference voltage signal. By switching the second selection switch, a stable, high-precision adjustable reference voltage signal can be provided to the constant current source module through the external circuit or the second digital-to-analog conversion unit. The second selection switch is a single-pole double-throw switch.

[0045] By switching the second selection switch, you can choose to let the external circuit or the second digital-to-analog conversion unit output a reference voltage value to the constant current source module to adjust the current of the constant current source module. By adjusting the reference voltage value, an adjustable current of 0-3mA can be output, and the load resistance can reach 10 kilo-ohms.

[0046] In one embodiment, see Figure 1 The signal acquisition and conversion module includes a signal conditioning circuit and an analog-to-digital converter. The signal conditioning circuit is used for denoising and amplifying the signal. The input end of the signal conditioning circuit is connected to N second analog switch modules, the output end of the signal conditioning circuit is connected to the input end of the analog-to-digital converter, and the output end of the analog-to-digital converter is connected to the main control module.

[0047] The signal conditioning circuit can filter out high-frequency noise, making the signal characteristics more clearly identifiable, and amplify the test signal characteristics, and input them into the analog-to-digital converter for analog-to-digital conversion. The denoising and amplification functions of the signal conditioning circuit jointly improve the signal-to-noise ratio and amplitude accuracy of the test signal, thereby improving the test accuracy of the entire test system. The analog-to-digital conversion is an analog-to-digital converter greater than or equal to 12 bits to ensure high conversion accuracy. The test analog signal enters the analog-to-digital converter through the previous signal conditioning circuit, is converted into a digital signal, and is transmitted to the microcontroller through the SPI communication protocol.

[0048] In one embodiment, see Figure 3 The signal conditioning circuit includes a third operational amplifier 121, a fourth operational amplifier 122, a sixth resistor 123, a seventh resistor 124, an eighth resistor 125, and a capacitor 126. The positive phase input terminal of the third operational amplifier 121 is connected to one end of the sixth resistor 123, the other end of the sixth resistor 123 is the input terminal of the signal conditioning circuit, one end of the capacitor 126 is connected to one end of the sixth resistor 123, the other end of the capacitor 126 is grounded, the negative phase input terminal of the third operational amplifier 121 is connected to one end of the seventh resistor 124, the other end of the seventh resistor 124 is grounded, one end of the eighth resistor 125 is connected to one end of the seventh resistor 124, the other end of the eighth resistor 125 is connected to the output terminal of the third operational amplifier 121, the output terminal of the third operational amplifier 121 is connected to the positive phase input terminal of the fourth operational amplifier 122, the negative phase input terminal of the fourth operational amplifier 122 is connected to the output terminal of the fourth operational amplifier 122, and the output terminal of the fourth operational amplifier 122 is the output terminal of the signal conditioning circuit.

[0049] The sixth resistor 123 is connected to the positive input terminal of the third operational amplifier 121 as an input resistor, and the capacitor 126 is connected in parallel with the sixth resistor 123. The sixth resistor 123 and the capacitor 126 constitute a passive filtering circuit. The function of the capacitor 126 is to filter out the high-frequency noise in the input signal, so that the circuit has a good inhibitory effect on the noise component in the input signal, and ensure that the signal input to the operational amplifier is a pure direct current or low-frequency alternating current signal. The third operational amplifier 121 constitutes an inverting amplifier. The seventh resistor 124 is connected to the negative input terminal and the output terminal of the third operational amplifier 121 as a feedback resistor to form a negative feedback so that the circuit has a stable amplification factor. The amplification factor is jointly determined by the seventh resistor 124 and the eighth resistor 125 and the input impedance of the third operational amplifier 121, and the signal amplification factor is the sum of 1 and the ratio of the seventh resistor 124 to the eighth resistor 125. The negative feedback mechanism enables the circuit to have a stable amplification factor and output impedance, thereby improving the stability and linearity of the circuit.

[0050] The fourth operational amplifier 122 constitutes a voltage follower, whose positive input terminal is connected to the output terminal of the third operational amplifier 121, and the negative input terminal is directly connected to the output terminal, forming a deep negative feedback. The main function of the voltage follower is to reduce the output impedance and improve the load capacity of the circuit, while ensuring that the phase and amplitude of the signal do not change during the transmission process. The second-stage voltage follower significantly reduces the output impedance and improves the load capacity of the circuit, so that the circuit can drive a load with a larger impedance without affecting the integrity of the signal. The voltage follower ensures that the phase and amplitude of the signal do not change during the transmission process, which is particularly important for application scenarios that need to maintain the original characteristics of the signal. In chip testing, the signal conditioning circuit can provide a stable and accurate amplified signal, which helps to improve the accuracy and reliability of the test.

[0051] In one embodiment, see Figure 1 , N second analog switch modules are connected to the input end of the signal acquisition conversion module and the second row of pins through the third selection switch. The second row of pins is used to connect an external detection instrument. By switching the third selection switch, the test signal output by the component under test can be converted into a digital signal through the signal acquisition conversion module to input the main control module for processing or the external detection instrument can collect and test the test signal.

[0052] By switching the third selection switch, the signal acquisition conversion module can be used to complete the analog-to-digital conversion and analysis of the test signal output by the chip under test, thereby completing the functional analysis of the chip under test. Ultra-high precision external detection instruments can also be selected, which increases versatility and flexibility.

[0053] In one embodiment, see Figure 1 The output end of the constant current source module, the first digital-to-analog conversion unit, and the third row of pins are connected to N first analog switch modules through a first selection switch. The first selection switch is a single-pole triple-throw switch. The third row of pins is used to connect an external circuit that can provide an analog AC signal.

[0054] In one embodiment, see Figure 4The test system also includes: a first low-voltage difference linear regulator, connected to the main control module; a second low-voltage difference linear regulator, connected to the constant current source module; a third low-voltage difference linear regulator, connected to the signal acquisition conversion module; a fourth low-voltage difference linear regulator, respectively connected to N first analog switch modules, N second analog switch modules and the first selection switch; a power interface module, respectively connected to the first low-voltage difference linear regulator, the second low-voltage difference linear regulator, the third low-voltage difference linear regulator and the fourth low-voltage difference linear regulator, the power interface module is used to supply power to the first to fourth low-voltage difference linear regulators, and the first to fourth low-voltage difference linear regulators respectively supply power to the devices connected thereto, that is, the first low-voltage difference linear regulator supplies power to the main control module, the second low-voltage difference linear regulator supplies power to the constant current source module, the third low-voltage difference linear regulator supplies power to the signal acquisition conversion module, and the fourth low-voltage difference linear regulator supplies power to the N first analog switch modules, the N second analog switch modules and the first selection switch. The power interface module has a power interface, which is a TYPEC interface. The power supply is connected through the TYPEC interface to realize power supply for the entire test system.

[0055] In a specific embodiment, see Figure 1 and Figure 4 N first analog switch modules, N second analog switch modules, a first selection switch, a second selection switch and a third selection switch constitute a switch array module, and a fourth low voltage difference linear regulator is connected to the switch array module.

[0056] Each module of the test system is powered by a low-dropout linear regulator (LDO). In this way, each power supply is independent, avoiding potential interference between different modules due to power sharing, and improving the stability and reliability of the system. Moreover, it is convenient for later debugging and update iterations. In particular, the power supply of the signal acquisition and conversion module is separated from the power supply of other digital modules, and the power supply is supplied by an independent LDO, which effectively reduces the interference of digital power supply on analog signals. Digital-analog power supply partitioning can reduce the pollution of digital noise on analog signals, thereby improving the signal quality of the entire test system.

[0057] In one embodiment, see Figure 1The main control module is connected to the host computer for communication to feed back the test results to the host computer for analysis and processing. The main control module is used to control the selection of N first analog switch modules, N second analog switch modules, the first selection switch, the second selection switch and the third selection switch. The main control module is a single-chip main control module, which includes a single-chip controller (such as an STM32F103ZET6 chip) and a serial communication chip. The single-chip main control module includes a general-purpose input / output (GPIO) control port, a digital-to-analog conversion port, a serial peripheral (SPI) communication port and a serial communication port. The main control module and the analog-to-digital converter communicate and transmit test data through the SPI module, and the main control module and the host computer transmit the test data through the serial communication chip.

[0058] In one embodiment, the first analog switch module and the second analog switch module are analog switch control chips, for example, ADG706 (1-16 multi-way switch control chip).

[0059] See also Figure 5 When performing an analog DC signal test, N is a positive even number, and a four-wire DC signal test is used. The input and output ends of the component to be tested are respectively connected to two first analog switch modules, and the input and output ends of the component to be tested are also respectively connected to two second analog switch modules. Of the two first analog switch modules connected to the component to be tested, one first analog switch module transmits an analog DC current signal to the component to be tested, and the other first analog switch module is grounded through the third row of pins. Of the two second analog switch modules connected to the component to be tested, one second analog switch module receives a test signal, and the other second analog switch module is grounded through the second row of pins.

[0060] When performing an analog AC signal test, the input end of the component under test is connected to the first analog switch module, which transmits an analog AC current signal to the component under test, and the output end of the component under test is connected to the second analog switch module, which receives the test signal.

[0061] The following is an example of testing a 4×4 diode array with a simulated DC signal. Figure 5 The testing method of the chip testing system of the present invention is explained.

[0062] 1. First, the analog signal excitation end of the 4×4 diode array is led out to the signal output part of the bullhorn socket of the present invention by using a DuPont line or a bullhorn socket, that is, connecting the first analog switch module 1 and the first analog switch module 2; the analog signal test end of the 4×4 diode array is led out to the signal input part of the bullhorn socket of the present invention by using a DuPont line or a bullhorn socket, that is, connecting the second analog switch module 1 and the second analog switch module 2; 2. The power supply of the entire test system is powered by the TYPEC part, and the entire test system is powered on normally.

[0063] 3. The single-chip microcomputer main control module controls the closure of the diode positive end excitation signal channel 1 of the first analog switch module 1 and the closure of the diode negative end excitation signal channel 4 of the first analog switch module 2 through the GPIO control port, and the first selection switch selects the constant current source module channel to be closed. At this time, the constant current source module outputs 1mA current into the No. 1 diode to be tested.

[0064] 4. The single-chip microcomputer main control module controls the closure of the diode positive end test signal 1 channel of the second analog switch module 1 and the closure of the diode negative end test signal 4 channel of the second analog switch module 2 through the GPIO control port. The third selection switch selects the signal conditioning circuit, enters the analog-to-digital converter to complete voltage acquisition and analog-to-digital conversion, and transmits it to the single-chip microcomputer main control module through the SPI communication port.

[0065] 5. The digital value is read by the microcontroller main control module and transmitted to the host computer through the serial communication chip. The digital value is printed out to complete the No. 1 diode test.

[0066] 6. Follow the above steps to complete the test of the entire 4×4 diode.

[0067] The technical effects of the chip testing system of the present invention are explained in detail below.

[0068] 1. Aiming at the problem that the existing chip testing system requires a lot of equipment and the system is complicated to build, the present invention relies on hardware design to develop a complete set of automatic testing systems, which greatly reduces the development cost. Aiming at the problem that the development cost of the test system composed of multi-channel data acquisition cards is high, the control coordination requirements between multiple devices are high, and the software development cost is high, the present invention relies on a single-chip microcomputer software development platform and an analog switch chip. Compared with the test system built with multiple instruments, the test system of the present invention is based on the software system development of a single-chip microcomputer as a whole. Compared with the multiple software platforms of the instrument, the software development cost is greatly reduced.

[0069] 2. The present invention develops a test system suitable for analog AC signal testing and four-wire DC signal testing. Compared with the multi-channel data acquisition card test system, the first analog switch module and the second analog switch module in the present invention partially replace the function of forming a multi-channel data acquisition card array in the traditional test scheme. It is easy to operate, simple to control, and has strong scalability. It greatly reduces the difficulty of software development caused by the collaboration of multiple devices and the economic cost caused by purchasing multiple multi-channel data acquisition card modules. At the same time, it also realizes the function of the multi-channel data acquisition card test system, greatly reducing the development cost.

[0070] 3. For universal use in testing, the entire system of the present invention provides a four-wire test solution for DC signals, and is also suitable for AC signal testing. For example, when the PCB size is 23.1 cm long and 10.6 cm wide, up to 48 analog signals can be provided for four-wire testing, and 48 AC signals can also be provided for testing. In the later stage, when the size is increased, the entire test signal analog switch module can be further expanded, and more analog signals can be added for testing. Compared with adding a multi-channel data acquisition card, the R&D cost and economic cost of the test system are greatly reduced.

[0071] 4. Compared with the traditional test system, the present invention has a high degree of integration and enhanced portability by integrating circuit modules such as a constant current source module, a switch array, a signal acquisition and conversion module, a main control module, a host computer, and a power module.

[0072] 5. The signal input and signal test circuits are separated, which is convenient for the four-wire method test of DC signals and beneficial for removing interference from the signal test circuit. The third selection switch can select the signal conditioning circuit to filter and amplify before entering the analog-to-digital converter for processing, or it can select the second row of pins to lead out to the periphery for use. The first selection switch of the output signal can select the constant current source module to output the DC current signal for the analog DC signal test of the chip, or it can select the output signal from the first digital-to-analog conversion unit of the single-chip microcomputer for the analog AC signal test of the chip, and the lead-out excitation signal is provided by the instrument.

[0073] 6. The present invention provides a constant current source module, a signal acquisition conversion module, a first digital-to-analog conversion unit, a second digital-to-analog conversion unit, etc., which replace the use of a source meter in an existing chip test system, reduce economic and labor costs, and also provide a lead-out terminal. In testing situations that require ultra-high precision, an external detection instrument can be selected to be connected to the second row of pin lead-out terminals for testing, which increases versatility. At the same time, the constant current source equipped with a temperature control module outputs a stable current under a variety of ambient temperatures, which is convenient for testing.

[0074] In the description of the present invention, it should be understood that the terms "including" and "having" and any variations thereof used herein are intended to cover non-exclusive inclusions. For example, a process, method, system, product or apparatus comprising a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products or apparatuses.

[0075] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0076] Although the embodiments of the present invention are described in detail above, it is obvious to those skilled in the art that various modifications and variations can be made to these embodiments. However, it should be understood that such modifications and variations are within the scope and spirit of the present invention as described in the claims. Moreover, the present invention described herein may have other embodiments and may be implemented or realized in a variety of ways. Unless otherwise defined, the technical terms or scientific terms used herein should be understood by those with ordinary skills in the field to which the present invention belongs.

Claims

1. A chip testing system, characterized in that: include: A main control module, a constant current source module, N first analog switch modules, N second analog switch modules and a signal acquisition conversion module, where N is a positive integer; The main control module includes a first digital-to-analog conversion unit for providing an analog AC signal and a second digital-to-analog conversion unit for providing an adjustable reference voltage signal to the constant current source module; The input end of the constant current source module is connected to the second digital-to-analog conversion unit, and the constant current source module is used to output an analog DC current signal. The output end of the constant current source module and the first digital-to-analog conversion unit are connected to N first analog switch modules through a first selection switch. The first analog switch module is used to connect to the element to be tested. By switching the first selection switch, an analog AC signal or an analog DC current signal can be provided to the element to be tested. The input end of the signal acquisition conversion module is connected to N second analog switch modules, and the second analog switch module is used to connect to the element under test. The output end of the signal acquisition conversion module is connected to the main control module, and the main control module is also connected to N first analog switch modules and N second analog switch modules respectively.

2. The chip testing system according to claim 1, characterized in that: The first analog switch module includes M first signal path switches arranged in parallel, and the first signal path switches are used to connect to the device under test; The second analog switch module includes M second signal path switches arranged in parallel, the second signal path switches are used to connect to the element under test, and M is a positive integer.

3. The chip testing system according to claim 1, characterized in that: The constant current source module includes a first operational amplifier, a second operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor and a fifth resistor; The positive phase input terminal of the first operational amplifier is connected to one end of the first resistor, the other end of the first resistor is the input end of the constant current source module, the negative phase input terminal of the first operational amplifier is connected to one end of the second resistor, the other end of the second resistor is grounded, the output terminal of the first operational amplifier is connected to one end of the third resistor, the other end of the third resistor is the output end of the constant current source module, one end of the fourth resistor is connected to one end of the third resistor, and the other end of the fourth resistor is connected to one end of the second resistor; The output end of the second operational amplifier is connected to one end of the fifth resistor, the other end of the fifth resistor is connected to one end of the first resistor, the positive input end of the second operational amplifier is connected to the other end of the third resistor, and the negative input end of the second operational amplifier is connected to one end of the fifth resistor.

4. The chip testing system according to claim 1, characterized in that: Also includes: The temperature control module is connected to the constant current source module and is used to control the temperature of the constant current source module within a set temperature range.

5. The chip testing system according to claim 1, characterized in that: The signal acquisition and conversion module includes a signal conditioning circuit and an analog-to-digital converter. The signal conditioning circuit is used for denoising and amplifying signals. The input end of the signal conditioning circuit is connected to N second analog switch modules, the output end of the signal conditioning circuit is connected to the input end of the analog-to-digital converter, and the output end of the analog-to-digital converter is connected to the main control module.

6. The chip testing system according to claim 5, characterized in that: The signal conditioning circuit includes a third operational amplifier, a fourth operational amplifier, a sixth resistor, a seventh resistor, an eighth resistor and a capacitor; The positive phase input terminal of the third operational amplifier is connected to one end of the sixth resistor, and the other end of the sixth resistor is the input terminal of the signal conditioning circuit, one end of the capacitor is connected to one end of the sixth resistor, and the other end of the capacitor is grounded, the negative phase input terminal of the third operational amplifier is connected to one end of the seventh resistor, and the other end of the seventh resistor is grounded, one end of the eighth resistor is connected to one end of the seventh resistor, and the other end of the eighth resistor is connected to the output terminal of the third operational amplifier, the output terminal of the third operational amplifier is connected to the positive phase input terminal of the fourth operational amplifier, the negative phase input terminal of the fourth operational amplifier is connected to the output terminal of the fourth operational amplifier, and the output terminal of the fourth operational amplifier is the output terminal of the signal conditioning circuit.

7. The chip testing system according to any one of claims 1 to 6, characterized in that: Also includes: A first low voltage dropout linear regulator connected to the main control module; A second low voltage drop linear regulator is connected to the constant current source module; A third low voltage dropout linear regulator is connected to the signal acquisition and conversion module; a fourth low voltage dropout linear regulator, connected to the N first analog switch modules, the N second analog switch modules and the first selection switch respectively; A power interface module is respectively connected to the first low voltage dropout linear regulator, the second low voltage dropout linear regulator, the third low voltage dropout linear regulator and the fourth low voltage dropout linear regulator. The power interface module is used to supply power to the first to fourth low voltage dropout linear regulators, and the first to fourth low voltage dropout linear regulators respectively supply power to the devices connected thereto.

8. The chip testing system according to any one of claims 1 to 6, characterized in that: The input end of the constant current source module is connected to the second digital-to-analog conversion unit and the first row of pins through a second selection switch. The first row of pins is used to connect an external circuit that can provide an adjustable reference voltage signal. By switching the second selection switch, the adjustable reference voltage signal can be provided to the constant current source module through the external circuit or the second digital-to-analog conversion unit.

9. The chip testing system according to any one of claims 1 to 6, characterized in that: N of the second analog switch modules are connected to the input end and the second row of pins of the signal acquisition conversion module through the third selection switch. The second row of pins is used to connect an external detection instrument. By switching the third selection switch, the test signal output by the component under test can be converted into a digital signal through the signal acquisition conversion module to input into the main control module for processing or the test signal can be collected and tested through the external detection instrument.

10. The chip testing system according to any one of claims 1 to 6, characterized in that: The main control module is connected to the host computer for communication to feed back the test results to the host computer for analysis and processing.

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