Liquid crystal display panel and liquid crystal display device

By setting protective septa in the liquid crystal display panel and optimizing the design of the septa layer, the problem of insufficient ability to withstand external pressure in the liquid crystal display panel is solved, and a higher pressure resistance and the effect of preventing the accumulation of alignment liquid is achieved.

CN119689751AActive Publication Date: 2025-03-25BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
CN202510006261.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-02
Publication Date
2025-03-25
Estimated Expiration
2045-01-02

AI Technical Summary

Technical Problem

The LCD panel has a low ability to withstand external pressure, and the existing technology has failed to effectively solve this problem.

Method used

By providing protective septa in the liquid crystal display panel to cover the through holes, and the forward projection of the septum layer on the array substrate side is covered by a black matrix layer, ensuring that the color resistance layer and the protective septa do not overlap, thereby improving the pressure resistance of the panel.

Benefits of technology

Effectively prevent the allocation liquid from accumulating at the edge of the hole, and improve the ability of the liquid crystal display panel to withstand external pressure.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the invention discloses a liquid crystal display panel and a liquid crystal display device. The liquid crystal display panel comprises a color film substrate, an array substrate and a liquid crystal layer, wherein the array substrate and the color film substrate are arranged in a box-to-box mode, and the liquid crystal layer is located between the color film substrate and the array substrate. The array substrate comprises a first substrate, a driving circuit layer, a planarization layer, pixel electrodes and a spacer layer, wherein the driving circuit layer, the planarization layer, the pixel electrodes and the spacer layer are sequentially stacked on the first substrate; the color film substrate comprises a second substrate, and a black matrix layer and a color resistance layer which are arranged on the second substrate; the driving circuit layer comprises thin film transistors arranged in an array; the planarization layer comprises a via hole for electrically connecting the pixel electrode with the first electrode of the thin film transistor; the spacer layer comprises a main spacer, an auxiliary spacer and a protective spacer, the orthographic projection of the spacer layer on the first substrate is covered by the orthographic projection of the black matrix layer on the first substrate, the protective spacer covers the via hole, and the orthographic projection of the color resistance layer on the first substrate is not overlapped with the orthographic projection of the protective spacer on the first substrate.
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Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and more specifically, to a liquid crystal display panel and a liquid crystal display device. Background Art

[0002] In the related technologies of liquid crystal display panels, there is a problem that the liquid crystal display panels have a low ability to withstand external pressure. The reason for this phenomenon that the liquid crystal display panels have a low ability to withstand external pressure is unknown, and there is no good solution. Summary of the invention

[0003] The purpose of the present disclosure is to provide a liquid crystal display panel and a liquid crystal display device to solve at least one of the problems existing in the prior art.

[0004] In order to achieve the above objectives, the present invention adopts the following technical solutions:

[0005] A first aspect of the present disclosure provides a liquid crystal display panel, comprising a color filter substrate, an array substrate arranged in a box with the color filter substrate, and a liquid crystal layer located between the color filter substrate and the array substrate;

[0006] The array substrate comprises a first substrate and a driving circuit layer, a planarization layer, an array-arranged pixel electrode and a spacer layer sequentially stacked on the first substrate;

[0007] The color filter substrate comprises a second substrate and a black matrix layer and a color resist layer arranged on the second substrate;

[0008] The driving circuit layer includes thin film transistors arranged in an array;

[0009] The planarization layer includes a via hole for electrically connecting the pixel electrode to the first electrode of the thin film transistor;

[0010] The spacer layer includes a main spacer, an auxiliary spacer and a protective spacer, the orthographic projection of the spacer layer on the first substrate is covered by the orthographic projection of the black matrix layer on the first substrate, the protective spacer covers the via, and the orthographic projection of the color resist layer on the first substrate does not overlap with the orthographic projection of the protective spacer on the first substrate.

[0011] Optionally, an orthographic projection of the color resist layer on the first substrate has no overlap with an orthographic projection of the auxiliary spacer on the first substrate.

[0012] Optionally, an orthographic projection of the color resist layer on the first substrate has no overlap with an orthographic projection of the main spacer on the first substrate.

[0013] Optionally, the color resist layer includes a plurality of first color resist layers, a plurality of second color resist layers and a plurality of third color resist layers, the plurality of first color resist layers include a plurality of first color resist layer groups arranged along a first direction, the first color resist layer groups include a plurality of first sub-color resist layers arranged along a second direction, the black matrix layer includes a first black matrix layer extending along the first direction, the orthographic projection of the gap between adjacent first sub-color resist layers in the first color resist layer group on the first substrate is covered by the orthographic projection of the first black matrix layer on the first substrate, and the orthographic projection of the gap between adjacent first sub-color resist layers in the first color resist layer group on the first substrate covers the orthographic projections of the main spacer and the protective spacer on the first substrate.

[0014] Optionally, the multiple second color resist layers include multiple second color resist layer groups arranged along the first direction, the second color resist layer groups include multiple second sub-color resist layers arranged along the second direction, the orthographic projection of the gap between adjacent second sub-color resist layers in the second color resist layer group on the first substrate is covered by the orthographic projection of the first black matrix layer on the first substrate, and the orthographic projection of the gap between adjacent second sub-color resist layers in the second color resist layer group on the first substrate covers the orthographic projection of the auxiliary spacer on the first substrate.

[0015] Optionally, the multiple third color resist layers include multiple third color resist layer groups arranged along the first direction, the third color resist layer group includes multiple third sub-color resist layers arranged along the second direction, the orthographic projection of the gap between adjacent third sub-color resist layers in the third color resist layer group on the first substrate is covered by the orthographic projection of the first black matrix layer on the first substrate, and the orthographic projection of the gap between adjacent third sub-color resist layers in the third color resist layer group on the first substrate covers the orthographic projection of the auxiliary spacer on the first substrate.

[0016] Optionally, the first color resist layer is a blue color resist layer, the second color resist layer is one of a red color resist layer and a green color resist layer, and the third color resist layer is the other of a red color resist layer and a green color resist layer.

[0017] Optionally, the main spacer, the auxiliary spacer and the protective spacer are arranged in the same layer.

[0018] Optionally, the thickness of the main spacer is greater than that of the auxiliary spacer, and the auxiliary spacer has the same thickness as the protective spacer.

[0019] A second aspect of the present disclosure provides a liquid crystal display device, comprising the liquid crystal display panel provided by the first aspect of the present disclosure.

[0020] The beneficial effects of the present disclosure are as follows:

[0021] The technical solution of the present invention can effectively prevent the alignment liquid from accumulating at the edge of the hole and causing non-stickiness by arranging a protective spacer to cover the via hole; at the same time, by arranging that the orthographic projection of the spacer layer on the first substrate is covered by the orthographic projection of the black matrix layer on the first substrate, the orthographic projection of the color resist layer on the first substrate and the orthographic projection of the protective spacer on the first substrate do not overlap, which can effectively improve the ability of the liquid crystal display panel to withstand external pressure. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The specific implementation methods of the present disclosure are further described in detail below with reference to the accompanying drawings.

[0023] Figure 1 A schematic structural diagram of a liquid crystal display panel in the related art is shown.

[0024] Figure 2 A schematic diagram showing the structure of a color resist layer in a liquid crystal display panel in the related art is shown.

[0025] Figure 3 A schematic structural diagram of a liquid crystal display panel provided by an embodiment of the present invention is shown.

[0026] Figure 4 A schematic diagram showing the structure of a color resist layer in a liquid crystal display panel provided by an embodiment of the present invention is shown.

[0027] Figure 5 A schematic structural diagram of a liquid crystal display panel provided by another embodiment of the present invention is shown.

[0028] Figure 6 A schematic structural diagram of a color resist layer in a liquid crystal display panel provided by another embodiment of the present invention is shown.

[0029] Figure 7 A schematic structural diagram of a liquid crystal display panel provided by yet another embodiment of the present invention is shown.

[0030] Figure 8 A schematic structural diagram of a color resist layer in a liquid crystal display panel provided by yet another embodiment of the present invention is shown.

[0031] Fig. 9 A schematic structural diagram of a liquid crystal display panel provided by yet another embodiment of the present invention is shown.

[0032] Fig.10 A schematic structural diagram of a color resist layer in a liquid crystal display panel provided by yet another embodiment of the present invention is shown. DETAILED DESCRIPTION

[0033] The terms “on”, “formed on” and “disposed on” in the present disclosure may mean that one layer is directly formed or disposed on another layer, or may mean that one layer is indirectly formed or disposed on another layer, i.e., there are other layers between the two layers.

[0034] It should be noted that, although the terms "first", "second", etc. may be used herein to describe various parts, components, elements, regions, layers and / or parts, these parts, components, elements, regions, layers and / or parts should not be limited by these terms. Instead, these terms are used to distinguish one part, component, element, region, layer and / or part from another. Thus, for example, the first part, first member, first element, first region, first layer and / or first part discussed below may be referred to as the second part, second member, second element, second region, second layer and / or second part without departing from the teachings of the present disclosure.

[0035] In the present disclosure, unless otherwise specified, the term "same-layer arrangement" used refers to two layers, parts, components, elements or parts that can be formed by the same preparation process (such as a patterning process, etc.), and the two layers, parts, components, elements or parts are generally formed of the same material. For example, two or more functional layers are arranged in the same layer, which means that these functional layers arranged in the same layer can be formed using the same material layer and the same preparation process, thereby simplifying the preparation process of the display substrate.

[0036] In the present disclosure, unless otherwise specified, the expression "patterning process" generally includes steps such as photoresist coating, exposure, development, etching, photoresist stripping, etc. The expression "one-time patterning process" means a process of forming patterned layers, components, members, etc. using one mask.

[0037] In the related technologies of liquid crystal display panels, there is a problem that the liquid crystal display panels have a low ability to withstand external pressure. The reason for this phenomenon that the liquid crystal display panels have a low ability to withstand external pressure is unknown, and there is no good solution.

[0038] The inventors have observed that the possible reasons for the low ability of the liquid crystal display panel to withstand external pressure are as follows:

[0039] like Figure 1 to Figure 2As shown, in the related technology of the photo spacer (PS) process of the color film substrate of the thin film transistor liquid crystal display panel (TFT-LCD) being performed on the array substrate side (PS On Array, POA), in order to improve the problem of the alignment liquid not sticking at the via hole for connecting the pixel electrode 400 to the source and drain metal layer 401 in the planarization layer 40 on the array substrate side, a protective spacer 402 is used to cover the via hole to prevent the alignment liquid from accumulating at the edge of the hole and causing non-sticking; in addition, since the color resist layer on the color film substrate side in the related technology adopts a stripe color resist design, and the thickness of the blue color resist layer 403 is greater than the thickness of the red color resist layer 404 and the thickness of the green color resist layer 405, there is a step difference between the different color resist layers on the color film substrate side; and a main spacer (Main PS) 407, another part of the blue color resist layer 403 is covered with a protective spacer 402 when the main spacer 407 is not set, a sub-spacer (Sub PS) 408 is set in the overlapping area of ​​the red color resist layer 404 and the black matrix 406, and a sub-spacer 408 is set in the overlapping area of ​​the green color resist layer 405 and the black matrix 406.

[0040] In terms of manufacturing process, both the protection spacer 402 and the auxiliary spacer 408 are formed by using a half tone mask and theoretically have the same thickness. Under normal conditions, the main spacer 407 plays a supporting role in the liquid crystal display panel; when the liquid crystal display panel is subjected to a large external force, under ideal conditions, the auxiliary spacer 408 contacts the red color resist layer 404 and the green color resist layer 405 and also plays a role of reinforcing support; however, since the thickness of the blue color resist layer 403 is greater than the thickness of the red color resist layer 404 and the thickness of the green color resist layer 405, the protective spacer 402, which originally only plays a protective role but not a supporting role, contacts the blue color resist layer 403 and also plays a role of reinforcing support, thereby forming three sections of support in the liquid crystal display panel, wherein the three sections of support include a first section of support in which the main spacer 407 contacts a portion of the blue color resist layer 403, a second section of support in which the auxiliary spacer 408 contacts the red color resist layer 404 and the green color resist layer 405, and a third section of support in which the protective spacer 402 contacts another portion of the blue color resist layer 403. That is, when the liquid crystal display panel is subjected to a large external force, due to the step difference of the color resistance layer, when the protective spacer is aligned with the higher color resistance layer, it is higher than the auxiliary spacer aligned with the lower color resistance layer in the surrounding area, thus forming a three-stage step difference, which reduces the ability of the liquid crystal display panel to withstand surface pressure.

[0041] In view of this, an embodiment of the present invention provides a liquid crystal display panel, comprising a color filter substrate, an array substrate arranged in a box with the color filter substrate, and a liquid crystal layer located between the color filter substrate and the array substrate; the array substrate comprises a first substrate and a driving circuit layer, a planarization layer, an array-arranged pixel electrode and a spacer layer stacked in sequence on the first substrate; the color filter substrate comprises a second substrate and a black matrix layer and a color resist layer arranged on the second substrate; the driving circuit layer comprises an array-arranged thin film transistor; the planarization layer comprises a via hole for electrically connecting the pixel electrode to the first pole of the thin film transistor; the spacer layer comprises a main spacer, an auxiliary spacer and a protective spacer, the orthographic projection of the spacer layer on the first substrate is covered by the orthographic projection of the black matrix layer on the first substrate, the protective spacer covers the via hole, and the orthographic projection of the color resist layer on the first substrate does not overlap with the orthographic projection of the protective spacer on the first substrate.

[0042] In a specific example, Figure 3 As shown, the liquid crystal display panel includes a color filter substrate, an array substrate arranged in a box with the color filter substrate, and a liquid crystal layer 300 located between the color filter substrate and the array substrate, the liquid crystal layer 300 includes liquid crystal molecules, the array substrate and the color filter substrate are bonded together by a sealing glue, and the liquid crystal layer 300 is formed in a closed area surrounded by the sealing glue; the array substrate includes a first substrate 201 and a driving circuit layer, a planarization layer 208, an array-arranged pixel electrode 204 and a spacer layer stacked in sequence on the first substrate 201; the driving circuit layer includes a gate electrode 206, a gate insulation layer 207, a source and drain metal layer 2021 and a passivation layer 203; the color filter substrate includes a second substrate 101 and a black matrix layer 102 and a color resist layer arranged on the second substrate 101, and the second substrate 101 includes an array The black matrix layer 102 has a plurality of openings corresponding to the sub-pixel areas arranged in columns; the driving circuit layer includes thin film transistors arranged in an array, and the thin film transistor includes a source-drain metal layer 2021; the planarization layer 208 includes a via 2030 for electrically connecting the pixel electrode 204 to the first electrode in the source-drain metal layer 2021 of the thin film transistor; the spacer layer includes a main spacer 2051, an auxiliary spacer 2052 and a protective spacer 2053; the orthographic projection of the spacer layer on the first substrate 201 is covered by the orthographic projection of the black matrix layer 102 on the first substrate 201; the protective spacer 2053 covers the via 2030; the orthographic projection of the color resist layer on the first substrate 201 has no overlap with the orthographic projection of the protective spacer 2053 on the first substrate 201.

[0043] Further, such as Figure 3As shown, the color filter substrate also includes a common electrode layer arranged on the second substrate 101, or the array substrate also includes a common electrode layer arranged on the first substrate 201; the liquid crystal molecules of the liquid crystal layer 300 are twisted under the action of the driving electric field formed between the pixel electrode 204 and the common electrode to control the polarization direction of the incident light, and the transmittance of the incident light is controlled with the cooperation of two polarizers respectively arranged on the light incident side and the light output side of the liquid crystal display panel, and color display is achieved in combination with the color resistance layer.

[0044] Further, such as Figure 3 As shown, the array substrate may also be referred to as an array substrate or a TFT substrate. The array substrate includes a first substrate 201, and a plurality of scan lines (or gate lines, Gate lines) extending along a first direction (e.g., a row direction) and a plurality of data lines (Data lines) extending along a second direction (e.g., a column direction) are formed on the first substrate 201. The plurality of scan lines and the plurality of data lines cross to define sub-pixel areas arranged in an array. It can be understood that the sub-pixel areas on the array substrate correspond one-to-one with the sub-pixel areas on the color filter substrate. The one-to-one correspondence can be understood as the orthographic projection of the sub-pixel area on the array substrate on the first substrate 201 coincides with the orthographic projection of the sub-pixel area on the color filter substrate on the second substrate 101. A pixel electrode 204 and a thin film transistor (TFT) are provided in each sub-pixel area of ​​the array substrate, wherein the gate electrode 206 of the thin film transistor is connected to the scan line, and the first electrode (e.g., the drain electrode) is connected to the pixel electrode 204 belonging to the same sub-pixel area, for example Figure 3 The source-drain metal layer 2021 shown in the figure realizes the first electrode of the thin film transistor, and the second electrode (such as the source electrode) is connected to the data line; the pixel electrode 204 and the common electrode are respectively indium tin oxide (ITO) electrodes or indium zinc oxide (IZO) electrodes.

[0045] Further, such as Figure 3 As shown, the liquid crystal display panel is formed by the array substrate and the color film substrate being matched, the liquid crystal layer is filled in the middle, and the box body is supported by spacers, and the spacers may include a main spacer 2051 and an auxiliary spacer 2052. The auxiliary spacer 2052 is a spare spacer, which plays a role in strengthening the support strength when the liquid crystal display panel is subjected to strong extrusion. The thickness of the main spacer 2051 is greater than the thickness of the auxiliary spacer 2052. For example, the thickness of the auxiliary spacer 2052 may be 70% to 95% of the thickness of the main spacer 2051. When the array substrate and the color film substrate are normally matched, the main spacer plays a supporting role. When the display panel is subjected to a large external extrusion, the auxiliary spacer 2052 may also play a supporting role to improve the pressure resistance, and when the extrusion is eliminated, the main spacer 2051 and the auxiliary spacer 2052 may provide a restoring force. In this embodiment, by providing main spacers and auxiliary spacers of different thicknesses, the supporting capacity of the spacers can be improved and the occurrence of various Mura or defects can be prevented.

[0046] Further, such as Figure 3 As shown, the spacer layer in the array substrate includes a protective spacer 2053, and the protective spacer 2053 covers the via 2030. In this embodiment, the protective spacer is used to cover the via to prevent the alignment liquid from accumulating at the edge of the via and causing non-sticking, which effectively improves the problem of non-sticking of the alignment liquid at the via when the spacer process of the color film substrate of the thin film transistor liquid crystal display panel is performed on the array substrate side.

[0047] Further, such as Figure 3 As shown, the thickness of the protective spacer 2053 in the array substrate can be equal to the thickness of the auxiliary spacer 2052. In order to maintain the thickness of the liquid crystal box, ensure the liquid crystal margin (LCMargin), improve the non-sticking of the alignment liquid at the via hole and simplify the process flow, the thin film transistor liquid crystal display panel uses a gray tone mask plate or a half tone mask plate to make the main spacer, the auxiliary spacer and the protective spacer. This embodiment can effectively reduce the number of composition processes (Mask) and effectively reduce the production cost.

[0048] In a specific example, Figure 3 to Figure 4 As shown, the color resist layer includes a plurality of first color resist layers, a plurality of second color resist layers 2032 and a plurality of third color resist layers 2033. A portion of the plurality of first color resist layers corresponding to the first color resist layers of the protective spacer 2053 is configured as a plurality of first color resist layer groups 2031 arranged along the first direction X. The first color resist layer group 2031 adopts an island color resist design, that is, the first color resist layer group 2031 includes a plurality of first sub-color resist layers 20311 arranged along the second direction Y; the second color resist layer group 2032 and the third color resist layer group 2033 both adopt a strip color resist design; another portion of the plurality of first color resist layers corresponding to the first color resist layers of the main spacer 2051 is a first color resist layer 2034 adopting a strip color resist design; and the black matrix layer includes a first black matrix layer 1021 extending along the first direction X.

[0049] Further, such as Figure 3 to Figure 4 As shown, the first color resist layer group 2031 adopts an island color resist design, and the orthographic projection of the gap 20312 between adjacent first sub-color resist layers 20311 in the first color resist layer group 2031 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201; the orthographic projection of the gap 20312 between adjacent first sub-color resist layers 2031 in the first color resist layer group 2031 on the first substrate 201 covers the orthographic projection of the protective spacer 2053 on the first substrate 201.

[0050] Further, such as Figure 3 to Figure 4As shown, the orthographic projection of the first color resist layer group 2031 on the first substrate 201 does not overlap with the orthographic projection of the first black matrix layer 1021 on the first substrate 201, and the orthographic projection of the protective spacer 2053 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201; furthermore, the orthographic projection of the first color resist layer 2031 on the first substrate 201 does not overlap with the orthographic projection of the protective spacer 2053 on the first substrate 201.

[0051] In another specific example, Figures 5 and 6 As shown, the color film substrate includes a second substrate and a black matrix layer and a color resist layer arranged on the second substrate, the color resist layer includes a plurality of first color resist layers, a plurality of second color resist layers and a plurality of third color resist layers, the plurality of first color resist layers include a plurality of first color resist layer groups 1031 arranged along a first direction X, the plurality of second color resist layers include a plurality of second color resist layer groups 1032 arranged along the first direction X, and the plurality of third color resist layers include a plurality of third color resist layer groups 1033 arranged along the first direction X; the black matrix layer includes a first black matrix layer 1021 extending along the first direction X.

[0052] Further, such as Figures 5 and 6 As shown, the first color resist layer group 1031, the second color resist layer group 1032 and the third color resist layer group 1033 all adopt an island color resist design, that is, the orthographic projection of the first color resist layer group 1031 on the first substrate 201 does not overlap with the orthographic projection of the first black matrix layer 1021 on the first substrate 201, the orthographic projection of the second color resist layer group 1032 on the first substrate 201 does not overlap with the orthographic projection of the first black matrix layer 1021 on the first substrate 201, and the orthographic projection of the third color resist layer group 1033 on the first substrate 201 does not overlap with the orthographic projection of the first black matrix layer 1021 on the first substrate 201; Furthermore, the orthographic projection of the main spacer 2051 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, the orthographic projection of the auxiliary spacer 2052 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, and the orthographic projection of the protective spacer 2053 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201; furthermore, the orthographic projection of the first color resist layer 1031 on the first substrate 201 has no overlap with the orthographic projection of the protective spacer 2053 on the first substrate 201.

[0053] In another specific example, Figures 7 and 8As shown, the color resist layer includes a plurality of first color resist layers arranged along the first direction X, a plurality of second color resist layers 2132 arranged along the first direction X, and a plurality of third color resist layers 2133 arranged along the first direction X. A portion of the first color resist layer 2131 adopts a color resist design in which a hollowed-out area 21310 is formed in an aligned area with the protective spacer 2053. The second color resist layer group 2132 and the third color resist layer group 2133 both adopt a strip color resist design. Another portion of the first color resist layer 2134 adopts a strip color resist design. The black matrix layer includes a first black matrix layer 1021 extending along the first direction X.

[0054] Further, such as Figures 7 and 8 As shown, the orthographic projection of the hollowed-out area 21310 in a portion of the first color resist layer 2131 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, and the orthographic projection of the hollowed-out area 21310 in a portion of the first color resist layer 2131 on the first substrate 201 covers the orthographic projection of the protective spacer 2053 on the first substrate.

[0055] Further, such as Figures 7 and 8 As shown, the orthographic projection of the hollowed-out area 21310 of a portion of the first color resist layer 2131 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, and thus the orthographic projection of the protective spacer 2053 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201; thus, the orthographic projection of the first color resist layer 2131 on the first substrate 201 has no overlap with the orthographic projection of the protective spacer 2053 on the first substrate 201.

[0056] In another specific example, Figures 9 and 10 As shown, the color filter substrate includes a second substrate 101 and a black matrix layer 102 and a color resist layer arranged on the second substrate 101. The color resist layer includes a plurality of first color resist layers 1131, a plurality of second color resist layers 1132 and a plurality of third color resist layers 1133. The first color resist layer 1131, the second color resist layer 1132 and the third color resist layer 1133 do not adopt an island color resist design, but adopt a color resist design with a hollowed-out area in the alignment area with the main spacer 2051, the auxiliary spacer 2052 and the protective spacer 2053. The color-resistance design is as follows: for example, a portion of the first color-resistance layer 1131 includes a hollowed-out area 11310 corresponding to the alignment area of ​​the protective spacer 2053, the second color-resistance layer 1132 includes a hollowed-out area 11320 corresponding to the alignment area of ​​the auxiliary spacer 2052, the third color-resistance layer 1133 includes a hollowed-out area 11330 corresponding to the alignment area of ​​the auxiliary spacer 2052, and another portion of the first color-resistance layer 1131 includes a hollowed-out area 11340 corresponding to the alignment area of ​​the main spacer 2051.

[0057] Further, such as Figures 9 and 10As shown, the color resist layer includes a plurality of first color resist layers 1131 arranged along a first direction X, a plurality of second color resist layers 1132 arranged along the first direction X, and a plurality of third color resist layers 1133 arranged along the first direction X, and the black matrix layer includes a first black matrix layer 1021 extending along the first direction X.

[0058] Further, such as Figures 9 and 10 As shown, the orthographic projection of the hollowed-out area 11310 in a portion of the first color resist layer 1131 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, and the orthographic projection of the hollowed-out area 11310 in a portion of the first color resist layer 1131 on the first substrate 201 covers the orthographic projection of the protective spacer 2053 on the first substrate; the orthographic projection of the hollowed-out area 11340 in another portion of the first color resist layer 1131 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, and the orthographic projection of the hollowed-out area 11340 in another portion of the first color resist layer 1131 on the first substrate 201 covers the orthographic projection of the main spacer 2051 on the first substrate 201.

[0059] Further, such as Figures 9 and 10 As shown, the orthographic projection of the hollowed-out area 11320 in the second color resist layer 1132 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, and the orthographic projection of the hollowed-out area 11320 in the second color resist layer 1132 on the first substrate 201 covers the orthographic projection of the auxiliary spacer 2052 on the first substrate 201.

[0060] Further, such as Figures 9 and 10 As shown, the orthographic projection of the hollowed-out area 11330 in the third color filter layer 1133 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, and the orthographic projection of the hollowed-out area 11330 in the third color filter layer 1133 on the first substrate 201 covers the orthographic projection of the auxiliary spacer 2052 on the first substrate 201.

[0061] Further, such as Figures 9 and 10As shown, the orthographic projection of a hollowed-out area 11310 of a portion of the first color-resistance layer 1131 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, the orthographic projection of a hollowed-out area 11320 of the second color-resistance layer 1132 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, the orthographic projection of a hollowed-out area 11330 of the third color-resistance layer 1133 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, and the orthographic projection of a hollowed-out area 11340 of another portion of the first color-resistance layer 1131 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201. The orthographic projection of the black matrix layer 1021 on the first substrate 201 is covered; furthermore, the orthographic projection of the main spacer 2051 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, the orthographic projection of the auxiliary spacer 2052 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, and the orthographic projection of the protective spacer 2053 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201; furthermore, the orthographic projection of the first color resist layer 1131 on the first substrate 201 has no overlap with the orthographic projection of the protective spacer 2053 on the first substrate 201.

[0062] In this embodiment, the color resist layer is not designed in an island shape, but the alignment area of ​​the protective spacer covering the via hole in the color resist layer is hollowed out so that the protective spacer has no top-to-top area, thereby reducing the top-to-top risk.

[0063] It should be noted that the first color resist layer, the second color resist layer and the third color resist layer may also adopt a color resist design in which the areas aligned with the protective spacers are designed with waistlines to form hollow areas.

[0064] It should be noted that this embodiment has restrictions on the position of the protective spacers on the array substrate side, and the design scheme needs to be determined based on the position of the through hole.

[0065] It should be noted that when the second color resist layer adopts an island design, the third color resist layer can also adopt a color resist design in which the area aligned with the auxiliary spacer is used as a hollow area; or when the second color resist layer adopts a color resist design in which the area aligned with the auxiliary spacer is used as a hollow area, the third color resist layer can also adopt an island design.

[0066] In this embodiment, a protective spacer is provided to cover the via hole to prevent the alignment liquid from accumulating at the edge of the hole and causing non-stickiness; at the same time, the orthographic projection of the spacer layer on the first substrate is covered by the orthographic projection of the black matrix layer on the first substrate, and the orthographic projection of the color resist layer on the first substrate does not overlap with the orthographic projection of the protective spacer on the first substrate, thereby improving the ability of the liquid crystal display panel to withstand external pressure.

[0067] In a possible implementation manner, an orthographic projection of the color resist layer on the first substrate does not overlap with an orthographic projection of the auxiliary spacer on the first substrate.

[0068] In a specific example, Figures 5 and 6 As shown, the color resist layer includes a plurality of first color resist layers, a plurality of second color resist layers and a plurality of third color resist layers, the plurality of first color resist layers include a plurality of first color resist layer groups 1031 arranged along a first direction X, the plurality of second color resist layers include a plurality of second color resist layer groups 1032 arranged along the first direction X, and the plurality of third color resist layers include a plurality of third color resist layer groups 1033 arranged along the first direction X.

[0069] Further, such as Figures 5 and 6 As shown, the orthographic projection of the second color-resist layer group 1032 on the first substrate 201 does not overlap with the orthographic projection of the auxiliary spacer 2052 on the first substrate 201 .

[0070] Further, such as Figures 5 and 6 As shown, the orthographic projection of the third color-resist layer group 1033 on the first substrate 201 does not overlap with the orthographic projection of the auxiliary spacer 2052 on the first substrate 201 .

[0071] In another specific example, Figures 9 and 10 As shown, the color resist layer includes a plurality of first color resist layers 1131 arranged along the first direction X, a plurality of second color resist layers 1132 arranged along the first direction X, and a plurality of third color resist layers 1133 arranged along the first direction X.

[0072] Further, such as Figures 9 and 10 As shown, the orthographic projection of the second color resist layer 1132 on the first substrate 201 does not overlap with the orthographic projection of the auxiliary spacer 2052 on the first substrate 201 .

[0073] Further, such as Figures 9 and 10 As shown, the orthographic projection of the third color resist layer 1133 on the first substrate 201 does not overlap with the orthographic projection of the auxiliary spacer 2052 on the first substrate 201 .

[0074] In this embodiment, the orthographic projection of the color-resist layer on the first substrate and the orthographic projection of the auxiliary spacer on the first substrate are arranged to have no overlap, thereby eliminating the influence of the color-resist layer on the supporting function of the auxiliary spacer.

[0075] In a possible implementation manner, an orthographic projection of the color resist layer on the first substrate does not overlap with an orthographic projection of the main spacer on the first substrate.

[0076] In a specific example, Figures 5 and 6As shown, the color resist layer includes a plurality of first color resist layers, a plurality of second color resist layers and a plurality of third color resist layers, the plurality of first color resist layers include a plurality of first color resist layer groups 1031 arranged along a first direction X, the plurality of second color resist layers include a plurality of second color resist layer groups 1032 arranged along the first direction X, and the plurality of third color resist layers include a plurality of third color resist layer groups 1033 arranged along the first direction X.

[0077] Further, such as Figures 5 and 6 As shown, the orthographic projection of a portion of the first color resist layer group 1031 on the first substrate 201 does not overlap with the orthographic projection of the main spacer 2051 on the first substrate 201 .

[0078] In another specific example, Figures 9 and 10 As shown, the color resist layer includes a plurality of first color resist layers 1131 arranged along the first direction X, a plurality of second color resist layers 1132 arranged along the first direction X, and a plurality of third color resist layers 1133 arranged along the first direction X.

[0079] Further, such as Figures 9 and 10 As shown, the orthographic projection of a portion of the first color resist layer 1131 on the first substrate 201 does not overlap with the orthographic projection of the main spacer 2051 on the first substrate 201 .

[0080] In this embodiment, the orthographic projection of the color-resist layer on the first substrate and the orthographic projection of the main spacer on the first substrate are arranged to have no overlap, thereby eliminating the influence of the color-resist layer on the supporting function of the main spacer.

[0081] In a possible implementation, the color resist layer includes a plurality of first color resist layers, a plurality of second color resist layers, and a plurality of third color resist layers, the plurality of first color resist layers include a plurality of first color resist layer groups arranged along a first direction, the first color resist layer group includes a plurality of first sub-color resist layers arranged along a second direction, the black matrix layer includes a first black matrix layer extending along the first direction, an orthographic projection of a gap between adjacent first sub-color resist layers in the first color resist layer group on the first substrate is covered by an orthographic projection of the first black matrix layer on the first substrate, and an orthographic projection of a gap between adjacent first sub-color resist layers in the first color resist layer group on the first substrate covers an orthographic projection of the main spacer and the protective spacer on the first substrate.

[0082] In a specific example, Figures 5 and 6 As shown, the color resist layer includes a plurality of first color resist layers, a plurality of second color resist layers and a plurality of third color resist layers; the plurality of first color resist layers include a plurality of first color resist layer groups 1031 arranged along a first direction X, and the first color resist layer groups 1031 include a plurality of first sub-color resist layers 10311 arranged along a second direction Y; the black matrix layer 102 includes a first black matrix layer 1021 extending along the first direction X.

[0083] Further, such as Figures 5 and 6 As shown, the orthographic projection of the gap 10312 between adjacent first sub-color resist layers 10311 in a portion of the first color resist layer group 1031 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201; the orthographic projection of the gap 10312 between adjacent first sub-color resist layers 1031 in a portion of the first color resist layer group 1031 on the first substrate 201 covers the orthographic projection of the protective spacer 2053 on the first substrate 201.

[0084] Further, such as Figures 5 and 6 As shown, the orthographic projection of the gap 10312 between adjacent first sub-color resist layers 10311 in another part of the first color resist layer group 1031 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201; the orthographic projection of the gap 10312 between adjacent first sub-color resist layers 1031 in another part of the first color resist layer group 1031 on the first substrate 201 covers the orthographic projection of the main spacer 2051 on the first substrate 201.

[0085] In this embodiment, the first color resist layer on the color filter substrate side adopts an island design, thereby eliminating the step difference of the color resist layer at the position of the protective spacer in the process of performing the color filter substrate spacer process on the array substrate side. This reduces the risk of increased surface pressure caused by multiple step differences due to the unexpected top contact of the protective spacer on the array substrate side caused by the step difference of the color resist layer, thereby improving the design margin of the protective spacer on the array substrate side.

[0086] In a possible implementation, the multiple second color resist layers include multiple second color resist layer groups arranged along the first direction, the second color resist layer groups include multiple second sub-color resist layers arranged along the second direction, the orthographic projection of the gap between adjacent second sub-color resist layers in the second color resist layer group on the first substrate is covered by the orthographic projection of the first black matrix layer on the first substrate, and the orthographic projection of the gap between adjacent second sub-color resist layers in the second color resist layer group on the first substrate covers the orthographic projection of the auxiliary spacer on the first substrate.

[0087] In a specific example, Figures 5 and 6As shown, the multiple second color resist layers include multiple second color resist layer groups 1032 arranged along the first direction X, the second color resist layer group 1032 includes multiple second sub-color resist layers 10321 arranged along the second direction Y, the orthographic projection of the gap 10322 between adjacent second sub-color resist layers 10321 in the second color resist layer group 1032 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, and the orthographic projection of the gap 10322 between adjacent second sub-color resist layers 10321 in the second color resist layer group 1032 on the first substrate 201 covers the orthographic projection of the auxiliary spacer 2052 on the first substrate 201.

[0088] In this embodiment, by adopting an island design for the second color resist layer, the design margin of the auxiliary spacer can be increased.

[0089] In a possible implementation, the multiple third color resist layers include multiple third color resist layer groups arranged along the first direction, the third color resist layer group includes multiple third sub-color resist layers arranged along the second direction, the orthographic projection of the gap between adjacent third sub-color resist layers in the third color resist layer group on the first substrate is covered by the orthographic projection of the first black matrix layer on the first substrate, and the orthographic projection of the gap between adjacent third sub-color resist layers in the third color resist layer group on the first substrate covers the orthographic projection of the auxiliary spacer on the first substrate.

[0090] In a specific example, Figures 5 and 6 As shown, the multiple third color resist layers include multiple third color resist layer groups 1033 arranged along the first direction X, the third color resist layer group 1033 includes multiple third sub-color resist layers 10331 arranged along the second direction Y, the orthographic projection of the gap 10332 between adjacent third sub-color resist layers 10331 in the third color resist layer group 1033 on the first substrate 201 is covered by the orthographic projection of the first black matrix layer 1021 on the first substrate 201, and the orthographic projection of the gap 10332 between adjacent third sub-color resist layers 10331 in the third color resist layer group 1033 on the first substrate 201 covers the orthographic projection of the auxiliary spacer 2052 on the first substrate 201.

[0091] In this embodiment, the third color resist layer is designed in an island shape, so that the design margin of the auxiliary spacer can be increased; at the same time, since the first color resist layer, the second color resist layer and the third color resist layer are all designed in an island shape, the process flow can be saved.

[0092] In a possible implementation, the first color resist layer is a blue color resist layer, the second color resist layer is one of a red color resist layer and a green color resist layer, and the third color resist layer is the other of the red color resist layer and the green color resist layer.

[0093] In a specific example, Figure 3 to Figure 4As shown, the plurality of first color resist layers include a plurality of first color resist layer groups 2031 and a first color resist layer group 2034 arranged along a first direction X, and the first color resist layer groups 2031 and 2034 are blue color resist layers.

[0094] Further, such as Figure 3 to Figure 4 As shown, the plurality of second color resist layers include a plurality of second color resist layer groups 2032 arranged along the first direction X, and the second color resist layer group 2032 is one of a red color resist layer and a green color resist layer.

[0095] Further, such as Figure 3 to Figure 4 As shown, the plurality of third color resist layers include a plurality of third color resist layer groups 2033 arranged along the first direction X, and the third color resist layer group 2033 is the other of the red color resist layer and the green color resist layer.

[0096] In another specific example, Figures 5 and 6 As shown, the plurality of first color resist layers include a plurality of first color resist layer groups 1031 arranged along a first direction X, and the first color resist layer groups 1031 are blue color resist layers.

[0097] Further, such as Figures 5 and 6 As shown, the plurality of second color resist layers include a plurality of second color resist layer groups 1032 arranged along the first direction X, and the second color resist layer group 1032 is one of a red color resist layer and a green color resist layer.

[0098] Further, such as Figures 5 and 6 As shown, the plurality of third color resist layers include a plurality of third color resist layer groups 1033 arranged along the first direction X, and the third color resist layer group 1033 is the other of the red color resist layer and the green color resist layer.

[0099] In another specific example, Figures 7 and 8 As shown, the color resist layer includes a plurality of first color resist layers 2131 and a first color resist layer 2134 arranged along a first direction X, and the first color resist layers 2131 and the first color resist layer 2134 are blue color resist layers.

[0100] Further, such as Figures 7 and 8 As shown, the color resist layer includes a plurality of second color resist layers 2132 arranged along the first direction X, and the second color resist layer 2132 is one of a red color resist layer and a green color resist layer.

[0101] Further, such as Figures 7 and 8 As shown, the color resist layer includes a plurality of third color resist layers 2133 arranged along the first direction X, and the third color resist layer 2133 is the other of the red color resist layer and the green color resist layer.

[0102] In another specific example, Figures 9 and 10As shown, the color resist layer includes a plurality of first color resist layers 1131 arranged along a first direction X, and the first color resist layer 1131 is a blue color resist layer.

[0103] Further, such as Figures 9 and 10 As shown, the color resist layer includes a plurality of second color resist layers 1132 arranged along the first direction X, and the second color resist layer 1132 is one of a red color resist layer and a green color resist layer.

[0104] Further, such as Figures 9 and 10 As shown, the color resist layer includes a plurality of third color resist layers 1133 arranged along the first direction X, and the third color resist layer 1133 is the other of the red color resist layer and the green color resist layer.

[0105] In this embodiment, by setting the first color resist layer to be a blue color resist layer, it is possible to effectively avoid the formation of three-stage step difference due to the step difference of the color resist layer caused by the protective spacer when the liquid crystal display panel is subjected to external pressure; by setting the second color resist layer to be one of the red color resist layer and the green color resist layer, and the third color resist layer to be the other of the red color resist layer and the green color resist layer, it is possible to effectively improve the flexibility and applicability of the color resist layer design.

[0106] In a possible implementation, the main spacer, the auxiliary spacer and the protective spacer are arranged in the same layer.

[0107] In a specific example, Figures 3 to 10 As shown, the main spacer 2051, the auxiliary spacer 2052 and the protective spacer 2053 are arranged in the same layer.

[0108] This embodiment uses a half-tone mask to form main spacers, auxiliary spacers and protective spacers on the array substrate in one photolithography process, which can effectively reduce production costs and improve production efficiency.

[0109] In a possible implementation manner, the thickness of the main spacer is greater than the thickness of the auxiliary spacer, and the auxiliary spacer has the same thickness as the protective spacer.

[0110] In a specific example, Figures 3 to 10 As shown, the thickness of the main spacer 2051 is greater than the thickness of the auxiliary spacer 2052 , and the auxiliary spacer 2052 and the protective spacer 2053 have the same thickness.

[0111] Further, such as Figures 3 to 10As shown, in order to form the main spacers 2051, the auxiliary spacers 2052 and the protective spacers 2053 of different thicknesses, a half-tone mask is generally used to form the main spacers 2051, the auxiliary spacers 2052 and the protective spacers 2053 on the array substrate. The half-tone mask includes two regions with different light transmittances. In the process of forming the main spacers 2051, the auxiliary spacers 2052 and the protective spacers 2053, the half-tone mask is used to expose the film layer to be exposed on the array substrate, and then the developing process is used to process the main spacers 2051, the auxiliary spacers 2052 and the protective spacers 2053. Protective spacer 2053; wherein, the transmittance of the main spacer 2051 in the corresponding area on the halftone mask is different from the transmittance of the auxiliary spacer 2052 and the protective spacer 2053 in the corresponding area on the halftone mask, while the transmittance of the auxiliary spacer 2052 in the corresponding area on the halftone mask is the same as the transmittance of the protective spacer 2053 in the corresponding area on the halftone mask, thereby making the main spacer 2051 thicker than the auxiliary spacer 2052, the main spacer 2051 thicker than the protective spacer 2053, and the auxiliary spacer 2052 thicker than the protective spacer 2053.

[0112] Further, such as Figures 3 to 10 As shown, from the perspective of the preparation process, the protective spacer 2053 and the auxiliary spacer 2052 theoretically have the same thickness, but since the semi-permeable membrane opening of the protective spacer 2053 is smaller than that of the auxiliary spacer 2052, the exposure of the protective spacer 2053 is greatly affected by the light angle, etc., and therefore, in practice the thickness of the protective spacer 2053 is slightly smaller than that of the auxiliary spacer 2052.

[0113] It should be noted that the same thickness here is ideal. Considering the process reasons, the thickness of the protective spacer is slightly lower than that of the auxiliary spacer. The specific same thickness means that it is equal under the condition of process fluctuation, that is, the thickness error is less than 5% or 8%.

[0114] In this embodiment, by setting the thickness of the main spacer to be greater than the thickness of the auxiliary spacer, and the auxiliary spacer has the same thickness as the spacer, the process flow can be saved and simplified.

[0115] Another embodiment of the present invention provides a liquid crystal display device, including the liquid crystal display panel according to one embodiment of the present invention.

[0116] In a specific example, the liquid crystal display panel also includes a backlight module.

[0117] The display device provided in this embodiment can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, etc., and this embodiment does not limit this.

[0118] Obviously, the above embodiments of the present disclosure are merely examples for clearly illustrating the present disclosure, and are not limitations on the implementation methods of the present disclosure. For ordinary technicians in this field, other different forms of changes or modifications can be made on the basis of the above description. It is impossible to list all the implementation methods here. All obvious changes or modifications derived from the technical solution of the present disclosure are still within the protection scope of the present disclosure.

Claims

1. A liquid crystal display panel, characterized in that: It comprises a color filter substrate, an array substrate arranged in a box with the color filter substrate, and a liquid crystal layer located between the color filter substrate and the array substrate; The array substrate comprises a first substrate and a driving circuit layer, a planarization layer, an array-arranged pixel electrode and a spacer layer sequentially stacked on the first substrate; The color filter substrate comprises a second substrate and a black matrix layer and a color resist layer arranged on the second substrate; The driving circuit layer includes thin film transistors arranged in an array; The planarization layer includes a via hole for electrically connecting the pixel electrode to the first electrode of the thin film transistor; The spacer layer includes a main spacer, an auxiliary spacer and a protective spacer, the orthographic projection of the spacer layer on the first substrate is covered by the orthographic projection of the black matrix layer on the first substrate, the protective spacer covers the via, and the orthographic projection of the color resist layer on the first substrate does not overlap with the orthographic projection of the protective spacer on the first substrate.

2. The liquid crystal display panel according to claim 1, characterized in that: The orthographic projection of the color resist layer on the first substrate does not overlap with the orthographic projection of the auxiliary spacer on the first substrate.

3. The liquid crystal display panel according to claim 2, characterized in that: The orthographic projection of the color resist layer on the first substrate does not overlap with the orthographic projection of the main spacer on the first substrate.

4. The liquid crystal display panel according to any one of claims 1 to 3, characterized in that: The color resist layer includes a plurality of first color resist layers, a plurality of second color resist layers and a plurality of third color resist layers, the plurality of first color resist layers include a plurality of first color resist layer groups arranged along a first direction, the first color resist layer groups include a plurality of first sub-color resist layers arranged along a second direction, the black matrix layer includes a first black matrix layer extending along the first direction, the orthographic projection of the gap between adjacent first sub-color resist layers in the first color resist layer group on the first substrate is covered by the orthographic projection of the first black matrix layer on the first substrate, and the orthographic projection of the gap between adjacent first sub-color resist layers in the first color resist layer group on the first substrate covers the orthographic projection of the main spacer and the protective spacer on the first substrate.

5. The liquid crystal display panel according to claim 4, characterized in that: The multiple second color resist layers include multiple second color resist layer groups arranged along the first direction, the second color resist layer groups include multiple second sub-color resist layers arranged along the second direction, the orthographic projection of the gap between adjacent second sub-color resist layers in the second color resist layer group on the first substrate is covered by the orthographic projection of the first black matrix layer on the first substrate, and the orthographic projection of the gap between adjacent second sub-color resist layers in the second color resist layer group on the first substrate covers the orthographic projection of the auxiliary spacer on the first substrate.

6. The liquid crystal display panel according to claim 4, characterized in that: The multiple third color resist layers include multiple third color resist layer groups arranged along the first direction, the third color resist layer group includes multiple third sub-color resist layers arranged along the second direction, the orthographic projection of the gap between adjacent third sub-color resist layers in the third color resist layer group on the first substrate is covered by the orthographic projection of the first black matrix layer on the first substrate, and the orthographic projection of the gap between adjacent third sub-color resist layers in the third color resist layer group on the first substrate covers the orthographic projection of the auxiliary spacer on the first substrate.

7. The liquid crystal display panel according to claim 4, characterized in that: The first color resist layer is a blue color resist layer, the second color resist layer is one of a red color resist layer and a green color resist layer, and the third color resist layer is the other of a red color resist layer and a green color resist layer.

8. The liquid crystal display panel according to claim 4, characterized in that: The main spacer, the auxiliary spacer and the protective spacer are arranged in the same layer.

9. The liquid crystal display panel according to claim 8, characterized in that: The thickness of the main spacer is greater than that of the auxiliary spacer, and the auxiliary spacer has the same thickness as that of the protective spacer.

10. A liquid crystal display device, characterized in that: Comprising a liquid crystal display panel as described in any one of claims 1-9.

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