Transient enhancement circuit, linear voltage regulator and transient enhancement method

Abstract

The invention discloses a transient enhancement circuit, a linear voltage regulator and a transient enhancement method. The transient enhancement circuit comprises a comparison circuit, a delay circuit and a compensation circuit. The comparison circuit is used for receiving the output current of the to-be-regulated circuit, comparing the output current with the reference current to generate a first control signal, and generating a control voltage representing the magnitude of the output current based on the output current of the to-be-regulated circuit; the delay circuit is used for delaying the first control signal to generate a second control signal; and the compensation circuit is used for adjusting a resistance value and / or a capacitance value of the compensation circuit based on the control voltage and the second control signal so as to provide a zero point for the to-be-adjusted circuit loop. According to the transient enhancement circuit, the linear voltage regulator and the transient enhancement method, it can be judged that the system enters the load jump stage by detecting the current change on the power tube, and the loop bandwidth is increased through the transient enhancement circuit in the stage so as to optimize the transient response characteristic.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and in particular relates to a transient enhancement circuit, a linear voltage regulator and a transient enhancement method. Background Art

[0002] Linear regulators have become an important part of portable electronic products due to their many advantages such as low noise and small size. As they are increasingly used in highly integrated system designs, the transient response of the entire circuit becomes more important, especially in ultra-low power application circuits, where higher and higher requirements are placed on transient response speed.

[0003] The information disclosed in this background technology section is only intended to enhance the understanding of the overall background of the invention and should not be regarded as an acknowledgment or any form of suggestion that the information constitutes the prior art already known to a person skilled in the art. Summary of the invention

[0004] The object of the present invention is to provide a transient enhancement circuit, a linear voltage regulator and a transient enhancement method, which can optimize and improve the loop bandwidth, accelerate the node establishment speed and improve the output transient response during the load jump stage.

[0005] In order to achieve the above objective, a specific embodiment of the present invention provides a transient enhancement circuit for a circuit to be adjusted. The transient enhancement circuit includes: a comparison circuit, a delay circuit and a compensation circuit.

[0006] The comparison circuit is used to receive the output current of the circuit to be adjusted, and compare the output current with the reference current to generate a first control signal, and at the same time generate a control voltage representing the output current size based on the output current of the circuit to be adjusted; the delay circuit is used to delay the first control signal to generate a second control signal; the compensation circuit is used to adjust its own resistance value and / or capacitance value based on the control voltage and the second control signal to provide a zero point for the loop of the circuit to be adjusted.

[0007] In one or more embodiments of the present invention, the compensation circuit includes an adjustment unit, the adjustment unit includes a first transistor and an adjustment module, the first transistor and the adjustment module are connected in series, the first transistor controls its own opening degree based on a control voltage to cooperate with the adjustment module to adjust the resistance value and / or capacitance value of the compensation circuit itself, and the adjustment module controls its own opening or closing based on a second control signal to adjust its own resistance value and / or capacitance value.

[0008] In one or more embodiments of the present invention, the first transistor is turned on based on the control of the control voltage when the output current of the circuit to be regulated changes transiently, and the regulation module increases the resistance value and / or capacitance value of the compensation circuit based on its own resistance value and / or capacitance value and the degree of opening of the first transistor under the control of the invalid second control signal generated when the output current of the circuit to be regulated changes transiently; the regulation module is turned on under the control of the effective second control signal generated after delay to reduce the resistance value and / or capacitance value of the compensation circuit by reducing its own resistance value and / or capacitance value.

[0009] In one or more embodiments of the present invention, the regulating module includes a resistance unit and a second transistor, the resistance unit and the first transistor are connected in series, the second transistor and the resistance unit are connected in parallel, and the control end of the second transistor is used to receive a second control signal.

[0010] In one or more embodiments of the present invention, the compensation circuit also includes a first capacitor and a first resistor, the first capacitor and the first resistor are connected in series between the circuit to be adjusted and the first reference voltage, the first end formed by the second transistor and the resistance unit being connected in parallel is connected to the first capacitor and the first resistor, and the second end formed by the second transistor and the resistance unit being connected in parallel is connected to the second transistor.

[0011] In one or more embodiments of the present invention, the comparison circuit includes a current mirror unit and a current source, the current source is used to generate a reference current, and the current mirror unit is connected to the circuit to be adjusted and the current source to mirror the output current and compare it with the reference current to generate a first control signal.

[0012] In one or more embodiments of the present invention, the current mirror unit includes a first mirror tube, a second mirror tube and a third mirror tube, the control end of the first mirror tube is connected to the band regulation circuit, the first end of the first mirror tube is connected to the second reference voltage, the second end of the second mirror tube is connected to the second end of the first mirror tube, the control end of the second mirror tube is connected to the control end of the third mirror tube and the second end of the second mirror tube to generate a control voltage, the first end of the second mirror tube and the first end of the third mirror tube are connected to the first reference voltage, the second end of the third mirror tube is connected to the first end of the current source to generate a first control signal, and the second end of the current source is connected to the second reference voltage.

[0013] In one or more embodiments of the present invention, the transient enhancement circuit further includes a Schmitt trigger, and the Schmitt trigger is connected between the comparison circuit and the delay circuit.

[0014] In one or more embodiments of the present invention, the transient enhancement circuit further includes a shaping unit, an input end of the shaping unit is connected to the delay circuit, and the shaping unit is used to shape the second control signal to output a third control signal to control the compensation circuit.

[0015] The present invention also discloses a linear regulator, including the transient enhancement circuit, the comparison circuit is connected to the control end of the power tube of the linear regulator to receive the output current on the power tube, and the compensation circuit is connected to the output end of the amplifier of the linear regulator to perform zero point compensation.

[0016] The present invention also discloses a transient enhancement method. Based on the transient enhancement circuit, the transient enhancement method comprises:

[0017] When the output current of the circuit to be regulated undergoes a transient change, the output current is compared with the reference current through a comparison circuit to generate a first control signal, and a control voltage representing the magnitude of the output current is generated based on the output current of the circuit to be regulated;

[0018] Delaying the first control signal by a delay circuit to generate a second control signal;

[0019] The compensation circuit adjusts its own resistance value and / or capacitance value based on the control voltage and the second control signal to provide a zero point for the circuit loop to be adjusted.

[0020] In one or more embodiments of the present invention, the step of adjusting the resistance value and / or capacitance value of the compensation circuit based on the control voltage and the second control signal to provide a zero point for the circuit loop to be adjusted includes:

[0021] When the output current of the circuit to be adjusted changes transiently, the first transistor is turned on based on the control of the control voltage, and the resistance value and / or capacitance value of the compensation circuit are increased based on its own resistance value and / or capacitance value and the opening degree of the first transistor under the control of the invalid second control signal through adjustment control;

[0022] After the delay time, the regulating module is turned on under the control of the effective second control signal generated after the delay, so as to reduce the resistance value and / or capacitance value of the compensation circuit by reducing its own resistance value and / or capacitance value.

[0023] Compared with the prior art, the transient enhancement circuit and transient enhancement method of the present invention can be applied to a variety of circuits, among which they are more widely used in linear regulators, especially ultra-low power linear regulators. Since the loop static current of the ultra-low power linear regulator is extremely small under light load or no load, when the load changes rapidly, the loop current is small and the node establishment speed is slow, and the transient response will be greatly different from that of ordinary linear regulators. The present invention determines whether the system enters the load jump stage by detecting the current change on the output power tube, and in this stage, the loop bandwidth is increased by the transient enhancement circuit to optimize the transient response characteristics. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0025] Figure 1 The schematic diagram of a circuit combining a linear regulator and a transient enhancement circuit in one embodiment is shown.

[0026] Figure 2 1 is a waveform diagram of each node of a transient enhancement circuit in an embodiment. DETAILED DESCRIPTION

[0027] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0028] "Coupled" or "connected" or "connected" in the specification includes both direct connection and indirect connection. Indirect connection is a connection through an intermediate medium, such as a connection through an electrically conductive medium, which may have parasitic inductance or parasitic capacitance; indirect connection may also include connection through other active or passive devices on the basis of achieving the same or similar functional purposes, such as connection through circuits or components such as switches and follower circuits. In addition, in the invention, words such as "first" and "second" are mainly used to distinguish one technical feature from another technical feature, and do not necessarily require or imply that there is a certain actual relationship, quantity or order between these technical features.

[0029] In the detailed description of the specification, reference is made to the accompanying drawings forming a part thereof, wherein like reference numerals refer to like parts throughout, and wherein are shown by way of exemplary embodiments that may be implemented. It should be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description should not be considered in a limiting sense.

[0030] The various operations in the specification may be described in turn as multiple discrete actions or operations in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be interpreted as implying that these operations must be order-dependent. Specifically, these operations may not be performed in the order presented. The described operations may be performed in an order different from the described embodiments. Various additional operations may be performed and / or the described operations may be omitted in additional embodiments.

[0031] For purposes of this disclosure, the phrase "A and / or B" means (A), (B), or (A and B). For purposes of this disclosure, the phrase "A, B and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).

[0032] Various components and devices may be referred to or shown in the singular form herein (e.g., "transistor," "transistor," "switch," etc.), but this is merely for ease of discussion, and any element referred to in the singular form may include multiple such elements in accordance with the teachings herein.

[0033] The specification describes the use of the phrases "in one embodiment" or "in other embodiments" or "in some embodiments", which may each refer to one or more of the same or different embodiments. In addition, the terms "including", "comprising", "having", etc. used in relation to the embodiments of the present disclosure are synonymous.

[0034] like Figure 1 As shown, a transient enhancement circuit in an embodiment of the present invention is used in a circuit to be adjusted. The transient enhancement circuit includes: a comparison circuit 10, a delay circuit 20 and a compensation circuit 30.

[0035] The comparison circuit 10 is used to receive the output current ILOAD of the circuit to be adjusted, and compare the output current ILOAD with the reference current IBS to generate a first control signal V1, and at the same time generate a control voltage VNB representing the size of the output current ILOAD based on the output current ILOAD of the circuit to be adjusted. The delay circuit 20 is used to delay the first control signal V1 to generate a second control signal V2. The compensation circuit 30 is used to adjust its own resistance value based on the control of the control voltage VNB and the second control signal V2 to provide a zero point for the circuit loop to be adjusted. In one embodiment, when the output current ILOAD of the circuit to be adjusted changes transiently, the compensation circuit 30 increases its own resistance value based on the control voltage VNB to provide a corresponding zero point for the circuit loop to be adjusted. After the delay time of the delay circuit 20, the compensation circuit 30 reduces its own resistance value based on the control of the second control signal V2 to provide a corresponding zero point for the circuit loop to be adjusted.

[0036] In other embodiments, the compensation circuit 30 may also adjust its own capacitance value based on the control voltage VNB to provide a corresponding zero point for the circuit loop to be adjusted, and after the delay time of the delay circuit 20, adjust its own capacitance value based on the control of the second control signal V2 to provide a corresponding zero point for the circuit loop to be adjusted, or the compensation circuit 30 may also adjust its own resistance value and capacitance value at the same time to provide a corresponding zero point.

[0037] In one embodiment, the circuit to be regulated may be a linear regulator. Figure 1 As shown, the linear regulator includes an amplifier EA, a buffer tube MK, a mirror tube MU, a power tube MH and a feedback unit. The output end of the amplifier EA is connected to the control end of the buffer tube MK and the compensation circuit 30, the first end of the buffer tube MK is connected to the first reference voltage AVSS, the second end of the buffer tube MK is connected to the second end of the mirror tube MU and the control end of the mirror tube MU, the control end of the power tube MH is connected to the control end of the mirror tube MU, the first end of the mirror tube MU and the first end of the power tube MH are connected to the second reference voltage AVDD, in one embodiment, the first reference voltage AVSS is a ground voltage, and the second reference voltage AVDD is a power supply voltage. The second end of the mirror tube MU is connected to the feedback unit to generate an output voltage VOUT, the feedback unit is connected to the first input end of the amplifier EA, and the feedback unit generates a feedback voltage VFB based on the output voltage VOUT, the first output end of the amplifier EA is connected to the feedback unit to receive the feedback voltage VFB, and the second input end of the amplifier EA is used to receive the reference voltage VREF. In one embodiment, the first input end of the amplifier EA is a negative input end, and the second input end of the amplifier EA is a positive input end. In other embodiments, the circuit to be adjusted can also be other circuits.

[0038] In one embodiment, the feedback unit includes a first feedback resistor Ra, a second feedback resistor Rb and a filter capacitor CFF. The first end of the first feedback resistor Ra is connected to the second end of the power tube MH, the second end of the first feedback resistor Ra is connected to the first end of the second feedback resistor Rb and the first input end of the amplifier EA, and the second end of the second feedback resistor Rb is connected to the first reference voltage AVSS. In other embodiments, the filter capacitor CFF may not be provided.

[0039] like Figure 1 As shown, the comparison circuit 10 includes a current mirror unit and a current source A1, the current source A1 is used to generate a reference current IBS, the current mirror unit is connected to the circuit to be adjusted and the current source A1 to mirror the output current ILOAD and compare it with the reference current IBS to generate a first control signal V1, and the current mirror unit generates a control voltage VNB representing the size of the output current ILOAD in the process of mirroring the output current ILOAD.

[0040] In one embodiment, the current mirror unit includes a first mirror tube MX1, a second mirror tube MX2, and a third mirror tube MX3. The control end of the first mirror tube MX1 is connected to the control end of the power tube MH, the first end of the first mirror tube MX1 is connected to the second reference voltage AVDD, the ratio of the width-to-length ratio of the power tube MH to the width-to-length ratio of the first mirror tube MX1 can be n:1, so that the output current ILOAD on the power tube MH is proportionally mirrored through the first mirror tube MX1, the second end of the second mirror tube MX2 is connected to the second end of the first mirror tube MX1, the control end of the second mirror tube MX2 is connected to the control end of the third mirror tube MX3 and the second end of the second mirror tube MX2 to generate a control voltage VNB, the first end of the second mirror tube MX2 and the first end of the third mirror tube MX3 are connected to the first reference voltage AVSS. The second end of the third mirror tube MX3 is connected to the first end of the current source A1 to generate a first control signal V1, and the second end of the current source A1 is connected to the second reference voltage AVDD. The ratio of the width to length of the second mirror tube MX2 to the width to length of the third mirror tube MX3 can be m:1. The current on the first mirror tube MX1 is further mirrored by the second mirror tube MX2 and the third mirror tube MX3, and compared with the reference current IBS generated by the current source A1 to generate the first control signal V1.

[0041] like Figure 1 The transient enhancement circuit further includes a Schmitt trigger ST, which is connected between the comparison circuit 10 and the delay circuit 20. The Schmitt trigger ST is used to invert the first control signal V1 and output an intermediate signal, and can prevent false triggering of subsequent circuits through its own hysteresis interval. In other embodiments, the Schmitt trigger ST may not be provided.

[0042] like Figure 1 In one embodiment, the delay circuit 20 includes a resistor R0 and a capacitor C0. The first end of the resistor R0 is connected to the output end of the Schmitt trigger ST, the second end of the resistor R0 is connected to the first end of the capacitor C0, and the second end of the capacitor C0 is connected to the first reference voltage AVSS. The intermediate signal output by the Schmitt trigger ST is delayed by the resistor R0 and the capacitor C0 to generate the second control signal V2. In other embodiments, the delay circuit 20 can be other circuit structures.

[0043] like Figure 1 The transient enhancement circuit further includes a shaping unit. The input end of the shaping unit is connected to the delay circuit 20, and the shaping unit is used to shape the second control signal and output a third control signal V_ctrl to control the compensation circuit 30. In one embodiment, the shaping unit includes a first inverter ANV1 and a second inverter AVN2, the first inverter ANV1 and the second inverter AVN2 are connected in series and connected to the second end of the resistor R0, and the second control signal V2 is shaped by the first inverter ANV1 and the second inverter AVN2 to output the third control signal V_ctrl. In other embodiments, the shaping unit may be other circuit structures, or the shaping unit may not be provided. If the shaping unit is not provided, the third control signal V_ctrl and the second control signal V2 submitted above and below are the same signal.

[0044] like Figure 1 The compensation circuit 30 includes a first capacitor C1, a first resistor R1 and an adjustment unit, wherein the first end of the first capacitor C1 is connected to the output end of the amplifier EA, the second end of the first capacitor C1 is connected to the first end of the first resistor R1, and the second end of the first resistor R1 is connected to the first reference voltage AVSS. The adjustment unit is connected to the first end of the first resistor R1 and the first reference voltage AVSS, and the adjustment unit reduces the resistance value of the compensation circuit 30 itself based on the control voltage VNB, and reduces the resistance value of the compensation circuit 30 itself again based on the control of the third control signal V_ctrl (if the shaping unit is not provided, the compensation circuit 30 is directly controlled by the second control signal V2). In other embodiments, the adjustment unit is connected to the first capacitor C1, and the adjustment unit can adjust the capacitance value of the compensation circuit 30 itself based on the control voltage VNB, and adjust the capacitance value of the compensation circuit 30 itself again based on the control of the second control signal V2. Or the adjustment unit is connected to the first capacitor C1 and the first resistor R1, and the adjustment unit can adjust the capacitance value and resistance value of the compensation circuit 30 itself based on the control voltage VNB, and adjust the capacitance value and resistance value of the compensation circuit 30 itself again based on the control of the third control signal V_ctrl.

[0045] like Figure 1As described, in one embodiment, the regulating unit includes a first transistor M1 and a regulating module, the first transistor M1 and the regulating module are connected in series, the regulating module controls itself to be turned on or off based on a third control signal V_ctrl to adjust its own resistance value, and the first transistor M1 controls its own degree of opening based on a control voltage VNB to cooperate with the regulating module to adjust the resistance value of the compensation circuit 30.

[0046] Specifically, when the output current ILOAD changes transiently, the first transistor M1 is turned on based on the control of the control voltage VNB. When the output current ILOAD changes transiently, the regulating module increases the resistance value of the compensation circuit 30 based on its own resistance value and / or capacitance value and the degree of opening of the first transistor M1 under the control of the invalid third control signal V_ctrl generated when the output current ILOAD changes transiently. The regulating module is turned on under the control of the effective third control signal V_ctrl generated after delay to reduce the resistance value of the compensation circuit by reducing its own resistance value and / or capacitance value, wherein the so-called "increasing the resistance value of the compensation circuit 30" is compared with when the regulating module is turned on. In one embodiment, the invalid third control signal V_ctrl is a low-level third control signal V_ctrl, and the effective third control signal V_ctrl is a high-level third control signal V_ctrl.

[0047] In other embodiments, the regulating module controls its own on or off based on the third control signal V_ctrl to adjust its own capacitance value, and the first transistor M1 controls its own on degree based on the control voltage VNB to cooperate with the regulating module to adjust the capacitance value of the compensation circuit 30. Alternatively, the regulating module controls its own on or off based on the third control signal V_ctrl to adjust its own capacitance value and resistance value, and the first transistor M1 controls its own on degree based on the control voltage VNB to cooperate with the regulating module to adjust the capacitance value and resistance value of the compensation circuit 30.

[0048] like Figure 1 In one embodiment, the regulating module includes a resistor unit R2 and a second transistor M2, the resistor unit R2 and the first transistor M1 are connected in series, the second transistor M2 and the resistor unit R2 are connected in parallel, and the control end of the second transistor M2 is used to receive the third control signal V_ctrl. In other embodiments, the resistor unit R2 can be replaced by a capacitor unit, and the regulating module is connected in parallel with the first capacitor C1, or a series-parallel resistor or capacitor is used to replace the resistor unit R2, and the number of the second transistors M2 can be set according to the number of resistors and capacitors.

[0049] from Figure 1It can be seen that by controlling the voltage VNB to control the opening size of the first transistor M1 to adjust the impedance of the compensation circuit 30, the dynamic zero point of the loop compensation can be guaranteed to ensure the stability of the loop under light and heavy loads. The comparison circuit 10 compares the output current ILOAD of the mirror power tube MH with the reference current IBS to detect the load condition of the linear regulator when the transient enhancement circuit needs to be switched; when the output current ILOAD becomes larger, the control voltage VNB increases, and the switching point of the comparison circuit 10 can be expressed as: ILOAD = m*n*IBS. When the output current ILOAD on the left side of the formula is greater than the right side, the first control signal V1 will be pulled down, and a delayed third control signal V_ctrl will be sent out after passing through the post-stage delay circuit 20, and this signal is used to control the first transistor M1.

[0050] When the load changes from light load or no load to heavy load, the control voltage VNB changes faster, and the resistance value of the first transistor M1 becomes smaller. The third control signal V_ctrl actually adds a delay time compared to the first control signal V1 of the detected load change. That is, after a delay time, the third control signal V_ctrl will change from low to high. During the period when the third control signal V_ctrl is at a low level, the resistor unit R2 is connected. At this time, the zero point generated by the compensation circuit 30 is jointly determined by the resistance values ​​of the resistor unit R2 and the first transistor M1. Compared with the situation where the third control signal V_ctrl is at a high level and the second transistor M2 is turned on to short-circuit the resistor unit R2 to generate the corresponding zero point, the corresponding zero point generated by the third control signal V_ctrl being at a low level in the transient change is located further to the left, the loop bandwidth is increased, and the transient characteristics can be optimized.

[0051] The loop compensation zero point positions in the two cases where the third control signal V_ctrl is at a low level or a high level can be expressed as:

[0052] During load transient changes, the zero point expression generated when the third control signal V_ctrl is at a low level is: Z1=1 / {C1*[R1||(R2+RM1)]}, and the zero point expression generated when the third control signal V_ctrl is at a high level is: Z2=1 / {C1*(R1||RM1)}, where RM1 is the resistance value of the first transistor M1. It can be seen that when the first transistor M1 is turned on and the second transistor M2 is turned off, the resistance of the entire compensation circuit 30 caused by the connection of the resistance unit R2 is larger than the resistance of the entire compensation circuit 30 when the resistance unit R2 is short-circuited due to the turning on of the second transistor M2. Both the zero point Z1 and the zero point Z2 can change with changes in relevant parameters.

[0053] Figure 2t1 is the actual working waveform of each node when the load changes from no-load or light-load to heavy-load. It can be seen that the time point t1 is the time point when the first control signal V1 is reversed through detection after the corresponding load changes from light-load or no-load to heavy-load. The generation time of this first control signal V1 is mainly related to the change of the control voltage VNB caused by the change of the output current ILOAD on the power tube MH; the time point t2 is the time point when the third control signal V_ctrl is reversed, and the difference between the two times is mainly determined by the delay circuit 20 composed of the resistor R0 and the capacitor C0; the middle Δt time is the time period when the second transistor M2 in the loop has not been turned on. It is during this time that the zero point position in this loop section in the transient change is shifted to the left by connecting the resistor unit R2 to increase the bandwidth and optimize the transient response.

[0054] The present application also discloses a linear regulator, including the above-mentioned transient enhancement circuit, the comparison circuit 10 is connected to the control end of the power tube MH of the linear regulator to receive the output current ILOAD on the power tube, and the compensation circuit 30 is connected to the output end of the amplifier EA of the linear regulator to perform zero point compensation.

[0055] The present application also discloses a transient enhancement method, based on a transient enhancement circuit, the transient enhancement method comprises:

[0056] When the output current ILOAD of the circuit to be regulated changes transiently, the output current ILOAD is compared with the reference current IBS by the comparison circuit 10 to generate a first control signal V1, and a control voltage VNB representing the magnitude of the output current ILOAD is generated based on the output current ILOAD of the circuit to be regulated. In one embodiment, the circuit to be regulated may be a linear regulator as described above.

[0057] The first control signal V1 is delayed by the delay circuit 20 to generate the second control signal V2.

[0058] The compensation circuit 30 adjusts its own resistance value and / or capacitance value based on the control voltage VNB and the second control signal V2 to provide a zero point for the circuit loop to be adjusted.

[0059] When the output current ILOAD of the circuit to be adjusted changes transiently, the first transistor M1 is turned on based on the control voltage VNB, and the adjustment module increases the resistance value and / or capacitance value of the compensation circuit 30 based on its own resistance value and / or capacitance value and the opening degree of the first transistor M1 under the control of the invalid second control signal V2;

[0060] After the delay time, the regulating module is turned on under the control of the effective second control signal V2 generated after the delay, so as to reduce the resistance value and / or capacitance value of the compensation circuit 30 by reducing its own resistance value and / or capacitance value;

[0061] Corresponding zero points are provided at different time periods by controlling the invalid and valid second control signals V2. In the case where a shaping unit is provided, the second control signal V2 is the third control signal V_ctrl output by the shaping unit.

[0062] The present application also discloses a chip, comprising the above-mentioned transient enhancement circuit.

[0063] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0064] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A transient enhancement circuit, used for a circuit to be adjusted, characterized in that: The transient enhancement circuit comprises: A comparison circuit, used for receiving an output current of the circuit to be regulated, and comparing the output current with a reference current to generate a first control signal, and at the same time generating a control voltage representing the magnitude of the output current based on the output current of the circuit to be regulated; A delay circuit, used for delaying the first control signal to generate a second control signal; and The compensation circuit is used to adjust its own resistance value and / or capacitance value based on the control voltage and the second control signal to provide a zero point for the circuit loop to be adjusted.

2. The transient enhancement circuit according to claim 1, characterized in that: The compensation circuit includes an adjustment unit, which includes a first transistor and an adjustment module. The first transistor and the adjustment module are connected in series. The first transistor controls its own opening degree based on a control voltage to cooperate with the adjustment module to adjust the resistance value and / or capacitance value of the compensation circuit itself. The adjustment module controls its own opening or closing based on a second control signal to adjust its own resistance value and / or capacitance value.

3. The transient enhancement circuit according to claim 2, characterized in that: The first transistor is turned on based on the control of the control voltage when the output current of the circuit to be regulated changes transiently; the regulation module increases the resistance value and / or capacitance value of the compensation circuit based on its own resistance value and / or capacitance value and the degree of opening of the first transistor under the control of the invalid second control signal generated when the output current of the circuit to be regulated changes transiently; the regulation module is turned on under the control of the effective second control signal generated after delay to reduce the resistance value and / or capacitance value of the compensation circuit by reducing its own resistance value and / or capacitance value.

4. The transient enhancement circuit according to claim 2, characterized in that: The regulating module includes a resistance unit and a second transistor. The resistance unit and the first transistor are connected in series, the second transistor and the resistance unit are connected in parallel, and the control end of the second transistor is used to receive a second control signal.

5. The transient enhancement circuit according to claim 4, characterized in that: The compensation circuit also includes a first capacitor and a first resistor, which are connected in series between the circuit to be adjusted and the first reference voltage, a first end formed by the second transistor and the resistance unit being connected in parallel is connected to the first capacitor and the first resistor, and a second end formed by the second transistor and the resistance unit being connected in parallel is connected to the second transistor.

6. The transient enhancement circuit according to claim 1, characterized in that: The comparison circuit includes a current mirror unit and a current source, wherein the current source is used to generate a reference current, and the current mirror unit is connected to the circuit to be adjusted and the current source to mirror the output current and compare it with the reference current to generate a first control signal.

7. The transient enhancement circuit according to claim 6, characterized in that: The current mirror unit includes a first mirror tube, a second mirror tube and a third mirror tube, the control end of the first mirror tube is connected to a band regulation circuit, the first end of the first mirror tube is connected to a second reference voltage, the second end of the second mirror tube is connected to the second end of the first mirror tube, the control end of the second mirror tube is connected to the control end of the third mirror tube and the second end of the second mirror tube to generate a control voltage, the first end of the second mirror tube and the first end of the third mirror tube are connected to the first reference voltage, the second end of the third mirror tube is connected to the first end of a current source to generate a first control signal, and the second end of the current source is connected to the second reference voltage.

8. The transient enhancement circuit according to claim 1, characterized in that: The transient enhancement circuit further includes a Schmitt trigger, and the Schmitt trigger is connected between the comparison circuit and the delay circuit.

9. The transient enhancement circuit according to claim 1, characterized in that: The transient enhancement circuit further includes a shaping unit, an input end of which is connected to the delay circuit, and the shaping unit is used to shape the second control signal and output a third control signal to control the compensation circuit.

10. A linear regulator, characterized in that: It comprises the transient enhancement circuit as described in any one of claims 1 to 9, wherein the comparison circuit is connected to the control end of the power tube of the linear regulator to receive the output current on the power tube, and the compensation circuit is connected to the output end of the amplifier of the linear regulator to perform zero point compensation.

11. A transient enhancement method, characterized in that: Based on the transient enhancement circuit according to any one of claims 1 to 9, the transient enhancement method comprises: When the output current of the circuit to be regulated undergoes a transient change, the output current is compared with the reference current through a comparison circuit to generate a first control signal, and a control voltage representing the magnitude of the output current is generated based on the output current of the circuit to be regulated; Delaying the first control signal by a delay circuit to generate a second control signal; The compensation circuit adjusts its own resistance value and / or capacitance value based on the control voltage and the second control signal to provide a zero point for the circuit loop to be adjusted.

12. The transient enhancement method according to claim 11, characterized in that: The method of adjusting the resistance value and / or capacitance value of the compensation circuit based on the control voltage and the second control signal to provide a zero point for the circuit loop to be adjusted includes: When the output current of the circuit to be adjusted changes transiently, the first transistor is turned on based on the control of the control voltage, and the adjustment module increases the resistance value and / or capacitance value of the compensation circuit based on its own resistance value and / or capacitance value and the opening degree of the first transistor under the control of the invalid second control signal; After the delay time, the regulating module is turned on under the control of the effective second control signal generated after the delay, so as to reduce the resistance value and / or capacitance value of the compensation circuit by reducing its own resistance value and / or capacitance value.

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