A data encryption method, device, storage medium, chip and electronic equipment

Abstract

Embodiments of the present application provide a data encryption method, device, storage medium, chip and electronic equipment. The data encryption method comprises: obtaining a memory physical address of to-be-encrypted data, the memory physical address comprising a high-bit address and a low-bit address; obtaining a general adjustment value using a first key and the high-bit address; obtaining a low-bit parameter according to an address block parameter of an address block determined based on the low-bit address in an address block pre-stored value set; obtaining an updated adjustment value according to the general adjustment value and the low-bit parameter; and obtaining encrypted data by encrypting the to-be-encrypted data using the updated adjustment value and a second key. The address block parameter and the low-bit parameter are obtained through a lookup operation, the acquisition time of the low-bit parameter is shortened when the low-bit address is long, thereby shortening the required time of memory encryption, and the encryption time can be prevented from being prolonged and being uncertain due to the prolongation of the low-bit address.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of computer encryption, specifically to a data encryption method, apparatus, storage medium, chip, and electronic device. Background Technology

[0002] Memory encryption is a technology used in computer systems to protect sensitive data. It protects data in system memory by encrypting it to prevent malware or attackers from accessing or stealing sensitive information. Memory encryption technology typically encrypts sensitive data before storing it in memory and provides encryption and decryption functions for memory read and write operations.

[0003] Traditional methods for implementing memory encryption require calculating low-order parameters during the data encryption process. When the data address is long, the calculation time for these low-order parameters is often excessive. This results in significant data latency, impacting data read and write efficiency.

[0004] Therefore, how to shorten data latency and improve data reading and writing efficiency has become an urgent problem to be solved by those skilled in the art. Summary of the Invention

[0005] In view of this, embodiments of the present invention provide a data encryption method, apparatus, storage medium, chip, and electronic device to shorten data latency and improve data read / write efficiency.

[0006] To address the above problems, embodiments of the present invention provide the following technical solutions:

[0007] In a first aspect, embodiments of the present invention provide a data encryption method, comprising: obtaining the memory physical address of data to be encrypted, wherein the memory physical address includes a high-order address and a low-order address;

[0008] Use the first key and the high-order address to obtain the general adjustment value;

[0009] Based on the address block determined by the low-order address, the address block parameters are searched in the address block pre-stored value set to obtain the low-order parameters;

[0010] The updated adjustment value is obtained based on the general adjustment value and the low-order parameter;

[0011] The updated adjustment value and the second key are used to encrypt the data to be encrypted to obtain encrypted data.

[0012] Secondly, embodiments of this application also provide a data encryption device, comprising:

[0013] The address acquisition module is used to acquire the memory physical address of the data to be encrypted, wherein the memory physical address includes a high-order address and a low-order address.

[0014] The general adjustment value acquisition module uses the first key and the high-order address to acquire the general adjustment value;

[0015] The low-order parameter acquisition module is used to search for address block parameters in the address block pre-stored value set based on the address block determined based on the low-order address, and obtain the low-order parameters.

[0016] An update adjustment value acquisition module is used to acquire an update adjustment value based on the general adjustment value and the low-order parameter.

[0017] The data encryption module is used to encrypt the data to be encrypted using the updated adjustment value and the second key to obtain encrypted data.

[0018] Thirdly, embodiments of this application also provide a chip including the data encryption device as described in the second aspect.

[0019] Fourthly, embodiments of this application also provide an electronic device, including: at least one memory and at least one processor, wherein the memory stores a program, and the processor invokes the program to execute the data encryption method as described in the first aspect.

[0020] Compared with the prior art, the technical solution of the real-time example in this application has the following advantages:

[0021] The data encryption method provided in this invention involves: obtaining the memory physical address of the data to be encrypted, wherein the memory physical address includes a high-order address and a low-order address; obtaining a general adjustment value using a first key and the high-order address; searching for address block parameters in a pre-stored set of address blocks based on the address block determined by the low-order address to obtain low-order parameters; obtaining an updated adjustment value based on the general adjustment value and the low-order parameters; and encrypting the data to be encrypted using the updated adjustment value and a second key to obtain encrypted data.

[0022] As can be seen, the technical solution provided by this application embodiment can pre-store the address block parameters and, when used, search for the address block parameters in the pre-stored address block value set and obtain the low-order parameters based on the address block parameters. Thus, the clock cycle required to obtain the low-order parameters only includes one clock cycle for the search operation and a finite number of clock cycles for obtaining the low-order parameters using the address block parameters. Even if the low-order address is long, it will not cause a significant extension in the acquisition time of the low-order parameters. This not only shortens the time required for memory encryption but also avoids the extension and uncertainty of encryption time caused by the extension of the low-order address. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0024] Figure 1 A flowchart illustrating a memory encryption method;

[0025] Figure 2 This is another flowchart illustrating a memory encryption method.

[0026] Figure 3 This is a first flowchart illustrating the data encryption method provided in an embodiment of the present invention;

[0027] Figure 4 This is a schematic diagram of the second process of the data encryption method provided in an embodiment of the present invention;

[0028] Figure 5 A schematic diagram of the third process of the data encryption method provided in an embodiment of the present invention;

[0029] Figure 6 A schematic diagram of a system for running the data encryption method provided in the embodiments of the present invention;

[0030] Figure 7 A schematic diagram of the fourth process of the data encryption method provided in an embodiment of the present invention;

[0031] Figure 8 This is a schematic diagram of a data encryption device provided in an embodiment of the present invention. Detailed Implementation

[0032] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0033] Memory encryption is a technology for protecting sensitive data in computer systems. It protects data in system memory by encrypting it to prevent malware or attackers from accessing or stealing sensitive information. Memory encryption technology typically encrypts sensitive data before storing it in memory and provides encryption and decryption functions for memory read and write operations. AES (Advanced Encryption Standard) / SM4 (a block cipher standard)-XTS mode is a computational method for memory encryption.

[0034] A memory encryption method, such as Figure 1 As shown, XTS mode uses key 1 and key 2 to encrypt the data to be encrypted.

[0035] To encrypt the data to be encrypted, when encrypting consecutive data with a common high-order address i, there are two cases: First, for the data with the smallest low-order address j, that is, the data with all bits of low-order address j being 0, the encryption process includes the following steps:

[0036] Step S0: Split the physical address of the data to be encrypted into high-order address i and low-order address j.

[0037] It is easy to understand that the physical memory address of the data to be encrypted has multiple digits. According to a preset rule, the first few bits of the physical memory address are the high-order bits, and the remaining few bits are the low-order bits. The combination of the high-order and low-order bits constitutes the complete physical address. The number of bits for the specific high-order and low-order bits can be flexibly divided according to the system's preset division rules.

[0038] Step S1: Calculate the general adjustment value T using key 2 and the high-order address i.

[0039] It's easy to understand that the high-order address i of the data to be encrypted is relatively easy to obtain. Directly using the high-order address i to assist in encrypting the data could easily lead to lower encryption security. Therefore, using key 2 for encryption can effectively improve encryption security.

[0040] Step S2: Perform an XOR operation between the general adjustment value T and the data to be encrypted to obtain the XOR data.

[0041] It should be noted that if the data to be encrypted is directly encrypted, the encrypted data in different physical addresses may be the same. Therefore, a general adjustment value T can be used to perform an XOR operation to ensure that the encrypted data are all different.

[0042] Step S3: Encrypt the XOR data using key 1 to obtain encrypted XOR data.

[0043] After performing an XOR operation on the data to be encrypted using a general adjustment value T to obtain suspicious data, in order to further improve the security of the data, the XOR data is further encrypted using key 1 to obtain encrypted XOR data.

[0044] Step S4: Perform an XOR operation with the general adjustment value T and the encrypted XOR data to obtain the encrypted data.

[0045] Performing the XOR operation again using the general adjustment value T can further prevent the XOR data from still containing the same XOR data, thus preventing system errors.

[0046] Subsequently, for the data to be encrypted with a larger low-order address, the following process needs to be performed between step S1 and step S2:

[0047] Step S5: For each increment of the low-order address j by 1, the general adjustment value T is multiplied by an additional constant α to obtain an updated adjustment value t. Then, the updated adjustment value t is used to replace the general adjustment value T, and steps S2 to S4 are executed.

[0048] It is easy to understand that step S5 above can be simplified to step S6: multiply the general adjustment value by the i-th power of the low-order address of the constant T α to obtain the update adjustment value t. Step S6 can be expressed by the formula t = T * α. j The steps of the memory encryption method at this time are as follows: Figure 2 As shown.

[0049] Based on the above description, the inventors discovered that as the amount of memory requiring encryption increases, the additional system overhead consumed by the memory encryption function also increases, such as increased data latency. This, in turn, leads to excessively long computation times for memory encryption.

[0050] To address the aforementioned problems, this invention provides a data encryption method that eliminates the need for extensive clock cycles to calculate low-order parameters, even when the low-order address is long. Instead, it requires only a limited number of clock cycles to search for and calculate the low-order parameters, thus shortening the computation time for memory encryption. The specific steps of this process are as follows: Figure 3 As shown, it includes:

[0051] Step S10: Obtain the physical memory address of the data to be encrypted, wherein the physical memory address includes the high-order address and the low-order address.

[0052] It is easy to understand that the physical memory address of the data to be encrypted has multiple digits. According to a preset rule, the first few high-order bits of the physical memory address are used, and the remaining few bits are used as low-order bits. The combination of the high-order and low-order bits constitutes the complete physical address. The number of bits used to divide the specific high-order and low-order bits can be flexibly divided according to the system's preset division rules.

[0053] Step S20: Obtain the general adjustment value using the first key and the high-order address.

[0054] It's easy to understand that the high-order bits of the data to be encrypted are relatively easy to obtain. Using these high-order bits directly to encrypt the data can easily lead to lower encryption security. Therefore, using a first key for encryption can effectively improve encryption security.

[0055] Step S30: Based on the address block determined by the low-order address, search for the address block parameters in the address block pre-stored value set to obtain the low-order parameters.

[0056] After obtaining the low-order address, the address block is determined based on the low-order address, and then the corresponding address block parameters are searched in the address block pre-stored value set to obtain the low-order parameters.

[0057] By searching for the address block parameter corresponding to the low-order address within the pre-stored set of address block values, instead of directly calculating the address block parameter, the time to obtain the address block parameter can be significantly shortened when the low-order address is long.

[0058] Step S40: Obtain the updated adjustment value based on the general adjustment value and the low-order parameter.

[0059] Specifically, the general adjustment value can be multiplied by the lower-order parameter to obtain the updated adjustment value.

[0060] This can further increase the complexity of the update adjustment value calculation and more effectively avoid duplication of encrypted data obtained in subsequent encryption.

[0061] Step S50: Use the updated adjustment value and the second key to encrypt the data to be encrypted to obtain encrypted data.

[0062] Using updated adjustment values ​​for XOR operations can further avoid the presence of identical XOR data in the XOR data, thus preventing system errors.

[0063] It should be noted that the "low-order parameter" refers to the low-order address i raised to the power of the constant α in step S6 above. As the amount of data to be encrypted increases, the physical address of the data to be encrypted also increases, leading to an excessively large low-order address. This results in an excessively long time required to calculate the low-order parameter in step S6. Therefore, the data encryption method provided in this application pre-stores the address block parameter and, when in use, searches for the address block parameter in the pre-stored address block value set and obtains the low-order parameter based on the address block parameter. Thus, the clock cycles required to obtain the low-order parameter include only one clock cycle for the search operation and a finite number of clock cycles for obtaining the low-order parameter using the address block parameter. Even if the low-order address is long, it will not cause a significant increase in the time required to obtain the low-order parameter. This not only shortens the time required for memory encryption but also avoids the increase and uncertainty in encryption time caused by the extension of the low-order address.

[0064] It should be noted that the memory physical address of the data to be encrypted is a string of numbers, which may have multiple digits, for example, a memory physical address with 10 digits. According to a preset rule, the first few high-order bits of the memory physical address (e.g., the first 4 digits) are the high-order bits, and the remaining few bits are the low-order bits. For example, if the first 4 digits of the memory physical address are high-order bits, the last 6 digits are low-order bits. The combination of the high-order and low-order bits constitutes the complete memory physical address. The specific number of bits used to divide the high-order and low-order addresses can be flexibly determined according to the system's preset division rules.

[0065] It is easy to understand that if all possible values ​​of the low-order parameters were calculated and stored in advance, the amount of data to be stored would be large, and the time required to find the low-order parameters would be much longer, thus failing to shorten the calculation time of the low-order parameters. However, by dividing the low-order address into multiple address blocks and storing the address block parameters corresponding to the constant α raised to the power of the address block for each possible address block, the amount of data to be stored and the time required to find the address block parameters can be significantly reduced. For example, if the low-order address has 15 bits, then there are 2 possible low-order parameters. 15 = 32768 values, and if the low-order address is split into a 2-bit address block j1, a 3-bit address block j2, and a 10-bit address block j3, the total number of possible address block parameters is 2. 2 +2 3 +2 10 =1036 values. It can be seen that after splitting the low-order address, the amount of data that needs to be stored is significantly reduced, and the time required to retrieve the address block parameters is also greatly reduced.

[0066] Specifically, to obtain the address block parameters, in one specific implementation, such as... Figure 4 As shown, step S30 further includes:

[0067] Step S31: Divide the low-order address into at least two address blocks according to the pre-stored address block splitting method;

[0068] Step S32: Search in the address block pre-stored value set corresponding to each address block to obtain the corresponding address block parameter;

[0069] Step S33: Obtain the low-order parameters according to each of the address block parameters.

[0070] By dividing the low-order address into multiple address blocks and storing the address block parameters corresponding to each address block, the time required to look up the address block parameters can be reduced to a minimum of one clock cycle. The time required to calculate the low-order parameters from the address block parameters is also relatively short. For example, if the low-order address is divided into j1, j2, and j3 as described above, the formula for calculating the low-order parameters is (T*α). j1 )*(T*α j2 This calculation only requires three Galois field multiplications, so the time required is also only the time required for three Galois field multiplications. Thus, the time to obtain the low-order parameters can be reduced to a minimum of one clock cycle and the time required for three Galois field multiplications, thereby significantly reducing the time required to calculate the low-order parameters.

[0071] Furthermore, to further shorten the computation time of the low-order parameters, in one specific embodiment, the hardware running the data encryption method described in this application is equipped with at least two Galois multipliers. Taking the computational formula described above as an example, in the above-described formula, T*α... j1 and T*α j2 Parallel computation is possible, thereby reducing the computation time of the above-described formula from three Galois field multiplications to two Galois field multiplications. This further reduces the time required to compute the lower-order parameters.

[0072] Furthermore, in one specific implementation, the at least two address blocks obtained by splitting the low-order address in step S31 are at least two address blocks of equal length. This minimizes the amount of data that needs to be stored for the address block parameters. Taking a 15-bit low-order address as an example, if the low-order address is split into a 2-bit address block j1, a 3-bit address block j2, and a 10-bit address block j3, there are a total of 2 possible address block parameters. 2 +2 3 +2 10=1036 values; if the low-order address is split into three 5-bit address blocks j1, j2, and j3, the total number of possible address block parameters is 2. 5 +2 5 +2 5 = 96 values. It can be seen that splitting the low-order address into at least two equal-length address blocks can significantly reduce the amount of data that needs to be stored.

[0073] Furthermore, in one specific embodiment, the address block pre-stored value set includes all possible values ​​of the address block parameters calculated based on all possible values ​​of the address block. This facilitates the retrieval of the required address block parameters within the address block pre-stored value set.

[0074] Furthermore, in one specific implementation, such as Figure 5 As shown, the data encryption method provided in this application embodiment includes:

[0075] Step S10: Obtain the physical memory address of the data to be encrypted, wherein the physical memory address includes the high-order address and the low-order address.

[0076] For details of step S10, please refer to the aforementioned description of step S10, which will not be repeated here.

[0077] Step S21: Search the corresponding adjustment pre-stored value set according to the high-order address and the first key to obtain the corresponding general adjustment value.

[0078] It is easy to understand that if the high-order address is also too large, the calculation time for the general adjustment value will also be long. Since the range of the high-order addresses required to calculate the general adjustment value is determined, the possible values ​​of the high-order addresses are also determined, and the first key is a preset, predetermined key value. Therefore, we can use a similar approach to the above: by pre-calculating all possible values ​​of the general adjustment value and storing them in advance, when retrieving the general adjustment value, we can shorten the time required to retrieve the general adjustment value to at least one clock cycle by searching for the general adjustment value.

[0079] Of course, the set of pre-stored adjustment values ​​includes all possible values ​​based on the high-order address and all possible values ​​of the general adjustment value calculated from the first key. This facilitates finding the required address block parameters within the set of pre-stored adjustment values.

[0080] Step S30: Based on the address block determined by the low-order address, search for the address block parameters in the address block pre-stored value set to obtain the low-order parameters.

[0081] Step S40: Obtain the updated adjustment value based on the general adjustment value and the low-order parameter.

[0082] Step S50: Use the updated adjustment value and the second key to encrypt the data to be encrypted to obtain encrypted data.

[0083] For details of steps S30-S50, please refer to the aforementioned description of steps S30-S50, which will not be repeated here.

[0084] In this way, the computation time for memory encryption can be shortened by reducing the time required to obtain the general adjustment value.

[0085] Furthermore, in one specific implementation, to ensure data security when there are different operating environments, the encryption keys for different operating environments can be different. Therefore, for example... Figure 5 As shown, to obtain the set of adjusted pre-stored values ​​corresponding to the first key, before step S21, the following may be included:

[0086] Step S22: Determine the first key based on the operating environment where the data to be encrypted is located;

[0087] Step S23: Determine the corresponding set of pre-stored adjustment values ​​based on the first key.

[0088] It should be noted that, as Figure 6 The diagram illustrates a computer system where the data encryption method described in this application may reside in multiple different operating environments. To ensure data security between different environments, each operating environment corresponds to a different set of first keys, and furthermore, each operating environment also corresponds to a different set of pre-stored adjustment values. Therefore, the first keys and pre-stored adjustment value sets corresponding to each operating environment are stored in the system, and the set of first keys and pre-stored adjustment value sets to be used is determined before data encryption. As shown in the diagram, the first key and the second key are stored in memory 71. The general adjustment value acquisition device 73 obtains the first key through the first key acquisition device 72, and then uses the first key to select an environment that matches the first key among the first operating environment 761, the second operating environment 762, and the third operating environment 763, and uses the corresponding set of pre-stored adjustment values ​​therein. After the general adjustment value acquisition device 73 obtains the general adjustment value, the update adjustment value calculation device 74 uses the general adjustment value and the low-order parameters in the low-order parameter acquisition module 77 to calculate the update adjustment value, which is then handed over to the encryption calculation device 75 for encryption. The low-order parameters in the low-order parameter acquisition module 77 are obtained by searching and calculating within the address block pre-stored value set. This can improve the security of various operating environments and expand the scope of application of the data encryption method described in this application.

[0089] For further information, please refer to the following: Figure 7In one specific embodiment, step S50 may include:

[0090] Step S51: Perform an XOR operation between the updated adjustment value and the data to be encrypted to obtain the XOR data;

[0091] Step S52: Encrypt the XOR data using the second key to obtain encrypted XOR data;

[0092] Step S53: Perform an XOR operation between the updated adjustment value and the encrypted XOR data to obtain encrypted data.

[0093] It should be noted that if the second key is used directly to encrypt the data to be encrypted, different data to be encrypted may result in encrypted data that are numerically identical, making it impossible for the computer to distinguish the encrypted data from different data to be encrypted, thus causing errors. Therefore, to avoid the possibility of numerically identical encrypted data, the update adjustment value can be XORed with the data to be encrypted before and after it is encrypted with the second key. By XORing each data to be encrypted with its corresponding different update adjustment value, it can be ensured that the encrypted data obtained after encrypting each data to be encrypted are different, avoiding computer errors and ensuring the stability of the data encryption method provided in this application. Furthermore, because the update adjustment value uses the first key during the acquisition process, the update adjustment value is also encrypted to the external environment. This can further increase the complexity of the encrypted data, thereby improving the security of the data to be encrypted.

[0094] Furthermore, in order to decrypt the encrypted data obtained by the data encryption method provided in this application, the data to be encrypted can be obtained by performing the inverse operation of steps S51 to S52 on the encrypted data. That is, the encrypted XOR data is obtained by performing a XOR operation on the updated adjustment value and the encrypted data; then the encrypted XOR data is decrypted using the second key to obtain the XOR data; finally, the XOR data is obtained by performing a XOR operation on the updated adjustment value and the XOR data.

[0095] The data encryption method provided in this application, by pre-storing the address block parameters and searching for them in a pre-stored value set during use, obtains the low-order parameters using the address block parameters instead of directly calculating the low-order parameters. This reduces the multiple clock cycles required to calculate the low-order parameters during encryption to one clock cycle for the search operation and a finite number of clock cycles for obtaining the low-order parameters using the address block parameters. This eliminates the need for multiple clock cycles to calculate the low-order parameters when the low-order address is long, requiring only a finite number of clock cycles for searching and calculating. Furthermore, by pre-storing the general adjustment value and searching for it when it is obtained, the computation time for memory encryption is shortened at multiple levels. Additionally, by pre-storing multiple sets of first keys and adjustment pre-stored value sets, and performing multiple XOR operations, the applicability of the data encryption method provided in this application is improved, computer errors are avoided, and encryption security is enhanced.

[0096] This application also provides a data encryption device, such as... Figure 8 As shown, it includes:

[0097] Address acquisition module 100 is used to acquire the memory physical address of the data to be encrypted, wherein the memory physical address includes a high-order address and a low-order address;

[0098] The general adjustment value acquisition module 200 uses the first key and the high-order address to acquire the general adjustment value;

[0099] The low-order parameter acquisition module 300 is used to search for address block parameters in the address block pre-stored value set based on the address block determined based on the low-order address, and acquire the low-order parameters.

[0100] The update adjustment value acquisition module 400 is used to acquire the update adjustment value based on the general adjustment value and the low-order parameter.

[0101] The data encryption module 500 is used to encrypt the data to be encrypted using the updated adjustment value and the second key to obtain encrypted data.

[0102] The test data processing apparatus provided in the above-described embodiments of this application, by searching for the address block parameter in the pre-stored value set during encryption and using the address block parameter to obtain the low-order parameter instead of directly calculating the low-order parameter, can shorten the multiple clock cycles required to calculate the low-order parameter during the encryption process to one clock cycle of the search operation and a finite number of clock cycles of using the address block parameter to obtain the low-order parameter. This means that when the low-order address is long, it is not necessary to spend multiple clock cycles to calculate the low-order parameter, but only a finite number of clock cycles are needed to search for and calculate the low-order parameter, thus shortening the computation time of memory encryption.

[0103] This application also provides a chip including the data encryption device described above.

[0104] This application also provides an electronic device, which includes at least one memory and at least one processor. The memory stores a program, and the processor calls the program to execute the data encryption method described above.

[0105] While the embodiments of the present invention have been disclosed above, the present invention is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the present invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A data encryption method characterized by, The method comprises the following steps: obtaining a memory physical address of data to be encrypted, wherein the memory physical address comprises a high-bit address and a low-bit address; obtaining a general adjustment value by using a first key and the high-bit address; obtaining a low-bit parameter by searching an address block parameter in a set of address block pre-stored values according to an address block determined based on the low-bit address; obtaining an updated adjustment value according to the general adjustment value and the low-bit parameter; encrypting the data to be encrypted by using the updated adjustment value and a second key to obtain encrypted data.

2. The data encryption method of claim 1, wherein, The step of obtaining the low-bit parameter by searching the address block parameter in the set of address block pre-stored values according to the address block determined based on the low-bit address comprises the following steps: splitting the low-bit address into at least two address blocks according to a pre-stored address block splitting mode; obtaining the address block parameter corresponding to each address block by searching in a set of address block pre-stored values corresponding to each address block respectively; obtaining the low-bit parameter according to each address block parameter.

3. The data encryption method of claim 2, wherein, The step of splitting the low-bit address into at least two address blocks according to the pre-stored address block splitting mode comprises the following step: splitting the low-bit address into at least two address blocks of equal length according to the pre-stored address block splitting mode.

4. The data encryption method of claim 1, wherein, The set of address block pre-stored values comprises all possible values of the address block parameter calculated according to all possible values of the address block.

5. The data encryption method of claim 1, wherein, The step of obtaining the general adjustment value by using the first key and the high-bit address comprises the following step: obtaining a corresponding general adjustment value by searching in a set of adjustment pre-stored values corresponding to the high-bit address and the first key.

6. The data encryption method of claim 5, wherein, The set of adjustment pre-stored values corresponding to the first key is obtained by the following steps: determining the first key according to an operating environment in which the data to be encrypted is located; determining the set of adjustment pre-stored values corresponding to the first key.

7. The data encryption method of claim 5, wherein, The set of adjustment pre-stored values comprises all possible values of the general adjustment value calculated according to all possible values of the high-bit address and the first key.

8. The data encryption method according to any one of claims 1 to 7, wherein, The step of encrypting the data by using the updated adjustment value and the second key comprises the following steps: performing an exclusive OR operation on the updated adjustment value and the data to be encrypted to obtain exclusive OR data; encrypting the exclusive OR data by using the second key to obtain encrypted exclusive OR data; performing an exclusive OR operation on the updated adjustment value and the encrypted exclusive OR data to obtain encrypted data.

9. A data encryption device, characterized by comprising: The method comprises the following steps: an address obtaining module, configured to obtain a memory physical address of data to be encrypted, wherein the memory physical address comprises a high-bit address and a low-bit address; a general adjustment value obtaining module, configured to obtain a general adjustment value by using a first key and the high-bit address; a low-bit parameter obtaining module, configured to obtain a low-bit parameter by searching an address block parameter in a set of address block pre-stored values according to an address block determined based on the low-bit address; an updated adjustment value obtaining module, configured to obtain an updated adjustment value according to the general adjustment value and the low-bit parameter; a data encryption module, configured to encrypt the data to be encrypted by using the updated adjustment value and a second key to obtain encrypted data.

10. A storage medium, characterized by The storage medium stores a program suitable for data encryption, so as to implement the data encryption method according to any one of claims 1 to 8.

11. A chip, characterized by The data encryption device according to claim 9.

12. An electronic device, comprising: The method comprises the following steps: at least one memory storing a program and at least one processor invoking the program to perform the data encryption method according to any one of claims 1 to 8.

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