Power failure protection method and device, electronic equipment and storage medium
By utilizing the persistent memory area of the hard drive and the PMR characteristics of the NVMe SSD device in the system, efficient data protection is achieved when the system is powered down, solving the problems of high deployment costs and low operation efficiency in the prior art, and improving the reliability and efficiency of the system.
Patent Information
- Application Number
- CN202510205975.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-25
- Publication Date
- 2025-03-25
- Estimated Expiration
- 2045-02-25
AI Technical Summary
Existing power-down protection methods rely on supercapacitors and Flash memory, resulting in high system deployment costs and low operating efficiency.
By obtaining the target data in the cache device in the system, monitoring the working status of the system, and transmitting the target data to the persistent memory area of the hard drive when the system is in a powered down state, the PMR characteristics of the NVMe SSD device are used to achieve efficient data persistent storage.
It reduces the overall deployment cost of the system, improves the operation efficiency of power-down protection, simplifies hardware design, and enhances the reliability of the system.
Smart Images

Figure CN119690872A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of computer technology, and in particular to a power-off protection method, device, electronic device and storage medium. Background Art
[0002] The RAID controller in the existing power-off protection method usually relies on supercapacitors and Flash (flash memory) memory for power-off protection. Among them, the supercapacitor acts as a temporary power source, which can provide short-term power support for the RAID controller and its related components when the system suddenly loses power, ensuring that the data in the cache device is safely written to the Flash memory. However, the larger the data to be backed up, the longer the data backup takes, and the capacity requirements for the supercapacitor are also increased accordingly. The current power-off protection method that relies on supercapacitors and dedicated Flash memory not only increases the overall deployment cost of the system, but also leads to low operating efficiency of power-off protection. There are problems of high overall deployment cost of the system and low operating efficiency of power-off protection. Summary of the invention
[0003] Embodiments of the present application provide a power-off protection method, device, electronic device, and storage medium.
[0004] According to a first aspect of the present application, a power-off protection method is provided, the method comprising: Acquiring target data in a cache device included in the system; monitoring the operating status of the system; In response to the system being in a power-off state, the target data is transferred to a persistent memory area of at least one hard disk drive in the system; the persistent memory area is enabled when the system is in a power-off state; the persistent memory area is capable of data storage when the system is in a power-off state.
[0005] According to an embodiment of the present application, the transferring of the target data to a persistent memory area of at least one hard disk drive in the system includes: A first control instruction is sent to an interface controller corresponding to the hard disk drive, so that the interface controller transfers the target data to a persistent memory area of the hard disk drive based on the first control instruction.
[0006] According to an embodiment of the present application, the hard disk drive comprises at least a solid state hard disk; the interface controller comprises at least a non-volatile memory host controller interface specification controller; The first control instruction is used to control the interface controller to transfer the target data in the cache device to the corresponding hard disk drive through a high-speed serial computer expansion bus standard interface.
[0007] According to an embodiment of the present application, the method further includes: A second control instruction is sent to a hard disk controller corresponding to the hard disk drive through the interface controller, so that the hard disk controller stores the data in the persistent memory area to the non-volatile storage medium of the hard disk drive based on the second control instruction.
[0008] According to an embodiment of the present application, the non-volatile storage medium includes at least a NAND flash memory; the hard disk controller includes at least a solid state hard disk controller; The second control instruction is used to control the hard disk controller to store the data in the persistent memory area to the non-volatile storage medium of the hard disk drive through an open NAND flash memory interface.
[0009] According to an embodiment of the present application, the method further includes: Obtaining the number of hard disk drives included in the system; In response to the system including at least two hard disk drives, based on a segmentation algorithm and the number of the hard disk drives, dividing the target data in the cache device into a plurality of load-balanced segmented data blocks; In response to the system being in a power-off state, the segmented data blocks are transferred in parallel to persistent memory areas of at least two hard disk drives in the system.
[0010] According to an embodiment of the present application, monitoring the working status of the system includes: Obtaining power information of the system from a power monitoring interface; Based on the power information, an operating state of the system is determined.
[0011] According to an embodiment of the present application, after determining the working state of the system based on the power information, the method further includes: In response to the system being in a power-off state, starting a power-off protection program; Based on the power-off protection program, the target data in the cache device is transmitted to the persistent memory area of at least one hard disk drive in the system through a direct memory access transmission mode.
[0012] According to an embodiment of the present application, the method further includes: In response to the system recovering from a power-off state to a normal power-on state, starting a data recovery program; Based on the data recovery program, data is read from the hard disk drive, and the read data is restored to the system.
[0013] According to a second aspect of the present application, a power-off protection device is provided, the power-off protection device comprising: A cache device, used to cache target data in the system; a hard disk drive, including at least a persistent memory area, for storing data; An independent hard disk redundant array controller, one end of the independent hard disk redundant array controller is connected to the cache device, and the other end of the independent hard disk redundant array controller is connected to the hard disk drive; The independent redundant array of hard disks controller is used to obtain target data in the cache device; monitor the working status of the system; in response to the system being in a power-off state, transfer the target data to a persistent memory area of at least one hard disk drive in the system; the persistent memory area is enabled when the system is in a power-off state; the persistent memory area can store data when the system is in a power-off state.
[0014] According to an embodiment of the present application, the independent hard disk redundant array controller includes: The interface controller is connected to the hard disk drive and is used to transfer the target data to the persistent memory area of the hard disk drive based on a first control instruction sent by the independent hard disk redundant array controller.
[0015] According to an embodiment of the present application, the interface controller is connected to the hard disk drive via a high-speed serial computer expansion bus standard interface; The hard disk drive at least includes a solid state hard disk; the interface controller at least includes a non-volatile memory host controller interface specification controller.
[0016] According to an embodiment of the present application, the hard disk drive comprises: A hard disk controller, one end of which is connected to the persistent memory area, and the other end of which is connected to the interface controller; A non-volatile storage medium connected to the hard disk controller; The hard disk controller is used to receive a second control instruction sent by the independent hard disk redundant array controller through the interface controller, and store the data in the persistent memory area to the non-volatile storage medium of the hard disk drive based on the second control instruction.
[0017] According to one embodiment of the present application, the non-volatile storage medium includes at least NAND flash memory; the hard disk controller includes at least a solid-state hard disk controller; the non-volatile storage medium is connected to the hard disk controller via an open NAND flash memory interface.
[0018] According to an embodiment of the present application, the independent redundant array of hard disks controller is further used for: Obtaining the number of hard disk drives included in the system; In response to the system including at least two hard disk drives, based on a segmentation algorithm and the number of the hard disk drives, dividing the target data in the cache device into a plurality of load-balanced segmented data blocks; In response to the system being in a power-off state, the segmented data blocks are transferred in parallel to persistent memory areas of at least two hard disk drives in the system.
[0019] According to an embodiment of the present application, the independent hard disk redundant array controller further includes: The power monitoring interface is used to obtain the power information of the system and determine the working status of the system based on the determined power information.
[0020] According to an embodiment of the present application, the power monitoring interface is used to start a power-off protection program in response to the system being in a power-off state; The power-off protection program is used to transfer the target data in the cache device to the persistent memory area of at least one hard disk drive in the system through a direct memory access transmission mode.
[0021] According to one embodiment of the present application, the device further includes: The capacitor is connected to the independent disk array controller and the cache device, and is used to provide power when the system is in a power-off state.
[0022] According to a third aspect of the present application, an electronic device is provided, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method described in the present application.
[0023] According to a fourth aspect of the present application, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to enable the computer to execute the method described in the present application.
[0024] The method of the embodiment of the present application obtains the target data in the cache device included in the system; monitors the working state of the system; in response to the system being in a power-off state, transmits the target data to the persistent memory area of at least one hard disk drive in the system; the persistent memory area is enabled when the system is in a power-off state; the persistent memory area can store data when the system is in a power-off state. In this way, the overall deployment cost of the system can be reduced and the operating efficiency of power-off protection can be improved.
[0025] It should be understood that the teachings of the present application are not required to achieve all of the beneficial effects described above, but specific technical solutions can achieve specific technical effects, and other embodiments of the present application can also achieve beneficial effects not mentioned above. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] By reading the detailed description below with reference to the accompanying drawings, the above and other purposes, features and advantages of the exemplary embodiments of the present application will become readily understood. In the accompanying drawings, several embodiments of the present application are shown in an exemplary and non-limiting manner, wherein: In the drawings, the same or corresponding reference numerals represent the same or corresponding parts.
[0027] Figure 1 The processing flow diagram of the power-off protection method provided in the embodiment of the present application is shown in FIG. Figure 1 ; Figure 2 The processing flow diagram of the power-off protection method provided in the embodiment of the present application is shown in FIG. Figure 2 ; Figure 3 The processing flow diagram of the power-off protection method provided in the embodiment of the present application is shown in FIG. Figure 3 ; Figure 4 The processing flow diagram of the power-off protection method provided in the embodiment of the present application is shown in FIG. Figure 4 ; Figure 5 The processing flow diagram of the power-off protection method provided in the embodiment of the present application is shown in FIG. Figure 5 ; Figure 6 The processing flow diagram of the power-off protection method provided in the embodiment of the present application is shown in FIG. Figure 6 ; Figure 7 An application scenario diagram of the power-off protection method provided in an embodiment of the present application is shown; Figure 8 Another application scenario diagram of the power-off protection method provided in an embodiment of the present application is shown; Fig. 9An optional schematic diagram of a power-off protection device provided in an embodiment of the present application is shown; Fig.10 An optional schematic diagram of an electronic device provided in an embodiment of the present application is shown. DETAILED DESCRIPTION
[0028] In order to make the purpose, features, and advantages of the present application more obvious and easy to understand, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.
[0029] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.
[0030] In the following description, the terms "first\second" involved are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second" can be interchanged with a specific order or sequence where permitted, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.
[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.
[0032] Before further describing the embodiments of the present application in detail, the nouns and terms involved in the embodiments of the present application are explained. The nouns and terms involved in the embodiments of the present application are subject to the following interpretations.
[0033] RAID (Redundant Array of Independent Disks): is a data storage technology that combines multiple independent physical hard disks in a specific way to form a logical storage unit, thereby increasing the data read and write speed of the storage system and enhancing data redundancy to improve fault tolerance. Different RAID levels can achieve different performance and security goals.
[0034] PCIe (Peripheral Component Interconnect Express): is a high-speed serial computer expansion bus standard that uses an efficient point-to-point connection protocol. It has high-speed, low-latency, high-bandwidth and other transmission characteristics, supports hot plugging, and is widely used in a variety of high-performance components and peripherals in modern computer systems. It has become the core technology for connecting modern high-performance hardware.
[0035] NVMe (Non-Volatile Memory Express): is a communication protocol based on the PCIe interface, designed specifically for SSDs (solid-state drives) to provide high-speed, low-latency storage access.
[0036] NVMe PMR (NVMe Persistent Memory Region): refers to a persistent storage area on an NVMe device. The data in this area can still be retained after power failure, so it provides a more reliable data protection mechanism than traditional volatile cache.
[0037] ONFI (Open NAND Flash Interface): is an open standard organization composed of multiple NAND flash memory manufacturers and related technology companies, aiming to develop standardized specifications for NAND flash memory interfaces. The ONFI specification defines the physical characteristics, electrical characteristics, operation commands, functions and performance parameters of NAND flash memory chips to ensure compatibility and interoperability between NAND flash memories produced by different manufacturers.
[0038] The RAID controller in the existing power-off protection method adopts the traditional power-off protection design, which usually relies on supercapacitors and Flash storage for power-off protection. Among them, the supercapacitor acts as a temporary power source, which can provide short-term power support for the RAID controller and its related components when the server suddenly loses power, ensuring that the data in the cache device is safely written to the Flash storage. However, the larger the cache to be backed up, the longer the data backup takes, and the larger the capacity of the supercapacitor required; the higher the power consumption of the RAID controller system, the more power consumed per unit time, and the larger the capacity of the supercapacitor required. There are problems in the related technology that the overall deployment cost of the system is high and the operating efficiency of power-off protection is low.
[0039] The above-mentioned power-off protection method provided by the related technology has the problems of high overall deployment cost of the system and low operating efficiency of power-off protection. The method of the embodiment of the present application obtains the target data in the cache device included in the system; monitors the working status of the system; in response to the system being in a power-off state, transmits the target data to the persistent memory area of at least one hard disk drive in the system; the persistent memory area is enabled when the system is in a power-off state; the persistent memory area can store data when the system is in a power-off state. In this way, data can be protected in the event of a power-off of the system. The present application uses the PMR characteristics of the downstream NVMe SSD device to achieve efficient and persistent storage of key data in the RAID controller cache, eliminates the dependence on supercapacitors and dedicated NAND flash memory, and can effectively reduce the overall deployment cost of the system, simplify the hardware design, enhance the reliability of the system, and at the same time improve the technical effect of the operating efficiency of power-off protection.
[0040] The processing flow of the power-off protection method provided in the embodiment of the present application is described. Figure 1 , Figure 1 The power-off protection method provided in the present application is shown in the following figure. Figure 1 , will combine Figure 1 Steps S101-S103 are shown for explanation.
[0041] Step S101, obtaining target data in a cache device included in the system.
[0042] In some embodiments, the cache device may include: a hardware device for high-speed storage of temporary data, such as: SRAM (Static Random Access Memory) and DRAM (Dynamic Random Access Memory) and other hardware devices. The embodiments of the present application do not limit the specific cache device. The target data may include: critical data that requires power-off protection. Specifically, the target data may include: application data, system configuration information, user account information and other data. The embodiments of the present application do not limit the specific target data.
[0043] Step S102, monitoring the working status of the system.
[0044] In some embodiments, the operating state of the system may include a normal power supply state and a power-off state. The embodiments of the present application do not limit the specific operating state. The operating state can be determined by monitoring the operating indicators of the system. The operating indicators of the system may include: power supply state and other indicators such as temperature sensors. The embodiments of the present application do not limit the specific operating indicators to be monitored.
[0045] Step S103, in response to the system being in a power-off state, transferring the target data to a persistent memory area of at least one hard disk drive in the system; the persistent memory area is enabled when the system is in a power-off state; the persistent memory area can store data when the system is in a power-off state.
[0046] In some embodiments, the hard disk drive may include an SSD. The persistent memory area may include an area in the hard disk drive specifically used to store target data. The persistent memory area may include a storage area that can still retain data after the system loses power to ensure that the data is not lost.
[0047] As an example, when the system starts, the target data is loaded from a storage device such as a hard disk into a cache device. The RAID controller continuously monitors the working status of the system, which can be determined by power status, temperature sensors, and other important indicators. When the RAID controller detects an abnormal power status or other system crash signals, the data transfer mechanism is automatically triggered. At least one hard disk drive and the corresponding persistent memory area in the system are selected for data transfer, and the target data in the cache device is transferred to the persistent memory area.
[0048] The method of the embodiment of the present application realizes efficient and persistent storage of key data in the RAID controller cache through the PMR characteristics of the NVMe SSD device mounted by the system, eliminates the dependence on supercapacitors and dedicated NAND flash memory, can effectively reduce system costs, simplify hardware design, enhance system reliability, and improve the operating efficiency of power-off protection.
[0049] In some embodiments, the processing flow of the power-off protection method is shown as follows: Figure 2 ,like Figure 2 As shown, the power-off protection method may include: Step S201, monitoring the working status of the system.
[0050] The specific description of step S201 is the same as that of step S102 and will not be repeated here.
[0051] Step S202, in response to the system being in a power-off state, sending a first control instruction to an interface controller corresponding to the hard disk drive, so that the interface controller transfers target data to a persistent memory area of the hard disk drive based on the first control instruction.
[0052] In this embodiment, the hard disk drive may include a solid-state drive (SSD); the interface controller may include an NVMe controller; the first control instruction may be used to control the interface controller to transfer target data in the cache device to the corresponding hard disk drive through the PCIe interface.
[0053] As an example, the RAID controller detects that the system is in a power-off state and starts the abnormal power-off protection program. The power-off protection program in the RAID controller sends a first control instruction to the NVMe controller corresponding to the NVMe SSD, and writes the target data in the cache to the PMR area of the NVMe SSD through the DMA (Direct Memory Access) transmission method. Among them, the RAID controller and the cache can be powered by ordinary capacitors. When the system is in a power-off state, ordinary capacitors can provide power to the RAID controller and the cache in a short period of time, allowing the RAID controller to have enough time to write the data in the cache to the PMR area of the NVMe SSD. The power supply time is usually a few milliseconds to more than ten milliseconds.
[0054] In some embodiments, the processing flow of the power-off protection method is shown as follows: Figure 3 ,like Figure 3 As shown, the power-off protection method may further include: Step S301 , in response to the system being in a power-off state, transmitting target data to a persistent memory area of at least one hard disk drive in the system.
[0055] The specific description of step S301 is the same as that of step S103 and will not be repeated here.
[0056] Step S302: Send a second control instruction to a hard disk controller corresponding to the hard disk drive through the interface controller, so that the hard disk controller stores the data in the persistent memory area to the non-volatile storage medium of the hard disk drive based on the second control instruction.
[0057] In this embodiment, the non-volatile storage medium may include NAND flash memory; the hard disk controller includes at least a solid-state hard disk controller; the second control instruction is used to control the hard disk controller to store the data in the persistent memory area to the non-volatile storage medium of the hard disk drive through the ONFI interface.
[0058] As an example, the RAID controller sends a second control instruction to the SSD controller corresponding to the NVMe SSD through the NVMe controller, and stores the data in the PMR area of the NVMe SSD to the NAND flash memory of the SSD through the ONFI interface of the SSD controller to complete the protection of data persistent storage. Ordinary capacitors can provide power to the RAID controller and cache in a short time, allowing the RAID controller to have enough time to write the data in the cache to the PMR area of the NVMe SSD. The SSD capacitor can provide circuits for the SSD controller in a short time, allowing the SSD controller to store the data in the PMR area of the NVMe SSD to the NAND flash memory of the SSD through the ONFI interface of the SSD controller. The power supply time of ordinary capacitors and SSD capacitors is usually a few milliseconds to more than ten milliseconds.
[0059] In some embodiments, the processing flow of the power-off protection method is shown as follows: Figure 4 ,like Figure 4 As shown, the power-off protection method may further include: Step S401, obtaining the number of hard disk drives included in the system.
[0060] In this embodiment, the hard disk drive included in the system may include: a hard disk drive mounted under the NVMe controller. When the system starts, the RAID controller can determine the number of mounted solid-state hard disks through the NVMe controller. The solid-state hard disks mounted under the NVMe controller all meet the NVMe specification. The embodiment of the present application does not limit the number of specific hard disk drives.
[0061] Step S402 : in response to the system including at least two hard disk drives, based on a segmentation algorithm and the number of hard disk drives, dividing the target data in the cache device into a plurality of load-balanced segmented data blocks.
[0062] In some embodiments, when the system starts, the target data in the cache device is divided into a plurality of load-balanced segmented data blocks according to the segmentation algorithm and the number of hard disk drives. In this embodiment, the segmentation algorithm may include: a method for dividing the target data in the cache device into smaller data blocks. The segmented data blocks may include: smaller data units divided according to the segmentation algorithm. The segmented data blocks may be processed or transmitted independently. Step S403 , in response to the system being in a power-off state, transmitting the segmented data blocks to the persistent memory areas of at least two hard disk drives in the system in a parallel manner.
[0063] As an example, take an electronic device as an example, two hard disk drives are mounted under the NVMe controller of the electronic device, for example, two solid-state hard disk drives SSD1 and SSD2 are mounted under the NVMe controller, and the target data in the cache device can be divided into two parts of target data, cache data-part1 and cache data-part2. There is a first data transmission link between SSD1 and the cache device, and a second data transmission link between SSD2 and the cache device. Based on the segmentation algorithm, the cache data-part1 is divided into a plurality of load-balanced segmented data blocks. Based on the first data transmission link, the segmented data blocks corresponding to the cache data-part1 are transmitted to the persistent memory area in SSD1. At the same time, based on the segmentation algorithm, the cache data-part2 is divided into a plurality of load-balanced segmented data blocks. Based on the second data transmission link, the segmented data blocks corresponding to the cache data-part2 are transmitted to the persistent memory area in SSD2. The transmission process of the first data transmission link and the second data transmission link is parallel.
[0064] As an example, take an electronic device as an example, three hard disk drives are mounted under the NVMe controller of the electronic device, for example, three solid-state hard disk drives SSD1, SSD2 and SSD3 are mounted under the NVMe controller, and the target data in the cache device can be divided into three parts of target data: cache data-part1, cache data-part2 and cache data-part3. There is a first data transmission link between SSD1 and the cache device, a second data transmission link between SSD2 and the cache device, and a third data transmission link between SSD3 and the cache device. Based on the segmentation algorithm, cache data-part1 is divided into a plurality of load-balanced segmented data blocks. Based on the first data transmission link, the segmented data blocks corresponding to cache data-part1 are transmitted to the persistent memory area in SSD1. At the same time, based on the segmentation algorithm, cache data-part2 is divided into a plurality of load-balanced segmented data blocks. Based on the second data transmission link, the segmented data blocks corresponding to cache data-part2 are transmitted to the persistent memory area in SSD2. At the same time, based on the segmentation algorithm, cache data-part3 is divided into a plurality of load-balanced segmented data blocks. Based on the third data transmission link, the segmented data blocks corresponding to the cache data-part3 are transmitted to the persistent memory area in SSD3. The transmission processes of the first data transmission link, the second data transmission link and the third data transmission link are parallel.
[0065] As an example, the data transfer time to transfer the target data from the cache device to the persistent memory area of the hard drive It can be expressed by the following formula.
[0066]
[0067] in, Indicates the target data size, Indicates the data transfer rate of the NVMe SSD device interface. Represents the transformation factor. Can be a constant. Data transmission time With the target data size Positively correlated with the data transfer rate of the NVMe SSD device interface Negative correlation.
[0068] Furthermore, in order to speed up the transmission of data in the cache device, the target data can be divided into multiple data blocks when the system starts, and transmitted to the persistent memory areas of multiple NVMe SSD devices included in the system according to the specified data transmission rules. Multiple segmented data blocks can be transmitted to the persistent memory areas of different NVMe SSD devices in parallel. This can shorten the data transmission time to , Indicates the number of NVMe SSD devices included in the system.
[0069] In some embodiments, the processing flow of the power-off protection method is shown as follows: Figure 5 ,like Figure 5 As shown, the power-off protection method may include: Step S501, obtaining system power information from a power monitoring interface.
[0070] In this embodiment, the power monitoring interface may include: a power information interface provided by the system. The power information may include: the current power status of the electronic device in which the system is located. The power information may specifically include: voltage information, current information, and power information. The embodiment of the present application does not limit the specific power information. The RAID controller calls the interface corresponding to the power monitoring interface to obtain the power information of the system.
[0071] Step S502: determining the working state of the system based on the power information.
[0072] In this embodiment, the RAID controller determines the current working state according to the acquired power information. For example, if the electronic device in the system is connected to a power adapter, the RAID controller determines that the current system is in a normal power supply state; if the electronic device in the system is disconnected from the power adapter and the battery is exhausted, the RAID controller determines that the current system is in a power-off state.
[0073] Step S503, in response to the system being in a power-off state, starting a power-off protection program.
[0074] In this embodiment, the power-off protection program may include: a program that is automatically started when the RAID controller detects a power-off state. The power-off protection program may be used to safely save target data in the cache device to the persistent memory area of the hard disk drive when the system is in a power-off state.
[0075] Step S504: Based on the power-off protection program, the target data in the cache device is transmitted to the persistent memory area of at least one hard disk drive in the system through a direct memory access transmission mode.
[0076] As an example, the power-off protection program in the RAID controller sends a first control instruction to the NVMe controller corresponding to the NVMe SSD, and writes the target data in the cache to the PMR area of the NVMe SSD through the DMA transmission method. The RAID controller sends a second control instruction to the SSD controller corresponding to the NVMe SSD through the NVMe controller, and stores the data in the PMR area of the NVMe SSD to the NAND flash memory of the SSD through the ONFI interface of the SSD controller to complete the protection of data persistent storage. Among them, the data in the PMR area can still be retained after power failure, and the NAND flash memory can store data persistently. The NAND flash memory is usually connected to the SSD controller using the ONFI interface.
[0077] In some embodiments, the processing flow of the power-off protection method is shown as follows: Figure 6 ,like Figure 6 As shown, the power-off protection method may include: Step S601, in response to the system recovering from a power-off state to a normal power supply state, starting a data recovery program.
[0078] Step S602: based on the data recovery program, read the data from the hard disk drive and restore the read data to the system.
[0079] In this embodiment, the normal power supply state may include: a state in which the system power supply is normally supplied, and the system can operate normally at this time. The system can restore the data previously saved in the hard disk drive in the normal power supply state. The data recovery program may include: a program that is automatically started when the system is restored from the power-off state to the normal power supply state. The data recovery program can be used to read the previously saved data from the persistent memory area of the hard disk drive and restore the data to the cache device of the system.
[0080] As an example, take an electronic device as an example, two solid-state hard disk drives are mounted under the NVMe controller of the electronic device, for example, two solid-state hard disk drives SSD1 and SSD2 are mounted under the NVMe controller. When the system recovers from the power-off state to the normal power supply state, the data recovery program is started. The data recovery program first reads the segmented data blocks corresponding to the cache data-part1 from the persistent memory area of SSD1 through the first data transmission link, and at the same time reads the segmented data blocks corresponding to the cache data-part2 from the persistent memory area of SSD2 through the second data transmission link. These two reading processes are performed in parallel. Then, the segmented data blocks read from SSD1 and SSD2 are merged and restored to the target data, and the restored target data is written back to the cache device to complete the data recovery process.
[0081] As an example, take an electronic device as an example, three solid-state hard disk drives are mounted under the NVMe controller of the electronic device, for example, three solid-state hard disk drives SSD1, SSD2 and SSD3 are mounted under the NVMe controller. When the system recovers from the power-off state to the normal power supply state, the data recovery program is started. The data recovery program first reads the segmented data blocks corresponding to the cache data-part1 from the persistent memory area of SSD1 through the first data transmission link, and at the same time reads the segmented data blocks corresponding to the cache data-part2 from the persistent memory area of SSD2 through the second data transmission link, and at the same time reads the segmented data blocks corresponding to the cache data-part3 from the persistent memory area of SSD3 through the third data transmission link. These three reading processes are performed in parallel. Then, the segmented data blocks read from SSD1, SSD2 and SSD3 are merged and restored to the target data, and the restored target data is written back to the cache device to complete the data recovery process.
[0082] The method of the embodiment of the present application realizes efficient and persistent storage of key data in the RAID controller by utilizing the PMR characteristics of the NVMe SSD device, significantly improving the security and integrity of the data. At the same time, the dependence on supercapacitors and dedicated NAND flash memory is eliminated, the hardware requirements are reduced, the hardware design and the capacitor management interface are simplified, thereby effectively reducing the overall deployment cost of the system. In addition, since the present application mainly relies on the system firmware to implement power-off protection, no additional hardware changes are required, which further simplifies the hardware design and system integration process. In the case of power failure, the RAID controller can quickly back up data to the PMR area of the NVMe SSD, reducing the risk of data loss and improving the reliability of the system. The high read and write speed and low latency characteristics of the NVMe SSD not only improve the performance of data backup and recovery, but also effectively shorten the data transmission time by concurrently transmitting data blocks to different NVMe SSD devices, and improve the response speed of the system in the case of abnormal power failure. Since the solution mainly relies on firmware implementation, the maintenance and upgrade of the system are more convenient, easy to integrate into the existing RAID controller architecture, and reduce the difficulty of maintenance and upgrade. Through a fast and reliable power-off protection mechanism, user satisfaction and trust are improved, and user experience is improved. In addition, the solution is easy to deploy and provides an upgrade path for existing systems, allowing new technologies to be quickly applied to existing storage systems, further optimizing the overall performance of the storage system.
[0083] Figure 7 An application scenario diagram of the power-off protection method provided in an embodiment of the present application is shown.
[0084] refer to Figure 7 An application scenario of the power-off protection method provided in the embodiment of the present application is applied to a RAID controller power-off protection system. The RAID controller power-off protection system may include: a RAID controller S1, a solid state drive S2, a common capacitor S4, and a cache S5.
[0085] The RAID controller S1 may include: an NVMe controller S6 and a power monitoring S3. Among them, the power monitoring S3 may include: a power monitoring interface. The power monitoring interface can be used to monitor the current power status of the electronic device in which the system is located. The NVMe controller S6 is connected to at least one solid-state hard disk S2, and the NVMe controller S6 can be used to communicate and manage the connected solid-state hard disk drive, convert data read and write instructions into a command set that can be executed by the solid-state hard disk drive, and send the command set to the corresponding solid-state hard disk drive for execution. The RAID controller S1 is connected to the host via PCIe, and the RAID controller S1 is also connected to the cache S5.
[0086] The solid state drive S2 may include at least two NVMe SSDs. Figure 7 NVMe SSD #1 represents the first NVMe SSD. NVMe SSD #n represents the nth NVMe SSD. Wherein, n is a positive integer greater than 1. The embodiment of the present application does not limit the specific number of NVMe SSDs. The solid state drive S2 may include: a host interface, an SSD controller, a PMR S7, and a NAND S8. PMR S7 is a persistent storage area in the NVMe SSD. The data in the persistent storage area can still be retained when the system is in a power-off state. PMR S7 provides a more reliable data protection mechanism than traditional volatile cache. NAND S8 can be a non-volatile storage medium for storing metadata that requires persistent storage. NAND S8 is connected to the SSD controller using the ONFI interface. One end of the SSD controller in the solid state drive S2 is connected to the PMR S7, and the other end is connected to the NVMe controller S6 via PCIe.
[0087] The ordinary capacitor S4 can be used to provide power to the RAID controller S1 and the cache S5 when the system is in a power-off state, allowing the RAID controller S1 to have enough time to write the data in the cache S5 into the NAND S8. The power supply time is usually a few milliseconds to more than ten milliseconds. The ordinary capacitor S4 is connected to the RAID controller S1 and the cache S5.
[0088] The cache S5 can be used to temporarily store frequently accessed RAID data blocks. When the system is in a power-off state, the RAID data blocks in the cache S5 need to be saved to the NAND S8 to avoid data loss.
[0089] The process of applying the power-off protection method by the RAID controller power-off protection system may include: Step ①, the RAID controller S1 can determine the current working state of the system through the power monitoring S3, and in response to the system being in a power-off state, start the power-off protection program. The power-off protection program can be used to safely save the target data in the cache device to the persistent memory area of the hard disk drive when the system is in a power-off state.
[0090] Step ②, the power-off protection program in the RAID controller S1 sends a first control instruction to the NVMe controller S6 corresponding to the solid-state drive S2, and writes the RAID data block in the cache to the PMRS7 of the solid-state drive S2 through DMA transmission.
[0091] Step ③, the RAID controller S1 sends a second control instruction to the SSD controller corresponding to the solid state drive S2 through the NVMe controller S6, and stores the data in the PMR S7 in the solid state drive S2 to the NAND S8 of the solid state drive S2 through the ONFI interface of the SSD controller.
[0092] Understandably, Figure 7 The application scenarios of the power-off protection method are only some exemplary implementations in the embodiments of the present application. The application scenarios of the power-off protection method in the embodiments of the present application include but are not limited to Figure 7 The application scenario of the power-off protection method shown.
[0093] Figure 8 Another application scenario diagram of the power-off protection method provided in an embodiment of the present application is shown.
[0094] refer to Figure 8 Another application scenario of the power-off protection method provided in the embodiment of the present application is applied to the system power-off protection workflow. The system power-off protection workflow may include: Step L1, the power monitoring interface detects that the system has an abnormal power failure. Among them, the RAID controller determines the working status of the current system based on the power information obtained from the power monitoring interface. For example, if the electronic device in the system is connected to a power adapter, the RAID controller determines that the current system is in a normal power supply state; if the electronic device in the system is disconnected from the power adapter and the battery is exhausted, the RAID controller determines that the current system is in an abnormal power failure state. The power information may include: the current power status of the electronic device in the system. The power information may specifically include: voltage information, current information, and power information. The embodiments of the present application do not limit the specific power information. The RAID controller calls the interface corresponding to the power monitoring interface to obtain the power information of the system. The RAID controller detects that the system is in an abnormal power failure state and starts the abnormal power failure protection program.
[0095] Step L2, the RAID controller writes the cache data into the PMR of the NVMe SSD. The abnormal power-off protection program in the RAID controller sends a first control instruction to the NVMe controller corresponding to the NVMe SSD, and writes the data in the cache into the PMR of the NVMe SSD through the DMA transmission mode.
[0096] In step L3, the NVMe SSD writes the PMR area data to the NAND to complete persistent storage. The RAID controller sends a second control instruction to the SSD controller corresponding to the NVMe SSD through the NVMe controller, and stores the data in the PMR in the NVMe SSD to the NAND of the NVMe SSD through the ONFI interface of the SSD controller.
[0097] Understandably, Figure 8 The application scenarios of the power-off protection method are only some exemplary implementations in the embodiments of the present application. The application scenarios of the power-off protection method in the embodiments of the present application include but are not limited to Figure 8 The application scenario of the power-off protection method shown.
[0098] The following is a description of an exemplary structure of a software module included in the power-off protection device 90 provided in an embodiment of the present application. In some embodiments, for example, Fig. 9 As shown, the power-off protection device 90 may include: a cache device 901, which is used to cache target data in the system; a hard disk drive 902, which at least includes a persistent memory area, which is used to store data; an independent hard disk redundant array controller 903, one end of the independent hard disk redundant array controller 903 is connected to the cache device 901, and the other end of the independent hard disk redundant array controller 903 is connected to the hard disk drive 902; the independent hard disk redundant array controller 903 is used to obtain the target data in the cache device 901; monitor the working status of the system; in response to the system being in a power-off state, transmit the target data to the persistent memory area of at least one hard disk drive 902 in the system; the persistent memory area is enabled when the system is in a power-off state; the persistent memory area can store data when the system is in a power-off state.
[0099] In some embodiments, the independent disk redundant array controller 903 includes: an interface controller connected to the hard disk drive 902 and used to transfer target data to the persistent memory area of the hard disk drive 902 based on the first control instruction sent by the independent disk redundant array controller 903.
[0100] In some embodiments, the interface controller is connected to the hard disk drive 902 via a high-speed serial computer expansion bus standard interface; the hard disk drive 902 includes at least a solid state drive; and the interface controller includes at least a non-volatile memory host controller interface specification controller.
[0101] In some embodiments, the hard disk drive 902 includes: a hard disk controller, one end of which is connected to the persistent memory area and the other end of which is connected to the interface controller; a non-volatile storage medium, which is connected to the hard disk controller; and the hard disk controller is used to receive a second control instruction sent by the independent hard disk redundant array controller 903 through the interface controller, and store the data in the persistent memory area to the non-volatile storage medium of the hard disk drive 902 based on the second control instruction.
[0102] In some embodiments, the non-volatile storage medium includes at least a NAND flash memory; the hard disk controller includes at least a solid state hard disk controller; and the non-volatile storage medium is connected to the hard disk controller via an open NAND flash memory interface.
[0103] In some embodiments, the independent hard disk redundant array controller 903 is also used to: obtain the number of hard disk drives 902 included in the system; in response to the system including at least two hard disk drives 902, based on the segmentation algorithm and the number of hard disk drives 902, divide the target data in the cache device 901 into multiple load-balanced segmented data blocks; in response to the system being in a power-off state, transmit the segmented data blocks in parallel to the persistent memory area of at least two hard disk drives 902 in the system.
[0104] In some embodiments, the redundant array of independent hard disks controller 903 further includes: a power monitoring interface for obtaining power information of the system and determining the working state of the system based on the determined power information.
[0105] In some embodiments, the power monitoring interface is used to start a power-off protection program in response to the system being in a power-off state; the power-off protection program is used to transfer the target data in the cache device 901 to the persistent memory area of at least one hard disk drive 902 in the system via direct memory access transmission.
[0106] In some embodiments, the power-off protection device 90 further includes: a capacitor connected to the independent hard disk redundant array controller 903 and the cache device 901, and used to provide power when the system is in a power-off state.
[0107] It should be noted that the description of the device in the embodiment of the present application is similar to the description of the method embodiment above, and has similar beneficial effects as the method embodiment, so it will not be repeated. Figures 1 to 7 The present invention can be understood by referring to the description of any one of the accompanying drawings.
[0108] According to an embodiment of the present application, the present application also provides an electronic device and a non-transitory computer-readable storage medium.
[0109] Fig.10 A schematic block diagram of an example electronic device 800 that can be used to implement an embodiment of the present application is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workbenches, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present application described and / or required herein.
[0110] like Fig.10As shown, the electronic device 800 includes a computing unit 801, which can perform various appropriate actions and processes according to a computer program stored in a ROM 802 or a computer program loaded from a storage unit 808 into a RAM 803. In the RAM 803, various programs and data required for the operation of the electronic device 800 can also be stored. The computing unit 801, the ROM 802, and the RAM 803 are connected to each other via a bus 804. An I / O interface 805 is also connected to the bus 804.
[0111] Multiple components in the electronic device 800 are connected to the I / O interface 805, including: an input unit 806, such as a keyboard, a mouse, etc.; an output unit 807, such as various types of displays, speakers, etc.; a storage unit 808, such as a hard disk, an optical disk, etc.; and a communication unit 809, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 809 allows the electronic device 800 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.
[0112] The computing unit 801 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 801 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The computing unit 801 performs the various methods and processes described above, such as the power-off protection method. For example, in some embodiments, the power-off protection method may be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as a storage unit 808. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 800 via the ROM 802 and / or the communication unit 809. When the computer program is loaded into the RAM 803 and executed by the computing unit 801, one or more steps of the power-off protection method described above may be performed. Alternatively, in other embodiments, the computing unit 801 may be configured to perform the power-off protection method in any other appropriate manner (e.g., by means of firmware).
[0113] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0114] The program code for implementing the method of the present application can be written in any combination of one or more programming languages. These program codes can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, implements the functions / operations specified in the flow chart and / or block diagram. The program code can be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
[0115] In the context of the present application, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or device, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0116] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).
[0117] The systems and techniques described herein may be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), and the Internet.
[0118] A computer system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The relationship of client and server is generated by computer programs running on respective computers and having a client-server relationship with each other. The server may be a cloud server, a server of a distributed system, or a server combined with a blockchain.
[0119] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this disclosure can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution disclosed in this application can be achieved, and this document is not limited here.
[0120] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0121] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.
Claims
1. A power-off protection method, characterized in that: The method comprises: Acquiring target data in a cache device included in the system; monitoring the operating status of the system; In response to the system being in a power-off state, the target data is transferred to a persistent memory area of at least one hard disk drive in the system; the persistent memory area is enabled when the system is in a power-off state; the persistent memory area is capable of data storage when the system is in a power-off state.
2. The method according to claim 1, characterized in that: The transferring the target data to a persistent memory area of at least one hard disk drive in the system comprises: A first control instruction is sent to an interface controller corresponding to the hard disk drive, so that the interface controller transfers the target data to a persistent memory area of the hard disk drive based on the first control instruction.
3. The method according to claim 2, characterized in that The hard disk drive comprises at least a solid state hard disk; the interface controller comprises at least a non-volatile memory host controller interface specification controller; The first control instruction is used to control the interface controller to transfer the target data in the cache device to the corresponding hard disk drive through a high-speed serial computer expansion bus standard interface.
4. The method according to claim 1, characterized in that: The method further comprises: A second control instruction is sent to a hard disk controller corresponding to the hard disk drive through the interface controller, so that the hard disk controller stores the data in the persistent memory area to the non-volatile storage medium of the hard disk drive based on the second control instruction.
5. The method according to claim 4, characterized in that The non-volatile storage medium includes at least a NAND flash memory; the hard disk controller includes at least a solid state hard disk controller; The second control instruction is used to control the hard disk controller to store the data in the persistent memory area to the non-volatile storage medium of the hard disk drive through an open NAND flash memory interface.
6. The method according to claim 1, characterized in that The method further comprises: Obtaining the number of hard disk drives included in the system; In response to the system including at least two hard disk drives, based on a segmentation algorithm and the number of the hard disk drives, dividing the target data in the cache device into a plurality of load-balanced segmented data blocks; In response to the system being in a power-off state, the segmented data blocks are transferred in parallel to persistent memory areas of at least two hard disk drives in the system.
7. The method according to claim 1, characterized in that The monitoring of the working status of the system comprises: Obtaining power information of the system from a power monitoring interface; Based on the power information, an operating state of the system is determined.
8. The method according to claim 7, characterized in that After determining the working state of the system based on the power information, the method further includes: In response to the system being in a power-off state, starting a power-off protection program; Based on the power-off protection program, the target data in the cache device is transmitted to the persistent memory area of at least one hard disk drive in the system through a direct memory access transmission mode.
9. The method according to claim 1, characterized in that: The method further comprises: In response to the system recovering from a power-off state to a normal power-on state, starting a data recovery program; Based on the data recovery program, data is read from the hard disk drive, and the read data is restored to the system.
10. A power-off protection device, characterized in that: The device comprises: A cache device, used to cache target data in the system; a hard disk drive, including at least a persistent memory area, for storing data; An independent hard disk redundant array controller, one end of the independent hard disk redundant array controller is connected to the cache device, and the other end of the independent hard disk redundant array controller is connected to the hard disk drive; The independent redundant array of hard disks controller is used to obtain target data in the cache device; monitor the working status of the system; in response to the system being in a power-off state, transfer the target data to a persistent memory area of at least one hard disk drive in the system; the persistent memory area is enabled when the system is in a power-off state; the persistent memory area can store data when the system is in a power-off state.
11. The device according to claim 10, characterized in that The independent hard disk redundant array controller comprises: The interface controller is connected to the hard disk drive and is used to transfer the target data to the persistent memory area of the hard disk drive based on a first control instruction sent by the independent hard disk redundant array controller.
12. The device according to claim 11, characterized in that The interface controller is connected to the hard disk drive via a high-speed serial computer expansion bus standard interface; The hard disk drive at least includes a solid state hard disk; the interface controller at least includes a non-volatile memory host controller interface specification controller.
13. The device according to claim 10, characterized in that The hard disk drive comprises: A hard disk controller, one end of which is connected to the persistent memory area, and the other end of which is connected to the interface controller; A non-volatile storage medium connected to the hard disk controller; The hard disk controller is used to receive a second control instruction sent by the independent hard disk redundant array controller through the interface controller, and store the data in the persistent memory area to the non-volatile storage medium of the hard disk drive based on the second control instruction.
14. The device according to claim 13, characterized in that The non-volatile storage medium includes at least a NAND flash memory; the hard disk controller includes at least a solid state hard disk controller; the non-volatile storage medium is connected to the hard disk controller via an open NAND flash memory interface.
15. The device according to claim 10, characterized in that The independent hard disk redundant array controller is also used for: Obtaining the number of hard disk drives included in the system; In response to the system including at least two hard disk drives, based on a segmentation algorithm and the number of the hard disk drives, dividing the target data in the cache device into a plurality of load-balanced segmented data blocks; In response to the system being in a power-off state, the segmented data blocks are transferred in parallel to persistent memory areas of at least two hard disk drives in the system.
16. The device according to claim 10, characterized in that The independent hard disk redundant array controller also includes: The power monitoring interface is used to obtain the power information of the system and determine the working status of the system based on the determined power information.
17. The device according to claim 16, characterized in that The power monitoring interface is used to start a power-off protection program in response to the system being in a power-off state; The power-off protection program is used to transfer the target data in the cache device to the persistent memory area of at least one hard disk drive in the system through a direct memory access transmission mode.
18. The device according to claim 10, characterized in that The device also includes: The capacitor is connected to the independent disk array controller and the cache device, and is used to provide power when the system is in a power-off state.
19. An electronic device, characterized in that: include: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1 to 9.
20. A non-transitory computer-readable storage medium storing computer instructions, characterized in that: The computer instructions are used to make a computer execute the method according to any one of claims 1-9.
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