Display panel and display device

Abstract

The invention discloses a display panel and a display device. The display panel comprises a plurality of pixel units arranged in an array, and each pixel unit comprises a pixel circuit and a light-emitting element. The pixel circuit comprises a driving module, a light-emitting control module and a coupling module. The driving module is used for providing driving current for the light-emitting element; the light-emitting control module is used for selectively allowing the light-emitting element to enter a light-emitting stage; the first end of the driving module receives a reference signal in at least part of the time period of the compensation stage of the non-light-emitting stage; in the data writing stage of the non-light-emitting stage, the coupling module is used for adjusting the first terminal voltage of the driving module; wherein in the same non-light-emitting stage, the compensation stage is before the data writing stage. According to the embodiment of the invention, the influence of the parasitic capacitance of the light-emitting element on the driving current can be eliminated, the stability of the light-emitting brightness is ensured, and the display uniformity and stability of the display panel are improved.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and in particular, relates to a display panel and a display device. Background Art

[0002] At present, the display panel is usually composed of a plurality of light-emitting pixels arranged in an array, and the light-emitting pixels are composed of a pixel circuit and a light-emitting element. The pixel circuit is usually composed of a TFT (Thin Film Transistor) and a capacitor. The light-emitting element can usually include an OLED (Organic Light-Emitting Diode) or other light-emitting devices.

[0003] There is a parasitic capacitance Coled at both ends of the light-emitting element, and its capacitance value will change with the position, temperature, and light-emitting type of the light-emitting element. Therefore, in the actual display process, the parasitic capacitance Coled of light-emitting elements with different light-emitting colors, light-emitting elements in different display areas, and light-emitting elements in different temperature environments will be different.

[0004] Since the driving current provided by the driving transistor is affected by the capacitance of the parasitic capacitor of the light emitting element, when the capacitance of the parasitic capacitor of the light emitting element changes, the brightness of the light emitting pixel will change with the change of the capacitance, thereby affecting the display uniformity of the display panel. Summary of the invention

[0005] The embodiments of the present application provide a display panel and a display device, which can improve the technical problem that the luminous brightness of the luminous pixels is affected by the parasitic capacitance of the luminous elements, resulting in poor display uniformity of the display panel.

[0006] In a first aspect, an embodiment of the present application provides a display panel, the display panel includes a plurality of pixel units arranged in an array, the pixel unit includes a pixel circuit and a light-emitting element; the pixel circuit includes a driving module, a light-emitting control module and a coupling module;

[0007] The driving module is used to provide driving current for the light-emitting element;

[0008] The light-emitting control module is used for selectively allowing the light-emitting element to enter the light-emitting stage;

[0009] During at least a part of the compensation phase of the non-light-emitting phase, the first end of the driving module receives a reference signal;

[0010] In the data writing phase of the non-luminescent phase, the coupling module is used to adjust the voltage of the first terminal of the driving module; wherein the compensation phase is before the data writing phase in the same non-luminescent phase.

[0011] In a second aspect, an embodiment of the present application provides a display panel, the display panel includes a plurality of pixel units arranged in an array, the pixel unit includes a pixel circuit and a light-emitting element; the pixel circuit includes:

[0012] A first light emission control transistor, the first light emission control transistor is electrically connected to the light emitting element;

[0013] a second light emission control transistor;

[0014] A driving transistor, the driving transistor is electrically connected to the second light emitting control transistor and the first light emitting control transistor;

[0015] A storage capacitor connected between the gate of the driving transistor and the first electrode of the driving transistor;

[0016] A data writing transistor, the data writing transistor is electrically connected to the driving transistor;

[0017] A coupling capacitor, wherein a first end of the coupling capacitor is connected to the first electrode of the driving transistor, and a second end of the coupling capacitor is electrically connected to the first node;

[0018] During at least a part of the non-light emitting phase, a fixed potential is written to the first node.

[0019] In a third aspect, an embodiment of the present application provides a display device, comprising the display panel of the first aspect or the display panel of the second aspect.

[0020] Compared with the prior art, the display panel and display device provided by the embodiment of the present application can receive a reference signal at the compensation stage of the non-luminous stage, and the reference signal can charge the first and second ends of the driving module so that the voltage difference between the control terminal voltage and the first terminal voltage of the driving module is maintained at the conduction threshold voltage. In the data writing stage of the non-luminous stage, after the data signal is written to the control terminal of the driving module, the control terminal voltage jumps, and based on the jump amplitude of the control terminal voltage, the coupling module can couple and adjust the first terminal voltage of the driving module. The first terminal voltage of the driving module after coupling adjustment has nothing to do with the parasitic capacitance of the light-emitting element, so the gate-source voltage difference of the driving module can eliminate the influence of the parasitic capacitance of the light-emitting element. Since the driving current provided by the driving module is associated with the gate-source voltage difference, the conduction threshold voltage and each capacitor of the driving module, after eliminating the influence of the parasitic capacitance of the light-emitting element, even if the parasitic capacitance of the light-emitting element is different due to differences in position, temperature and light color, it will not affect the actual light brightness of the light-emitting element, thereby improving the display uniformity and stability of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 is a schematic structural diagram of a pixel unit provided in an embodiment of the present application;

[0023] Figure 2 is a schematic diagram of timing signals provided by an embodiment of the present application;

[0024] Figure 3 is a structural schematic diagram of a pixel unit provided by another embodiment of the present application;

[0025] Figure 4 is a schematic diagram of timing signals provided by another embodiment of the present application;

[0026] Figure 5 is a structural schematic diagram of a pixel unit provided by another embodiment of the present application;

[0027] Figure 6 This is one of the structural schematic diagrams of a pixel unit provided in yet another embodiment of the present application;

[0028] Figure 7 This is a second structural schematic diagram of a pixel unit provided in yet another embodiment of the present application;

[0029] Figure 8 is a schematic diagram of timing signals provided by another embodiment of the present application;

[0030] Fig. 9 This is a third structural schematic diagram of a pixel unit provided in yet another embodiment of the present application;

[0031] Fig.10 This is a fourth structural diagram of a pixel unit provided in yet another embodiment of the present application;

[0032] Fig.11 is a schematic diagram of timing signals provided in yet another embodiment of the present application;

[0033] Fig.12 This is the fifth structural diagram of a pixel unit provided in yet another embodiment of the present application;

[0034] Fig.13 This is the sixth structural diagram of a pixel unit provided in yet another embodiment of the present application;

[0035] Fig.14 is a schematic diagram of timing signals provided in yet another embodiment of the present application;

[0036] Fig.15 This is the seventh structural diagram of a pixel unit provided in yet another embodiment of the present application;

[0037] Fig.16 is a schematic diagram of a transistor structure of a pixel unit provided in an embodiment of the present application;

[0038] Fig.17 is a schematic diagram of a transistor structure of a pixel unit provided in another embodiment of the present application;

[0039] Fig.18 is a schematic diagram of a transistor structure of a pixel unit provided in another embodiment of the present application;

[0040] Fig.19 This is one of the transistor structure schematic diagrams of a pixel unit provided in yet another embodiment of the present application;

[0041] Fig. 20 This is a second schematic diagram of a transistor structure of a pixel unit provided in yet another embodiment of the present application;

[0042] Fig.21 This is a third schematic diagram of a transistor structure of a pixel unit provided in yet another embodiment of the present application;

[0043] Fig. 22 This is a fourth schematic diagram of a transistor structure of a pixel unit provided in yet another embodiment of the present application;

[0044] Fig.23 This is a fifth schematic diagram of a transistor structure of a pixel unit provided in yet another embodiment of the present application;

[0045] Fig.24 It is a schematic diagram of the structure of a display device provided in one embodiment of the present application.

[0046] In the attached figure:

[0047] 10. Pixel circuit; L. Light-emitting element; 11. Driving module; 12. Light-emitting control module; 121. First light-emitting control unit; 122. Second light-emitting control unit; 13. Coupling module; 14. Data writing module; 15. Initialization module; 16. Storage module; 17. Reference signal writing module; 18. Coupling control module; 19. Charging module; t1. Initialization phase; t2. Compensation phase; t3. Data writing phase; t4. Light-emitting phase; T1. Data writing transistor; T2. Initialization transistor; T3. Driving transistor; T4. First light-emitting control transistor; T5. Second light-emitting control transistor; C1. Storage capacitor; C2. Coupling capacitor; T6. Reference signal writing transistor; T7. Coupling control transistor; T8. Charging transistor; 100. Display panel; 1000. Display device. DETAILED DESCRIPTION

[0048] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0049] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0050] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The embodiments will be described in detail below in conjunction with the accompanying drawings.

[0051] At present, the display panel is usually composed of a plurality of light-emitting pixels arranged in an array, and the light-emitting pixels are composed of a pixel circuit and a light-emitting element. The pixel circuit is usually composed of a TFT (Thin Film Transistor) and a capacitor. The light-emitting element can usually include an OLED (Organic Light-Emitting Diode) or other light-emitting devices.

[0052] There is a parasitic capacitance Coled at both ends of the light-emitting element, and its capacitance value will change with the position, temperature, and light-emitting type of the light-emitting element. Therefore, in the actual display process, the parasitic capacitance Coled of light-emitting elements with different light-emitting colors, light-emitting elements in different display areas, and light-emitting elements in different temperature environments will be different.

[0053] Since the driving current provided by the driving transistor is affected by the capacitance of the parasitic capacitor of the light emitting element, when the capacitance of the parasitic capacitor of the light emitting element changes, the brightness of the light emitting pixel will change with the change of the capacitance, thereby affecting the display uniformity of the display panel.

[0054] In order to solve the above technical problems, the embodiments of the present application provide a display panel and a display device. The display panel provided by the embodiments of the present application is first introduced below.

[0055] Figure 1 The structure diagram of a display panel provided by an embodiment of the present application is shown. The display panel includes a plurality of pixel units arranged in an array, and the pixel unit includes a pixel circuit 10 and a light emitting element L.

[0056] The pixel circuit 10 includes a driving module 11 , a light emitting control module 12 and a coupling module 13 .

[0057] The driving module 11 can provide a driving current for the light emitting element L. The light emitting control module 12 can selectively allow the light emitting element L to enter the light emitting stage. That is, when the light emitting control module 12 is turned on, the light emitting element L enters the light emitting node, and the driving module 11 can provide a driving current for the light emitting element L in the light emitting stage to drive the light emitting element L to emit light.

[0058] Figure 2 The timing signal schematic diagram of the pixel circuit 10 in an image frame is shown. A single image frame of the pixel unit may include a non-light-emitting phase and a light-emitting phase t4. The non-light-emitting phase may include an initialization phase t1, a compensation phase t2, and a data writing phase t3.

[0059] In the non-luminous stage, the corresponding data signal can be written to the driving module 11; in the luminous stage t4, the driving module 11 can provide the corresponding driving current to the light-emitting element L based on the signal voltage of the written data signal, thereby realizing the brightness control of the pixel unit in the image frame.

[0060] The non-luminous phase may include a compensation phase t2 and a data writing phase t3 , and in the same non-luminous phase, the compensation phase t2 is in front and the data writing phase t3 is in the back.

[0061] During at least part of the compensation phase t2, the first end of the driving module 11 can receive a reference signal provided by the reference signal end. Based on the received reference signal, the driving module 11 can adjust the voltage of the first end of the driving module 11 based on the voltage of the control end of the driving module 11 while maintaining the on state. For example, taking the driving module 11 as an oxide transistor, the transistor remains on when the difference between the gate voltage and the source voltage is greater than or equal to the on threshold voltage. The second end of the driving module 11 can be the drain of the transistor. When the drain of the transistor receives a high potential reference signal, the reference signal can be written to the source of the transistor through the on transistor, thereby raising the source voltage, that is, raising the voltage of the first end of the driving module 11. When the source voltage is raised to the difference between the gate voltage and the on threshold voltage, the transistor is in a critical state of on. At this time, if the source voltage continues to increase, the gate-source voltage difference of the transistor will be less than the on threshold voltage, so that the transistor becomes off. In the off state, the source voltage will remain at the voltage value of the critical state of on. That is, when the reference signal is written, the source voltage of the transistor will be maintained at the difference between the gate voltage and the on-threshold voltage. Taking the gate voltage of the transistor as Vref and the on-threshold voltage as Vth as an example, after writing the reference signal, the source voltage of the transistor is raised to Vref-Vth.

[0062] In the data writing phase t3, the data signal is written into the control terminal of the driving module 11, and the voltage of the control terminal of the driving module 11 jumps from the voltage of the compensation phase t2 to the data signal voltage. At this time, the coupling module 13 can couple and adjust the voltage of the first terminal of the driving module 11 based on the jump amplitude of the voltage of the control terminal of the driving module 11.

[0063] A storage module 16 may be further provided between the first end and the control end of the driving module 11. The storage module 16 and the coupling module 13 may be capacitive devices.

[0064] In the embodiment where the driving module 11 is an oxide transistor, taking the storage module 16 and the coupling module 13 as capacitors as an example, in the compensation stage t2 , the gate voltage of the transistor is Vref, and the source voltage is Vref−Vth.

[0065] In the data writing phase t3, after the data signal Vdata is written to the gate of the transistor, the gate voltage of the transistor jumps to Vdata, and the jump amplitude of the gate voltage is Vdata-Vref. When the capacitance value of the storage module 16 is C1 and the capacitance value of the coupling module 13 is C2, the storage module 16 and the coupling module 13 can be coupled to adjust the source voltage of the transistor based on the jump amplitude of the gate voltage of the transistor.

[0066] As an optional implementation, when the coupling module 13 is connected between the first end and the fixed potential end of the driving module 11 , one end of the coupling module 13 can maintain a fixed potential, and the other end is connected to the first end of the driving module 11 .

[0067] Taking the driving module 11 as an oxide transistor as an example, when the jump amplitude of the gate voltage is Vdata-Vref, based on the connection relationship between the storage module 16 and the coupling module 13, the jump amplitude of the source voltage can be calculated to be (Vdata-Vref)*C1 / (C1+C2). Since the source voltage in the compensation stage t2 is Vref-Vth, the source voltage after coupling adjustment in the data writing stage t3 is:

[0068] (Vref-Vth)+(Vdata-Vref)*C1 / (C1+C2);

[0069] At this time, the gate voltage of the transistor is Vdata, and the gate-source voltage difference Vgs can be calculated based on the gate voltage and the source voltage. That is:

[0070] Vgs=Vdata-[(Vref-Vth)+(Vdata-Vref)*C1 / (C1+C2)]

[0071] =(Vdata-Vref)*(C2 / (C1+C2))+Vth;

[0072] In the data writing stage t3 of the non-luminous stage, by writing the data signal Vdata to the gate of the driving transistor T3, the source voltage of the driving transistor T3 can be adjusted through the coupling module 13 and the storage module 16, thereby adjusting the gate-source voltage difference Vgs of the driving transistor T3.

[0073] In the light emitting stage t4, the driving current provided by the driving module 11 is associated with the gate-source voltage difference and the threshold voltage of the transistor. For example, the calculation formula of the driving current Ioled when the driving transistor T3 is in the on state is:

[0074] Ioled=K*(Vgs-Vth) 2

[0075] =K*((Vdata-Vref)*(C2 / (C1+C2))) 2 ;

[0076] Here, K is a constant associated with the mobility of the transistor.

[0077] Based on the calculation formula of the above driving current Ioled, it can be known that in the light-emitting stage t4, the driving current Ioled of the light-emitting element L is associated with the data signal Vdata, the initial gate voltage Vref of the driving transistor T3, the capacitance C1 of the storage module 16, and the capacitance C2 of the coupling module 13. When Vref, C1, and C2 are all fixed parameters, the driving current Ioled of the driving transistor T3 has a positive correlation with the data signal Vdata, and will not be affected by the parasitic capacitance Coled of the light-emitting element L. Therefore, in the actual display process, for the light-emitting elements L of different light-emitting colors, the light-emitting elements L of different display areas, and the light-emitting elements L under different temperature environments, although there are differences in their parasitic capacitance Coled, it will not affect the magnitude of the driving current flowing through the light-emitting element L in the light-emitting stage t4, so that the light-emitting brightness of the light-emitting element L will not be affected by the capacitance of the parasitic capacitance, and the display uniformity and stability of the display panel can be guaranteed.

[0078] In addition, the calculation formula of the driving current Ioled does not involve the on-threshold voltage Vth of the driving transistor T3, so when the on-threshold voltage of the driving transistor T3 drifts, it will not affect the driving current in the light-emitting stage t4. That is, when the characteristics of the driving transistor T3 drift, it will not affect the actual light-emitting brightness of the light-emitting element L, and the display uniformity and stability of the display panel can also be guaranteed.

[0079] In this embodiment, in the compensation stage t2 of the non-luminous stage, the first end of the driving module 11 can receive a reference signal, and the reference signal can charge the first end and the second end of the driving module 11, so that the voltage difference between the control end voltage and the first end voltage of the driving module 11 is maintained at the conduction threshold voltage. In the data writing stage t3 of the non-luminous stage, after the data signal is written to the control end of the driving module 11, the control end voltage jumps, and based on the jump amplitude of the control end voltage, the coupling module 13 can couple and adjust the first end voltage of the driving module 11. The first end voltage of the driving module 11 after coupling adjustment has nothing to do with the parasitic capacitance of the light-emitting element L, so the gate-source voltage difference of the driving module 11 can eliminate the influence of the parasitic capacitance of the light-emitting element L. Since the driving current provided by the driving module 11 is associated with the gate-source voltage difference, the conduction threshold voltage and each capacitor of the driving module 11, after eliminating the influence of the parasitic capacitance of the light-emitting element L, even if the parasitic capacitance of the light-emitting element L is different due to differences in position, temperature and light color, it will not affect the actual light brightness of the light-emitting element L, thereby improving the display uniformity and stability of the display panel.

[0080] Please refer to Figure 3 In some embodiments, the pixel circuit 10 may further include a reference signal writing module 17 .

[0081] The first end of the reference signal writing module 17 is connected to the reference signal end, and the second end is connected to the light emitting control module 12 .

[0082] Figure 4 Shows Figure 3 Schematic diagram of timing signals of the corresponding embodiment in an image frame. During at least part of the compensation stage t2 of the non-luminous stage, the reference signal writing module 17 is controlled by the G3 signal, and the high level signal provided by the G3 signal during the compensation stage t2 can control the reference signal writing module 17 to be turned on, so that the reference signal Vini provided by the reference signal terminal can be written.

[0083] When the reference signal writing module 17 writes the reference signal Vini, the reference signal Vini can be transmitted to the light emitting control module 12 . When the light emitting control module 12 is turned on, the reference signal Vini can be written to the first end of the driving module 11 .

[0084] It is understandable that the above-mentioned light-emitting control module 12 can allow the light-emitting element L to enter the light-emitting stage t4 when it is turned on. Therefore, in the non-light-emitting stage, when the light-emitting control module 12 plays the role of transmitting the reference signal Vini, it is necessary to prevent the light-emitting element L from entering the light-emitting stage t4. For example, the light-emitting control module 12 may include two transistors, and when both transistors are turned on, the light-emitting element L enters the light-emitting stage t4; and in the compensation stage t2 of the non-light-emitting stage, one of the two transistors is turned on, and the light-emitting element L does not enter the light-emitting stage t4 at this time, and the reference signal Vini provided by the reference signal terminal can be written to the first end of the driving module 11 through the reference signal writing module 17 and the turned-on transistor.

[0085] Please refer to Figure 5 In some embodiments, the light emitting control module 12 may include a first light emitting control unit 121 .

[0086] The first end of the first light emitting control unit 121 is electrically connected to the light emitting element L, the first end of the first light emitting control unit 121 is also connected to the second end of the reference signal writing module 17 , and the second end of the first light emitting control unit 121 is connected to the second end of the driving module 11 .

[0087] like Figure 4 As shown, in the compensation stage t2 of the non-luminous stage, the EM1 signal is a high-level valid signal, and the first luminous control unit 121 is in the on state; the G3 signal is also a high-level valid signal, and the reference signal writing module 17 is in the on state.

[0088] The reference signal Vini provided by the reference signal terminal can be written into the second terminal of the driving module 11 through the reference signal writing module 17 and the first light emitting control unit 121 .

[0089] Taking the driving module 11 as an oxide transistor as an example, the first end of the driving module 11 is the source of the transistor, and the second end is the drain of the transistor. When the reference signal Vini is written to the drain of the transistor, if the transistor is in the on state, the reference signal Vini can raise the source voltage of the transistor through the on transistor until the source voltage of the transistor reaches the difference between the gate voltage and the on threshold voltage. At this time, if the source voltage continues to rise, the gate-source voltage difference of the transistor will be less than the on threshold voltage, causing the transistor to become cut-off, and the reference signal Vini cannot continue to raise the source voltage. Therefore, the reference signal Vini can only raise the source voltage of the transistor to the difference between the gate voltage and the on threshold voltage.

[0090] It should be noted that before the compensation stage t2 of the non-luminous stage, the non-luminous stage may also include an initialization stage t1. The initialization stage t1 may discharge the charge of the source voltage of the transistor so that the gate-source voltage difference of the driving transistor T3 is greater than the turn-on threshold voltage, thereby keeping the driving transistor T3 in the on state during the compensation stage t2, so that the source voltage of the driving transistor T3 can be charged through the reference signal Vini.

[0091] Please refer to Figure 6 In some embodiments, the first end of the coupling module 13 may be connected to the first end of the driving module 11 , and the second end of the coupling module 13 may be connected to the second end of the reference signal writing module 17 .

[0092] In the data writing phase t3 of the non-light emitting phase, the reference signal writing module 17 can maintain the on state to write the reference signal Vini provided by the reference signal terminal to the second terminal of the coupling module 13 .

[0093] In the data writing phase t3 , the second end of the coupling module 13 maintains a fixed potential, which is the signal voltage of the reference signal Vini; the end of the storage module 16 connected to the control end of the driving module 11 also maintains a fixed potential, which is the control end voltage of the driving module 11 .

[0094] In the data writing phase t3 , the control terminal voltage of the driving module 11 undergoes a voltage jump due to the written data signal. At this time, the storage module 16 and the coupling module 13 can be coupled together to adjust the first terminal voltage of the driving module 11 .

[0095] According to the control terminal voltage and the first terminal voltage of the driving module 11 after the data signal is written, combined with the conduction threshold voltage and mobility characteristics of the driving module 11, the driving current provided by the driving module 11 to the light-emitting element L in the light-emitting stage t4 can be calculated. Based on the calculation formula of the driving current, it can be known that the magnitude of the driving current is independent of the conduction threshold voltage of the driving module 11, and is also independent of the parasitic capacitance of the light-emitting element L. Therefore, in the actual display process, the luminous brightness of the light-emitting element L will not be affected by the parasitic capacitance of the light-emitting element L. Moreover, when the device characteristics of the driving module 11 drift, even if the conduction threshold voltage changes, it will not affect the luminous brightness of the light-emitting element L. That is, the structure of the above-mentioned pixel circuit 10 can ensure that the luminous brightness of the light-emitting element L is not affected by the parasitic capacitance of the light-emitting element L and the conduction threshold voltage of the driving module 11, thereby improving the display uniformity and display stability of the display panel.

[0096] Please refer to Figure 7 In some embodiments, the pixel circuit 10 may further include a coupling control module 18 . Figure 8 Shows Figure 7 A schematic diagram of a timing signal in an image frame of a corresponding embodiment.

[0097] The second end of the coupling module 13 may be connected to the second end of the reference signal writing module 17 via the coupling control module 18 .

[0098] It can be understood that when the reference signal writing module 17 is turned on alone, since the coupling control module 18 is not turned on, the reference signal Vini can be written into the second end of the driving module 11 through the turned-on first light-emitting control unit 121; and when both the reference signal writing module 17 and the coupling control module 18 are turned on, the reference signal Vini can be written into the second end of the coupling module 13 through the coupling control module 18. At this time, if the first light-emitting control unit 121 is turned on, the reference signal Vini can also be written into the second end of the driving module 11; if the first light-emitting control unit 121 is turned off, the reference signal Vini will not be written into the second end of the driving module 11.

[0099] Combination Figure 7 and Figure 8 , during at least part of the data writing phase t3 of the non-luminous phase, the coupling control module 18 is in the on state, and can write the reference signal Vini to the second end of the coupling module 13. The coupling module 13 can adjust the voltage coupling of the first end of the coupling module 13, that is, the first end of the driving module 11, based on the reference signal Vini received at the second end.

[0100] Please refer to Fig. 9In some embodiments, a first end of the coupling module 13 is connected to a first end of the driving module 11 , and a second end of the coupling module 13 is connected to a fixed potential end. Fig. 9 The timing signal diagram of a corresponding embodiment in an image frame can be: Figure 4 shown.

[0101] The fixed potential terminal can provide a fixed potential voltage signal Vx, so that the second terminal of the coupling module 13 maintains a fixed potential.

[0102] Compared with the embodiment in which the second end of the coupling module 13 receives the reference signal Vini, the fixed potential end in this embodiment will continue to provide the fixed potential signal Vx, so the second end of the coupling module 13 can receive the fixed potential signal regardless of the non-luminous stage or the luminous stage t4.

[0103] It should be noted that a fixed potential signal line providing a fixed potential signal may also be provided in the display panel. The fixed potential signal line may be arranged in a mesh, horizontally, or vertically in the display panel, or in other arrangements, which are not limited here. The second end of the coupling module 13 in each pixel circuit 10 may be connected to a nearby fixed potential signal line and receive a fixed potential signal.

[0104] Please refer to Fig.10 In some embodiments, the light emitting control module 12 may include a first light emitting control unit 121 .

[0105] The first end of the first light emitting control unit 121 is electrically connected to the light emitting element L, the first end of the first light emitting control unit 121 is connected to the second end of the reference signal writing module 17 , and the second end of the first light emitting control unit 121 is connected to the second end of the driving module 11 .

[0106] like Fig.11 As shown, in the non-light-emitting stage, the EM1 signal provides a low-level non-valid signal, and the first light-emitting control unit 121 maintains a disconnected state. That is, in the non-light-emitting stage, when the reference signal writing module 17 is turned on, since the first light-emitting control unit 121 is disconnected, the reference signal Vini cannot be written to the second end of the driving module 11 through the first light-emitting control unit 121.

[0107] The pixel circuit 10 may further include a charging module 19 .

[0108] The charging module 19 is connected to the second end of the driving module 11. During at least part of the compensation phase t2 of the non-luminous phase, the G5 signal provides a high-level effective signal to control the charging module 19 to be turned on, and the charging module 19 can write a charging signal Vc to the second end of the driving module 11.

[0109] In this embodiment, the timing signal of a single image frame is as follows: Fig.11 As shown, since the EM1 signal always maintains a low level in the non-light-emitting stage, the first light-emitting control unit 121 will always remain in a disconnected state, and the reference signal Vini provided by the reference signal terminal cannot be written to the second end of the driving module 11 through the first light-emitting control unit 121. Therefore, in the compensation stage t2, it is necessary to write the charging signal Vc to the second end of the driving module 11 through the charging module 19.

[0110] When the signal voltage of the charging signal Vc is higher than the difference between the control terminal voltage of the driving module 11 and the conduction threshold voltage, the charging signal Vc can raise the second terminal voltage of the driving module 11, and raise the first terminal voltage of the driving module 11 through the turned-on driving module 11, until the first terminal voltage is increased to the difference between the control terminal voltage of the driving module 11 and the conduction threshold voltage. That is, in this embodiment, charging the driving module 11 by using the charging signal Vc can also achieve the same effect of charging the driving module 11 by using the reference signal Vini in the above embodiment.

[0111] Please refer to Fig.12 In some embodiments, the first end of the coupling module 13 may be connected to the first end of the driving module 11, and the second end of the coupling module 13 may be connected to the second end of the reference signal writing module 17. The charging module 19 may be connected between the second end of the driving module 11 and the second end of the coupling module 13.

[0112] During at least a portion of the compensation phase t2 and the data writing phase t3 of the non-light-emitting phase, the reference signal writing module 17 may write the reference signal Vini.

[0113] In the compensation stage t2 , the reference signal Vini written by the reference signal writing module 17 can be used as a charging signal of the charging module 19 , and is written to the second end of the driving module 11 when the charging module 19 is turned on.

[0114] In the data writing phase t3, the reference signal Vini written by the reference signal writing module 17 can maintain a fixed potential at the second end of the coupling module 13. The coupling module 13 can adjust the voltage of the first end of the driving module 11 through the first end coupling.

[0115] Please refer to Fig.13 In some embodiments, the pixel circuit 10 may further include a coupling control module 18 . Fig.14 for Fig.13 A schematic diagram of a timing signal in an image frame of a corresponding embodiment.

[0116] The second end of the coupling module 13 may be connected to the second end of the reference signal writing module 17 via the coupling control module 18 .

[0117] When the reference signal writing module 17 and the coupling control module 18 are turned on at the same time, the reference signal Vini can be written to the second end of the coupling module 13 .

[0118] During at least a portion of the compensation phase t2 and the data writing phase t3 of the non-light-emitting phase, the coupling control module 18 is in the on state and can write the reference signal Vini to the second end of the coupling module 13 .

[0119] In the compensation stage t2 , when the reference signal Vini is written to the second end of the coupling module 13 , the charging module 19 is turned on to connect the second end of the coupling module 13 with the second end of the driving module 11 , thereby writing the reference signal Vini to the second end of the driving module 11 .

[0120] In the data writing phase t3 , the charging module 19 is disconnected, and at this time, the second end of the coupling module 13 can maintain a fixed potential as the reference signal Vini.

[0121] Please refer to Fig.15 In some embodiments, the first end of the charging module 19 may be connected to the second end of the driving module 11, and the second end of the charging module 19 may be connected to the fixed potential end.

[0122] The fixed potential terminal can provide a fixed potential voltage signal. When the charging module 19 is turned on, the fixed potential voltage signal can be written into the second terminal of the driving module 11, thereby adjusting the voltage of the first terminal of the driving module 11. When the charging module 19 is disconnected, the second terminal of the driving module 11 stops writing the fixed potential voltage signal.

[0123] Please refer to Fig.15 In some embodiments, the pixel circuit 10 may further include a data writing module 14 .

[0124] The data writing module 14 may be connected to the control terminal of the driving module 11 and provide a data signal to the driving module 11 when it is turned on.

[0125] During at least a portion of the data writing phase t3 of the non-luminescent phase, the data writing module 14 can write a data signal to the control terminal of the driving module 11 to adjust the control terminal voltage of the driving module 11 to the signal voltage of the written data signal.

[0126] Please refer to Fig.15 In some embodiments, the pixel circuit 10 may further include an initialization module 15 .

[0127] The initialization module 15 may be connected to the control terminal of the driving module 11 and initialize the voltage of the control terminal of the driving module 11 when it is turned on.

[0128] During at least part of the initialization phase t1 and the compensation phase t2 of the non-luminous phase, the initialization module 15 is in a conducting state, and can write an initialization signal to the control end of the driving module 11 to adjust the control end voltage of the driving module 11 to the signal voltage of the written initialization signal. In the same non-luminous phase, the initialization phase t1 is before the compensation phase t2.

[0129] Please refer to Fig.15 In some embodiments, the light emitting control module 12 may further include a second light emitting control unit 122 .

[0130] A first end of the second light emitting control unit 122 is connected to a first end of the driving module 11 , and a second end of the second light emitting control unit 122 is connected to a negative power signal end.

[0131] The first light emitting control unit 121 may be connected to the positive power signal terminal through the light emitting element L.

[0132] It is understandable that when the first light emitting control unit 121 and the second light emitting control unit 122 are turned on at the same time, the light emitting element L enters the light emitting stage t4. When at least one of the first light emitting control unit 121 and the second light emitting control unit 122 is turned off, the light emitting element L is in the non-light emitting stage.

[0133] In the initialization phase t1 of the non-light-emitting phase, the second light-emitting control unit 122 can write a negative power signal to the first terminal of the driving module 11 .

[0134] Taking the driving module 11 as an oxide transistor as an example, the first end of the driving module 11 can be the source of the transistor. In the initialization phase t1, a negative power supply signal can be written to the source of the transistor to pull down the source voltage so that the gate-source voltage difference of the transistor is greater than the conduction threshold voltage. At this time, the transistor will remain in the on state, so that in the compensation phase t2, when the drain of the transistor receives a voltage signal, the source voltage can be pulled up by the turned-on transistor to achieve the regulation of the voltage at the first end of the driving module 11.

[0135] It should be noted that in the initialization stage t1 of the non-light-emitting stage, when the second light-emitting control unit 122 is turned on, the first light-emitting control unit 121 should be in the off state, so as to prevent the light-emitting element L from entering the light-emitting stage t4.

[0136] The embodiment of the present application further provides a display panel. The display panel includes a plurality of pixel units arranged in an array, and the pixel unit includes a pixel circuit 10 and a light emitting element L.

[0137] Please refer to Fig.16The pixel circuit 10 includes a first light emission control transistor T4, a second light emission control transistor T5, a driving transistor T3, a storage capacitor C1 and a coupling capacitor C2.

[0138] The first light emission control transistor T4 is electrically connected to the light emitting element L, and the driving transistor T3 is electrically connected to the first light emission control transistor T4 and the second light emission control transistor T5.

[0139] The storage capacitor C1 is connected between the gate of the driving transistor T3 and the first electrode of the driving transistor T3 , and the data writing transistor T1 is electrically connected to the driving transistor T3 .

[0140] A first end of the coupling capacitor C2 is connected to the first electrode of the driving transistor T3 , and a second end of the coupling capacitor C2 is electrically connected to the first node N1 .

[0141] During at least a part of the non-light-emitting phase, a fixed potential is written into the first node N1.

[0142] Please combine Fig.16 and Figure 2 The non-luminous phase may include a compensation phase t2 and a data writing phase t3. In the same non-luminous phase, the compensation phase t2 is in front and the data writing phase t3 is in the back.

[0143] In the data writing phase t3, the data signal is written into the gate of the driving transistor T3, and the gate voltage of the driving transistor T3 jumps from the voltage in the compensation phase t2 to the data signal voltage. At this time, the coupling capacitor C2 and the storage capacitor C1 can be coupled together to adjust the first electrode voltage of the driving transistor T3 based on the jump amplitude of the gate voltage of the driving transistor T3.

[0144] During at least a part of the non-light-emitting phase, a fixed potential is written into the first node N1, that is, the second end of the coupling capacitor C2 maintains a fixed potential.

[0145] During the time period when the fixed potential is written to the first node N1, if the data writing transistor T1 writes a data signal to the gate of the driving transistor T3, so that the gate voltage of the driving transistor T3 jumps to the signal voltage of the data signal, then based on the jump amplitude of the gate voltage of the driving transistor T3, the coupling capacitor C2 and the storage capacitor C1 can couple and adjust the first electrode voltage of the driving transistor T3.

[0146] Taking the driving transistor T3 as an oxide transistor as an example, when the gate voltage jumps from the initialization signal Vref to the data signal Vdata, the jump amplitude of the gate voltage is Vdata-Vref. At this time, based on the connection relationship between the storage capacitor C1 and the coupling capacitor C2, on the basis of maintaining a fixed potential at the other end of the coupling capacitor C2, the jump amplitude of the first electrode voltage of the driving transistor T3 can be calculated as:

[0147] (Vdata-Vref)*C1 / (C1+C2);

[0148] Since the driving transistor T3 can maintain the critical conduction state in the compensation stage t2, the gate-source voltage difference is consistent with the conduction voltage threshold Vth, so the first electrode voltage of the driving transistor T3 can be the difference between the gate voltage Vref and the conduction voltage threshold Vth, that is, Vref-Vth.

[0149] In the data writing phase t3, the first pole voltage after coupling adjustment is the sum of the original first pole voltage and the jump amplitude of the first pole voltage, that is:

[0150] (Vref-Vth)+(Vdata-Vref)*C1 / (C1+C2);

[0151] At this time, the gate voltage of the transistor is Vdata, and the gate-source voltage difference Vgs can be calculated based on the gate voltage and the first electrode voltage. That is:

[0152] Vgs=Vdata-[(Vref-Vth)+(Vdata-Vref)*C1 / (C1+C2)]

[0153] =(Vdata-Vref)*(C2 / (C1+C2))+Vth;

[0154] In the data writing stage t3 of the non-luminous stage, by writing the data signal Vdata to the gate of the driving transistor T3, the first electrode voltage of the driving transistor T3 can be adjusted through coupling capacitor C2 and storage capacitor C1, thereby adjusting the gate-source voltage difference Vgs of the driving transistor T3.

[0155] In the light emitting stage t4, the driving current provided by the driving transistor T3 is associated with the gate-source voltage difference and the threshold voltage of the transistor. For example, the calculation formula of the driving current Ioled when the driving transistor T3 is in the on state is:

[0156] Ioled=K*(Vgs-Vth) 2

[0157] =K*((Vdata-Vref)*(C2 / (C1+C2))) 2 ;

[0158] Here, K is a constant associated with the mobility of the transistor.

[0159] Based on the calculation formula of the driving current Ioled, it can be known that in the light-emitting stage t4, the driving current Ioled of the light-emitting element L is associated with the data signal Vdata, the initial gate voltage Vref of the driving transistor T3, the capacitance C1 of the storage capacitor C1, and the capacitance C2 of the coupling capacitor C2. When Vref, C1, and C2 are all fixed parameters, the driving current Ioled of the driving transistor T3 has a positive correlation with the data signal Vdata, and will not be affected by the parasitic capacitance Coled of the light-emitting element L. Therefore, in the actual display process, for the light-emitting elements L of different light-emitting colors, the light-emitting elements L of different display areas, and the light-emitting elements L under different temperature environments, although there are differences in their parasitic capacitance Coled, it will not affect the magnitude of the driving current flowing through the light-emitting element L in the light-emitting stage t4, so that the light-emitting brightness of the light-emitting element L will not be affected by the capacitance of the parasitic capacitance, and the display uniformity and stability of the display panel can be guaranteed.

[0160] In addition, the calculation formula of the driving current Ioled does not involve the on-threshold voltage Vth of the driving transistor T3, so when the on-threshold voltage of the driving transistor T3 drifts, it will not affect the driving current in the light-emitting stage t4. That is, when the characteristics of the driving transistor T3 drift, it will not affect the actual light-emitting brightness of the light-emitting element L, and the display uniformity and stability of the display panel can also be guaranteed.

[0161] like Fig.16 As shown, in some embodiments, the pixel circuit 10 may further include an initialization transistor T2.

[0162] The initialization transistor T2 is connected between the initialization signal terminal and the gate of the driving transistor T3. When the initialization transistor T2 is turned on, the initialization signal Vref can be written into the gate of the driving transistor T3.

[0163] like Figure 2 As shown, the non-luminous phase may include an initialization phase t1 and a compensation phase t2, and the initialization phase t1 is before the compensation phase t2 in the same non-luminous phase.

[0164] During at least part of the initialization phase t1 and the compensation phase t2 , the initialization transistor T2 is in the on state and can write the initialization signal Vref to the gate of the driving transistor T3 to adjust the gate voltage of the driving transistor T3 to the signal voltage of the initialization signal Vref.

[0165] Before the data writing stage t3, the gate voltage of the driving transistor T3 is adjusted to the signal voltage of the initialization signal Vref, that is, Vref. In the data writing stage t3, the data writing transistor T1 can write the data signal Vdata and adjust the gate voltage of the driving transistor T3 to Vdata. At this time, the jump amplitude of the gate voltage of the driving transistor T3 is Vdata-Vref.

[0166] Please refer to Fig.17 In some embodiments, the pixel circuit 10 may further include a reference signal writing transistor T6. Fig.17 The corresponding embodiment of the timing signal in a single image frame can be as follows Figure 4 shown.

[0167] The reference signal writing transistor T6 is electrically connected between the reference signal terminal and the first light emission control transistor T4. When the reference signal writing transistor T6 is turned on, the reference signal Vini can be written into the first light emission control transistor T4. If the first light emission control transistor T4 is also in the turned-on state at this time, the reference signal Vini can continue to be written into the driving transistor T3 through the first light emission control transistor T4.

[0168] During at least part of the compensation phase t2 of the non-luminous phase, the reference signal writing transistor T6 and the first luminous control transistor T4 are both in the on state, and the reference signal Vini can be written to the driving transistor T3 through the reference signal writing transistor T6 and the first luminous control transistor T4.

[0169] The first light emitting control transistor T4 may be connected to the second electrode of the driving transistor T3. When the driving transistor T3 is turned on, the reference signal Vini may be written to the first electrode of the driving transistor T3 through the turned-on driving transistor T3, thereby increasing the voltage of the first electrode of the driving transistor T3.

[0170] Taking the driving transistor T3 as an oxide transistor as an example, when the gate-source voltage difference of the transistor is greater than or equal to the on-voltage threshold Vth, the driving transistor T3 is in the on state. Therefore, when the first-pole voltage of the transistor is charged to the difference between the gate voltage and the on-voltage threshold by the reference signal Vini, if the first-pole voltage continues to rise, the driving transistor T3 will become cut-off, and the reference signal Vini can no longer charge the first pole of the driving transistor T3. Therefore, when the reference signal Vini is written, the first-pole voltage of the driving transistor T3 will be raised to the difference between the gate voltage and the on-voltage threshold. For example, in the compensation stage t2, if the gate voltage is Vref, the first-pole voltage of the driving transistor T3 will be raised to Vref-Vth by the reference signal Vini.

[0171] Please refer to Fig.18 In some embodiments, the first node N1 may be connected to the reference signal terminal through the reference signal writing transistor T6. At this time, the fixed potential written into the first node N1 is the reference signal Vini provided by the reference signal terminal.

[0172] The non-light-emitting phase may further include a data writing phase t3 , and the data writing phase t3 is after the compensation phase t2 .

[0173] During at least a portion of the data writing phase t3 , the reference signal Vini can be written to the first node N1 through the reference signal writing transistor T6 , so that the second end of the coupling capacitor C2 maintains a fixed potential.

[0174] In the data writing stage t3, when the second end of the coupling capacitor C2 maintains a fixed potential and the first end of the coupling capacitor C2 is connected to the first end of the storage capacitor C1 and the first electrode of the driving transistor T3, if the second end of the storage capacitor C1, that is, the gate of the driving transistor T3, has a voltage jump, the storage capacitor C1 and the coupling capacitor C2 can couple and adjust the first electrode voltage of the driving transistor T3 based on the jump amplitude of the gate voltage of the driving transistor T3.

[0175] Please refer to Fig.19 In some embodiments, the pixel circuit 10 may further include a coupling control transistor T7. Fig.19 The corresponding embodiment of the timing signal in a single image frame can be as follows Figure 8 shown.

[0176] The coupling control transistor T7 is located between the first node N1 and the reference signal writing transistor T6. When the coupling control transistor T7 and the reference signal writing transistor T6 are both turned on, the reference signal Vini can be written into the first node N1.

[0177] During at least a portion of the data writing phase t3 , the coupling control transistor T7 and the reference signal writing transistor T6 are both in the on state, and the reference signal Vini can be written to the first node N1 .

[0178] Please refer to Fig. 20 In some embodiments, the first node N1 may be connected to a fixed potential signal line. The fixed potential written into the first node N1 may be a voltage signal Vx provided by the fixed potential signal line.

[0179] When the first node N1 is connected to the fixed potential signal line, the first node N1 can continuously receive the fixed potential signal Vx. That is, the first node N1 can maintain a fixed potential in both the non-light emitting stage and the light emitting stage t4.

[0180] Please refer to Fig.21In some embodiments, the pixel circuit 10 may further include a charging transistor T8. Fig.21 The corresponding embodiment of the timing signal in a single image frame can be as follows Fig.11 shown.

[0181] The charging transistor T8 is electrically connected between the first node N1 and the second electrode of the driving transistor T3. During at least a portion of the compensation phase t2 of the non-luminous phase, the charging transistor T8 can write a fixed potential to the second electrode of the driving transistor T3 and raise the voltage of the first electrode of the driving transistor T3 through the turned-on driving transistor T3.

[0182] As an optional implementation, Fig.21 As shown, the manner in which the fixed potential is written into the first node N1 may be that the first node N1 is connected to the reference signal terminal via the reference signal writing transistor T6.

[0183] In another optional embodiment, if Fig. 22 As shown, the first node N1 may be connected to a fixed potential signal line, and a fixed potential signal Vx may be written into the first node N1.

[0184] Please refer to Fig.21 In an embodiment where the first node N1 is connected to the reference signal terminal via the reference signal writing transistor T6, the fixed potential written to the second electrode of the driving transistor T3 by the charging transistor T8 is the reference signal Vini provided by the reference signal terminal.

[0185] Please refer to Fig. 22 In an embodiment where the first node N1 is connected to the fixed potential signal line, the fixed potential written by the charging transistor T8 to the second electrode of the driving transistor T3 is a voltage signal provided by the fixed potential signal line.

[0186] Please refer to Fig.23 In some embodiments, the pixel circuit 10 may further include a coupling control transistor T7. Fig.23 The corresponding embodiment of the timing signal in a single image frame can be as follows Fig.14 shown.

[0187] The coupling control transistor T7 may be transistor-connected between the first node N1 and the reference signal writing transistor T6 .

[0188] During at least a portion of the compensation phase t2 , the reference signal writing transistor T6 , the coupling control transistor T7 , and the charging transistor T8 are all turned on, and the reference signal Vini can be written into the second electrode of the driving transistor T3 .

[0189] In the data writing phase t3 , the reference signal writing transistor T6 and the coupling control transistor T7 are turned on, and the charging transistor T8 is turned off. At this time, the reference signal Vini is written into the first node N1 .

[0190] In some embodiments, at least some of the first light emission control transistor T4, the second light emission control transistor T5, the driving transistor T3, and the data writing transistor T1 in the pixel circuit 10 are oxide transistors, for example, IGZO (Indium Gallium Zinc Oxide) transistors.

[0191] It is understandable that at least some of the other transistors in the above embodiments, such as the initialization transistor T2 , the reference signal writing transistor T6 , the coupling control transistor T7 , and the charging transistor T8 , may be oxide transistors.

[0192] As an optional implementation, all transistors in the above pixel circuit 10 may be oxide transistors.

[0193] In some embodiments, the anode of the light emitting element L can be connected to the positive power signal terminal ELVDD, and the cathode of the light emitting element L is connected to the negative power signal terminal ELVSS through the first light emitting control transistor T4, the driving transistor T3 and the second light emitting control transistor T5.

[0194] In the light emitting stage t4, the first light emitting control transistor T4, the driving transistor T3 and the second light emitting control transistor T5 are all turned on, and the driving transistor T3 provides a corresponding driving current based on the gate-source voltage difference and the on-voltage threshold, so that the light emitting element L emits light under the corresponding driving current.

[0195] The present application also provides a display device 1000, see Fig.24 The display device 1000 may be a PC, a television, a monitor, a mobile terminal, a tablet computer, a wearable device, etc. The display device 1000 may include the display panel 100 provided in the embodiment of the present application.

[0196] The functional blocks shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present application are programs or code segments that are used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.

[0197] It should be noted that, in this article, the terms "comprises", "includes" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or apparatus that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or apparatus.

[0198] This article uses specific examples to illustrate the principles and implementation methods of this application. The above examples are only used to help understand the methods and core ideas of this application. The above are only preferred implementation methods of this application. It should be pointed out that due to the limitations of textual expression and the objective existence of infinite specific structures, ordinary technicians in this technical field can make several improvements, modifications or changes without departing from the principles of this application, and can also combine the above technical features in an appropriate manner; these improvements, modifications, changes or combinations, or the direct application of the concepts and technical solutions of this application to other occasions without improvement, should be regarded as the scope of protection of this application.

Claims

1. A display panel, characterized in that: The display panel includes a plurality of pixel units arranged in an array, wherein the pixel unit includes a pixel circuit and a light-emitting element; the pixel circuit includes a driving module, a light-emitting control module and a coupling module; The driving module is used to provide a driving current for the light emitting element; The light emitting control module is used to selectively allow the light emitting element to enter the light emitting stage; During at least a part of the compensation phase of the non-light-emitting phase, the first end of the driving module receives a reference signal; In a data writing phase in a non-luminescent phase, the coupling module is used to adjust the first terminal voltage of the driving module; wherein the compensation phase in the same non-luminescent phase is before the data writing phase.

2. The display panel according to claim 1, characterized in that: The pixel circuit further comprises: A reference signal writing module, wherein a first end of the reference signal writing module is connected to the reference signal end, and a second end of the reference signal writing module is connected to the light emitting control module; During at least a portion of a compensation phase of a non-light-emitting phase, the reference signal writing module is used to write a reference signal.

3. The display panel according to claim 2, characterized in that: The light emitting control module comprises: a first light-emitting control unit, wherein a first end of the first light-emitting control unit is electrically connected to the light-emitting element, a first end of the first light-emitting control unit is connected to a second end of the reference signal writing module, and a second end of the first light-emitting control unit is connected to a second end of the driving module; In the compensation phase of the non-light-emitting phase, the first light-emitting control unit is used to write a reference signal to the second end of the driving module.

4. The display panel according to claim 3, characterized in that: The first end of the coupling module is connected to the first end of the driving module, and the second end of the coupling module is connected to the second end of the reference signal writing module; In the data writing phase of the non-light emitting phase, the reference signal writing module is used to write a reference signal.

5. The display panel according to claim 4, characterized in that: The pixel circuit further comprises: A coupling control module, wherein the second end of the coupling module is connected to the second end of the reference signal writing module through the coupling control module; During at least a portion of a data writing phase in a non-light-emitting phase, the coupling control module is used to write a reference signal to the second end of the coupling module.

6. The display panel according to claim 3, characterized in that: The first end of the coupling module is connected to the first end of the driving module, and the second end of the coupling module is connected to the fixed potential end.

7. The display panel according to claim 2, characterized in that: The light emitting control module comprises: a first light-emitting control unit, wherein a first end of the first light-emitting control unit is electrically connected to the light-emitting element, a first end of the first light-emitting control unit is connected to a second end of the reference signal writing module, and a second end of the first light-emitting control unit is connected to a second end of the driving module; in a non-light-emitting stage, the first light-emitting control unit is disconnected; The pixel circuit further comprises: A charging module, the charging module is connected to the second end of the driving module; During at least a portion of a compensation phase of a non-luminous phase, the charging module is used to write a charging signal to the second end of the driving module.

8. The display panel according to claim 7, characterized in that: The first end of the coupling module is connected to the first end of the driving module, and the second end of the coupling module is connected to the second end of the reference signal writing module; The charging module is connected between the second end of the driving module and the second end of the coupling module; During at least a portion of a compensation phase and a data writing phase of a non-light-emitting phase, the reference signal writing module is used to write a reference signal.

9. The display panel according to claim 8, characterized in that: The pixel circuit further comprises: A coupling control module, wherein the second end of the coupling module is connected to the second end of the reference signal writing module through the coupling control module; During at least a portion of the compensation phase and the data writing phase of the non-light-emitting phase, the coupling control module is used to write a reference signal to the second end of the coupling module.

10. The display panel according to claim 7, characterized in that: The first end of the charging module is connected to the second end of the driving module, and the second end of the charging module is connected to the fixed potential end.

11. The display panel according to claim 1, characterized in that: The pixel circuit further comprises: A data writing module, used for providing a data signal to the driving module; During at least a portion of a data writing phase in a non-light-emitting phase, the data writing module is used to write a data signal to a control terminal of the driving module.

12. The display panel according to claim 1, characterized in that: The pixel circuit further comprises: An initialization module, used for initializing the driving module; During at least part of the initialization phase and the compensation phase of the non-luminous phase, the initialization module is used to write an initialization signal to the control end of the driving module; wherein the initialization phase in the same non-luminous phase precedes the compensation phase.

13. The display panel according to claim 12, characterized in that: The light control module further includes: a second light-emitting control unit, wherein a first end of the second light-emitting control unit is connected to the first end of the driving module, and a second end of the second light-emitting control unit is connected to a negative power signal end; In an initialization phase of a non-light-emitting phase, the second light-emitting control unit is used to write a second power supply signal to the first end of the driving module.

14. A display panel, characterized in that: The display panel includes a plurality of pixel units arranged in an array, and the pixel units include a pixel circuit and a light-emitting element; The pixel circuit comprises: a first light emission control transistor, the first light emission control transistor being electrically connected to the light emitting element; a second light emission control transistor; a driving transistor, the driving transistor being electrically connected to the second light emission control transistor and the first light emission control transistor; A storage capacitor connected between the gate of the driving transistor and the first electrode of the driving transistor; a data writing transistor, the data writing transistor being electrically connected to the driving transistor; a coupling capacitor, wherein a first end of the coupling capacitor is connected to the first electrode of the driving transistor, and a second end of the coupling capacitor is electrically connected to the first node; During at least a part of the non-light-emitting phase, a fixed potential is written to the first node.

15. The display panel according to claim 14, characterized in that: The pixel circuit further comprises: an initialization transistor connected between an initialization signal terminal and a gate of the driving transistor; The non-luminous stage includes an initialization stage and a compensation stage. During at least part of the initialization stage and the compensation stage, the initialization transistor is used to write an initialization signal to the gate of the driving transistor; wherein, the initialization stage in the same non-luminous stage precedes the compensation stage.

16. The display panel according to claim 14, characterized in that: The pixel circuit further comprises: A reference signal writing transistor, wherein the reference signal writing transistor is electrically connected between a reference signal terminal and the first light emission control transistor; The non-light-emitting stage includes a compensation stage. During at least a part of the compensation stage, the reference signal is written into the first electrode of the driving transistor.

17. The display panel according to claim 16, characterized in that: The first node is connected to a reference signal terminal through a reference signal writing transistor; wherein the fixed potential is a reference signal provided by the reference signal terminal; The non-light-emitting stage further includes a data writing stage, which is after the compensation stage. During at least a partial time period of the data writing stage, the reference signal is written to the first node.

18. The display panel according to claim 17, characterized in that: The pixel circuit further comprises: a coupling control transistor, the coupling control transistor being located between the first node and the reference signal writing transistor; During at least a portion of the data writing phase, the coupling control transistor and the reference signal writing transistor are used to write a reference signal to the first node.

19. The display panel according to claim 14, characterized in that: The first node is connected to a fixed potential signal line; wherein the fixed potential is a voltage signal provided by the fixed potential signal line.

20. The display panel according to claim 17 or 19, characterized in that: The pixel circuit further comprises: a charging transistor, the charging transistor being electrically connected between the first node and the second electrode of the driving transistor; The non-light-emitting stage includes a compensation stage and a data writing stage. During at least a part of the compensation stage, the charging transistor is used to write a fixed potential into the second electrode of the driving transistor.

21. The display panel according to claim 20, characterized in that: The pixel circuit further comprises: a coupling control transistor connected between the first node and the reference signal writing transistor; During at least a portion of the compensation phase, the reference signal is written to the second electrode of the driving transistor; In the data writing phase, the reference signal is written to the first node.

22. The display panel according to claim 14, characterized in that: At least some of the first light emission control transistor, the second light emission control transistor, the driving transistor, and the data writing transistor of the pixel circuit are oxide transistors.

23. The display panel according to claim 14, characterized in that: The anode of the light emitting element is connected to the positive power signal terminal, and the cathode of the light emitting element is connected to the negative power signal terminal through the first light emitting control transistor, the driving transistor and the second light emitting control transistor.

24. A display device, characterized in that: The invention comprises the display panel according to any one of claims 1 to 13 or the display panel according to any one of claims 14 to 23.

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