Method for testing residual ions

Abstract

The invention provides a test method. The test method comprises the following steps: providing a substrate; performing oxidation treatment on the substrate, and forming an oxide layer on the surface of the substrate; performing gas etching on the oxide layer, removing the oxide layer, and forming a by-product layer; annealing the by-product layer, and removing the by-product layer to form a pollution layer; pollution data in the pollution layer is obtained.

Description

Technical Field

[0001] The disclosed embodiments relate to the field of semiconductor technology, and in particular to a method for testing residual ions. Background Art

[0002] The development of dynamic random access memory (DRAM) pursues performance indicators such as high speed, high integration density, and low power consumption. As the size of semiconductor device structures shrinks, the technical barriers encountered by existing structures are becoming more and more obvious. In addition, the performance of semiconductor devices is closely related to the process technology. Therefore, based on the existing structure, how to ensure the quality of the process technology is an urgent problem to be solved. Summary of the invention

[0003] According to a first aspect of an embodiment of the present disclosure, a testing method is provided, comprising: providing a substrate; performing oxidation treatment on the substrate to form an oxide layer on the surface of the substrate; performing gas etching on the oxide layer to remove the oxide layer and form a by-product layer; annealing the by-product layer to remove the by-product layer to form a contamination layer; and obtaining contamination data in the contamination layer.

[0004] In some embodiments, the substrate is a bare silicon wafer.

[0005] In some embodiments, the oxidation treatment is a plasma process using an oxygen-containing gas.

[0006] In some embodiments, the gas etching is an etching process performed by using a gas containing hydrofluoric acid gas and ammonia gas, and the byproduct layer is ammonium hexafluorosilicate.

[0007] In some embodiments, gas etching and annealing are performed in the same tool.

[0008] In some embodiments, the contamination data in the contamination layer is obtained by X-ray fluorescence spectroscopy analysis technology, total reflection X-ray fluorescence spectroscopy or chemical quantitative analysis.

[0009] In some embodiments, the contamination layer comprises iron ions.

[0010] In some embodiments, the oxygen-containing gas includes oxygen and hydrazine gas.

[0011] In some embodiments, the ratio of oxygen gas to hydrazine gas in the oxygen-containing gas is 10:1.

[0012] In some embodiments, the gas containing hydrofluoric acid gas and ammonia gas has an equal content of hydrofluoric acid gas and ammonia gas.

[0013] According to the disclosed solution, the residual ion concentration in the equipment can be detected more accurately, which is beneficial to improving process quality and increasing product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1-Figure 4 is a schematic diagram of steps of a testing method according to an exemplary embodiment; DETAILED DESCRIPTION The technical solution of the present disclosure will be further described in detail below in conjunction with the accompanying drawings and embodiments. Although the exemplary implementation methods of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the implementation methods described here. On the contrary, these implementation methods are provided in order to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0015] The present disclosure is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. The advantages and features of the present disclosure will become more apparent from the following description and claims. It should be noted that the drawings are in very simplified form and in non-precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present disclosure.

[0016] It will be understood that the meaning of “on,” “over,” and “over” of the present disclosure should be interpreted in the broadest manner, so that “on” not only means that it is “on” something with no intervening features or layers (i.e., directly on something), but also includes the meaning that it is “on” something with intervening features or layers.

[0017] In the embodiments of the present disclosure, the terms "first", "second", "third", etc. are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0018] In the disclosed embodiments, the term "layer" refers to a material portion including an area having a thickness. A layer may extend over the entirety of a lower or upper structure, or may have an extent less than the extent of a lower or upper structure. In addition, a layer may be an area of ​​a homogeneous or inhomogeneous continuous structure having a thickness less than the thickness of a continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure, or a layer may be between any horizontal faces at the top and bottom surfaces of a continuous structure. A layer may extend horizontally, vertically, and / or along an inclined surface. A layer may include multiple sublayers.

[0019] It should be noted that the technical solutions described in the embodiments of the present disclosure can be arbitrarily combined without conflict.

[0020] In the relevant semiconductor front-end process, an array-arranged active area is formed by a patterning process. Specifically, the patterning process includes forming a photoresist on a substrate, exposing and developing the photoresist to form a photoresist with a preset pattern, and etching the substrate through the patterned photoresist to form an active area and an isolation groove. Then the photoresist is removed, and the method for removing the photoresist includes an ashing process. Specifically, the ashing process is a key post-processing step in semiconductor manufacturing, mainly used to remove the photoresist. After the photolithography process is completed, the photoresist that is no longer needed needs to be removed from the surface of the wafer to prepare for the next step of processing, such as etching or metallization. The ashing process is usually achieved by plasma ashing, in which oxygen or oxygen-containing gas plasma is used to oxidize and decompose the photoresist, converting it into gas, which is then pumped away. The basic principle of plasma ashing is to use high-energy particles (such as free radicals and ions) in the plasma to react chemically with the photoresist to decompose the photoresist into small molecular gases, which are then pumped away by the vacuum system. This process requires precise control of plasma parameters such as power, gas flow and processing time to ensure that the photoresist is completely removed without causing damage to the wafer surface.

[0021] In some embodiments, the patterning process further includes forming a hard mask on the substrate, forming a photoresist on the hard mask, exposing and developing the photoresist to form a preset pattern, etching the hard mask through the patterned photoresist, transferring the preset pattern to the hard mask, stripping the photoresist, and etching the substrate through the patterned hard mask to form an active area and an isolation trench. The photoresist is then removed by an ashing process.

[0022] In some embodiments, with the development of semiconductor manufacturing technology, the integration level is improved and the size is miniaturized. A single patterning process cannot form the preset width of the active area and the isolation trench, and it needs to be formed through multiple patterning processes. For example, double exposure and etching process (LELE), or self-aligned double patterning process (SADP), or self-aligned quad patterning process (SAQP), etc. Optionally, a patterned substrate with strip-like spacing is first formed, and then the strip-like patterned substrate portion is etched to form an array-arranged active area pattern.

[0023] In some embodiments, the process of etching the substrate to form the active region and the isolation trench includes anisotropic etching or isotropic etching, such as dry etching or wet etching.

[0024] After forming the array-arranged active areas and isolation trenches of the devices, some impurity particles will remain from the previous process, so they need to be cleaned to avoid affecting the subsequent process and causing defects. However, the cleaned active areas will fall over due to the influence of surface tension. In order to separate the fallen active areas from each other, it is necessary to oxidize the surface of the active areas again through an oxidation process, oxidize the active areas that are in contact with each other to form silicon oxide, and then break the silicon-oxygen bonds through gas etching. After removing the oxide layer, the fallen active areas are separated from each other to form independent array-arranged active areas.

[0025] In some embodiments, the silicon surface may be oxidized by an ashing process.

[0026] Subsequently, an isolation layer is formed in the isolation trench. Specifically, an insulating material is deposited in the isolation trench to form the isolation layer.

[0027] In some embodiments, the insulating material deposited in the isolation trench to form the isolation layer is selected from one or more of silicon oxide, aluminum oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbonitride, and silicon carbon nitride oxynitride. Preferably, silicon nitride and silicon oxide are deposited alternately, and more preferably, silicon nitride is deposited first and then silicon oxide.

[0028] In some embodiments, the deposition method of depositing the insulating material in the isolation trench to form the isolation layer is selected from a physical vapor deposition (PVD) method, an atomic layer deposition (ALD) method, a pulsed laser deposition (PLD) method, a chemical vapor deposition (CVD), vacuum evaporation, furnace deposition, etc. Preferably, the deposition method of the insulating material is chemical vapor deposition (CVD). Preferably, the deposition method of the insulating material is to form a material layer by chemical vapor deposition (CVD), and then use chemical mechanical polishing to flatten the material layer, remove part of the insulating material layer located on the surface of the active area, and expose the active area.

[0029] Therefore, if there are residual ions, especially iron ions, during the gas etching process, they will be covered between the active layer and the isolation layer. In the subsequent process, they will diffuse into the active layer and affect the performance of the transistor, resulting in reduced yield, poor stability, and increased production costs. Regular monitoring of the residual ion concentration in the gas etching process becomes very important.

[0030] According to a first aspect of the embodiment of the present disclosure, Figure 1-Figure 4 As shown, a testing method is provided, comprising: providing a substrate 100; In some embodiments, the substrate material is selected from semiconductor materials such as single crystal silicon, silicon germanium, silicon carbide or silicon on insulating layer.

[0031] In some embodiments, the substrate is a bare silicon wafer, which is a single crystal silicon wafer that has not been processed by a process.

[0032] The substrate is subjected to oxidation treatment T1 to form an oxide layer 200 on the surface of the substrate; Oxidation is critical in semiconductor manufacturing, and is primarily used to form a layer of silicon dioxide on the surface of silicon wafers. This layer of silicon dioxide can be used as an insulating layer to isolate different semiconductor devices, or as a mask layer to protect the silicon surface during subsequent etching or diffusion processes. Oxidation processes are generally divided into two types: dry oxidation and wet oxidation: Dry oxidation: Silicon reacts with oxygen at high temperatures to form silicon dioxide. Dry oxidation is usually performed at temperatures between 900°C and 1200°C, and the resulting oxide layer is of good quality, but the speed is slow. Wet oxidation: Silicon reacts with water vapor to form silicon dioxide, and oxygen may also be involved. Wet oxidation is performed at lower temperatures, usually between 800°C and 1000°C, and the oxidation speed is faster, but the resulting oxide layer may contain impurities and is not as good as dry oxidation. The choice of oxidation depends on the specific application requirements. For example, when a high-quality oxide layer is required, dry oxidation is usually selected; when fast oxidation is required, wet oxidation may be selected. Control of the oxidation process is critical to the performance of semiconductor devices, including the thickness, uniformity, and quality of the oxide layer. In semiconductor manufacturing, oxidation processes are typically performed in a highly controlled environment to ensure the accuracy and consistency of the oxide layer.

[0033] In some embodiments, the oxidation treatment is a plasma process using an oxygen-containing gas.

[0034] In the plasma oxidation process, an oxygen-containing gas is excited by radio frequency energy to form a plasma. The oxygen radicals in the plasma react with the substrate to form an oxide layer. The purpose is to form an oxide layer on the surface of the substrate. For example, a silicon dioxide layer is formed on the surface of silicon, which can be used as an insulating layer or a mask layer. Plasma oxidation can provide a faster oxidation rate and better oxide layer quality, especially when a thin and uniform oxide layer needs to be formed. The plasma oxidation process uses the same equipment as the ashing process. If there is a photoresist on the surface of the substrate, the ashing process removes the photoresist, while the plasma oxidation process forms an oxide layer instead of removing material.

[0035] In some embodiments, the oxygen-containing gas includes oxygen and hydrazine gas.

[0036] In the plasma oxidation process, a mixture of oxygen and hydrazine gas is introduced into the chamber, and the oxygen and hydrazine gas are excited by radio frequency energy to form plasma, forming an oxide layer on the surface of the substrate, forming a more uniform oxide layer.

[0037] In some embodiments, the ratio of oxygen gas to hydrazine gas in the oxygen-containing gas is 10:1.

[0038] Specifically, 10000sccm~16000sccm (standard cubic centimeters per minute) of oxygen and 1000sccm~1600sccm of hydrazine are introduced into the chamber of the plasma equipment, the temperature is controlled at 230 degrees Celsius~270 degrees Celsius, the chamber pressure is controlled at 900mtorr~1500 mtorr (mitorr), the process power is 4000W~4800W (watts), and the substrate is subjected to an ashing process for 15s~28s (seconds), i.e., oxidation treatment, to form an oxide layer on the surface of the substrate. This step can make the substrate closer to the conditions in the actual process.

[0039] Performing gas etching T2 on the oxide layer to remove the oxide layer and form a byproduct layer 300; Gas etching is a key process in semiconductor manufacturing, used to accurately remove materials from the surface of the wafer to achieve the manufacture of microstructures. This process is usually carried out in a vacuum environment, using chemical reactions or physical effects, or a combination of both, to selectively remove specific material layers on the surface of the wafer without affecting other materials or underlying structures.

[0040] In some embodiments, the gas etching process is performed using a gas etching device. The gas etching device is a key device used to perform the gas etching process in semiconductor manufacturing. Its design and operation are intended to accurately control the material removal process to achieve the manufacture of microstructures. These devices generally include the following main components: Reaction Chamber: This is where the etching process takes place. The wafer is placed in the reaction chamber, where the etching gas is introduced and reacts.

[0041] Gas Delivery System: Used to precisely control the type, flow rate, and pressure of etching gas to ensure the stability and repeatability of the etching process.

[0042] Vacuum System: It is used to maintain the vacuum environment in the reaction chamber to ensure that the volatile compounds generated during the etching process can be effectively extracted, while controlling the pressure in the reaction chamber to optimize the etching conditions.

[0043] Temperature Control System: Used to control the temperature of the wafer and reaction chamber. Temperature control is critical to etching rate and selectivity.

[0044] Wafer Support and Handling System: includes a stage for loading and unloading wafers and supporting the wafers during the etching process to ensure the stability and safety of the wafers during the etching process.

[0045] Control System: includes computers and software used to monitor and control all parameters of the etching process, such as gas flow, pressure, temperature, etc., to achieve precise etching control.

[0046] The operation of gas etching equipment needs to consider factors such as material characteristics, etching gas selection, etching rate, selectivity and uniformity to ensure that the etching process can meet the strict requirements of semiconductor manufacturing. As manufacturing production proceeds, it is inevitable that the equipment will be contaminated by foreign impurities, which will affect the product yield. The equipment needs to be cleaned regularly, so it is particularly important to accurately monitor the contaminant content in the gas etching equipment.

[0047] The pollution in the gas etching process mainly comes from the following aspects: Purity of etching gas: If the etching gas contains impurities, such as moisture, dust particles or other chemicals, these impurities may react with the material to produce unwanted by-products, affecting the selectivity and rate of etching.

[0048] Cleanliness of the reaction chamber: The cleanliness of the interior of the reaction chamber is critical to the quality of etching. Any residual particles, chemicals, or byproducts of the previous etching may contaminate the new etching process, causing uneven etching or defects.

[0049] Cleanliness of the wafer surface: Before the wafer enters the etching equipment, if there are contaminants on the surface, such as organic matter, metal ions or dust, these contaminants may affect the uniformity and selectivity of etching.

[0050] Deposition of etching byproducts: Volatile compounds generated during the etching process may re-deposit inside the reaction chamber or on the wafer surface, causing contamination if they are not completely extracted.

[0051] Release of equipment materials: Materials of etching equipment, such as metal parts (gas cylinders, gas pumps, etc.), sealing materials or insulating materials, may also become a source of contamination if they release particles or chemicals during the etching process.

[0052] Cross-contamination of process gases: In a multi-gas etching process, cross-contamination between different gases may affect the etching effect if the isolation between the gases is not sufficient.

[0053] In some embodiments, the gas etching is an etching process performed by using a gas containing hydrofluoric acid gas and ammonia gas, and the byproduct layer formed by the reaction with the oxide layer is ammonium hexafluorosilicate.

[0054] In some embodiments, the gas containing hydrofluoric acid gas and ammonia gas has an equal content of hydrofluoric acid gas and ammonia gas.

[0055] Specifically, during the gas etching process, the chamber temperature is controlled at 20 degrees Celsius to 50 degrees Celsius, the chamber pressure is controlled at 30 mtorr to 50 mtorr, 100 sccm to 150 sccm of ammonia gas, 100 sccm to 150 sccm of hydrofluoric acid gas, and 50 sccm to 90 sccm of argon gas are introduced, and the process time is controlled to be 50 s to 80 s.

[0056] The oxide layer reacts with ammonia and hydrofluoric acid gases in the gas etching process to generate ammonium hexafluorosilicate byproducts. At the same time, due to the low temperature, the byproducts will be deposited on the substrate surface together with the pollutants in the chamber to form a byproduct layer.

[0057] Annealing the byproduct layer T3 to remove the byproduct layer to form a contamination layer 400; Annealing processes are used in semiconductor manufacturing to improve the electrical and physical properties of materials by reducing defects, activating dopants, or restoring material damage through a heating and cooling process. The design and operation of annealing equipment requires precise control of temperature, time, and atmosphere to ensure optimization of material properties. The following are some of the key components and features of annealing process equipment: Heating system: used to heat the wafer to the required annealing temperature. The heating system can be resistance heating, infrared heating or radio frequency heating, depending on the different annealing requirements.

[0058] Temperature control system: Precisely control the temperature during heating and cooling to ensure the temperature uniformity and stability of the wafer during annealing.

[0059] Atmosphere control system: Provides an inert gas environment, such as nitrogen or argon, to prevent the material from oxidation or other contamination at high temperatures. The atmosphere control system is also used to control the flow and pressure of the atmosphere to maintain the atmospheric conditions in the annealing chamber.

[0060] Wafer transfer system: used to load and unload wafers, and transfer wafers during heating and cooling, ensuring the safety and position accuracy of wafers during annealing.

[0061] Cooling system: used to control the cooling process after annealing to ensure that the wafer can be evenly cooled to room temperature and avoid material damage caused by thermal stress.

[0062] Monitoring and control system: includes computers and software to monitor and control all parameters of the annealing process, such as temperature, atmosphere, pressure and time, to achieve precise annealing control.

[0063] Safety system: Ensures safe operation of equipment under high temperature and pressure conditions, including over-temperature protection, gas leak detection and emergency shutdown functions.

[0064] The design and operation of annealing equipment needs to take into account the characteristics of the material, the annealing temperature, time and atmosphere requirements, as well as the size of the wafer and the batch processing capacity.

[0065] In some embodiments, in an inert gas environment, a substrate having a byproduct layer formed thereon is heated and annealed, the chamber temperature is controlled at 150 degrees Celsius to 250 degrees Celsius, the chamber pressure is controlled at 1800 mtorr to 2200 mtorr, nitrogen is introduced from 1800 sccm to 2200 sccm to 150 sccm to 250 sccm, and the process time is 70s to 120s.

[0066] By annealing, the byproducts are vaporized and removed, while the contaminants remain to form a contamination layer.

[0067] In a related embodiment, a bare silicon wafer substrate is directly placed in a gas etching device to perform a gas etching process step without first performing an oxidation treatment on it. Because there is no oxide layer, ammonia and hydrofluoric acid gases will not react with silicon, and thus no ammonium hexafluorosilicate by-product is produced. It is then impossible to confine the pollutants to the substrate surface, and when the process is completed, the pollutants will be discharged with the gas flow. The resulting pollutant content on the substrate surface is far different from the pollutant content that will be added to the product in actual production, and will therefore seriously affect the detection results.

[0068] In some embodiments, gas etching and annealing are performed on the same machine. Using a machine with a gas etching chamber and an annealing chamber can effectively avoid external environmental influences that may cause distortion of test results because they are in the same machine.

[0069] Get the pollution data in the pollution layer.

[0070] In some embodiments, the contamination is iron ion contamination.

[0071] In some embodiments, the contamination data in the substrate is obtained by X-ray fluorescence spectroscopy analysis technology or total reflection X-ray fluorescence spectroscopy (TXRF).

[0072] In X-ray fluorescence (XRF) analysis, when high-energy X-rays or gamma rays are irradiated on a sample, they excite the inner electrons of the atoms in the sample, causing them to transition to a higher energy level. The electrons then transition from the higher energy level back to the lower energy level, releasing characteristic X-ray fluorescence. The energy or wavelength of these characteristic X-rays is directly related to the atomic number of the elements in the sample. By detecting and analyzing these characteristic X-rays, the composition of the elements in the sample can be determined.

[0073] Total reflection X-ray fluorescence spectroscopy is a highly sensitive elemental analysis technique, mainly used to measure the concentration of trace elements in solid or liquid samples. TXRF combines the advantages of X-ray fluorescence (XRF) and total reflection (Total Reflection) technologies. In TXRF, the X-rays generated by the X-ray source irradiate the sample surface at an extremely small angle (close to the total reflection angle). Since the incident angle is less than the critical angle, the X-rays are totally reflected on the sample surface. Under total reflection conditions, the X-rays form a so-called "evaporation layer" in the area near the sample surface. The thickness of this area is usually only a few nanometers. When the X-rays interact with the atoms in the sample, they excite the atoms to produce characteristic X-ray fluorescence. These fluorescence signals are captured and analyzed by the detector to determine the type and concentration of the elements in the sample. TXRF technology has the following characteristics: High sensitivity: Since X-rays are effectively used in the evaporated layer on the sample surface, high-sensitivity detection can be achieved even for extremely low concentration elements.

[0074] Low detection limit: For some elements, the detection limit of TXRF can reach ppb (parts per billion) or even ppt (parts per trillion) level.

[0075] Non-destructive analysis: The sample will not be destroyed during the analysis process, which is suitable for precious or limited sample analysis.

[0076] Wide element range: TXRF can analyze a wide range of elements from light elements (such as lithium) to heavy elements (such as uranium). TXRF has a wide range of applications in the semiconductor field, especially when high-precision and high-sensitivity elemental analysis of samples is required.

[0077] In some embodiments, obtaining contamination data in the substrate is performed by chemical quantitative analysis.

[0078] In some embodiments, chemical vapor decomposition (VPD) testing is used on substrates with contamination layers to improve the sensitivity of total reflection X-ray fluorescence spectroscopy by changing the contamination from a thin layer to a granular residue. In the granular residue, the fluorescence signal is stronger at angles smaller than the isokinetic angle, thereby improving the detection limit.

[0079] In some embodiments, a vapor phase decomposition-droplet collection technique (VPD-DC) is used on a substrate with a contamination layer formed thereon, and droplets are used to scan the contamination layer on the substrate to collect metal ions dissolved in the decomposition step.

[0080] In some embodiments, atomic absorption spectroscopy (AAS) is used to detect very small concentrations of metal impurities on a substrate formed with a contamination layer, and atomic absorption spectroscopy provides a better detection limit.

[0081] In some embodiments, the substrate with the contamination layer formed thereon is rinsed with a solvent, and the solvent in which the contamination layer is dissolved is titrated to determine the element content.

[0082] In some embodiments, a bare silicon wafer substrate is provided, and the substrate is sent into a plasma device for oxidation treatment. The specific process is to introduce 13000sccm (standard cubic centimeters per minute) of oxygen and 1300sccm of hydrazine into the chamber of the plasma device, control the temperature at 250 degrees Celsius, control the chamber pressure at 1200mtorr (mitorr), and the process power is 4400W (watt). After the substrate is subjected to an ashing process for 21s (seconds), it is oxidized to form an oxide layer on the surface of the substrate. The substrate with the oxide layer is subjected to gas etching treatment. The gas etching equipment used in this embodiment has an etching chamber and an annealing chamber, and the etching chamber has two carriers, which can etch two substrates at the same time. Two substrates with oxide layers formed are sent into the gas etching equipment, and the gas etching equipment is controlled to place the substrate with oxide layer formed into the etching chamber, and the gas etching process is performed, and the chamber temperature is controlled to be 35 degrees Celsius, the chamber pressure is controlled to be 40mtorr, 120sccm of ammonia, 120sccm of hydrofluoric acid gas, 68sccm of argon gas are introduced, and the process time is controlled to be 65s. After the gas etching is completed, the substrate with the by-product layer is taken out of the etching chamber and sent to the annealing chamber. The nitrogen introduced into the annealing chamber is controlled to drop from 2000sccm to 200sccm, and the substrate with the by-product layer is heated and annealed in an inert gas environment, the chamber temperature is controlled to be 190 degrees Celsius, the chamber pressure is controlled to be 2000mtorr, and the process time is 90s. The oxide layer on the ashed substrate and the contamination layer on the annealed substrate are tested twice, and the results are shown in Table 1. Each substrate is tested twice, and the results of the ashed substrate sample 1 are tested twice to obtain the results, and no iron content is detected. The ashed substrate sample 1 is placed on stage 1, and the ashed substrate sample 2 is placed on stage 2. After the above-mentioned gas etching and annealing treatment, they are tested twice by total reflection X-ray fluorescence spectroscopy, and iron element is detected in both tests. It can be seen that this scheme can effectively detect the contamination of the chamber of the gas etching equipment.

[0083] Table 1

[0084] The various semiconductor devices shown in this specific embodiment can be used in electronic devices with storage functions. The electronic device can be a terminal device, such as a mobile phone, a tablet computer, a smart bracelet, or a personal computer (PC), a server, a workstation, etc. The storage function in the electronic device can be realized by the following memories: dynamic random access memory (DRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), magnetic random access memory (MRAM) or resistive access memory (RRAM).

[0085] The above is only a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A testing method, characterized in that: include: providing a substrate; Performing oxidation treatment on the substrate to form an oxide layer on the surface of the substrate; Performing gas etching on the oxide layer to remove the oxide layer and form a byproduct layer; Annealing the byproduct layer to remove the byproduct layer to form a contamination layer; Obtain pollution data in the pollution layer.

2. The testing method according to claim 1, characterized in that: The substrate is a bare silicon wafer.

3. The testing method according to claim 1, characterized in that: The oxidation treatment is performed by using a plasma process with an oxygen-containing gas.

4. The testing method according to claim 1, characterized in that: The gas etching is an etching process performed by using a gas containing hydrofluoric acid gas and ammonia gas, and the byproduct layer is ammonium hexafluorosilicate.

5. The testing method according to claim 1, characterized in that: The gas etching and the annealing are performed on the same machine.

6. The testing method according to claim 1, characterized in that: The obtaining of the pollution data in the pollution layer is carried out through X-ray fluorescence spectroscopy analysis technology, total reflection X-ray fluorescence spectroscopy or chemical quantitative analysis.

7. The testing method according to claim 1, characterized in that: The contamination layer contains iron ions.

8. The testing method according to claim 3, characterized in that: The oxygen-containing gas includes oxygen and hydrazine gas.

9. The testing method according to claim 8, characterized in that: The ratio of oxygen to hydrazine gas in the oxygen-containing gas is 10:

1.

10. The testing method according to claim 4, characterized in that: The gas containing hydrofluoric acid gas and ammonia gas has an equal content of hydrofluoric acid gas and ammonia gas.

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