Alignment mark based on semiconductor mounting and semiconductor mounting device

Abstract

The embodiment of the invention provides an alignment mark based on semiconductor mounting and a semiconductor mounting device, and relates to the technical field of semiconductor manufacturing, the alignment mark comprises a first mark arranged on a wafer and a second mark arranged on a chip, and the wafer and the chip are aligned through the first mark and the second mark. After the wafer is aligned with the chip, the geometric center of the first mark coincides with the geometric center of the second mark, the first mark is arranged on the periphery of the second mark, and the outline of the outer edge of the second mark forms a continuous graph. The embodiment of the invention provides an alignment mark based on semiconductor mounting and a semiconductor mounting device, so as to improve the positioning precision and the mounting precision.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor manufacturing, and in particular to an alignment mark based on semiconductor mounting and a semiconductor mounting device. Background Art

[0002] Currently in the semiconductor field, high-precision semiconductor packaging machines require extremely high precision standards. Especially in the visual inspection process, at the hardware level, the camera and lens hardware itself requires high standards, including the camera's pixel size, the camera's target surface size, the camera's resolution, the lens's depth of field and distortion and other factors.

[0003] The software algorithm level mainly focuses on the accuracy, repeatability and generalization of the visual inspection algorithm. The software algorithm is usually the most critical link, but at present, an excellent software algorithm often ignores the problem that the shape of the lithography mark on the semiconductor chip will also lead to changes in detection accuracy. Different mark shapes have different performance and positioning accuracy in the visual algorithm of the same high-precision semiconductor packaging machine.

[0004] How to design a suitable marking shape for semiconductor chips based on a suitable visual algorithm has become an indispensable part of high-precision packaging machines. For the same visual inspection algorithm, if the targeted marking shape cannot meet the high-precision requirements of visual positioning, the UPH (unit per hour) of the machine will be difficult to effectively improve. Summary of the invention

[0005] The embodiment of the present invention provides an alignment mark based on semiconductor mounting and a semiconductor mounting device to improve positioning accuracy and mounting accuracy.

[0006] In a first aspect, an embodiment of the present invention provides an alignment mark based on semiconductor mounting, comprising a first mark set on a wafer and a second mark set on a chip, wherein the wafer and the chip are aligned by the first mark and the second mark.

[0007] After the wafer and the chip are aligned, the geometric center of the first mark coincides with the geometric center of the second mark, the first mark is arranged at the periphery of the second mark, and the outer edge contour of the second mark forms a continuous figure.

[0008] Optionally, an outer edge contour of the second mark is a cross shape.

[0009] Optionally, provided in a marking area;

[0010] The second mark includes a first side, a second side, a third side and a fourth side which are arranged in sequence, and the first side, the second side, the third side and the fourth side divide the mark area into four quadrant areas;

[0011] The first mark includes at least one sub-mark, and the sub-mark is located in the quadrant area.

[0012] Optionally, the at least one sub-mark includes a first sub-mark and a third sub-mark, the first sub-mark is located in the quadrant area surrounded by the first side and the second side, and the third sub-mark is located in the quadrant area surrounded by the third side and the fourth side;

[0013] The first sub-mark and the third sub-mark are symmetrically arranged about a geometric center of the second mark.

[0014] Optionally, the at least one sub-mark further includes a second sub-mark and a fourth sub-mark, the second sub-mark is located in the quadrant area surrounded by the second side and the third side, and the fourth sub-mark is located in the quadrant area surrounded by the fourth side and the first side;

[0015] The second sub-mark and the fourth sub-mark are symmetrically arranged about a geometric center of the second mark, and the first sub-mark and the second sub-mark are symmetrically arranged about the second side.

[0016] Optionally, the shape of the sub-tag includes a rectangle.

[0017] Optionally, the second mark includes an internal hollow area, and the first side, the second side, the third side and the fourth side are located at the periphery of the internal hollow area.

[0018] Optionally, the shape of the internal hollow area includes a rectangle.

[0019] Optionally, the first mark is in the shape of a ring;

[0020] The second mark is in a circular shape.

[0021] In a second aspect, an embodiment of the present invention provides a semiconductor mounting device, including a semiconductor mounting wafer and a chip, a first mark set on the wafer and a second mark set on the chip, constituting the alignment mark as described in the first aspect.

[0022] The embodiment of the present invention provides an alignment mark based on semiconductor mounting, wherein a first mark is arranged on the periphery of a second mark, and the outer edge contour of the second mark forms a continuous figure. Thus, the shape skeleton line of the second mark is no longer a dispersed type, but a continuous type. When positioning by a visual algorithm, the positioning accuracy and mounting accuracy are improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A schematic diagram of a semiconductor mounting device provided by an embodiment of the present invention,

[0024] Figure 2 A schematic diagram of a first mark provided by an embodiment of the present invention;

[0025] Figure 3 A schematic diagram of a second mark provided by an embodiment of the present invention;

[0026] Figure 4 for Figure 2 The first mark in Figure 3 A schematic diagram of an alignment mark after the second mark is nested;

[0027] Figure 5 A schematic diagram of another first mark provided by an embodiment of the present invention;

[0028] Figure 6 A schematic diagram of another second mark provided by an embodiment of the present invention;

[0029] Figure 7 for Figure 5 The first mark in Figure 6 A schematic diagram of an alignment mark after the second mark is nested;

[0030] Figure 8 A schematic diagram of another alignment mark provided by an embodiment of the present invention;

[0031] Fig. 9 A schematic diagram of another alignment mark provided by an embodiment of the present invention;

[0032] Fig.10 A schematic diagram of another alignment mark provided by an embodiment of the present invention;

[0033] Fig.11 A schematic diagram of another alignment mark provided by an embodiment of the present invention;

[0034] Fig.12 A schematic diagram of another first mark provided by an embodiment of the present invention;

[0035] Fig.13 A schematic diagram of another second mark provided by an embodiment of the present invention;

[0036] Fig.14 for Fig.12 The first mark in Fig.13 A schematic diagram of an alignment mark after the second mark is nested;

[0037] Fig.15 A schematic diagram of another alignment mark provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0038] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0039] Figure 1 The schematic diagram of a semiconductor mounting device provided by an embodiment of the present invention includes a semiconductor mounting wafer 12 and a chip 22. The wafer 12 is provided with a first mark 13, and the chip 22 is provided with a second mark 23.

[0040] According to research, currently in the semiconductor front-end industry, the alignment marks on high-precision mounting chips that are usually provided to semiconductor packaging processing suppliers are all windmill-shaped marks, which have the advantages of high recognition accuracy and relatively stable detection by visual algorithms. However, in order to meet the requirements of high accuracy and high speed, the shape skeleton lines of the alignment marks are dispersed when the visual algorithm is positioned, resulting in the advantage of windmill-shaped marks in semiconductor packaging being relatively weak.

[0041] Figure 2 A schematic diagram of a first mark provided by an embodiment of the present invention, Figure 3 A schematic diagram of a second mark provided by an embodiment of the present invention, Figure 4 for Figure 2 The first mark in Figure 3 Schematic diagram of the alignment mark after the second mark is nested, refer to Figure 2-Figure 4 The alignment mark includes a first mark 13 set on the wafer 12 and a second mark 23 set on the chip 22. The wafer 12 and the chip 22 are aligned by the first mark 13 and the second mark 23, and then the aligned wafer 12 and the chip 22 can be bonded together. After the wafer 12 and the chip 22 are aligned, the geometric center of the first mark 13 coincides with the geometric center of the second mark 23. The first mark 13 is set on the periphery of the second mark 23, and the outer edge contour of the second mark 23 forms a continuous pattern.

[0042] The embodiment of the present invention provides an alignment mark based on semiconductor mounting, wherein the first mark 13 is arranged on the periphery of the second mark 23, and the outer edge contour of the second mark 23 forms a continuous pattern. Thus, the shape skeleton line of the second mark 23 is no longer a dispersed type, but a continuous type. When positioning by a visual algorithm, the positioning accuracy and mounting accuracy are improved.

[0043] Optionally, refer to Figure 2-Figure 4 , the outer edge contour of the second mark 23 is a cross shape.

[0044] Exemplarily, in one embodiment, the outer edge contour of the second mark 23 is a shape other than a cross, for example, a cross includes four sides radiating outward from the center, or a shape other than a cross includes three sides or five sides radiating outward from the center.

[0045] Optionally, refer to Figure 2-Figure 4 , the alignment mark is set in the mark area 30. In one embodiment, the mark area 30 is a silicon-based area on the wafer 12. In another embodiment, the mark area 30 is a hollow area on the wafer 12 and / or the chip 22. The second mark 23 includes a first side 231, a second side 232, a third side 233 and a fourth side 234 that are sequentially arranged. The first side 231, the second side 232, the third side 233 and the fourth side 234 divide the mark area 30 into four quadrant areas 40. The first mark 13 includes at least one sub-mark 130, and the sub-mark 130 is located in the quadrant area 40.

[0046] For example, reference Figure 2-Figure 4 , one quadrant area 40 includes at most one first mark 13 .

[0047] For example, reference Figure 2-Figure 4 The first mark 13 includes a plurality of sub-marks 130, and the geometric center of the first mark 13 is the distribution center of the plurality of sub-marks 130. The number of the plurality of sub-marks 130 is greater than or equal to 2. The diameter of the circumscribed circle of the plurality of sub-marks 130 is smaller than the diameter of the circumscribed circle of the second mark 23, and the plurality of sub-marks 130 are distributed within the circumscribed circle of the second mark 23, so as not to occupy the space outside the circumscribed circle of the second mark 23, thereby reducing the area of ​​the space occupied by the alignment mark.

[0048] Optionally, refer to Figure 2-Figure 4 At least one sub-mark 130 includes a first sub-mark 131 and a third sub-mark 133. The first sub-mark 131 is located in a quadrant region 40 surrounded by a first side 231 and a second side 232, and the third sub-mark 133 is located in a quadrant region 40 surrounded by a third side 233 and a fourth side 234. The first sub-mark 131 and the third sub-mark 133 are symmetrically arranged about the geometric center of the second mark 23.

[0049] For example, reference Figure 2-Figure 4The first side 231, the second side 232, the third side 233 and the fourth side 234 divide the mark area 30 into four quadrant areas 40, and the four quadrant areas 40 are respectively the first quadrant area 41, the second quadrant area 42, the third quadrant area 43 and the fourth quadrant area 44. The first side 231 and the second side 232 surround the first quadrant area 41, the second side 232 and the third side 233 surround the second quadrant area 42, the third side 233 and the fourth side 234 surround the third quadrant area 43, and the fourth side 234 and the first side 231 surround the fourth quadrant area 44. The first sub-mark 131 is located in the first quadrant area 41, and the third sub-mark 133 is located in the third quadrant area 43.

[0050] In other embodiments, at least one sub-mark 130 includes a second sub-mark 132 and a fourth sub-mark 134, the second sub-mark 132 is located in the second quadrant area 42, the fourth sub-mark 134 is located in the fourth quadrant area 44, and the second sub-mark 132 and the fourth sub-mark 134 are symmetrically arranged about the geometric center of the second mark 23.

[0051] Figure 5 A schematic diagram of another first mark provided by an embodiment of the present invention, Figure 6 A schematic diagram of another second mark provided by an embodiment of the present invention, Figure 7 for Figure 5 The first mark in Figure 6 Schematic diagram of the alignment mark after the second mark is nested, refer to Figure 5-Figure 7 , at least one sub-mark 130 further includes a first sub-mark 131, a second sub-mark 132, a third sub-mark 133, and a fourth sub-mark 134. The first sub-mark 131 is located in a quadrant region 40 surrounded by the first side 231 and the second side 232, and the third sub-mark 133 is located in a quadrant region 40 surrounded by the third side 233 and the fourth side 234. The first sub-mark 131 and the third sub-mark 133 are symmetrically arranged about the geometric center of the second mark 23. The second sub-mark 132 is located in a quadrant region 40 surrounded by the second side 232 and the third side 233, and the fourth sub-mark 134 is located in a quadrant region 40 surrounded by the fourth side 234 and the first side 231. The second sub-mark 132 and the fourth sub-mark 134 are symmetrically arranged about the geometric center of the second mark 23. The first sub-mark 131 and the second sub-mark 132 are symmetrically arranged about the second side 232.

[0052] For example, reference Figure 5-Figure 7 The second sub-mark 132 and the third sub-mark 133 are symmetrically arranged about the third side 233. The third sub-mark 133 and the fourth sub-mark 134 are symmetrically arranged about the fourth side 234. The fourth sub-mark 134 and the first sub-mark 131 are symmetrically arranged about the first side 231.

[0053] For example, reference Figure 5-Figure 7 The first side 231 and the third side 233 are symmetrically arranged about the geometric center of the second mark 23. The second side 232 and the fourth side 234 are symmetrically arranged about the geometric center of the second mark 23.

[0054] For example, reference Figure 5-Figure 7 , the first side 231, the second side 232, the third side 233 and the fourth side 234 have the same shape. The first sub-mark 131, the second sub-mark 132, the third sub-mark 133 and the fourth sub-mark 134 have the same shape.

[0055] Optionally, refer to Figure 5-Figure 7 , the shape of the sub-mark 130 includes a rectangle. As an example, the shape of the sub-mark 130 includes a square. In other embodiments, the shape of the sub-mark 130 can also be other shapes besides a rectangle.

[0056] For example, reference Figure 7 , the shape of the sub-mark 130 includes a square, and the side length of the sub-mark 130 is D1, 3μm≤D1≤8μm. The minimum distance between the edge of the first sub-mark 131 and the edge of the first side 231 is D2, 1μm≤D2≤6μm. The minimum distance between the edge of the first sub-mark 131 and the edge of the mark area 30 is D3, 6μm≤D2≤11μm. The maximum distance between the edge of the first side 231 and the edge of the third side 233 is D4, 27μm≤D4≤33μm. The first side 231, the second side 232, the third side 233 and the fourth side 234 may have the same width. The width of the fourth side 234 is D5, 2.5μm≤D5≤7.5μm. The minimum distance between the fourth side 234 and the edge of the mark area 30 is D6, 2.5μm≤D6≤7.5μm. The shape of the marking area 30 includes a square, and the side length of the marking area 30 is D7, 37 μm≤D7≤39 μm.

[0057] Figure 8 A schematic diagram of another alignment mark provided in an embodiment of the present invention, referring to Figure 8 The second mark 23 includes an inner hollow area 50, and the first side 231, the second side 232, the third side 233 and the fourth side 234 are located at the periphery of the inner hollow area 50. The first side 231, the second side 232, the third side 233 and the fourth side 234 are arranged around the inner hollow area 50.

[0058] Optionally, refer to Figure 8 , the shape of the internal hollow area 50 includes a rectangle. Exemplarily, the shape of the internal hollow area 50 includes a square, and the side length of the internal hollow area 50 is equal to the width of the fourth side 234. The corners of two adjacent ones of the first side 231, the second side 232, the third side 233 and the fourth side 234 are butted and spliced ​​to form a continuous pattern.

[0059] Fig. 9 A schematic diagram of another alignment mark provided in an embodiment of the present invention, referring to Fig. 9 The shape of the internal hollow area 50 includes a square, and the side length of the internal hollow area 50 is less than the width of the fourth side 234. A connecting portion 51 is provided between the internal hollow area 50 and the fourth side 234, and the connecting portion 51 is provided around the internal hollow area 50, and the first side 231, the second side 232, the third side 233 and the fourth side 234 are located at the periphery of the connecting portion 51. The connecting portion 51 connects the first side 231, the second side 232, the third side 233 and the fourth side 234, and the first side 231, the second side 232, the third side 233, the fourth side 234 and the connecting portion 51 are integrally formed.

[0060] Fig.10 A schematic diagram of another alignment mark provided in an embodiment of the present invention, referring to Fig.10 , the shape of the internal hollow area 50 includes a circle. In other embodiments, the shape of the internal hollow area 50 may also include a triangle, a hexagon, or an octagon.

[0061] For example, reference Fig.10 The shape of the inner hollow area 50 includes a circle. The diameter of the inner hollow area 50 is equal to √2 times the width of the fourth side 234.

[0062] In one embodiment, it is also possible to Fig. 9 The shape of the inner hollow area 50 is set to a circle. The circle has the advantage of easy positioning.

[0063] Fig.11 A schematic diagram of another alignment mark provided in an embodiment of the present invention, referring to Fig.11 The shape of the sub-mark 130 includes a circle. In other embodiments, the shape of the sub-mark 130 may also include a ring, a triangle, a hexagon, an octagon, or the like.

[0064] Fig.12 A schematic diagram of another first mark provided by an embodiment of the present invention, Fig.13 A schematic diagram of another second mark provided by an embodiment of the present invention, Fig.14 for Fig.12 The first mark in Fig.13 Schematic diagram of the alignment mark after the second mark is nested, refer to Figure 12-14 The first mark 13 is in the shape of a ring. The second mark 23 is in the shape of a circle. The second mark 23 is located in the circular area formed by the inner edge contour of the first mark 13.

[0065] For example, reference Figure 12-14, the distance between the inner edge of the first mark 13 and the circumference of the second mark 23 is D9, the distance between the inner edge of the first mark 13 and the outer edge of the first mark 13 is D10, and D9 is greater than D10.

[0066] For example, reference Figure 12-14 The shape of the marking area 30 includes a square, and the side length of the marking area 30 is D7, 37μm≤D7≤43μm. The radius of the second mark 23 is D8, 4.5μm≤D8≤9.5μm. 2.5μm≤D9≤7.5μm, 0.5μm≤D10≤5.5μm, and the minimum distance between the outer edge of the first mark 13 and the edge of the marking area 30 is D11. 2.5μm≤D11≤7.5μm.

[0067] Fig.15 A schematic diagram of another alignment mark provided in an embodiment of the present invention, referring to Fig.15 , the distance between the inner edge of the first mark 13 and the circumference of the second mark 23 is D9, the distance between the inner edge of the first mark 13 and the outer edge of the first mark 13 is D10, and D9 is smaller than D10.

[0068] For example, reference Fig.15 ,37μm≤D7≤43μm. 4.5μm≤D8≤9.5μm. 0.5μm≤D9≤5.5μm, 2.5μm≤D10≤7.5μm, 2.5μm≤D11≤7.5μm.

[0069] The embodiment of the present invention further provides a semiconductor mounting device, referring to Figure 1 The semiconductor mounting device includes a semiconductor mounting wafer 12 and a chip 22. The first mark 13 set on the wafer 12 and the second mark 23 set on the chip 22 constitute the alignment mark in the above embodiment. Therefore, the semiconductor mounting device has the advantages of the alignment mark in the above embodiment.

[0070] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, combinations and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. An alignment mark based on semiconductor mounting, comprising a first mark set on a wafer and a second mark set on a chip, wherein the wafer and the chip are aligned by the first mark and the second mark, characterized in that: After the wafer and the chip are aligned, the geometric center of the first mark coincides with the geometric center of the second mark, the first mark is arranged at the periphery of the second mark, and the outer edge contour of the second mark forms a continuous figure.

2. The semiconductor mounting-based alignment mark according to claim 1, characterized in that: The outer edge contour of the second mark is a cross shape.

3. The semiconductor mounting-based alignment mark according to claim 2, characterized in that: Set in the marked area; The second mark includes a first side, a second side, a third side and a fourth side which are arranged in sequence, and the first side, the second side, the third side and the fourth side divide the mark area into four quadrant areas; The first mark includes at least one sub-mark, and the sub-mark is located in the quadrant area.

4. The semiconductor mounting-based alignment mark according to claim 3, characterized in that: The at least one sub-mark includes a first sub-mark and a third sub-mark, the first sub-mark is located in the quadrant area surrounded by the first side and the second side, and the third sub-mark is located in the quadrant area surrounded by the third side and the fourth side; The first sub-mark and the third sub-mark are symmetrically arranged about a geometric center of the second mark.

5. The semiconductor mounting-based alignment mark according to claim 4, characterized in that: The at least one sub-mark further includes a second sub-mark and a fourth sub-mark, wherein the second sub-mark is located in the quadrant area surrounded by the second side and the third side, and the fourth sub-mark is located in the quadrant area surrounded by the fourth side and the first side; The second sub-mark and the fourth sub-mark are symmetrically arranged about a geometric center of the second mark, and the first sub-mark and the second sub-mark are symmetrically arranged about the second side.

6. The semiconductor mounting-based alignment mark according to claim 3, characterized in that: The shape of the sub-tag includes a rectangle.

7. The semiconductor mounting-based alignment mark according to claim 3, characterized in that: The second mark includes an inner hollow area, and the first side, the second side, the third side and the fourth side are located at the periphery of the inner hollow area.

8. The semiconductor mounting-based alignment mark according to claim 7, characterized in that: The shape of the inner hollow area includes a rectangle.

9. The semiconductor mounting-based alignment mark according to claim 1, characterized in that: The first mark is in the shape of a ring; The second mark is in a circular shape.

10. A semiconductor mounting device, characterized in that: A wafer and a chip for semiconductor mounting, a first mark set on the wafer and a second mark set on the chip constitute the alignment mark as described in any one of claims 1-9.

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