Straight-through mode in battery charger
By introducing a pass-through mode (PTM) into the battery charger, switching to PTM when the system voltage drops to a smaller predefined offset than the battery voltage, the switching delay and loss problems of the charger when switching from charging mode to discharging mode is solved, and efficiency and thermal performance are improved.
Patent Information
- Application Number
- CN202411053830.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-09-25
- Filing Date
- 2024-08-02
- Publication Date
- 2025-03-25
AI Technical Summary
Existing battery chargers have switching delays and switching losses when switching from charging mode to discharge mode, affecting efficiency and thermal performance.
By introducing a pass-through mode (PTM) into the charger, the charger is switched from discharge mode to PTM when a predefined voltage offset is detected by detecting a system voltage that is smaller than the battery voltage, enabling continuous discharge of the battery without switching.
Reduces switching of switching elements in the converter, reduces switching losses, improves charger efficiency and thermal performance, and avoids delays during the conversion process.
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Figure CN119696083A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates generally to semiconductor devices and more particularly to operating a battery charger in a discharge mode including a pass-through mode. Background Art
[0002] A device including a battery charger may include one or more ports for receiving power, such as a universal serial bus (USB) port. The received power may be used to charge one or more batteries in the device and / or to provide power to a load in the device or a load connected to the device. The battery charger may include one or more charger modules, and each port (or each USB port) may be connected to a separate charger module. The battery charger may also include a controller configured to control the operation of the charger module. The battery charger may also include various circuits and integrated circuits (ICs) that may detect various quantitative measurements of the battery charger. The detected quantitative measurements may be provided to one or more control loops implemented by the controller, and the controller may adjust parameters and / or settings of the charger module to optimize performance such as efficiency and power consumption, and to prevent dangerous conditions associated with the battery charger. Summary of the invention
[0003] In one embodiment, a method for operating a battery charger is described as a whole. The method may include operating the battery charger in a charging mode to use adapter power to support system power at the output of the battery charger. The method may also include detecting that the adapter power reaches a maximum value. The method may also include, in response to the adapter power reaching a maximum value, converting the battery charger from a charging mode to a discharging mode to reduce the battery charging current in the battery charger to support the system power. In response to the reduced battery charging current, the system voltage at the output of the battery charger may begin to decrease. The method may also include detecting whether the system voltage is less than a battery voltage of the battery by a predefined voltage offset. The method may also include, in response to detecting that the system voltage is less than the battery voltage by a predefined voltage offset, converting the battery charger from a discharging mode to a pass-through mode (PTM), the pass-through mode continuing to discharge the battery. PTM may cause the battery charger to discharge the battery without performing a switch.
[0004] In one embodiment, a semiconductor device for operating a battery charger is described as a whole. The semiconductor device may include a controller configured to operate the battery charger in a charging mode to support the system power at the output of the battery charger using the adapter power. The controller may detect that the adapter power reaches a maximum value. The controller may, in response to the adapter power reaching a maximum value, convert the battery charger from a charging mode to a discharging mode to reduce the battery charging current in the battery charger to support the system power. In response to the reduced battery charging current, the system voltage at the output of the battery charger may begin to decrease. The controller may also detect whether the system voltage is less than a battery voltage of the battery by a predefined voltage offset. The controller may, in response to detecting that the system voltage is less than the battery voltage by a predefined voltage offset, further convert the battery charger from a discharging mode to a pass-through mode (PTM), and the pass-through mode continues to discharge the battery. The PTM may enable the battery charger to discharge the battery without performing switching.
[0005] In one embodiment, an apparatus for operating a battery charger is generally described. The apparatus may include a power transfer circuit configured to convert an input voltage to an adapter voltage. The apparatus may also include a switching converter configured to switch the adapter voltage to a midpoint voltage. The apparatus may also include a battery charger. The apparatus may also include a battery. The battery charger may be configured to operate in a charging mode to support a system power at an output of the battery charger using the adapter power provided by the midpoint voltage. The battery charger of the apparatus may be further configured to detect that the adapter power reaches a maximum value. The battery charger may be further configured to, in response to the adapter power reaching a maximum value, convert the battery charger from a charging mode to a discharging mode to reduce a battery charging current to support the system power. In response to the reduced battery charging current, a system voltage at the output of the battery charger may begin to decrease. The battery charger may be further configured to detect whether the system voltage is less than a battery voltage of the battery by a predefined voltage offset. The battery charger may be configured to, in response to detecting that the system voltage is less than the battery voltage by a predefined voltage offset, further convert the battery charger from a discharging mode to a pass-through mode (PTM), the pass-through mode continuing to discharge the battery. PTM can cause the battery charger to discharge the battery without performing switching.
[0006] The foregoing summary of the invention is merely illustrative and is not intended to be limiting in any way. In addition to the above illustrative aspects, embodiments, and features, other aspects, embodiments, and features will become apparent by reference to the accompanying drawings and the following detailed description. In the accompanying drawings, the same reference numerals indicate the same or functionally similar elements. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] Figure 1is a diagram showing an arrangement by which a pass-through mode may be implemented in a battery charger in one embodiment.
[0008] Figure 2A is a diagram showing a set of control loops that may be used to implement a pass-through mode in a battery charger in one embodiment.
[0009] Figure 2B is a diagram showing another set of control loops that may be used to implement a pass-through mode in a battery charger in one embodiment.
[0010] Figure 3 is a graph illustrating waveforms that may result from implementing a pass-through mode in a battery charger in one embodiment.
[0011] Figure 4 is a flow chart of an example process by which pass-through mode may be implemented in a battery charger in one embodiment. DETAILED DESCRIPTION
[0012] Figure 1 is a diagram showing an arrangement in which a pass-through mode may be implemented in a battery charger in one embodiment. Figure 1 The device 100 shown may include a port 101, a power delivery circuit 102, a first stage 104, a second stage 106, and a battery module 110. In one embodiment, the port 101 may be a Universal Serial Bus Type-C (USB-C) port. In one embodiment, a load 108 may be connected to the device 100 (e.g., to the output of the second stage 106). In another embodiment, the load 108 may be a part of the device 100. The device 100 may be an electronic device such as, for example, a desktop computer, a laptop computer, a tablet device, a smart watch, a cellular phone, a smart phone, a wearable device, an electronic cigarette, etc. The battery module 110 may be a battery pack including at least one battery.
[0013] The power delivery circuit 102 may include a controller 112 that controls various aspects of the power delivery circuit 102, such as determining the source and sink, negotiation and authentication for a charging device, determining a charging direction, operating components (such as switches in the power delivery circuit 102), etc. In one embodiment, the power delivery circuit 102 may be an extended power range (EPR) power delivery (PD) adapter adapted for a USB-C port that supports high voltage power delivery (e.g., Universal Serial Bus Power Delivery (USB-PD) version 3.1). By way of example, the input voltage Vin at the port 101 may be up to 48 volts (V), so that the power delivery circuit 102 may output an adapter power Padp of up to 240 watts (W), with a maximum current limit set to 5 amperes (A).
[0014] The first stage 104 may be a first voltage conversion stage that converts the input voltage Vin received at the port 101 into a midpoint voltage Vmid. The first stage 104 may be implemented by a multi-level switching converter (such as a three-level buck converter), which is formed by switching elements M1, M2, M3, M4 and a flying capacitor Cfly. The switching elements M1, M2, M3, M4 may be metal oxide semiconductor field effect transistors (MOSFETs) and may be connected in series. The controller 114 (which may be a three-level buck controller) may be configured to switch the switching elements M1, M2, M3, M4 and control the voltage of Cfly. For example, since the first stage 104 is implemented by a three-level buck converter, the first stage 104 may alternatively output its output voltage as voltages 0V, Vadp / 2, and Vadp to generate an appropriate Vmid. The adapter power Padp may be supplied from the power transfer circuit 102 to the second stage 106 via the first stage 104.
[0015] The second stage 106 may be a narrow voltage direct charge (NVDC) battery charger (e.g., a NVDC 4-switch buck-boost battery charger). The second stage 106 may be configured to convert or adjust Vmid to Vsys. The combination of the first stage 104 and the second stage 106 may allow Vin to be extended to a relatively high voltage, such as 48V. The second stage 106 may include a converter 120 formed by switching elements Q1, Q2, Q3, Q4 and an inductor L arranged in a full-bridge configuration. Power (such as Pmid) from the first stage 104 may be provided to a load 108 and a battery module 110 for charging the battery module 110. The second stage 106, as a NVDC charger, may allow Vsys to be adjusted to a voltage close to the battery voltage Vbat. The controller 116 may be configured to control the switching elements Q1, Q2, Q3, Q4 based on various control loops. The switching element BFET may be connected between the battery module 110 and Vsys. The switching elements Q1, Q2, Q3, Q4, BFET may be MOSFETs.
[0016] The controllers 112, 114, 116 may be, for example, microcontrollers. The controllers 112, 114, 116 may also include components such as processors, logic circuits, digital-to-analog converters (DACs), comparators, mixers, memory devices (e.g., registers), and various electronic components. The controllers 112, 114, 116 may also include memory devices, such as registers, configured to store various predefined reference values and thresholds that may be required for operating the power transfer circuit 102, the first stage 104, and the second stage 106. In one embodiment, the controllers 112, 114, 116 may be configured to communicate with each other. In one embodiment, the controllers 112, 114, 116 may be portions of a single microcontroller.
[0017] The device 100 can operate the second stage 106 in various modes to support (e.g., provide or supply power) the system power Psys provided to the load 108. If the battery module 110 is fully charged, the controller 116 can turn off the BFET. The Pmid delivered by Vmid can support PSYS (e.g., Padp is the power provided to the load 108). When Padp is greater than Psys and the battery module 110 is not fully charged, the second stage 106 can operate in a charging mode (such as NVDC mode). In NVDC mode, Padp can support Psys and can charge the battery module 110 with the help of the converter 106. The controller 116 can turn on the BFET in the NVDC mode. When Padp is less than Psys, the second stage 106 can operate in a discharge mode (such as turbo mode). Since Padp is less than Psys, Padp may not be sufficient to support Psys. Therefore, the battery module 106 can be discharged to provide power for Psys, so that both Padp and Pbat support Psys. The controller 116 can turn on the BFET in turbo mode.
[0018] As Psys increases, Psys will eventually become greater than Padp. In response to Psys being greater than Padp, the second stage 106 may begin a turbo mode to discharge the battery module 110 to replenish Psys. Conventional devices, such as devices that use a bypass transistor to operate a charging mode (e.g., bypass charging mode) and a discharging mode (e.g., reverse turbo charging (RTB) mode), may experience a delay when switching from a charging mode to a discharging mode. During this delay, PSIS is not supported, and the RTB mode involves switching (e.g., in the converter 120), which can cause thermal issues and power losses.
[0019] As described in more detail below, the device 100 can be switched from a charging mode (such as an NVDC charging mode) to a discharging mode (such as an NVDC discharging mode), and then, under certain conditions, further switched to a pass-through mode (PTM) to continue discharging without switching. When Vsys>Vbat-200mV, the PTM can be disabled and the NVDC discharging mode can be entered again. Using the PTM in the discharge mode can allow the device 100 to switch from the charging mode to the discharging mode without delay, and the PTM does not generate switching losses (compared to conventional techniques such as NVDC modes with bypass transistors). Reduced switching can also improve thermal performance. In one aspect, the PTM can enable an operating mode in which the switching elements Q1, Q4 remain turned on and the switching elements Q2, Q3 are turned off. Therefore, when the second stage 106 operates under PTM, no switching is involved. The controller 116 can be configured to monitor the current and voltage at various points of the device 100, and select a specific control loop based on the monitored current and voltage. The monitoring and selection control loops may enable the controller 116 to switch from the NVDC discharge mode to the PTM at the appropriate time.
[0020] Figure 2A is a diagram showing a set of control loops that may be used to implement a pass-through mode in a battery charger in one embodiment. Figure 2A For a description, see Figure 1 The components shown. Figure 2A In the embodiment shown, Figure 1 The controller 114 may include at least a loop selector 202a, a modulator 204b, and a pulse width modulation (PWM) driver 206c. The first stage 104 may include various comparators configured to monitor current and voltage at the input and output of the first stage 104.
[0021] exist Figure 2A In the illustrated embodiment, the comparator 208 may receive Iadp, which may be measured across RS1. The comparator 208 may also receive a predefined current limit CL. The Iadp control loop may be a control loop flowing from RS1 to the first stage 104 via the controller 114. When the loop selector 202a selects the Iadp control loop, the modulator 204a may generate an Iadp control signal, and the PWM driver 206a may use the Iadp control signal to drive M1, M2, M3, M4 to adjust Iadp at CL.
[0022] When Psys is greater than Padp, the loop selector 202a may select the Iadp control loop to monitor whether Iadp reaches the current limit CL. In response to Iadp reaching the current limit CL, the controller 114 may start to reduce Vmid. When Vmid is reduced to Vin,Lim When the circuit selector 202b selects the Vin control circuit, the controller is in,Lim Adjust Vmid at Figure 2B , when Vmid is at V in,Lim When the voltage Vsys and Ibat are regulated, Vsys and Ibat can continue to decrease and the battery module 110 can be discharged in the NVDC discharge mode to support Psys. In addition, in the NVDC discharge mode, the converter 120 can continue to switch, and when the second stage 106 enters the Vin loop, the BFET can be turned on, and Ibat begins to decrease in response to the reduced Vsys to discharge the battery module 110 (e.g., Pbat=Psys-Padp).
[0023] Figure 2B is a diagram showing another set of control loops that may be used to implement a pass-through mode in a battery charger in one embodiment. Figure 2B For a description, see Figure 1 and Figure 2A The components shown in Figure 2B In the embodiment shown, Figure 1 The controller 116 may include at least one loop selector 202 b, a modulator 204 b, and a pulse width modulation (PWM) driver 206 b. The second stage 106 may include various comparators configured to monitor current and voltage at the input and output of the second stage 106 .
[0024] exist Figure 2B In the illustrated embodiment, the comparator 212 may receive Vmid, which may be measured between the output of the first stage 104 and the input of the second stage 106. The comparator 212 may also receive a predefined input voltage Vin,Lim from a digital-to-analog converter (DAC) register in the second stage 106, the predefined input voltage Vin,Lim defining a target Vmid. In one embodiment, Vin,Lim may be a predefined input voltage for regulating Vmid in response to the start of discharge of the battery module 110. The Vmid control loop may be a control loop flowing from Vmid to the converter 120 via the comparator 212 and the controller 116. When the loop selector 202b selects the Vmid control loop, the modulator 204b may generate a Vmid control signal, and the PWM driver 206b may use the Vmid control signal to drive Q1, Q2, Q3, Q4 to regulate Vmid at Vin,Lim.
[0025] The comparator 214 can receive the adapter current Imid measured across the sensing resistor RS3. The comparator 214 can also receive a predefined current CL from another DAC register in the second stage 106, which defines the current limit of Imid. The current limit CL can be the maximum allowed value of Imid, which will adjust the power or Psys from the second stage 106 at the maximum power. The Imid control loop can be a control loop flowing from RS3 to the converter 120 via the comparator 214 and the controller 116. When the loop selector 202b selects the Imid control loop, the modulator 204b can generate an Imid control signal, and the PWM driver 206b can use the Imid control signal to drive Q1, Q2, Q3, Q4 to adjust Imid at CL.
[0026] The comparator 216 may receive a charger voltage, such as Vsys measured from the output of the converter 120. The comparator 216 may also receive a predefined voltage CV from another DAC register in the second stage 106, the predefined voltage CV defining a target charging voltage for Vsys. The Vsys control loop may be a control loop flowing from Vsys to the converter 120 via the comparator 216 and the controller 116. When the loop selector 202b selects the Vsys control loop, the modulator 204b may generate a Vsys control signal, and the PWM driver 206b may use the Vsys control signal to drive Q1, Q2, Q3, Q4 to regulate Vsys at CV.
[0027] The comparator 218 can receive the charging current Ibat measured across the sensing resistor RS2. The comparator 218 can also receive a predefined current from another DAC register in the second stage 106, which defines the charging current CC. The charging current CC can be a current limit for the battery current Ibat. The Ibat control loop can be a control loop that flows from RS2 to the converter 120 via the comparator 218 and the controller 116. When the loop selector 202b selects the Ibat control loop, the modulator 204b can generate an Ibat control signal, and the PWM driver 206b can use the Ibat control signal to drive Q1, Q2, Q3, Q4 to adjust Ibat at CC.
[0028] When Vsys drops to a voltage smaller than Vbat by a predefined voltage offset V th,PTM (For example, Vsys <Vbat–V th,PTM ), the controller 106 can enable the PTM by turning off the switch elements Q2 and Q3 and turning on the switch elements Q1 and Q4. th,PTMIt can be the offset voltage between Vsys and Vbat, which defines the threshold voltage for triggering the start of PTM. th,PTM , the controller 116 may disable PTM and return to normal switching of the converter 120. Further details on transitioning from a charging mode (e.g., NVDC mode) to a NVDC discharge mode and then to PTM are described in Figure 3 Shown in.
[0029] Figure 3 is a graph showing waveforms that may be produced by implementing a pass-through mode in a battery charger in one embodiment. Figure 3 For a description, see Figure 1 and the components shown in Figure 2. Figure 3 In the example shown, at time t0, Vmid is adjusted to an initial voltage of 20 V. The voltage difference ΔV1 between Vsys and Vbat may be Ibat(charging)×(R DS(ON),BGATE +RS2), where Ibat(charging) represents the current flowing into the battery module 110 in the charging mode, R DS(ON),BGATE RS2 represents the resistance between the drain and source of the BFET when a specific gate-source voltage (VGS) is applied to bias the BFET into an on-state, and RS2 is the resistance of the sense resistor RS2.
[0030] At time t1, Psys may begin to increase, which increases Padp and Iadp, while Vmid is still regulated at 20 V. The increase in Isys and Psys may also increase Iadp and Padp, while Ibat maintains the same charging current.
[0031] At time t2, Iadp may reach the current limit CL. As Padp reaches its maximum value, the first stage 104 reduces Vmid to maintain Iadp at the current limit CL, and the second stage 106 enters the Vin loop to maintain V in,Lim After that, the battery module 110 may start to reduce the charging current at time t2 to support PSYS (eg, continuously increase Psys), thereby entering the NVDC discharge mode. As the battery module 110 starts to reduce the charging current, the battery current Ibat may start to decrease at t2.
[0032] At time t3, Psys begins to become greater than Padp and Vsys begins to become less than Vbat. In response to Psys being greater than Padp, the controller 116 may monitor the difference between Vsys and Vbat to detect the appropriate time to transition from the NVDC charging mode to PTM.
[0033] At time t4, Vsys is reduced to an offset voltage V less than Vbat. th,PTM In response to Vsys being less than Vbat, V th,PTM In the case of , the controller 116 can switch from the NVDC discharge mode to the PTM by turning off the switching elements Q2, Q3 and turning on the switching elements Q1, Q4. When the PTM is enabled, Vmid can be further reduced by the Iadp current limit control of the first stage.
[0034] At time t5, when Psys reaches the maximum power, Ibat maintains the discharge current. If Psys decreases and Vsys is greater than Vbat–V th,PTM , the controller 116 can switch from PTM to NVDC discharge mode. When Vmid is regulated by the first stage 104 in the CL loop and the second stage 106 is in PTM, the difference between Vmid and Vsys is ΔV2=IL×(DCR L +R DS(ON),Q1&Q4 ), where IL is the current flowing through the inductor L under PTM, and DCR L is the DC resistance of the inductor L under PTM, and R DS(ON),Q1&Q4 Represents the resistance between the drain and source of the switching elements Q1 and Q4 when VGS is applied to bias Q1 and Q4 to the on state.
[0035] By operating at multiple voltage levels (such as at V in,Lim The second stage 106 reduces Vsys, thereby switching from charging mode to discharging mode through the VIN loop. in,Lim Adjusting Vmid at Vmid allows Psys to receive power from Padp (e.g., via in,Lim The Vmid and Pbat regulated at Vmid and Pbat obtain uninterrupted support and allow the controller 116 sufficient time to monitor Vsys and identify the appropriate time to start PTM. in,Lim 、V th,VIN and V th,PTM The value of can be selected to suit different implementations. In one embodiment, V th,PTM and V th,VIN The value of may be arbitrary and may be related to system parameters such as RDS,(ON), RS2 and other parameters of the BFET. Using a discharge mode including PTM may reduce switching of the switching elements Q1, Q2, Q3, Q4 in the converter 120. Reduced switching may reduce switching losses and improve efficiency and thermal performance of the device 100.
[0036] Figure 4 is a flow chart of an example process by which pass-through mode may be implemented in a battery charger in one embodiment. Figure 4 The process 400 in the embodiment may be implemented using, for example, the apparatus 100 discussed above. The process 400 may include one or more operations, actions, or functions as shown in one or more of blocks 402, 404, and / or 406. Although illustrated as discrete blocks, various blocks may be divided into additional blocks, combined into fewer blocks, eliminated, performed in a different order, or performed in parallel, depending on the desired implementation.
[0037] Process 400 may be implemented by a controller of a power sink device, such as a controller of a battery charger. Process 400 may start at block 402, where the controller may operate the battery charger in a charging mode to support the system power using the adapter power and use the battery charging power at the output of the battery charger. Process 400 may continue from block 402 to block 404. At block 404, the controller may detect that the adapter power reaches a maximum value and the first stage operates under an input current loop. Also at block 404, the first stage of the battery charger may operate under an input current limiting loop, and the midpoint voltage provided from the first stage to the second stage of the battery charger may begin to decrease. Process 400 may continue from block 404 to block 406. At block 406, the controller may, in response to the adapter power reaching a maximum value, switch the battery charger from a charging mode to a discharging mode so that the battery charging current supports the system power. In response to the reduced battery charging current, the system voltage at the output of the battery charger begins to decrease. When the system power is greater than the adapter power, the battery may begin to discharge. Also in block 406, in response to the midpoint voltage reduction in block 404, the second stage may operate under the input voltage loop to maintain the midpoint voltage within the input voltage limit (see Figure 3 and V in the above description in,Lim ) and begins to reduce the system voltage. In response to the reduction in system voltage, the charging current may be reduced and the battery begins to discharge.
[0038] Process 400 may continue from block 406 to block 408. At block 408, the controller may detect that the system voltage may be less than the battery voltage of the battery by a predefined voltage offset. Process 400 may continue from block 408 to block 410. At block 410, the controller may, in response to detecting that the system voltage may be less than the battery voltage by a predefined voltage offset (e.g., system voltage < battery voltage - predefined voltage offset), switch the battery charger from a discharge mode to a pass-through mode (PTM) that continues to discharge the battery. The PTM may cause the battery charger to discharge the battery without performing switching, thereby discharging the battery without switching losses.
[0039] In one embodiment, the battery charger may include a first high-side switch element, a second high-side switch element, a first low-side switch element, and a second low-side switch element. The controller may further convert the battery charger from the charging mode to the PTM by turning on the first high-side switch element and the second high-side switch element, and turning off the first low-side switch element and the second low-side switch element.
[0040] In another embodiment, in response to the start of PTM, the controller may further reduce the input voltage to the target voltage under PTM, and regulate the input voltage at the target voltage under PTM. In another embodiment, the controller may further maintain the input voltage of the battery charger at a voltage level greater than the system voltage. In another embodiment, the input voltage of the battery charger and the system voltage are short-circuited under PTM. In another embodiment, the charging mode may be a narrow voltage direct charging (NVDC) mode, and the discharging mode may be a NVDC discharging mode.
[0041] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functions and operations of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each box in the flowchart or block diagram may represent a module, segment or portion of an instruction, and the instruction includes one or more executable instructions for implementing the specified logical function. In some alternative implementations, the functions noted in the box may not appear in the order noted in the figure. For example, depending on the functions involved, two boxes shown in succession may actually be implemented substantially simultaneously, or the boxes may sometimes be implemented in the opposite order. It is also necessary to note that each box illustrated in the block diagram and / or flowchart and the box combination in the block diagram and / or flowchart can be implemented by a dedicated hardware system that performs the specified function or behavior, or a combination of dedicated hardware and computer instructions.
[0042] The terms used herein are only used for the purpose of describing specific embodiments and are not intended to limit the present invention. Unless the context clearly indicates otherwise, as used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms. It will be further understood that the terms "comprises and / or comprising" when used in this specification specify the presence of the features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.
[0043] The corresponding structures, materials, behaviors, and equivalents (if any) of all means or steps plus function elements in the appended claims are intended to include any structure, material, or action for performing a function in combination with other elements specifically claimed for protection. The disclosed embodiments of the present invention are presented for the purpose of illustration and description, but are not intended to exhaust or limit the present invention to the disclosed forms. Without departing from the scope and spirit of the present invention, many modifications and variations will be apparent to those of ordinary skill in the art. The embodiments are selected and described to best explain the principles and practical applications of the present invention, and to enable other persons of ordinary skill in the art to understand the various embodiments of the present invention, and to make various modifications according to the specific uses contemplated.
Claims
1. A method for operating a battery charger, the method comprising: operating a battery charger in a charging mode to use adapter power to support system power at an output of the battery charger; Detecting that the adapter power reaches a maximum value; in response to the adapter power reaching the maximum value, switching the battery charger from the charging mode to a discharging mode to reduce a battery charging current in the battery charger to support the system power, wherein a system voltage at the output of the battery charger decreases in response to the reduced battery charging current; detecting that the system voltage is less than a battery voltage of the battery by a predefined voltage deviation; as well as In response to detecting that the system voltage is less than the battery voltage by a predefined voltage deviation, the battery charger is switched from the discharge mode to a pass-through mode (PTM) to continue discharging the battery, wherein the PTM causes the battery charger to discharge the battery without performing switching.
2. The method according to claim 1, wherein the battery charger comprises a first high-side switch element, a second high-side switch element, a first low-side switch element, and a second low-side switch element, and converting the battery charger from the charging mode to the PTM comprises turning on the first high-side switch element and the second high-side switch element and turning off the first low-side switch element and the second low-side switch element.
3. The method according to claim 1, further comprising: In response to the adapter power reaching the maximum value, reducing an input voltage of the battery charger until the input voltage reaches a predefined input voltage; as well as The input voltage is regulated to the predefined input voltage until the PTM starts.
4. The method according to claim 3, further comprising: In response to the adapter power reaching the maximum value: operating the first stage of the battery charger under an input current limiting loop; reducing a midpoint voltage provided from the first stage to a second stage of the battery charger; In response to the midpoint voltage being reduced: operating the second stage under an input voltage loop to maintain the midpoint voltage at an input voltage limit; reducing the system voltage; as well as In response to the system voltage being reduced, the battery charging current is reduced.
5. The method according to claim 1, further comprising: An input voltage to the battery charger is maintained at a voltage level greater than the system voltage. The method according to claim 1 , wherein an input voltage of the battery charger and the system voltage are short-circuited in the PTM. 7 . The method of claim 1 , wherein the charging mode is a narrow voltage direct charging (NVDC) mode, and the discharging mode is a NVDC discharging mode.
8. A semiconductor device comprising: The controller is configured as: operating a battery charger in a charging mode to use adapter power to support system power at an output of the battery charger; Detecting that the adapter power reaches a maximum value; in response to the adapter power reaching the maximum value, switching the battery charger from the charging mode to a discharging mode to reduce a battery charging current in the battery charger to support the system power, wherein a system voltage at the output of the battery charger decreases in response to the reduced battery charging current; detecting that the system voltage is less than a battery voltage of the battery by a predefined voltage deviation; as well as In response to detecting that the system voltage is less than the battery voltage by a predefined voltage deviation, the battery charger is switched from the discharge mode to a pass-through mode (PTM) to continue discharging the battery, wherein the PTM causes the battery charger to discharge the battery without performing switching.
9. The semiconductor device according to claim 8, wherein the battery charger comprises a first high-side switch element, a second high-side switch element, a first low-side switch element, and a second low-side switch element, and the controller is configured to turn on the first high-side switch element and the second high-side switch element and turn off the first low-side switch element and the second low-side switch element to convert the battery charger from the charging mode to the PTM.
10. The semiconductor device according to claim 8, wherein the controller is configured to: In response to the adapter power reaching the maximum value, reducing an input voltage of the battery charger until the input voltage reaches a predefined input voltage; and The input voltage is regulated to the predefined input voltage until the PTM starts.
11. The semiconductor device according to claim 10, wherein the controller is configured to: In response to the adapter power reaching the maximum value: operating the first stage of the battery charger under an input current limiting loop; reducing a midpoint voltage provided from the first stage to a second stage of the battery charger; In response to the midpoint voltage being reduced: operating the second stage under an input voltage loop to maintain the midpoint voltage at an input voltage limit; reducing the system voltage; and In response to the system voltage being reduced, the battery charging current is reduced. 12 . The semiconductor device of claim 10 , wherein the controller is configured to maintain an input voltage of the battery charger at a voltage level greater than the system voltage. 13 . The semiconductor device according to claim 10 , wherein an input voltage of the battery charger and the system voltage are short-circuited in the PTM. 14 . The semiconductor device according to claim 10 , wherein the charging mode is a narrow voltage direct charging (NVDC) mode, and the discharging mode is a NVDC discharging mode.
15. An apparatus comprising: a power delivery circuit configured to convert an input voltage to an adapter voltage; a switching converter configured to switch the adapter voltage to a midpoint voltage; Battery charger; as well as Battery; The battery charger is configured to: operating in a charging mode to support system power at an output of the battery charger using adapter power provided by the midpoint voltage; Detecting that the adapter power reaches a maximum value; in response to the adapter power reaching the maximum value, switching the battery charger from the charging mode to a discharging mode to reduce a battery charging current to support the system power, wherein a system voltage at the output of the battery charger decreases in response to the reduced battery charging current; detecting that the system voltage is less than a battery voltage of the battery by a predefined voltage deviation; as well as In response to detecting that the system voltage is less than the battery voltage by a predefined voltage deviation, the battery charger is switched from the discharge mode to a pass-through mode (PTM) that continues to discharge the battery, wherein the PTM causes the battery charger to discharge the battery without performing switching.
16. The device according to claim 15, wherein the battery charger comprises a first high-side switch element, a second high-side switch element, a first low-side switch element, and a second low-side switch element, and the battery charger is configured to turn on the first high-side switch element and the second high-side switch element and turn off the first low-side switch element and the second low-side switch element to convert the battery charger from the charging mode to the PTM.
17. The apparatus of claim 15, wherein the battery charger is configured to: In response to the adapter power reaching the maximum value: operating the first stage of the battery charger under an input current limiting loop; reducing a midpoint voltage provided from the first stage to a second stage of the battery charger; In response to the midpoint voltage being reduced: operating the second stage under an input voltage loop to maintain the midpoint voltage at an input voltage limit; reducing the system voltage; and In response to the system voltage being reduced, the battery charging current is reduced.
18. The apparatus of claim 17, wherein the battery charger is configured to: In response to the start of the PTM, further reducing the midpoint voltage to a target voltage under the PTM; and The midpoint voltage is regulated to the target voltage under the PTM.
19. The apparatus of claim 15, wherein the battery charger is configured to maintain the midpoint voltage at a voltage level greater than the system voltage. 20 . The apparatus of claim 15 , wherein the charging mode is a narrow voltage direct charging (NVDC) mode, and the discharging mode is a NVDC discharging mode.