A method and device for suppressing current harmonics of a dual three-phase motor

Abstract

The application discloses a dual three-phase motor current harmonic suppression method and device, the method comprises the following steps: two three-phase half-bridge inverters are used for control in a dual three-phase motor system, wherein the voltage harmonic distribution of two-level space vector pulse width modulation includes the base frequency and the base frequency multiple frequency of the switching frequency; the proportional-integral parameters of the dual three-phase motor system are determined, and the disturbance loop impedance is analyzed and calculated, and in the first-order system of the dual three-phase motor current loop, a first-order low-pass filter is used in series with the motor, wherein the first-order low-pass filter is located between the three-phase half-bridge inverter and the motor; a proportional-differential controller is added before the proportional-integral controller, the first-order low-pass filter added on the d-axis current loop is offset, and the transfer function of the dual three-phase motor system is used for control.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of electric power transmission, and more particularly, to a dual three-phase motor current harmonic suppression method and device. BACKGROUND

[0002] The dual three-phase permanent magnet synchronous motor vector control technology has been widely applied due to its low cost, high reliability and other advantages. Through the vector space decoupling mathematical model of the motor, a traditional PI controller can be constructed to achieve efficient control of the motor. However, when the motor works in a light load condition, due to the small amplitude of the stator current, the influence of low-frequency harmonics and switching frequency harmonic is intensified, which leads to a significant increase in motor current harmonic content and torque ripple. For specific order current harmonics, such as 5th and 7th order current harmonics projected in the z1-z2 subspace, relevant documents have proposed control strategies based on PR controllers. However, the above control technology does not effectively attenuate the main components of the current harmonics. SUMMARY

[0003] In view of at least one defect or improvement demand of the prior art, the present application provides a dual three-phase motor current harmonic suppression method and device, which solves the problem that the amplitude of the stator current is small when the existing dual three-phase motor works in a light load condition, the influence of low-frequency harmonics and switching frequency harmonic is intensified, which leads to a significant increase in motor current harmonic content and torque ripple. Through the current harmonic suppression method, the motor current harmonic content and torque ripple content are significantly reduced without changing the system control parameters.

[0004] To achieve the above-mentioned purpose, according to the first aspect of the present application, a dual three-phase motor current harmonic suppression method is provided, which comprises: controlling in a dual three-phase motor system by using two three-phase half-bridge inverters, wherein the voltage harmonic distribution of two-level space vector pulse width modulation includes the base frequency and the base frequency multiple frequency of the switching frequency; determining the proportional-integral parameters of the dual three-phase motor system and analyzing and calculating the disturbance loop impedance, and in the first-order system of the dual three-phase motor current loop, a first-order low-pass filter is connected in series with the motor, wherein the first-order low-pass filter is located between the three-phase half-bridge inverter and the motor; a proportional-differential controller is added before the proportional-integral controller to offset the first-order low-pass filter added in the d-axis current loop, which is used to control the transfer function of the dual three-phase motor system unchanged.

[0005] In one exemplary embodiment, after the determination of the proportional-integral parameters of the dual three-phase motor system and the analysis and calculation of the disturbance loop impedance, the method further comprises: determining the first-order low-pass filter as

[0006]

[0007] wherein T s represents a switching period, and P is a first-order low-pass filter.

[0008] The proportional-differential controller is determined as

[0009]

[0010] wherein PD(s) is a proportional-differential controller, T represents a first-order filter inertia time constant, and N represents a filter coefficient of the proportional-differential controller.

[0011] In an example embodiment, the determining the proportional-integral parameters of the dual three-phase motor system and analyzing and calculating the disturbance loop impedance includes: the composition of the loop impedance of the d-axis current loop includes a proportional-integral controller, a delay module, a motor inductance, and a resistance, and the size of the disturbance loop impedance is calculated as

[0012]

[0013] wherein Z s(d) represents a d-axis disturbance loop impedance, T s represents a switching period, K pd , K id are respectively a P parameter and an I parameter of the d-axis PI controller, and R is a resistance.

[0014] In an example embodiment, the determining the proportional-integral parameters of the dual three-phase motor system and analyzing and calculating the disturbance loop impedance includes: in a first-order system of a dual three-phase motor current loop, a first-order low-pass filter is adopted in series with a motor, including: adding a first-order low-pass filter between the three-phase half-bridge inverter and the motor, and cascading to form a second-order filter; selecting and determining a cutoff frequency and a time constant of the first-order filter to suppress high-order harmonic components.

[0015] According to a second aspect of the present application, a dual three-phase motor current harmonic suppression device is also provided, including: a control unit, configured to control a dual three-phase motor system by using two three-phase half-bridge inverters, wherein the voltage harmonic distribution of two-level space vector pulse width modulation includes a fundamental frequency and a multiple frequency of the fundamental frequency of a switching frequency; a first determining unit, configured to determine proportional-integral parameters of the dual three-phase motor system and analyze and calculate a disturbance loop impedance, in a first-order system of a dual three-phase motor current loop, a first-order low-pass filter is adopted in series with a motor, wherein the first-order low-pass filter is located between a three-phase half-bridge inverter and the motor; and a canceling unit, configured to add a proportional-differential controller in front of a proportional-integral controller, to cancel the first-order low-pass filter added in a d-axis current loop, for controlling a transfer function of the dual three-phase motor system to be unchanged.

[0016] According to a third aspect of the present application, a computer readable storage medium is provided, in which a computer program is stored, and the computer program is configured to execute the double three-phase motor current harmonic suppression method when running.

[0017] According to a fourth aspect of the present application, an electronic device is provided, which comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor executes the double three-phase motor current harmonic suppression method through the computer program.

[0018] In general, compared with the prior art, the above technical solutions conceived by the present application can achieve the following beneficial effects:

[0019] The double three-phase motor current harmonic suppression method provided by the present application comprises the following steps: controlling a double three-phase motor system by using two three-phase half-bridge inverters, wherein the voltage harmonic distribution of two-level space vector pulse width modulation includes a fundamental frequency and a multiple frequency of the fundamental frequency; determining proportional-integral parameters of the double three-phase motor system and analyzing and calculating disturbance loop impedance, and adopting a first-order low-pass filter in series with the motor in a first-order system of a double three-phase motor current loop, wherein the first-order low-pass filter is located between the three-phase half-bridge inverter and the motor; adding a proportional-differential controller before a proportional-integral controller to offset the first-order low-pass filter added in the d-axis current loop, so as to control the transfer function of the double three-phase motor system to be unchanged, and greatly reduce the motor current harmonic content and torque ripple content without changing the system control parameters. BRIEF DESCRIPTION OF DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required to be used in the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0021] Figure 1 A flowchart of an optional double three-phase motor current harmonic suppression method provided by the embodiments of the present application is shown in the figure.

[0022] Figure 2 An optional double three-phase motor control system provided by the embodiments of the present application is shown in the figure.

[0023] Figure 3 An optional d-axis current loop of a PI controller provided by the embodiments of the present application is shown in the figure.

[0024] Figure 4An optional voltage harmonic distribution diagram under two-level SVPWM provided for the embodiment of the present application;

[0025] Figure 5 An optional perturbation loop impedance amplitude-frequency curve provided for the embodiment of the present application;

[0026] Figure 6 Another optional double three-phase permanent magnet synchronous motor current and FFT analysis diagram provided for the embodiment of the present application;

[0027] Figure 7 An optional second-order filter diagram provided for the embodiment of the present application;

[0028] Figure 8 An optional d-axis current loop diagram provided for the embodiment of the present application;

[0029] Figure 9 An optional first-order filter structure diagram provided for the embodiment of the present application;

[0030] Figure 10 Another optional first-order filter structure diagram provided for the embodiment of the present application;

[0031] Figure 11 Another optional double three-phase permanent magnet synchronous motor current and FFT analysis diagram provided for the embodiment of the present application;

[0032] Figure 12 An optional double three-phase motor current harmonic suppression device structure diagram provided for the embodiment of the present application;

[0033] Figure 13 An optional electronic device structure diagram provided for the embodiment of the present application. DETAILED DESCRIPTION

[0034] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and should not be used to limit the present application. In addition, the technical features involved in each embodiment of the present application described below can be combined with each other as long as there is no conflict.

[0035] The terms "first", "second", "third", and the like in the description and claims of the application and the above figures are used for distinguishing between similar objects, not necessarily for describing a particular sequential or chronological order. The terms "comprises", "comprising", "includes", "including" and the like are to be construed open-ended, allowing for instances where there are equivalents to processes, methods, systems, products, or devices that do not literally include the recited steps or elements, but are otherwise equivalent in function, result, or operation. Additionally, the terms "comprises", "comprising", "includes", "including" and the like, are to be read open-ended, allowing for instances where there are equivalents to processes, methods, systems, products, or devices that do not literally include the recited steps or elements, but are otherwise equivalent in function, result, or operation.

[0036] According to an aspect of the embodiments of the present application, a dual three-phase motor current harmonic suppression method is provided. The embodiments of the present application will be described below in detail with reference to the accompanying drawings. Figure 1 The dual three-phase motor current harmonic suppression method provided by the embodiments of the present application is described.

[0037] Figure 1 is a flowchart of an optional dual three-phase motor current harmonic suppression method provided by the embodiments of the present application, as shown in Figure 1 The flowchart of the method can include the following steps:

[0038] S102, two three-phase half-bridge inverters are used for control in the dual three-phase motor system, wherein the voltage harmonic distribution of two-level space vector pulse width modulation includes the base frequency and the base frequency multiple frequency of the switching frequency;

[0039] S104, the proportional-integral parameters of the dual three-phase motor system are determined and the disturbance loop impedance is analyzed and calculated, and a first-order low-pass filter is used in series with the motor in the first-order system of the dual three-phase motor current loop, wherein the first-order low-pass filter is located between the three-phase half-bridge inverter and the motor;

[0040] S106, a proportional-differential controller is added before the proportional-integral controller to offset the first-order low-pass filter added in the d-axis current loop, for controlling the transfer function of the dual three-phase motor system to remain unchanged.

[0041] The dual three-phase motor current harmonic suppression method provided by the embodiments of the present application can be used in the scenario of suppressing current harmonics when the dual three-phase motor works in a light load condition.

[0042] Optionally, in order to solve the problem of large current total harmonic of the dual three-phase permanent magnet synchronous motor in a light load condition, the present application provides a dual three-phase motor current harmonic suppression method, for the first-order system of the dual three-phase motor current loop, an RC first-order low-pass filter can be used in series with the motor; and in order to keep the motor control parameters unchanged, a PD controller can be used to cancel out the RC first-order low-pass filter.

[0043] Referring to Figure 2The cause of current harmonics is analyzed, and the corresponding current harmonic suppression method is determined. Figure 2 The block diagram of a dual three-phase permanent magnet synchronous motor (PMSM) control system using a traditional proportional-integral (PI) controller and a space vector pulse width modulation (SVPWM) control strategy is shown, however, in actual operation, the d-axis current control loop may cause current ripple due to various factors, for example, system nonlinear characteristics, digital control delay, and harmonic components introduced in the SVPWM modulation process, etc.

[0044] In order to further analyze the ripple current generation mechanism of the system, the present application takes the d-axis current loop as an example, and deeply discusses the dynamic response characteristics and potential influencing factors of the control system. Referring to Figure 3 , the characteristics and formation process of the ripple current are described. The current harmonic distribution can be analyzed from two angles of harmonic voltage distribution and loop impedance frequency characteristics. As shown in Figure 4 , the dual three-phase motor control system uses two three-phase half-bridge inverters for control, and the voltage harmonics of two-level SVPWM are mainly distributed around the base frequency and the base frequency multiples of the switching frequency. If the switching frequency is selected as 10 kHz, then the harmonic voltage is mainly distributed around the frequencies of 10 kHz, 20 kHz, 30 kHz, and 40 kHz.

[0045] Through the above steps S102 to S106, by using two three-phase half-bridge inverters for control in the dual three-phase motor system, wherein the voltage harmonic distribution of two-level space vector pulse width modulation includes the base frequency and the base frequency multiples of the switching frequency; the proportional-integral parameters of the dual three-phase motor system are determined and the disturbance loop impedance is analyzed and calculated, in the first-order system of the dual three-phase motor current loop, a first-order low-pass filter is used in series with the motor, wherein the first-order low-pass filter is located between the three-phase half-bridge inverter and the motor; a proportional-differential controller is added before the proportional-integral controller to offset the first-order low-pass filter added in the d-axis current loop, for controlling the transfer function of the dual three-phase motor system to be unchanged, without changing the system control parameters, the motor current harmonic content and torque ripple content are greatly reduced.

[0046] For ease of understanding, the parameters and physical quantities involved in the present application are described as follows:

[0047] R represents the stator resistance;

[0048] L D ,L Q are the d-axis inductance and q-axis inductance, respectively;

[0049] T s represents the switching period;

[0050] K pd ,Kid respectively d-axis PI controller P parameter and I parameter;

[0051] u h represents harmonic voltage;

[0052] i d i q respectively d-axis current and q-axis current;

[0053] Z s(d) represents d-axis disturbance loop impedance;

[0054] T represents a first-order filter inertia time constant;

[0055] f c represents a first-order filter cutoff frequency;

[0056] N represents a filter coefficient of the PD controller.

[0057] In an example embodiment, after the determining the proportional-integral parameters of the dual three-phase motor system and analyzing and calculating the disturbance loop impedance, the above method further comprises:

[0058] S11, determining the first-order low-pass filter as,

[0059]

[0060] wherein T s represents a switching period, and P is a first-order low-pass filter;

[0061] S12, determining the proportional-differential controller as,

[0062]

[0063] wherein PD(s) is a proportional-differential controller, T represents a first-order filter inertia time constant, and N represents a filter coefficient of the proportional-differential controller.

[0064] In an example embodiment, the determining the proportional-integral parameters of the dual three-phase motor system and analyzing and calculating the disturbance loop impedance comprises:

[0065] S21, the composition of the loop impedance of the d-axis current loop comprises a proportional-integral controller, a delay module, a motor inductance, and a resistance, and the size of the disturbance loop impedance is calculated as,

[0066]

[0067] wherein Z s(d) represents d-axis disturbance loop impedance, T s represents a switching period, K pd , Kid These are the P and I parameters of the d-axis PI controller, respectively, and R is the resistance.

[0068] In this embodiment of the application, according to the traditional PI design method, it can be obtained that...

[0069]

[0070] Combining the formula for calculating the impedance of the disturbance loop, we can obtain:

[0071]

[0072] This allows us to plot the amplitude-frequency characteristic curve of the disturbance loop impedance as a function of frequency, such as... Figure 5 As shown, the disturbance loop impedance Z s(d) The minimum value exists within the 0–100Hz frequency range, and the overall impedance of the disturbance loop is relatively low within the 0–50kHz frequency band. Within the 0–1.6kHz range... The above formula can be simplified to,

[0073]

[0074] Within the range of 0 to 1.6 kHz, Playing a major role, but Z s2 Larger median values It decays rapidly as the frequency increases, and attenuates to a level lower than 2500L when approaching 100Hz. D Smaller values, and Z s1 =L D The value of s+R has not yet increased to 2500L. D The size is therefore approximately 2500L between 100Hz and 1.6kHz. D It is working after 1.6 kHz. Z s2 The effect of Z decreases as the frequency increases. s1 Play a key role.

[0075] See Figure 6 This paper describes the current and torque waveforms and current harmonic distribution of a dual three-phase permanent magnet synchronous motor at 500 rpm and 7 Nm. Due to the large harmonic voltage at the 10 kHz octave, the circuit impedance is only determined by the first-order system Z... s1 =L DThe combination of s+R results in significant harmonic currents. Because the four-vector SVPWM algorithm in digital systems cannot theoretically achieve a zero-order composite voltage vector in the z1-z2 harmonic subspace, certain 5th, 7th, 11th, and 13th order voltage harmonics will exist. At motor speeds below 320Hz, these harmonic voltages act on relatively small harmonic impedances in the 0–1.6kHz range, generating a certain amount of harmonic current. Under light load conditions (i.e., when the fundamental current amplitude is small), these harmonic currents cause distortion of the current waveform and significant torque ripple.

[0076] In an exemplary embodiment, determining the proportional-integral parameters of the dual three-phase motor system and analyzing and calculating the disturbance loop impedance, in a first-order dual three-phase current loop system, involves using a first-order low-pass filter connected in series with the motor, including:

[0077] S31, a first-order low-pass filter is added between the three-phase half-bridge inverter and the motor, and cascaded to form a second-order filter;

[0078] S32, select and determine the cutoff frequency and time constant of the first-order filter to suppress higher harmonic components.

[0079] In this embodiment of the application, after analyzing the causes of current harmonic generation, the corresponding current harmonic suppression method can be determined. Specifically, such as... Figure 7 As shown, according to Figure 3 After designing the PI parameters and analyzing the disturbance loop impedance, in order to further enhance Z after 1.6kHz... s1 The purpose is to add a first-order low-pass filter between the inverter and the motor, so that it... Cascaded to form a second-order filter, the new Z s1 It can be represented as

[0080]

[0081] To prevent changes in system control parameters, a PD controller is added before the PI controller to cancel the newly added first-order filter on the d-axis current loop, thus keeping the overall system transfer function unchanged and guaranteeing that the system control parameters remain constant. Figure 8 As shown, the PD controller expression can be represented as follows:

[0082] PD(s) = 1 + Ts

[0083] Since the mains frequency is 50Hz, corresponding to a rotational speed of 1000rpm, in order to suppress higher harmonic components as much as possible, the cutoff frequency and time constant of the first-order filter are selected as follows:

[0084]

[0085] The first-order filter is realized by connecting a capacitor and a resistor in series, as shown in Figure 9 In order to reduce the power loss on the resistor as much as possible, the resistance and capacitance values are selected as

[0086]

[0087] The implementation form of the PD controller is In the formula, N is 106.

[0088] After the improvement, the disturbance loop impedance becomes

[0089]

[0090] According to the above formula, the amplitude-frequency curve characteristic diagram of the disturbance loop impedance with the frequency change can be drawn, as shown in Figure 10 By comparing Figure 5 and Figure 10 , it can be found that the disturbance loop impedance has been improved in the full frequency band after the improvement, especially after 1.6 kHz, the disturbance loop impedance has a large increase. The current, torque waveform diagram and current harmonic distribution of the double three-phase permanent magnet synchronous motor under 500 rpm and 7 Nm after the improvement are shown in Figure 11 It can be found that the current harmonic at 10 kHz frequency is almost attenuated to 0, the current harmonic in 0-1000 Hz is also suppressed to a certain extent, and the torque ripple is significantly reduced, which proves the effectiveness of the proposed method.

[0091] Through the embodiment, the motor current harmonic content and torque ripple content are greatly reduced without changing the system control parameters.

[0092] According to another aspect of the embodiment of the application, a current harmonic suppression device for implementing the above-mentioned double three-phase motor current harmonic suppression method is also provided. Figure 12 is a structural schematic diagram of an optional double three-phase motor current harmonic suppression device according to the embodiment of the application, as shown in Figure 12 The device can include:

[0093] The control unit 1202 is configured to control two three-phase half-bridge inverters in the double three-phase motor system, wherein the voltage harmonic distribution of the two-level space vector pulse width modulation includes the base frequency and the base frequency multiplication of the switching frequency.

[0094] The first determination unit 1204 is configured to determine the proportional-integral parameters of the double three-phase motor system and analyze and calculate the disturbance loop impedance, and a first-order low-pass filter is connected in series with the motor in the double three-phase motor current loop first-order system, wherein the first-order low-pass filter is located between the three-phase half-bridge inverter and the motor.

[0095] The compensation unit 1206 is configured to add a proportional-differential controller before a proportional-integral controller to offset the first-order low-pass filter added in the d-axis current loop, so as to control the transfer function of the dual three-phase motor system to be unchanged.

[0096] It should be noted that the control unit 1202 in the embodiment can be configured to execute the step S102, the first determination unit 1204 in the embodiment can be configured to execute the step S104, and the compensation unit 1206 in the embodiment can be configured to execute the step S106.

[0097] By means of the above modules, the dual three-phase motor system is controlled by using two three-phase half-bridge inverters, wherein the voltage harmonic distribution of the two-level space vector pulse width modulation includes the fundamental frequency and the multiple of the fundamental frequency of the switching frequency; the proportional-integral parameters of the dual three-phase motor system are determined, and the disturbance loop impedance is analyzed and calculated, and in the first-order system of the dual three-phase motor current loop, a first-order low-pass filter is used in series with the motor, wherein the first-order low-pass filter is located between the three-phase half-bridge inverter and the motor; a proportional-differential controller is added before the proportional-integral controller to offset the first-order low-pass filter added in the d-axis current loop, so as to control the transfer function of the dual three-phase motor system to be unchanged, and without changing the system control parameters, the motor current harmonic content and the torque ripple content are greatly reduced.

[0098] In an example embodiment, the apparatus further comprises:

[0099] The second determination unit is configured to determine that the first-order low-pass filter is

[0100]

[0101] wherein T s represents a switching period, and P is a first-order low-pass filter;

[0102] The third determination unit is configured to determine that the proportional-differential controller is

[0103]

[0104] wherein PD(s) is a proportional-differential controller, T represents a first-order filter inertia time constant, and N represents a filter coefficient of the proportional-differential controller.

[0105] In an example embodiment, the first determination unit comprises:

[0106] The calculation module, the loop impedance of the d-axis current loop includes a proportional-integral controller, a delay module, a motor inductance and a resistance, and is configured to calculate the disturbance loop impedance size as

[0107]

[0108] wherein, Z s(d) represents the d-axis disturbance loop impedance, T s represents the switching period, K pd ,K id are the d-axis PI controller P parameter and I parameter, respectively, and R is the resistance.

[0109] In one example embodiment, the first determining unit comprises:

[0110] a cascading module for adding one first-order low-pass filter between the three-phase half-bridge inverter and the motor, to form a second-order filter in cascade;

[0111] a selecting module for selecting the cutoff frequency and time constant of the first-order filter to suppress high-order harmonic components.

[0112] It should be noted that the above modules and the examples and scenarios realized by the corresponding steps are the same as the above embodiments, but are not limited to the above disclosed content. It should be noted that the above modules as part of the device can run in a hardware environment, can be implemented by software, or can be implemented by hardware, wherein the hardware environment includes a network environment.

[0113] According to another aspect of the embodiments of the present application, a storage medium is also provided. Optionally, in the present embodiment, the above-mentioned storage medium can be used to execute the program code of any one of the above-mentioned double three-phase motor current harmonic suppression methods in the embodiments of the present application.

[0114] Optionally, in the present embodiment, the storage medium is configured to store program code for executing the following steps:

[0115] S1, using two three-phase half-bridge inverters to control the double three-phase motor system, wherein the voltage harmonic distribution of two-level space vector pulse width modulation includes the fundamental frequency and the multiple frequency of the switching frequency;

[0116] S2, determining the proportional-integral parameters of the double three-phase motor system and analyzing and calculating the disturbance loop impedance, in the double three-phase motor current loop first-order system, using a first-order low-pass filter in series with the motor, wherein the first-order low-pass filter is located between the three-phase half-bridge inverter and the motor;

[0117] S3, adding a proportional-differential controller before the proportional-integral controller to offset the first-order low-pass filter added in the d-axis current loop, for controlling the transfer function of the double three-phase motor system to be unchanged.

[0118] Optionally, the specific examples in the present embodiment can refer to the examples described in the above embodiments, which will not be described herein again.

[0119] The computer readable storage medium can include, but is not limited to, any type of disk including floppy disks, optical disks, DVD, CD-ROMs, micro-drives, and magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, DRAMs, VRAMs, flash memory devices, magnetic or optical cards, nano-systems (including molecular memory ICs), or any type of media or device suitable for storing instructions and / or data.

[0120] According to still another aspect of the embodiments of the present application, an electronic device for implementing the above-mentioned dual three-phase motor current harmonic suppression method is also provided, which can be a server, a terminal, or a combination thereof.

[0121] Figure 13 is a structural schematic diagram of an optional electronic device according to the embodiments of the present application, as shown in Figure 13 the processor 1302, the communication interface 1304, and the memory 1306 complete mutual communication through the communication bus 1308, wherein,

[0122] the memory 1306 is configured to store a computer program;

[0123] the processor 1302 is configured to execute the computer program stored in the memory 1306 to implement the following steps:

[0124] S1, two three-phase half-bridge inverters are used for control in a dual three-phase motor system, wherein the voltage harmonic distribution of two-level space vector pulse width modulation includes a fundamental frequency and a multiple frequency of the fundamental frequency of a switching frequency;

[0125] S2, proportional-integral parameters of the dual three-phase motor system are determined and disturbance loop impedance is analyzed and calculated, and a first-order low-pass filter is used in series with the motor in a first-order system of a dual three-phase motor current loop, wherein the first-order low-pass filter is located between a three-phase half-bridge inverter and the motor;

[0126] S3, a proportional-differential controller is added before a proportional-integral controller to offset the first-order low-pass filter added in the d-axis current loop, which is used to control the transfer function of the dual three-phase motor system unchanged.

[0127] Optionally, the communication bus can be a PCI (Peripheral Component Interconnect) bus, an EISA (Extended Industry Standard Architecture) bus, or the like. The communication bus can be divided into an address bus, a data bus, a control bus, and the like. For ease of representation, Figure 13 Only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus. The communication interface is used for communication between the electronic device and other devices.

[0128] The memory can include a RAM and can also include a non-volatile memory, for example, at least one disk memory. Optionally, the memory can also be at least one storage device located away from the aforementioned processor.

[0129] As an example, the aforementioned memory 1306 can include, but is not limited to, the control unit 1202, the first determination unit 1204, and the cancellation unit 1206 in the aforementioned dual three-phase motor current harmonic suppression device. In addition, other module units in the aforementioned dual three-phase motor current harmonic suppression device can also be included, but are not limited to, which will not be described in this example.

[0130] The aforementioned processor can be a general-purpose processor, which can include, but is not limited to, a CPU (Central Processing Unit), an NP (Network Processor), and the like; it can also be a DSP (Digital Signal Processing), an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component.

[0131] Optionally, specific examples in the present embodiment can refer to examples described in the above-described embodiments, which will not be described herein again.

[0132] It should be noted that, for the foregoing method embodiments, the sequences of the described actions are not necessarily required to achieve the objects of the application, and certain steps can be performed in other sequences or even concurrently. Additionally, the described embodiments are merely provided as examples, and not all of the actions described are necessarily required to achieve desired results.

[0133] In the above embodiments, the description of each embodiment is focused on different aspects, and the parts not described in detail in a certain embodiment can be referred to the relevant description of other embodiments.

[0134] In several embodiments provided by the present application, it should be understood that the disclosed apparatus can be implemented in other manners. For example, the described embodiments of the apparatus are merely schematic, and the division of units is merely logical function division, and there can be another division manner in actual implementation. For example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections can be indirect couplings or communication connections through some interfaces, devices or units, and can be in electrical, mechanical or other forms.

[0135] The units described as separate components can or can not be physically separate, and the components displayed as units can or can not be physical units, i.e., can be located in one place or distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purposes of the embodiments.

[0136] In addition, each functional unit in the embodiments of the present application can be integrated in a processing unit, or each unit can exist physically as a separate unit, or two or more units can be integrated in one unit. The integrated unit can be implemented in the form of hardware, or in the form of a software functional unit.

[0137] The integrated unit, if implemented in the form of a software function unit and sold or used as an independent product, can be stored in a computer readable memory. Based on such understanding, the technical solutions of the present application essentially or the part that contributes to the prior art or the whole or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a memory and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server or a network device, etc.) to execute all or part of the steps of the method described in the embodiments of the present application. The aforementioned memory includes: a U disk, a read-only memory (Read-Only Memory, ROM), a random access memory (Random Access Memory, RAM), a mobile hard disk, a magnetic disk or an optical disk, and various media that can store program codes.

[0138] A person of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by a program instructing relevant hardware, and the program can be stored in a computer readable memory, which can include a flash disk, a read-only memory (Read-Only Memory, ROM), a random access memory (Random Access Memory, RAM), a magnetic disk or an optical disk, etc.

[0139] The above is only exemplary embodiments of the present disclosure, and cannot limit the scope of the present disclosure. That is, any equivalent changes and modifications made in accordance with the teachings of the present disclosure are still within the scope of the present disclosure. Those skilled in the art will easily think of embodiments of the present disclosure after considering the specification and practicing the disclosure herein. The present application is intended to cover any variations, uses or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or conventional technical means in the technical field not described in the present disclosure. The specification and examples are only considered as exemplary, and the scope and spirit of the present disclosure are defined by the claims.

[0140] The technical features of the above embodiments can be combined in any way. To make the description concise, not all possible combinations of the technical features in the above embodiments are described, however, as long as the combinations of the technical features do not contradict, they should be considered within the scope of the present disclosure.

[0141] Those skilled in the art readily understand that the above only describes preferred embodiments of the present application and is not intended to limit the present application. Any modification, equivalent replacement and improvement made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method of current harmonic suppression for a dual three-phase electric machine, the method comprising: The method comprises: In a dual three-phase motor system, two three-phase half-bridge inverters are used for control, wherein the voltage harmonic distribution of two-level space vector pulse width modulation includes the fundamental frequency and the frequency multiplication of the switching frequency; The current loop proportional-integral parameters of the dual three-phase motor system are determined, and the disturbance loop impedance is analyzed and calculated, and in the first-order system of the current loop of the dual three-phase motor, a first-order low-pass filter is connected in series with the motor, wherein the first-order low-pass filter is located between the three-phase half-bridge inverter and the motor; A proportional-differential controller is added before the current loop proportional-integral controller to offset the first-order low-pass filter added in the d-axis current loop, so as to control the transfer function of the dual three-phase motor system to be unchanged.

2. The dual three-phase motor current harmonic suppression method of claim 1, wherein, After the current loop proportional-integral parameters of the dual three-phase motor system are determined and the disturbance loop impedance is analyzed and calculated, the method further comprises: The first-order low-pass filter is determined as wherein denotes a first order low pass filter time constant, P is a first order low pass filter; The proportional-differential controller is determined as wherein is a proportional-derivative controller, denotes a first order low pass filter inertia time constant, N denotes a filter coefficient of the proportional-derivative controller.

3. The dual three-phase motor current harmonic suppression method of claim 1, wherein, The determination of the current loop proportional-integral parameters of the dual three-phase motor system and the analysis and calculation of the disturbance loop impedance comprise: The composition of the loop impedance of the d-axis current loop comprises a proportional-integral controller, a delay module, motor inductance and resistance, and the size of the disturbance loop impedance is calculated as wherein, represents a d-axis disturbance loop impedance, represents a switching period, are a d-axis PI controller P parameter and an I parameter, respectively, and R is a resistance, is a d-axis inductance.

4. The dual three-phase motor current harmonic suppression method of claim 1, wherein, The determination of the current loop proportional-integral parameters of the dual three-phase motor system and the analysis and calculation of the disturbance loop impedance, in the first-order system of the current loop of the dual three-phase motor, comprise: A first-order low-pass filter is added between the three-phase half-bridge inverter and the motor to form a second-order filter in series; The cutoff frequency and time constant of the first-order low-pass filter are selected and determined to suppress high-order harmonic components.

5. A dual three-phase motor current harmonic suppression device, characterized by, The method comprises: A control unit is configured to control two three-phase half-bridge inverters in a dual three-phase motor system, wherein the voltage harmonic distribution of two-level space vector pulse width modulation includes the fundamental frequency and the frequency multiplication of the switching frequency; A first determination unit is configured to determine the current loop proportional-integral parameters of the dual three-phase motor system and analyze and calculate the disturbance loop impedance, and in the first-order system of the current loop of the dual three-phase motor, a first-order low-pass filter is connected in series with the motor, wherein the first-order low-pass filter is located between the three-phase half-bridge inverter and the motor; A cancellation unit is configured to add a proportional-differential controller before the current loop proportional-integral controller to offset the first-order low-pass filter added in the d-axis current loop, so as to control the transfer function of the dual three-phase motor system to be unchanged.

6. The dual three-phase motor current harmonic suppression apparatus of claim 5, wherein, The device further comprises: A second determination unit is configured to determine the first-order low-pass filter as wherein denotes a first order low pass filter time constant, P is a first order low pass filter; A third determination unit is configured to determine the proportional-differential controller as wherein is a proportional-derivative controller, denotes a first order low pass filter inertia time constant, N denotes a filter coefficient of the proportional-derivative controller.

7. The dual three-phase motor current harmonic suppression apparatus of claim 5, wherein, The first determination unit comprises: A calculation module, the composition of the loop impedance of the d-axis current loop comprises a proportional-integral controller, a delay module, motor inductance and resistance, and the size of the disturbance loop impedance is calculated as wherein, represents a d-axis disturbance loop impedance, represents a switching period, are a d-axis PI controller P parameter and an I parameter, respectively, and R is a resistance, is a d-axis inductance.

8. The dual three-phase motor current harmonic suppression apparatus of claim 5, wherein, The first determination unit comprises: A cascade module is configured to add a first-order low-pass filter between the three-phase half-bridge inverter and the motor to form a second-order filter in series; A selection module is configured to select and determine the cutoff frequency and time constant of the first-order low-pass filter to suppress high-order harmonic components.

9. A computer readable storage medium, characterized in that, The computer readable storage medium comprises a stored program, wherein the program performs the method of any one of claims 1 to 5 when executed. 10.An electronic device comprising a memory and a processor, the electronic device characterized by, The memory stores a computer program, and the processor is configured to execute the method of any one of claims 1 to 5 by using the computer program.

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