System and method for triggering active mode UE power savings

By using the technology of PDCCH skipping and search space group switching in the wireless communication system, the problem of high power consumption when monitoring PDCCH is solved, and the system energy consumption reduction and performance stability are achieved.

CN119697739APending Publication Date: 2025-03-25APPLE INC
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Patent Information

Application Number
CN202411822019.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2020-10-15
Publication Date
2025-03-25

AI Technical Summary

Technical Problem

In existing wireless communication systems, user equipment (UE) consumes a high power consumption when monitoring physical downlink control channel (PDCCH), affecting system performance.

Method used

By adjusting PDCCH monitoring behavior between network nodes and UEs, the monitoring frequency and time of UEs are reduced by using the PDCCH skipping and search space group switching method.

Benefits of technology

It effectively reduces the power consumption of the UE, reduces the energy consumption of the wireless communication system, and maintains the stability of system performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure provides a system and method for triggering active mode UE power saving. Embodiments herein describe systems, apparatuses, and methods for adjusting physical downlink control channel (PDCCH) monitoring behavior. In some embodiments, a network node and a UE use search space set group handover to change PDCCH monitoring behavior. In some embodiments, a network node and a UE use a PDCCH jump to change PDCCH monitoring behavior. The PDCCH monitoring behavior may be indicated in a downlink control indicator (DCI).
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Description

[0001] This application is a divisional application of a Chinese patent application with an application date of October 15, 2020, application number 202080107156.3, and invention name “System and method for triggering active mode UE power saving”. Technical Field

[0002] The present patent application generally relates to wireless communication systems, including application of PDCCH skipping and search space set switching. Background Art

[0003] Wireless mobile communication technology uses various standards and protocols to transmit data between base stations and wireless mobile devices. Wireless communication system standards and protocols may include the 3rd Generation Partnership Project (3GPP) Long Term Evolution (LTE) (e.g., 4G) or New Radio (NR) (e.g., 5G); the Institute of Electrical and Electronics Engineers (IEEE) 802.16 standard, which is generally referred to as Worldwide Interoperability for Microwave Access (WiMAX) by industry organizations; and the IEEE 802.11 standard for wireless local area networks (WLANs), which is generally referred to as Wi-Fi by industry organizations. In the 3GPP radio access network (RAN) in an LTE system, a base station may include a RAN node such as an Evolved Universal Terrestrial Radio Access Network (E-UTRAN) Node B (also commonly referred to as an evolved Node B, an enhanced Node B, an eNodeB, or an eNB) and / or a radio network controller (RNC) in the E-UTRAN, which communicates with a wireless communication device referred to as a user equipment (UE). In the fifth generation (5G) wireless RAN, the RAN nodes may include 5G nodes, NR nodes (also called next generation Node B or g NodeB (gNB)).

[0004] The RAN uses radio access technologies (RATs) to communicate between RAN nodes and UEs. The RAN may include a global system for mobile communications (GSM), an enhanced data rate for GSM evolution (EDGE) RAN (GERAN), a universal terrestrial radio access network (UTRAN), and / or an E-UTRAN, which provides access to communication services through a core network. Each RAN in the RAN operates according to a specific 3GPP RAT. For example, GERAN implements GSM and / or EDGE RAT, UTRAN implements Universal Mobile Telecommunications System (UMTS) RAT or other 3GPP RAT, E-UTRAN implements LTE RAT, and NG-RAN implements 5G RAT. In some deployments, E-UTRAN may also implement 5G RAT.

[0005] The frequency bands for 5G NR can be divided into two different frequency ranges. Frequency range 1 (FR1) may include frequency bands operating at frequencies below 6 GHz, some of which may be used by previous standards and may potentially be expanded to cover new spectrum products from 410 MHz to 7125 MHz. Frequency range 2 (FR2) may include frequency bands from 24.25 GHz to 52.6 GHz. The frequency bands in the millimeter wave (mmWave) range of FR2 may have a smaller range but potentially higher available bandwidth than the frequency bands in FR1. The skilled person will recognize that these frequency ranges, which are provided by way of example, may vary from time to time or region to region. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] To easily identify the discussion of any particular element or act, the most significant digit(s) in a reference number refers to the drawing number that first introduces the element.

[0007] Figure 1 UE monitoring behavior to implement skipping of downlink control indicators (DCI) during a long discontinuous reception (DRX) cycle according to one embodiment is shown.

[0008] Figure 2 It shows a downlink timeline in which the UE according to the first embodiment applies PDCCH monitoring skipping after receiving a scheduling DCI with a skipping indication.

[0009] Figure 3A The downlink timeline showing the UE applying PDCCH monitoring skipping after transmitting an ACK message.

[0010] Figure 3B It is shown that the UE applies PDCCH monitoring skipping downlink timeline after transmitting an ACK message even with an ongoing previous HARQ request.

[0011] Figure 3C A downlink timeline showing a UE applying PDCCH monitoring skipping after transmitting a NACK message according to some embodiments.

[0012] Figure 4 A downlink timeline is shown where a UE applies PDCCH monitoring skipping after expiration of DRX-retransmissionTimerDL according to one embodiment.

[0013] Figure 5 An uplink timeline is shown of a UE applying PDCCH monitoring skipping 506 after receiving a scheduling DCI with a skip indication according to an embodiment.

[0014] Fig. 6AIt is shown that PDCCH monitoring skipping is applied after drx-HARQRTTTimerUL when the uplink timeline includes an ACK message according to some embodiments.

[0015] Figure 6B It is shown that PDCCH monitoring skipping is applied after drx-HARQRTTTimerUL when the uplink timeline includes a NACK message according to some embodiments.

[0016] Fig. 7A It is shown that PDCCH monitoring skipping is applied after drx-retransmissionTimerUL expires when the uplink timeline includes an ACK message according to some embodiments.

[0017] Figure 7B It is shown that PDCCH monitoring skipping is applied after expiration of the drx-retransmissionTimerUL timer when the uplink timeline includes a NACK message according to some embodiments.

[0018] Figure 8 A timeline for applying skipping when no traffic is to be scheduled resulting in no scheduled DCI being transmitted is shown according to one embodiment.

[0019] Fig. 9 A method for a network node to send non-scheduled DCI according to one embodiment is shown.

[0020] Fig.10 A timeline is shown in which the UE PDCCH monitoring behavior is changed based on a DCI with a PDCCH monitoring mode indication according to one embodiment.

[0021] Fig.11 A first timing option is shown for when to apply search space / coreset changes during a downlink timeline according to one embodiment.

[0022] Fig. 12A A second timing option for when to apply search space / coreset changes during the downlink timeline is shown according to one embodiment.

[0023] Fig. 12B A second timing option is shown for when to apply the search space / coreset change during the downlink timeline in case of transmitting a NACK message according to one embodiment.

[0024] Fig.13 A third timing option for when to apply search space / coreset changes during the downlink timeline is shown according to one embodiment.

[0025] Fig.14 A first timing option for when to apply search space / coreset changes during an uplink timeline is shown according to one embodiment.

[0026] Fig.15A A second timing option for when to apply search space / coreset changes during the uplink timeline is shown according to one embodiment.

[0027] Fig. 15B A second timing option is shown for when to apply the search space / coreset change during the uplink timeline when transmitting a NACK message according to one embodiment.

[0028] Fig.16A A third timing option for when to apply search space / coreset changes during the uplink timeline is shown according to one embodiment.

[0029] Fig. 16B A third timing option is shown for when to apply search space / coreset changes during the uplink timeline when transmitting a NACK message according to one embodiment.

[0030] Fig.17 A system according to one embodiment is shown.

[0031] Fig.18 Infrastructure equipment according to one embodiment is shown.

[0032] Fig.19 A platform according to one embodiment is shown.

[0033] Fig. 20 An apparatus according to one embodiment is shown.

[0034] Fig.21 An exemplary interface according to one embodiment is shown.

[0035] Fig. 22 Components according to one embodiment are shown. DETAILED DESCRIPTION

[0036] One goal of network communications is to reduce the power consumption of user equipment (UE). Commonly used energy-saving techniques are balanced to minimize the impact on system performance. One method that can be used to enhance UE energy saving is to reduce or change the monitoring period of the UE.

[0037] Embodiments herein describe systems, devices, and methods for adjusting physical downlink control channel (PDCCH) monitoring behavior to reduce power consumption of a UE. In some embodiments, a network node and a UE use search space set group switching to change the PDCCH monitoring behavior. In some embodiments, a network node and a UE use PDCCH skipping to change the PDCCH monitoring behavior. For example, a network node may instruct a UE to monitor a PDCCH or skip monitoring a PDCCH. In addition, a network node may instruct a UE to switch a PDCCH monitoring mode or make a search space / Coreset change.

[0038] Various operations will be described in turn as multiple discrete operations in a manner that is most helpful for understanding the present disclosure. However, the order of description should not be understood to imply that these operations are necessarily order-dependent. Specifically, these operations do not necessarily need to be performed in the order presented.

[0039] Additional details and examples are provided with reference to the following figures. The embodiments of the present disclosure may be understood with reference to the accompanying drawings, wherein like parts are represented by like numbers throughout. The components of the embodiments of the present disclosure as generally described and illustrated in the drawings herein may be arranged and designed in a variety of different configurations. Therefore, the following detailed description of the embodiments of the systems and methods of the present disclosure is not intended to limit the scope of the present disclosure protected by the claims, but merely represents possible embodiments.

[0040] Figure 1 UE monitoring behavior is shown to implement skipping of downlink control indicators (DCI) during a long discontinuous reception (DRX) cycle 100. Skipping DCI allows the UE to not monitor certain periods of the long DRX cycle 100. By not monitoring the entire time, the UE can reduce power consumption.

[0041] In the illustrated embodiment, there is downlink or uplink traffic during a first time period 102. During this period, the UE may receive a DCI. The DCI may indicate to the UE that a skip is implemented in the UE's monitoring behavior. The network node (e.g., a gNB) may send a notification to the UE via the DCI to implement skipping a few time slots and then returning to monitoring. For example, during a second time period 104, there is no traffic in the downlink or uplink communication channel. The UE performs the skip and stops monitoring until a third time period 106. Then, after monitoring another period of inactivity, the UE may perform the skip again until a fourth time period 108. The skipping behavior may continue throughout the long DRX cycle 100.

[0042] The skip value may indicate how long the skip period should be and when the skip should be performed. The skip value may be a configured radio resource control (RRC). In some embodiments, the scheduling DCI may provide a timeline to apply the skip after receiving the DCI indicating the skip. For example, in some embodiments, the network node may send a DCI with a skip indication and the last transport block for downlink / uplink transmission. The skip indication may include one or two bits added to the scheduling DCI. In addition, non-scheduled DCI or a timer may be used to implement skip DCI during a period when there is no traffic to be scheduled.

[0043] The skip value may be related to the DRX cycle and the timer value. For example, the skip may be applied based on the state of certain timers, such as timers for a hybrid automatic repeat request (HARQ) process. The HARQ process timers may include:

[0044] -drx-HARQ-RTT-TimerDL (per DL HARQ process except broadcast process): indicates the minimum duration that the MAC entity expects before a DL allocation of a HARQ retransmission;

[0045] -drx-HARQ-RTT-TimerUL (per UL HARQ process): indicates the minimum duration that the MAC entity expects before a UL HARQ retransmission is granted.

[0046] -drx-RetransmissionTimerDL (each DL HARQ process except the broadcast process): indicates the maximum duration until a DL retransmission is received;

[0047] -drx-RetransmissionTimerUL (per UL HARQ process): indicates the maximum duration until a grant for UL retransmission is received;

[0048] Active time (time the UE should monitor) includes the time when drx-onDurationTimer, drx-InactivityTimer, drx-RetransmissionTimerDL, drx-RetransmissionTimerUL or ra-ContentionResolutionTimer is running. Active time also includes the time when a scheduling request is sent on the physical uplink control channel (PUCCH) and is pending, and the time when the PDCCH indicates that a new transmission indicating the C-RNTI addressed to the MAC entity has not been received after successfully receiving a random access response to a random access preamble not selected by the MAC entity among the contention-based random access preambles.

[0049] Figures 2 to 9 An implementation scheme for implementing PDCCH monitoring skipping is shown.

[0050] Figure 2 A downlink timeline 200 is shown of a UE applying PDCCH monitoring skipping after receiving a scheduling DCI with a skip indication according to a first embodiment. In this embodiment, once the UE knows that there is a skip indication in the scheduling DCI 202, the UE applies skipping 204 for pre-configured time slots.

[0051] As shown, the network node transmits a scheduling DCI 202 during a first time period 206. The UE receives and processes the scheduling DCI 202. In the illustrated embodiment, if the UE determines that the scheduling DCI 202 includes a skip indication, the UE immediately applies the skip 204. In other words, in the illustrated embodiment, the UE does not perform PDCCH monitoring for a period of time after receiving and processing the scheduling DCI. The processing time will depend on the processing capabilities of the UE and can be very small. Therefore, the skip 204 can be applied immediately after receiving and processing the scheduling DCI 202 with the skip indication.

[0052] The amount of time that the UE spends monitoring the PDCCH may be a preconfigured number of time slots or amount of time during which the UE does not monitor the PDCCH and thus saves power. The UE may resume monitoring 208 after the preconfigured skipped time slot or time period.

[0053] However, in some embodiments, the cross-slot option may be enabled. When the cross-slot option is enabled, the scheduling DCI 202 may indicate the presence of a PDSCH. Therefore, the UE may skip PDCCH monitoring, but still receive the PDSCH 210 and transmit an acknowledgement (ACK) message 212 during the skip 204 period.

[0054] FIG. 3A to FIG. 3C A downlink timeline is shown in which a UE applies PDCCH monitoring skipping based on ACK messages and negative acknowledgement (NACK) messages according to some embodiments.

[0055] Figure 3A A downlink timeline 300a is shown where the UE applies a PDCCH monitoring skip after transmitting an ACK message 302. In this embodiment, after the UE transmits the ACK message 302, the UE applies the skip 204 for the pre-configured time slots if the received downlink scheduling DCI 306 includes a skip indication.

[0056] As shown, the network node transmits a scheduling DCI 306 during a first time period. The UE receives and processes the scheduling DCI 306. In the illustrated embodiment, if the UE determines that the scheduling DCI 306 includes a skip indication, the UE continues to receive PDSCH 308 from the network node and transmits an ACK message 302 to the network node. After transmitting the ACK message 302, the UE may apply the skip 304. In other words, in the illustrated embodiment, the UE does not perform PDCCH monitoring for a period of time after transmitting the ACK message 302.

[0057] The amount of time that the UE skips monitoring the PDCCH may be a preconfigured number of time slots or amount of time. During this time, the UE does not monitor the PDCCH and thus saves power. The UE may resume monitoring 208 after the preconfigured skipped time slots or time period.

[0058] Figure 3B A downlink timeline 300b is shown where the UE applies a PDCCH monitoring skip 314 after transmitting an ACK message 310 even with an ongoing previous HARQ request 312. Figure 3A As explained, in some embodiments, the UE applies a PDCCH monitoring skip 314 after the ACK message. In the illustrated embodiment, this timing applies even when there is a previous HARQ request 312 in progress.

[0059] As shown, the UE has transmitted a NACK message 316 for a previous HARQ request 312 before an ACK message 310 for a current HARQ request 318. Even though a retransmission timer 320 for the previous HARQ request 312 is running, the UE may still apply a PDCCH monitoring skip 314. Thus, the PDCCH monitoring skip 314 may be applied to skip PDCCH monitoring during a portion of a time period associated with the retransmission timer 320 for the previous HARQ request 312.

[0060] Figure 3C 300c shows a downlink timeline in which a UE applies a PDCCH monitoring skip 322 after transmitting a NACK message 326 according to some embodiments. Figure 3C The timeline of the discussion can be compared with Figure 3A and Figure 3B For example, if an ACK message is transmitted, the UE may follow Figure 3A and Figure 3B , but if the UE transmits a NACK message 326, the UE may follow Figure 3C Timeline in .

[0061] In the illustrated embodiment, the network node transmits a scheduling DCI 324 during a first time period. The UE receives and processes the scheduling DCI 324. In the illustrated embodiment, if the UE determines that the scheduling DCI 324 includes a skip indication, the UE continues to receive the PDSCH 328 from the network node. If the PDSCH 328 is not successfully decoded, the UE may transmit a NACK message 326 to the network node.

[0062] After transmitting the NACK message 326 , the UE may apply PDCCH monitoring skip 322 .

[0063] More specifically, in some embodiments, the UE may apply the PDCCH monitoring skip 322 immediately after transmitting the NACK message 326. In other embodiments, the UE may apply the PDCCH monitoring skip 322 after the drx-HARQRTTTimerDL 330. Thus, while the retransmission timer 332 is running, the UE may actually perform the PDCCH monitoring skip 322. This may provide a scheduling constraint at the network node. That is, even if the retransmission timer 332 is running, the network node may determine not to perform a retransmission until after the skip period.

[0064] Figure 4 The downlink timeline 400 shows the UE applying PDCCH monitoring skip 402 after expiration of DRXretransmissionTimerDL 404. In this embodiment, the UE applies PDCCH monitoring skip 402 for a pre-configured timeslot after a successful retransmission.

[0065] As shown, the network node transmits a scheduling DCI 406. The UE receives and processes the scheduling DCI 406. In the illustrated embodiment, if the UE determines that the scheduling DCI 306 includes a skip indication, the UE continues to receive the PDSCH 408 from the network node and transmits a NACK message 410 to the network node when the PDSCH 408 is not successfully decoded. Figure 3C Differently, the UE does not apply PDCCH monitoring skip 402 after the NACK message 410. Instead, the UE attempts to receive the retransmission at DRX-retransmissionTimerDL 404. If the UE successfully receives the retransmitted PDSCH, the UE transmits an ACK message 412.

[0066] After the ACK message 412 is transmitted and the DRX-retransmissionTimerDL 404 expires, the UE may apply PDCCH monitoring skip 402. In this embodiment, cross-slot may be enabled and no DCI transmission occurs in K0 and K1.

[0067] In this embodiment, the UE may apply the PDCCH monitoring skip 402 immediately after the DRX-retransmissionTimerDL 404 expires. The DRX-retransmissionTimerDL 404 is per HARQ process. That is, if there are multiple HARQ processes, there may be multiple downlink DRX retransmission timers. In some embodiments, the UE may apply the PDCCH monitoring skip 402 when all HARQ process retransmissions are completed. In other words, the UE may wait until all downlink DRX retransmission timers have expired. In addition, in some embodiments, when the PDCCH monitoring skip 402 is applied, the drx-OndurationTimer and the drx-inactivityTimer continue to count down.

[0068] Figure 5 An uplink timeline 500 is shown where the UE applies PDCCH monitoring skipping 506 after receiving a scheduling DCI 502 with a skip indication. In this embodiment, as long as the UE is aware of the presence of a skip indication in the scheduling DCI 502, the UE applies PDCCH monitoring skipping 506 for the pre-configured timeslots.

[0069] As shown, the network node transmits a scheduling DCI 502. The UE receives and processes the scheduling DCI 502. In the illustrated embodiment, if the UE determines that the scheduling DCI 502 includes a skip indication, the UE immediately applies a PDCCH monitoring skip 506. In other words, in the illustrated embodiment, the UE does not perform PDCCH monitoring for a period of time after receiving and processing the scheduling DCI. The processing time will depend on the processing capability of the UE and can be very small. Therefore, the PDCCH monitoring skip 506 can be applied immediately after receiving and processing the scheduling DCI 502 with a skip indication.

[0070] Fig. 6A and Figure 6B Two example uplink timelines are shown where PDCCH monitoring skipping is applied after expiration of drx-HARQRTTTimerUL according to some embodiments.

[0071] More specifically, Fig. 6AIt is shown that the PDCCH monitoring skip 608 is applied after drx-HARQRTTTimerUL 604 when the uplink timeline includes an ACK message according to some embodiments. As shown, the network node transmits the scheduling DCI 406. The UE receives and processes the scheduling DCI 602, and then applies the PDCCH monitoring skip 608 after drx-HARQRTTTimerUL 604. Since the PDCCH monitoring skip 608 is applied while the retransmission timer 606 is running, the network can take the skipped timing into account as a scheduling constraint when attempting to communicate with the UE.

[0072] Alternatively, in some embodiments, the UE may apply PDCCH monitoring skipping 608 immediately after the end of PUSCH transmission. In these embodiments, PDCCH monitoring skipping 608 will start at the same time as drx-HARQRTTTimerUL starts.

[0073] Figure 6B It is shown that according to some embodiments, a PDCCH monitoring skip (e.g., a first skip 610 and a second skip 612) is applied after a drx-HARQRTTTimerUL (e.g., a first timer 614 and a second timer 616) when the uplink timeline includes a NACK message. As shown, the HARQ process with NACK may include two drx-HARQRTTTimerUL after the first transmission and after the retransmission. However, in this embodiment, the logic remains the same. That is, after each drx-HARQRTTTimerUL, the UE applies a PDCCH monitoring skip. Once again, the PDCCH monitoring behavior can be viewed as a scheduling constraint by the network node.

[0074] Fig. 7A and Figure 7B Two exemplary uplink timelines are shown where PDCCH monitoring skipping is applied after expiration of a retransmission timer.After expiration of the retransmission timer, there may be no traffic that the UE may have missed during the PDCCH monitoring skipping.

[0075] More specifically, Fig. 7AThe application of PDCCH monitoring skip 704 after drxretransmissionTimerUL 702 expires when the uplink timeline includes an ACK message according to some embodiments is shown. As shown, the network node transmits a scheduling DCI with a skip indication. The UE receives and processes the scheduling DCI. While drx-retransmissionTimerUL 702 is running, the UE keeps monitoring and applies PDCCH monitoring skip 704 when the timer expires. This allows the UE to apply PDCCH monitoring skip 704 only at the end of all HARQ process retransmissions.

[0076] For example, Figure 7B 1 shows applying a PDCCH monitoring skip 712 after the drx-retransmissionTimerUL timer expires when the uplink timeline includes a NACK message according to some embodiments. As shown, the network node transmits a scheduling DCI 708 with a skip indication. The UE receives and processes the scheduling DCI 708. Due to the NACK message, the first drx-retransmissionTimerUL 706 ends in the transmission grant and therefore does not expire. Therefore, the UE waits until the second drx-retransmissionTimerUL 710 expires to apply the PDCCH monitoring skip 712.

[0077] In addition, regarding Figures 5 to 7B In the outlined implementation, when PDCCH monitoring skipping is applied, drx-OndurationTimer and drx-inactivityTimer may continue to count down.

[0078] Figure 8 A timeline 800 is shown for applying a skip when no traffic is to be scheduled resulting in no scheduled DCI being transmitted. In the illustrated embodiment, the UE uses a timer to determine when to apply the PDCCH monitoring skip 704.

[0079] As shown, the UE receives a scheduling DCI 804 with a skip indication. The scheduling DCI 804 causes the UE to apply a PDCCH monitoring skip 802 for a period of time. After a certain number of time slots, the UE wakes up to continue monitoring. In the illustrated embodiment, during this wake-up window, a duration timer 806 runs. If the duration timer 806 expires without new downlink or uplink traffic, the UE may return to PDCCH monitoring skipping.

[0080] In some embodiments, the timer may be a preconfigured value. If the UE does not receive a scheduling DCI during the preconfigured time, the UE may skip another preconfigured number of time slots. The timer provides low overhead to achieve traffic-free skipping.

[0081] In some embodiments, the network node may transmit a non-scheduled DCI to manipulate the PDCCH monitoring behavior (e.g., skipping) instead of a timer. Fig. 9 A method 900 for a network node to send non-scheduled DCI is shown. In block 902, the method 900 configures a scheduled downlink control information (DCI) message that includes a skip indication. In block 904, the method 900 transmits the scheduled DCI to the UE. In block 906, the method 900 determines a time at which the UE will apply the skip for physical downlink control channel (PDCCH) monitoring as a result of the skip indication. In block 908, the method 900 restricts PDCCH transmissions for a preconfigured number of time slots at the determined time. In block 910, the method 900 sends the non-scheduled DCI.

[0082] The non-scheduled DCI may include a skip indication field indicating whether the UE should apply PDCCH monitoring skipping for another preconfigured number of time slots.The non-scheduled DCI may be group-based or UE-specific.

[0083] In some implementations of group-based non-scheduled DCI, the following information may be transmitted via DCI format 26 with CRC scrambled by PS-RNTI, a new DCI format with CRC scrambled by a new RNTI:

[0084] Block number 1, block number 2, ..., block number N

[0085] o Where the starting position of the block is determined by the parameter ps-PositionDCI-2-6, which is provided by the higher layers of the UE configured with the block.

[0086] If the UE is configured with higher layer parameters PS-RNTI and DCI formats 2-6, a block is configured for the UE by higher layers, where the following fields are defined for the block:

[0087] Skip indication field - 1 bit

[0088] o If the Skip Indication field is set to 1, the UE may apply PDCCH monitoring skipping for another pre-configured skip value.

[0089] SCell dormancy indication - causes Scell ​​to be skipped in cross-carrier scheduling.

[0090] The size of DCI format 2_6 may be indicated by a higher layer parameter sizeDCI-2-6.

[0091] In some embodiments, the PDCCH monitoring behavior of each UE can be used to reduce the future DCI size based on the content of the wake-up signal (WUS) (e.g., DCI format 2_6). For example, if some UEs are configured to skip the entire DRX cycle, those fields are not used in the skip indication of the non-scheduled DCI. Similar rules can be applied to the Scell ​​sleep indication. Therefore, the DCI can have a dynamic size. The dynamic size can result in slightly better decoding performance because the size of the DCI can be reduced when some UEs are skipping PDCCH monitoring.

[0092] A UE receiving a group-based non-scheduled DCI may decode the DCI and determine one or more bits corresponding to the UE. The UE may determine whether the corresponding bits indicate whether the UE should apply PDCCH monitoring skipping.

[0093] In some implementations using UE-specific non-scheduled DCI, the DCI format may be 0-1 or 1-1. The network node may transmit a non-scheduled DCI to each of these UEs to direct the UE to perform skipping or monitoring of the PDCCH.

[0094] Fig.10 A timeline 1000 is shown in which the UE PDCCH monitoring behavior changes based on a DCI with a PDCCH monitoring mode indication (e.g., a first DCI 1002 and a second DCI 1004). In the illustrated embodiment, the UE may support search space / coreset changes and bandwidth part (BWP) switching. The power saving search space / coreset configuration may be a subset of the default mode. In the event of a missed switching DCI, the UE may perform DCI monitoring using the default mode. For BWP, the UE may change the configuration to perform PDDCH monitoring in more or fewer time slots. For example, the UE may monitor each time slot before receiving the first DCI 1002. The BWP switch may be Y (ms) after the last packet / data burst. For example, Y = [8], without excluding other values.

[0095] In the first DCI 1002, the network node may indicate to the UE that the monitoring behavior is switched to be less frequent. If the network node does not expect so much traffic, the network node may instruct the UE to reduce the number of time slots monitored. For example, the UE may move from monitoring every time slot to monitoring every five time slots. The second DCI 1004 may switch the monitoring behavior back to more frequent monitoring (e.g., every time slot).

[0096] Figures 11 to 13Downlink timelines for three implementations of applying search space / coreset changes are shown. Fig.11 A first timing option is shown for when to apply the search space / coreset change during the downlink timeline. Fig. 12A and Fig. 12B A second timing option is shown for when to apply the search space / coreset change during the downlink timeline. Fig.13 A third timing option is shown for when to apply the search space / coreset change during the downlink timeline.

[0097] exist Fig.11 In the illustrated embodiment, the UE receives and processes a scheduling DCI 1102 with a monitoring mode indication. The monitoring mode switch can be an indication of using a first mode or a second mode. In this embodiment, the UE then applies a new monitoring mode 1104 based on the monitoring mode indication immediately after the scheduling DCI 1102 is processed. The monitoring mode indication can cause the UE to adjust the PDCCH monitoring behavior (e.g., apply a search space / coreset change). The new monitoring mode 1104 can be pre-configured. The UE can restore the original DCI monitoring mode 1106 after a pre-configured amount of time.

[0098] exist Fig. 12A In the illustrated embodiment, the UE receives and processes the scheduling DCI 1206 with the monitoring mode indication. In this embodiment, the UE may apply the new monitoring mode 1204 after the ACK message 1202. The monitoring mode indication may cause the UE to adjust the PDCCH monitoring behavior (e.g., apply search space / coreset changes). The new monitoring mode 1204 may be pre-configured. The UE may resume the original DCI monitoring mode 1106 after a pre-configured amount of time.

[0099] Fig. 12B Shows Fig. 12A 1204 , 1205 , 1206 , 1207 , 1208 , 1209 , 1300 , 1301 , 1302 , 1303 , 1304 , 1305 , 1306 , 1307 , 1308 , 1309 , 1401 , 1403 , 1404 , 1305 , 1306 , 1407 , 1308 , 1309 , 1408 , 1309 , 1404 , 1305 , 1306 , 1308 , 1309 , 1404 , 1305 , 1306 , 1308 , 1309 , 1404 , 1305 , 1306 , 1308 , 1309 , 1404 , 1308 , 1309 , 14 ...

[0100] exist Fig.13In the illustrated embodiment, the UE receives and processes the scheduling DCI 1304 with the monitoring mode indication. In this embodiment, the UE may apply the new monitoring mode 1302 after the ACK message 1308. However, unlike Fig. 12A and Fig. 12B 1306, in which the UE keeps monitoring after the NACK 1306 while the drx-retransmissionTimerDL 1310 is running.

[0101] This monitoring mode indication may enable the UE to adjust the PDCCH monitoring behavior (eg, apply search space / coreset changes). A new monitoring pattern may be preconfigured 1302. The UE may resume the original DCI monitoring pattern 1106 after a preconfigured amount of time.

[0102] Figure 14 to Figure 1 6 shows the uplink timeline for three implementations of applying search space / coreset changes. Fig.14 A first timing option is shown for when to apply the search space / coreset change during the uplink timeline. Fig.15A and Fig. 15B A second timing option is shown for when to apply the search space / coreset change during the uplink timeline. Fig.16A and Fig. 16B A third timing option is shown for when to apply the search space / coreset change during the uplink timeline.

[0103] exist Fig.14 In the illustrated embodiment, the UE receives and processes a scheduling DCI 1402 with a monitoring mode indication. In this embodiment, the UE then applies a new monitoring mode 1404 based on the monitoring mode indication immediately after the scheduling DCI 1402 is received and processed. The monitoring mode indication may cause the UE to adjust the PDCCH monitoring behavior (e.g., apply a search space / coreset change). The new monitoring mode 1404 may be pre-configured. The UE may resume the original DCI monitoring mode after a pre-configured amount of time.

[0104] exist Fig.15AIn the illustrated embodiment, the UE receives and processes a scheduling DCI with a monitoring mode indication 1502. In this embodiment, the UE may apply a new monitoring mode 1508 after the expiration of drx-HARQRTTTimerUL 1504. The monitoring mode indication may cause the UE to adjust the PDCCH monitoring behavior (e.g., apply search space / coreset changes). The new monitoring mode 1508 may be pre-configured. The UE may resume the original DCI monitoring mode after a pre-configured amount of time or after the expiration of drx-RetransmissionTimerUL 1506.

[0105] Fig. 15B Shows Fig.15A 15. The UE embodiment described in the figure does what it does in the case of transmitting a NACK message. As shown in the figure, the UE receives and processes the scheduling DCI 1206 with the monitoring mode indication. In this embodiment, the UE applies the new monitoring mode 1510 after both drx-HARQRTTTimerUL (e.g., the first timer 1512 and the second timer 1514) expire.

[0106] exist Fig.16A In the illustrated embodiment, the UE receives and processes a scheduling DCI with a monitoring mode indication 1606. In this embodiment, the UE may apply a new monitoring mode 1604 after the drx-HARQretransmissionTimerUL 1602 expires. The monitoring mode indication may cause the UE to adjust the PDCCH monitoring behavior (e.g., apply a search space / coreset change). The new monitoring mode 1604 may be pre-configured. The UE may resume the original DCI monitoring mode after a pre-configured amount of time.

[0107] Fig. 16B Shows Fig.16A 1604. The UE embodiment described in the figure does what it does in the case of transmitting a NACK message. As shown in the figure, the UE receives and processes the scheduling DCI 1608 with the monitoring mode indication. In this embodiment, the UE applies the new monitoring mode 1614 only after the second drx-HARQretransmissionTimerUL 1612 expires. Due to the NACK message, the first drx-HARQretransmissionTimerUL 1608 ends in the transmission grant. Therefore, the UE waits until the second drx-HARQretransmissionTimerUL 1612 expires to apply the PDCCH monitoring skip 712.

[0108] In addition to reference Figure 11 to Figure 16, each of these embodiments may include a default fallback monitoring mode. For example, the UE may be configured to have two search spaces / Coresets for each BWP. One of the search spaces / Coresets may be default (i.e., fallback), which is set to have a smaller monitoring periodicity and a larger number of coresets, and the second search space / Coreset may include a larger monitoring periodicity. The second power-saving search space / coreset configuration may be a subset of the default configuration, so that in the event that the UE misses a DCI indication to switch to a power-saving configuration, the UE may still correctly receive DCI in that DRX cycle without a power saving benefit. At the beginning of each DRX cycle, the UE may always fall back to use the default DRX cycle. In some embodiments, scheduled DCI and non-scheduled DCI may be used to trigger switching between search spaces / Coresets.

[0109] In some embodiments, at the beginning of the DRX On Duration, the UE monitors with a default search space / Coreset configuration. When the UE receives a gNB scheduling grant with a 1-bit indication (e.g., DCI) indicating a search space / Coreset switch, the UE may change to another pre-configured search space / Coreset monitoring mode. When no traffic is detected while the inactivity timer is running, the UE may keep monitoring with a large periodicity. In some embodiments, after a certain amount of time or number of time slots, the UE may revert to the default search space / Coreset configuration.

[0110] Fig.17 An exemplary architecture of a system 1700 of a network according to various embodiments is shown. The following description is provided for an example system 1700 operating in conjunction with LTE system standards and 5G or NR system standards provided by 3GPP technical specifications. However, the exemplary embodiments are not limited in this regard, and the embodiments may be applied to other networks that benefit from the principles described herein, such as future 3GPP systems (e.g., sixth generation (6G)) systems, IEEE 802.16 protocols (e.g., WMAN, WiMAX, etc.), and the like.

[0111] like Fig.17As shown, system 1700 includes UE 1722 and UE 1720. In this example, UE 1722 and UE 1720 are shown as smart phones (e.g., handheld touch screen mobile computing devices that can connect to one or more cellular networks), but may also include any mobile or non-mobile computing devices, such as consumer electronic devices, mobile phones, smart phones, feature phones, tablet computers, wearable computer devices, personal digital assistants (PDAs), pagers, wireless handheld devices, desktop computers, laptop computers, in-vehicle infotainment (IVI), in-car entertainment (ICE) devices, instrument clusters (ICs), heads-up display (HUD) devices, on-board diagnostic (OBD) devices, dashtop mobile equipment (DME), mobile data terminals (MDTs), electronic engine management systems (EEMS), electronic / engine control units (ECUs), electronic / engine control modules (ECMs), embedded systems, microcontrollers, control modules, engine management systems (EMS), networked or "smart" appliances, MTC devices, M2M, IoT devices, etc.

[0112] In some embodiments, UE 1722 and / or UE 1720 may be an IoT UE, which may include a network access layer designed for low-power IoT applications that utilize short-term UE connections. The IoT UE may utilize technologies such as M2M or MTC to exchange data with an MTC server or device via PLMN, ProSe or D2D communications, sensor networks, or IoT networks. M2M or MTC data exchanges may be machine-initiated data exchanges. The IoT network describes interconnected IoT UEs, which may include uniquely identifiable embedded computing devices (within the Internet infrastructure) with short-lived connections. The IoT UE may execute background applications (e.g., keep-alive messages, status updates, etc.) to facilitate connectivity to the IoT network.

[0113] UE 1722 and UE 1720 may be configured to be connected, e.g., communicatively coupled, to an access node or radio access node (shown as (R) AN 1708). In an embodiment, (R) AN 1708 may be an NG RAN or SG RAN, an E-UTRAN, or a traditional RAN, such as a UTRAN or GERAN. As used herein, the term "NG RAN" or the like may refer to an (R) AN 1708 operating in an NR or SG system and the term "E-UTRAN" or the like may refer to an (R) AN 1708 operating in an LTE or 4G system. UE 1722 and UE 1720 utilize connections (or channels) (shown as connection 1704 and connection 1702, respectively), each connection comprising a physical communication interface or layer (discussed in further detail below).

[0114] In this example, connection 1704 and connection 1702 are air interfaces to achieve communication coupling, and may be consistent with a cellular communication protocol, such as a GSM protocol, a CDMA network protocol, a PTT protocol, a POC protocol, a UMTS protocol, a 3GPP LTE protocol, a SG protocol, a NR protocol, and / or any other communication protocol discussed herein. In an embodiment, UE 1722 and UE 1720 may also directly exchange communication data via a ProSe interface 1710. The ProSe interface 1710 may alternatively be referred to as a side link (SL) interface 110, and may include one or more logical channels, including but not limited to PSCCH, PSSCH, PSDCH, and PSBCH.

[0115] UE 1720 is shown as being configured to access AP 1712 (also referred to as a "WLAN node," "WLAN," "WLAN terminal," "WT," etc.) via connection 1724. Connection 1724 may include a local wireless connection, such as a connection consistent with any IEEE 802.11 protocol, where AP 1712 would include wireless fidelity. router. In this example, AP 1712 may be connected to the Internet without being connected to the core network of the wireless system (described in further detail below). In various embodiments, UE 1720, (R) AN 1708, and AP 1712 may be configured to utilize LWA operation and / or LWIP operation. LWA operation may involve UE 1720 in RRC_CONNECTED configured by RAN node 1714 or RAN node 1716 to utilize radio resources of LTE and WLAN. LWIP operation may involve UE 1720 using WLAN radio resources (e.g., connection 1724) via IPsec protocol tunneling to authenticate and encrypt packets (e.g., IP packets) sent through connection 1724. IPsec tunneling may include encapsulating the entire original IP packet and adding a new packet header, thereby protecting the original header of the IP packet.

[0116] (R)AN 1708 may include one or more AN nodes, such as RAN node 1714 and RAN node 1716, that implement connection 1704 and connection 1702. As used herein, the terms "access node", "access point", etc. may describe equipment that provides radio baseband functions for data and / or voice connections between a network and one or more users. These access nodes may be referred to as BS, gNB, RAN node, eNB, NodeB, RSU, TRxP or TRP, etc., and may include ground stations (e.g., terrestrial access points) or satellite stations that provide coverage within a geographic area (e.g., a cell). As used herein, the terms "NG RAN node" and the like may refer to RAN nodes (e.g., gNBs) operating in NR or SG systems, while the terms "E-UTRAN nodes" and the like may refer to RAN nodes (e.g., eNBs) operating in LTE or 4G systems 1700. According to various embodiments, the RAN node 1714 or the RAN node 1716 may be implemented as one or more of a dedicated physical device such as a macrocell base station and / or a low power (LP) base station for providing a femtocell, picocell or other similar cell with a smaller coverage area, smaller user capacity or higher bandwidth than a macrocell.

[0117] In some embodiments, all or part of RAN node 1714 or RAN node 1716 may be implemented as one or more software entities running on a server computer as part of a virtual network that may be referred to as a CRAN and / or a virtual baseband unit pool (vBBUP). In these embodiments, the CRAN or vBBUP may implement RAN functional splits, such as PDCP splits, where the RRC and PDCP layers are operated by the CRAN / vBBUP, while other L2 protocol entities are operated by individual RAN nodes (e.g., RAN node 1714 or RAN node 1716); MAC / PHY splits, where the RRC, PDCP, RLC, and MAC layers are operated by the CRAN / vBBUP, and the PHY layers are operated by individual RAN nodes (e.g., RAN node 1714 or RAN node 1716); or "lower PHY" splits, where the RRC, PDCP, RLC, MAC layers, and upper portions of the PHY layers are operated by the CRAN / vBBUP, and the lower portions of the PHY layers are operated by individual RAN nodes. The virtualization framework allows idle processor cores of RAN node 1714 or RAN node 1716 to execute other virtualized applications. In some implementations, each RAN node may represent a virtualized application via each F1 interface ( Fig.17In some implementations, the gNB-DUs may include one or more remote radio heads or RFEMs, and the gNB-CUs may be operated by a server (not shown) located in the (R)AN 1708 or by a server pool in a manner similar to the CRAN / vBBUP. Additionally or alternatively, one or more of the RAN nodes 1714 or 1716 may be a next generation eNB (ng-eNB), which is a RAN node that provides E-UTRA user plane and control plane protocol terminals to the UE 1722 and UE 1720 and is connected to the SGC via an NG interface (discussed below). In a V2X scenario, the RAN node 1714 or one or more of the RAN nodes 1716 may be an RSU or act as an RSU.

[0118] The term "roadside unit" or "RSU" may refer to any traffic infrastructure entity used for V2X communications. The RSU may be implemented in or by a suitable RAN node or a stationary (or relatively stationary) UE, wherein an RSU implemented in or by a UE may be referred to as a "UE-type RSU", an RSU implemented in or by an eNB may be referred to as an "eNB-type RSU", an RSU implemented in or by a gNB may be referred to as a "gNB-type RSU", and so on. In one example, the RSU is a computing device coupled to a radio frequency circuit located on the roadside that provides connectivity support to passing vehicle UEs (vUEs). The RSU may also include internal data storage circuits for storing intersection map geometry, traffic statistics, media, and applications / software for sensing and controlling ongoing vehicle and pedestrian traffic. The RSU may operate on the 5.9 GHz direct short range communication (DSRC) band to provide extremely low latency communications required for high-speed events, such as collision avoidance, traffic warnings, and the like. Additionally or alternatively, the RSU may operate on a cellular V2X band to provide the aforementioned low-latency communications as well as other cellular communications services. Additionally or alternatively, the RSU may operate as a Wi-Fi hotspot (2.4 GHz band) and / or provide connectivity to one or more cellular networks to provide uplink and downlink communications. Some or all of the computing device and the RSU's RF circuitry may be packaged in a weather-resistant enclosure suitable for outdoor installation, and may include a network interface controller to provide a wired connection (e.g., Ethernet) to a traffic signal controller and / or backhaul network.

[0119] The RAN node 1714 or RAN node 1716 may terminate the air interface protocol and may be the first point of contact for the UE 1722 and the UE 1720. In some embodiments, the RAN node 1714 or RAN node 1716 may perform various logical functions of the (R)AN 1708, including but not limited to the functions of a radio network controller (RNC), such as radio bearer management, uplink and downlink dynamic radio resource management and data packet scheduling, and mobility management.

[0120] In an embodiment, UE 1722 and UE 1720 may be configured to communicate with each other or with RAN node 1714 and / or RAN node 1716 over a multi-carrier communication channel using OFDM communication signals according to various communication techniques, such as but not limited to OFDMA communication techniques (e.g., for downlink communication) or SC-FDMA communication techniques (e.g., for uplink and ProSe or sidelink communication), although the scope of the embodiments is not limited in this respect. OFDM signals may include multiple orthogonal subcarriers.

[0121] In some embodiments, a downlink resource grid may be used for downlink transmissions from RAN node 1714 and / or RAN node 1716 to UE 1722 and UE 1720, while uplink transmissions may utilize similar techniques. The grid may be a time-frequency grid, referred to as a resource grid or a time-frequency resource grid, which is a physical resource in the downlink in each time slot. For OFDM systems, such a time-frequency plane representation is common practice, which makes radio resource allocation intuitive. Each column and each row of the resource grid corresponds to an OFDM symbol and an OFDM subcarrier, respectively. The duration of the resource grid in the time domain corresponds to a time slot in a radio frame. The smallest time-frequency unit in the resource grid is represented as a resource element. Each resource grid includes a plurality of resource blocks, which describe the mapping of certain physical channels to resource elements. Each resource block includes a set of resource elements; in the frequency domain, this may represent the minimum amount of resources that can currently be allocated. Such resource blocks are used to transmit several different physical downlink channels.

[0122] According to various embodiments, UE 1722 and UE 1720 and RAN node 1714 and / or RAN node 1716 communicate data (e.g., transmit data and receive data) through a licensed medium (also referred to as a "licensed spectrum" and / or a "licensed frequency band") and an unlicensed shared medium (also referred to as an "unlicensed spectrum" and / or an "unlicensed frequency band"). The licensed spectrum may include channels operating in a frequency range of approximately 400 MHz to approximately 3.8 GHz, and the unlicensed spectrum may include a 5 GHz frequency band.

[0123] To operate in the unlicensed spectrum, UE 1722 and UE 1720 and RAN node 1714 or RAN node 1716 may operate using LAA, eLAA, and / or feLAA mechanisms. In these specific implementations, UE 1722 and UE 1720 and RAN node 1714 or RAN node 1716 may perform one or more known medium sensing operations and / or carrier sensing operations to determine whether one or more channels in the unlicensed spectrum are unavailable or otherwise occupied before transmitting in the unlicensed spectrum. The medium / carrier sensing operations may be performed according to a listen-before-talk (LBT) protocol.

[0124] LBT is a mechanism by which equipment (e.g., UE 1722 and UE 1720, RAN node 1714 or RAN node 1716, etc.) senses the medium (e.g., a channel or carrier frequency) and transmits when the medium is sensed to be idle (or when a particular channel in the medium is sensed to be unoccupied). The medium sensing operation may include CCA, which utilizes at least ED to determine whether other signals are present on the channel in order to determine whether the channel is occupied or idle. The LBT mechanism allows cellular / LAA networks to coexist with existing systems in unlicensed spectrum and with other LAA networks. ED may include sensing RF energy over a period of time on an expected transmission band and comparing the sensed RF energy to a predefined or configured threshold.

[0125] Typically, existing systems in the 5 GHz band are WLANs based on IEEE 802.11 technology. WLANs use a contention-based channel access mechanism called CSMA / CA. Here, when a WLAN node (e.g., a mobile station (MS) such as UE 1722, AP 1712, etc.) intends to transmit, the WLAN node may first perform CCA before transmission. In addition, in the case where more than one WLAN node senses the channel as idle and transmits at the same time, a backoff mechanism is used to avoid conflicts. The backoff mechanism may be a counter randomly introduced within the CWS that increases exponentially when a conflict occurs and is reset to a minimum value when the transmission is successful. The LBT mechanism designed for LAA is somewhat similar to the CSMA / CA of WLAN. In some specific implementations, the LBT process for a DL or UL transmission burst (including PDSCH or PUSCH transmission) may have a LAA contention window of variable length between X and Y ECCA slots, where X and Y are the minimum and maximum values ​​of the CWS of LAA. In one example, the minimum CWS for LAA transmissions may be 9 microseconds (μs); however, the size of the CWS and MCOT (eg, transmission burst) may be based on government regulatory requirements.

[0126] The LAA mechanism is built on the CA technology of the LTE-Advanced system. In CA, each aggregated carrier is called a CC. A CC can have a bandwidth of 1.4, 3, 5, 10, 15, or 20 MHz, and up to five CCs can be aggregated, so the maximum aggregated bandwidth is 100 MHz. In an FDD system, the number of aggregated carriers can be different for DL ​​and UL, where the number of UL CCs is equal to or lower than the number of DL component carriers. In some cases, each CC may have a different bandwidth from other CCs. In a TDD system, the number of CCs and the bandwidth of each CC are typically the same for DL ​​and UL.

[0127] CA also includes individual serving cells to provide individual CCs. The coverage of the serving cells may be different, for example, because CCs on different frequency bands will experience different path losses. The primary serving cell or PCell may provide the PCC for both UL and DL, and may handle activities related to RRC and NAS. Other serving cells are called SCells, and each SCell may provide individual SCCs for both UL and DL. SCCs may be added and removed as needed, and changing PCCs may require UE 1722 to undergo a handover. In LAA, eLAA, and feLAA, some or all of the SCells may operate in an unlicensed spectrum (referred to as "LAA SCells"), and the LAA SCells are assisted by the PCells operating in the licensed spectrum. When a UE is configured with more than one LAA SCell, the UE may receive UL grants on the configured LAA SCells, indicating different PUSCH start positions within the same subframe.

[0128] The PDSCH carries user data and higher layer signaling to multiple UEs 1722 and UE 1720. The PDCCH carries, among other information, information about the transport format and resource allocation related to the PDSCH channel. It may also inform the UEs 1722 and UE 1720 about the transport format, resource allocation, and HARQ information related to the uplink shared channel. Typically, downlink scheduling (allocation of control and shared channel resource blocks to UEs 1720 within a cell) may be performed at either the RAN node 1714 or the RAN node 1716 based on channel quality information fed back from either the UEs 1722 and UE 1720. Downlink resource allocation information may be sent on the PDCCH for (e.g., allocated to) each of the UEs 1722 and UE 1720.

[0129] PDCCH uses CCE to transmit control information. Before being mapped to resource elements, the PDCCH complex-valued symbols can first be organized into quadruplets, which can then be arranged using a sub-block interleaver for rate matching. One or more of these CCEs can be used to transmit each PDCCH, where each CCE can correspond to nine sets of four physical resource elements, respectively, called REGs. Four quadrature phase shift keying (QPSK) symbols can be mapped to each REG. Depending on the size of the DCI and channel conditions, one or more CCEs can be used to transmit the PDCCH. There may be four or more different PDCCH formats defined in LTE with different numbers of CCEs (e.g., aggregation levels, L=1, 2, 4, or 8).

[0130] Some embodiments may use the concept of resource allocation for control channel information, which is an extension of the above concept. For example, some embodiments may utilize EPDCCH that uses PDSCH resources for control information transmission. One or more ECCEs may be used to transmit EPDCCH. Similar to the above, each ECCE may correspond to nine sets of four physical resource elements, referred to as EREG. In some cases, ECCE may have other numbers of EREGs.

[0131] RAN node 1714 or RAN node 1716 may be configured to communicate with each other via interface 1730. In an embodiment where system 1700 is an LTE system (e.g., when CN 1706 is an EPC), interface 1730 may be an X2 interface. The X2 interface may be defined between two or more RAN nodes (e.g., two or more eNBs, etc.) connected to the EPC, and / or between two eNBs connected to the EPC. In some specific implementations, the X2 interface may include an X2 user plane interface (X2-U) and an X2 control plane interface (X2-C). X2-U may provide a flow control mechanism for user packets transmitted over the X2 interface, and may be used to transmit information about the delivery of user data between eNBs. For example, X2-U may provide specific sequence number information about user data transmitted from MeNB to SeNB; information about successfully delivering PDCP PDUs from SeNB to UE 1722 in sequence for user data; information about PDCP PDUs not delivered to UE 1722; information about the current minimum expected buffer size at Se NB for transmitting user data to UE; and the like. X2-C can provide intra-LTE access mobility functions, including context transfer from source eNB to target eNB, user plane transmission control, etc.; load management functions; and inter-cell interference coordination functions.

[0132] In an embodiment where the system 1700 is a SG or NR system (e.g., when the CN 1706 is an SGC), the interface 1730 may be an Xn interface. The Xn interface is defined between two or more RAN nodes (e.g., two or more gNBs, etc.) connected to the SGC, between a RAN node 1714 (e.g., a gNB) and an eNB connected to the SGC, and / or between two eNBs connected to a 5GC (e.g., CN 1706). In some specific implementations, the Xn interface may include an Xn user plane (Xn-U) interface and an Xn control plane (Xn-C) interface. The Xn-U may provide non-guaranteed delivery of user plane PDUs and support / provide data forwarding and flow control functions. The Xn-C may provide management and error handling functions for managing the functions of the Xn-C interface; mobility support for UE 1722 in a connected mode (e.g., CM-CONNECTED) includes functions for managing UE mobility in a connected mode between one or more RAN nodes 1714 or RAN nodes 1716. Mobility support may include context transfer from the old (source) service RAN node 1714 to the new (target) service RAN node 1716; and control of the user plane tunnel between the old (source) service RAN node 1714 and the new (target) service RAN node 1716. The protocol stack of Xn-U may include a transport network layer built on the Internet Protocol (IP) transport layer, and a GTP-U layer on top of the UDP and / or IP layer for carrying user plane PDUs. The Xn-C protocol stack may include an application layer signaling protocol (referred to as the Xn Application Protocol (Xn-AP)) and a transport network layer built on SCTP. SCTP may be on top of the IP layer and may provide guaranteed delivery of application layer messages. In the transport IP layer, point-to-point transport is used to deliver signaling PDUs. In other specific implementations, the Xn-U protocol stack and / or the Xn-C protocol stack may be the same or similar to the user plane and / or control plane protocol stacks shown and described herein.

[0133] (R)AN 1708 is shown as being communicatively coupled to the core network, in this embodiment, communicatively coupled to CN 1706. CN 1706 may include one or more network elements 1732 configured to provide various data and telecommunication services to customers / subscribers (e.g., users of UE 1722 and UE 1720) connected to CN 1706 via (R)AN 1708. Components of CN 1706 may be implemented in one physical node or in separate physical nodes, including components for reading and executing instructions from a machine-readable or computer-readable medium (e.g., a non-transitory machine-readable storage medium). In some embodiments, NFV may be used to virtualize any or all of the above-mentioned network node functions via executable instructions stored in one or more computer-readable storage media (described in further detail below). A logical instance of CN 1706 may be referred to as a network slice, and a logical instance of a portion of CN 1706 may be referred to as a network sub-slice. NFV architecture and infrastructure can be used to virtualize one or more network functions onto physical resources including a combination of industry-standard server hardware, storage hardware, or switches (alternatively performed by proprietary hardware). In other words, the NFV system can be used to perform a virtual or reconfigurable implementation of one or more EPC components / functions.

[0134] In general, the application server 1718 may be an element that provides applications that use IP bearer resources with the core network (e.g., UMTS PS domain, LTE PS data services, etc.). The application server 1718 may also be configured to support one or more communication services (e.g., VoIP sessions, PTT sessions, group communication sessions, social network services, etc.) for UE 1722 and UE 1720 via the EPC. The application server 1718 may communicate with the CN 1706 via the IP communication interface 1736.

[0135] In an embodiment, CN 1706 may be an SGC, and (R)AN 116 may be connected to CN 1706 via an NG interface 1734. In an embodiment, NG interface 1734 may be divided into two parts: an NG user plane (NG-U) interface 1726, which carries traffic data between RAN node 1714 or RAN node 1716 and UPF; and an S1 control plane (NG-C) interface 1728, which is a signaling interface between RAN node 1714 or RAN node 1716 and AMF.

[0136] In an embodiment, CN 1706 may be an SG CN, while in other embodiments, CN 1706 may be an EPC. In the case where CN 1706 is an EPC, (R)AN 116 may be connected to CN 1706 via an S1 interface 1734. In an embodiment, S1 interface 1734 may be divided into two parts: an S1 user plane (S1-U) interface 1726, which carries traffic data between RAN node 1714 or RAN node 1716 and S-GW; and an S1-MME interface 1728, which is a signaling interface between RAN node 1714 or RAN node 1716 and MME.

[0137] Fig.18 An example of infrastructure equipment 1800 according to various embodiments is shown. The infrastructure equipment 1800 can be implemented as a base station, a radio head, a RAN node, an AN, an application server, and / or any other element / device discussed herein. In other examples, the infrastructure equipment 1800 can be implemented in or by a UE.

[0138] The infrastructure equipment 1800 includes application circuits 1802, baseband circuits 1804, one or more radio front end modules 1806 (RFEM), memory circuits 1808, power management integrated circuits (shown as PMIC 1810), power tee circuits 1812, network controller circuits 1814, network interface connectors 1820, satellite positioning circuits 1816, and user interface circuits 1818. In some embodiments, the device infrastructure equipment 1800 may include additional elements such as, for example, memory / storage devices, displays, cameras, sensors, or input / output (I / O) interfaces. In other embodiments, these components may be included in more than one device. For example, the circuits may be separately included in more than one device for a CRAN, vBBU, or other similar implementation. The application circuits 1802 include circuits such as, but not limited to, one or more processors (or processor cores), cache memory, and one or more of the following: low dropout regulators (LDOs), interrupt controllers, serial interfaces such as SPI, I 2C or general programmable serial interface module, real-time clock (RTC), timer-counter (including interval timer and watchdog timer), general input / output (I / O or IO), memory card controller (such as secure digital (SD) multimedia card (MMC) or similar products), universal serial bus (USB) interface, mobile industry processor interface (MIPI) interface and joint test access group (JTAG) test access port. The processor (or core) of the application circuit 1802 can be coupled with or can include a memory / storage element and can be configured to execute instructions stored in the memory / storage device to enable various applications or operating systems to run on the infrastructure equipment 1800. In some specific implementations, the memory / storage element can be an on-chip memory circuit that can include any suitable volatile and / or non-volatile memory, such as DRAM, SRAM, EPROM, EEPROM, flash memory, solid-state memory and / or any other type of memory device technology, such as those discussed herein.

[0139] The processor of application circuit 1802 may include, for example, one or more processor cores (CPUs), one or more application processors, one or more graphics processing units (GPUs), one or more reduced instruction set computing (RISC) processors, one or more Acorn RISC Machine (ARM) processors, one or more complex instruction set computing (CISC) processors, one or more digital signal processors (DSPs), one or more FPGAs, one or more PLDs, one or more ASICs, one or more microprocessors or controllers, or any suitable combination thereof. In some embodiments, application circuit 1802 may include or may be a dedicated processor / controller for operating according to various embodiments herein. As an example, the processor of application circuit 1802 may include one or more Intel FPGAs. or Processor: Advanced Micro Devices (AMD) Processor, Accelerated Processing Unit (APU) or Processor; ARM-based processors licensed by ARM Holdings, Ltd., such as the ARM Cortex-A series processors provided by Cavium (TM), Inc. and MIPS-based designs from MIPS Technologies, Inc., such as the MIPSWarrior P-class processor; etc. In some embodiments, the infrastructure equipment 1800 may not utilize application circuits 1802, and instead may include a dedicated processor / controller to process IP data received, for example, from an EPC or 5GC.

[0140] In some implementations, the application circuit 1802 may include one or more hardware accelerators, which may be microprocessors, programmable processing devices, and the like. The one or more hardware accelerators may include, for example, computer vision (CV) and / or deep learning (DL) accelerators. For example, the programmable processing device may be one or more field programmable devices (FPDs), such as field programmable gate arrays (FPGAs), and the like; programmable logic devices (PLDs), such as complex PLDs (CPLDs), high capacity PLDs (HCPLDs), and the like; ASICs, such as structured ASICs, and the like; programmable SoCs (PSoCs); and the like. In such implementations, the circuitry of the application circuit 1802 may include logic blocks or logic architectures, as well as other interconnected resources that may be programmed to perform various functions, such as the procedures, methods, functions, and the like of the various embodiments discussed herein. In such embodiments, the circuitry of the application circuit 1802 may include memory cells (e.g., erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, static memory (e.g., static random access memory (SRAM), anti-fuse, etc.)) for storing logic blocks, logic architectures, data, etc. in a lookup table (LUT), etc. The baseband circuit 1804 may be implemented, for example, as a solder-in substrate including one or more integrated circuits, a single packaged integrated circuit soldered to a main circuit board, or a multi-chip module containing two or more integrated circuits.

[0141] The user interface circuitry 1818 may include one or more user interfaces designed to enable a user to interact with the infrastructure equipment 1800 or a peripheral component interface designed to enable a peripheral component to interact with the infrastructure equipment 1800. The user interface may include, but is not limited to, one or more physical or virtual buttons (e.g., a reset button), one or more indicators (e.g., light emitting diodes (LEDs)), a physical keyboard or keypad, a mouse, a touch pad, a touch screen, a speaker or other audio transmitting device, a microphone, a printer, a scanner, a headset, a display screen or display device, etc. The peripheral component interface may include, but is not limited to, a non-volatile memory port, a universal serial bus (USB) port, an audio jack, a power interface, etc.

[0142] The radio front end module 1806 may include a millimeter wave (mmWave) radio front end module (RFEM) and one or more sub-millimeter wave radio frequency integrated circuits (RFICs). In some implementations, the one or more sub-millimeter wave RFICs may be physically separated from the millimeter wave RFEM. The RFIC may include connections to one or more antennas or antenna arrays, and the RFEM may be connected to multiple antennas. In alternative implementations, both millimeter wave and sub-millimeter wave radio functions may be implemented in the same physical radio front end module 1806 that combines both millimeter wave antennas and sub-millimeter waves.

[0143] The memory circuit 1808 may include one or more of the following: a volatile memory including a dynamic random access memory (DRAM) and / or a synchronous dynamic random access memory (SDRAM); and a non-volatile memory (NVM) including a high-speed electrically erasable memory (commonly referred to as a "flash memory"), a phase change random access memory (PRAM), a magnetoresistive random access memory (MRAM), etc., and may be combined with a memory device obtained from and The memory circuit 1808 may be implemented as one or more of: a solder-in package integrated circuit, a socket memory module, and a plug-in memory card.

[0144] The PMIC 1810 may include a voltage regulator, a surge protector, a power alarm detection circuit, and one or more backup power sources, such as a battery or capacitor. The power alarm detection circuit may detect one or more of a brownout (undervoltage) and a surge (overvoltage) condition. The power tee circuit 1812 may provide electrical power extracted from a network cable to provide both power and data connections for the infrastructure equipment 1800 using a single cable.

[0145] The network controller circuit 1814 may provide connectivity to the network using a standard network interface protocol such as Ethernet, Ethernet based on a GRE tunnel, Ethernet based on a multi-protocol label switching (MPLS), or some other suitable protocol. A physical connection may be used to provide a network connection to / from the infrastructure equipment 1800 via a network interface connector 1820, which may be an electrical connection (commonly referred to as a "copper interconnect"), an optical connection, or a wireless connection. The network controller circuit 1814 may include one or more dedicated processors and / or FPGAs for communicating using one or more of the aforementioned protocols. In some implementations, the network controller circuit 1814 may include multiple controllers for providing connectivity to other networks using the same or different protocols.

[0146] The positioning circuit 1816 includes circuits for receiving and decoding signals transmitted / broadcasted by a positioning network of a global navigation satellite system (GNSS). Examples of navigation satellite constellations (or GNSS) include the United States' Global Positioning System (GPS), Russia's Global Navigation System (GLONASS), the European Union's Galileo system, China's Beidou Navigation Satellite System, regional navigation systems or GNSS augmentation systems (e.g., using the Indian constellation (NAVIC), Japan's Quasi-Zenith Satellite System (QZSS), France's Doppler Orbit Chart and Satellite Integrated Radio Positioning (DORIS), etc. for navigation), etc. The positioning circuit 1816 includes various hardware elements (e.g., including hardware devices such as switches, filters, amplifiers, antenna elements, etc. for facilitating OTA communications) to communicate with components of the positioning network such as navigation satellite constellation nodes. In some embodiments, the positioning circuit 1816 may include a micro technology (micro PNT) IC for positioning, navigation, and timing that uses a master timing clock to perform position tracking / estimation without GNSS assistance. The positioning circuit 1816 may also be part of or interact with the baseband circuit 1804 and / or the radio front end module 1806 to communicate with nodes and components of the positioning network. The positioning circuit 1816 may also provide location data and / or time data to the application circuit 1802, which may use the data to synchronize operations with various infrastructures, etc. Fig.18 The components shown may communicate with each other using interface circuitry that may include any number of bus and / or interconnect (IX) technologies, such as Industry Standard Architecture (ISA), Extended ISA (EISA), Peripheral Component Interconnect (PCI), Peripheral Component Interconnect Extended (PCix), PCI express (PCie), or any number of other technologies. The bus / IX may be a proprietary bus, such as used in SoC-based systems. Other bus / IX systems may be included, such as I 2 C interface, SPI interface, point-to-point interface and power bus, etc.

[0147] Fig.19 Examples of platforms 1900 according to various embodiments are shown. In an embodiment, computer platform 1900 may be suitable for use as a UE, an application server, and / or any other element / device discussed herein. Platform 1900 may include any combination of components shown in the examples. The components of platform 1900 may be implemented as integrated circuits (ICs), parts of ICs, discrete electronic devices, or other modules, logic, hardware, software, firmware, or combinations thereof adapted in computer platform 1900, or as components otherwise incorporated within a chassis of a larger system. Fig.19The block diagram is intended to show a high-level view of the components of computer platform 1900. However, some of the components shown may be omitted, additional components may be present, and different arrangements of the components shown may occur in other implementations.

[0148] Application circuit 1902 includes circuits such as, but not limited to, one or more processors (or processor cores), cache memory, and one or more of the following: LDO, interrupt controller, serial interface (such as SPI), I 2 C or general programmable serial interface module, RTC, timer-counter (including interval timer and watchdog timer), general IO, memory card controller (such as SD MMC or similar products), USB interface, MIPI interface and JTAG test access port. The processor (or core) of the application circuit 1902 can be coupled with or can include a memory / storage element, and can be configured to execute instructions stored in the memory / storage device to enable various applications or operating systems to run on the platform 1900. In some specific implementations, the memory / storage element can be an on-chip memory circuit, which can include any suitable volatile and / or non-volatile memory, such as DRAM, SRAM, EPROM, EEPROM, flash memory, solid-state memory and / or any other type of memory device technology, such as those discussed herein.

[0149] The processor of the application circuit 1902 may include, for example, one or more processor cores, one or more application processors, one or more GPUs, one or more RISC processors, one or more ARM processors, one or more CISC processors, one or more DSPs, one or more FPGAs, one or more PLDs, one or more ASICs, one or more microprocessors or controllers, multi-threaded processors, ultra-low voltage processors, embedded processors, some other known processing elements, or any suitable combination thereof. In some embodiments, the application circuit 1902 may include or may be a dedicated processor / controller for operating according to various embodiments herein.

[0150] For example, the processor of the application circuit 1902 may include a processor based on Architecture Core TM Processors such as Quark TM 、Atom TM , i3, i5, i7 or MCU-class processors, or can be purchased from The processor of application circuit 1902 may also be one or more of the following: Advanced Micro Devices (AMD) Processor or Accelerated Processing Unit (APU); from Inc.'s AS-A9 processor, Snapdragon by Technologies, Inc. TM Processor, Texas Instruments, OpenMultimedia Applications Platform(OMAP) TM processors; MIPS-based designs from MIPS Technologies, Inc., such as the MIPS Warrior M-class, Warrior I-class, and Warrior P-class processors; ARM-based designs licensed from ARM Holdings, Ltd., such as the ARM Cortex-A, Cortex-R, and Cortex-M series processors; etc. In some implementations, the application circuit 1902 can be part of a system on a chip (SoC), in which the application circuit 1902 and other components are formed as a single integrated circuit or a single package, such as company( Edison Corporation TM or Galileo TM SoC board.

[0151] Additionally or alternatively, the application circuit 1902 may include circuits such as, but not limited to, one or more of the following: a field programmable device (FPD), such as an FPGA, etc.; a programmable logic device (PLD), such as a complex PLD (CPLD), a high capacity PLD (HCPLD), etc.; an ASIC, such as a structured ASIC, etc.; a programmable SoC (PSoC); etc. In such embodiments, the circuits of the application circuit 1902 may include logic blocks or logic structures, and other interconnected resources that can be programmed to perform various functions such as the processes, methods, functions, etc. of the various embodiments discussed herein. In such embodiments, the circuits of the application circuit 1902 may include memory cells (e.g., erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, static memory (e.g., static random access memory (SRAM), anti-fuse, etc.)) for storing logic blocks, logic structures, data, etc. in a lookup table (LUT), etc.

[0152] Baseband circuit 1904 may be implemented, for example, as a solder-in substrate including one or more integrated circuits, a single packaged integrated circuit soldered to a main circuit board, or a multi-chip module containing two or more integrated circuits.

[0153] The radio front end module 1906 may include a millimeter wave (mmWave) radio front end module (RFEM) and one or more sub-millimeter wave radio frequency integrated circuits (RFICs). In some implementations, the one or more sub-millimeter wave RFICs may be physically separated from the millimeter wave RFEM. The RFIC may include connections to one or more antennas or antenna arrays, and the RFEM may be connected to multiple antennas. In alternative implementations, both millimeter wave and sub-millimeter wave radio functions may be implemented in the same physical radio front end module 1906 that combines both millimeter wave antennas and sub-millimeter waves.

[0154] The memory circuit 1908 may include any number and type of memory devices for providing a quantitative system memory. For example, the memory circuit 1908 may include one or more of the following: volatile memory, including random access memory (RAM), dynamic RAM (DRAM) and / or synchronous dynamic RAM (SD RAM); and non-volatile memory (NVM), including high-speed electrically erasable memory (commonly referred to as flash memory), phase change random access memory (PRAM), magnetoresistive random access memory (MRAM), etc. The memory circuit 1908 may be developed according to the Joint Electron Device Engineering Council (JEDEC) based low power double data rate (LPDDR) design such as LPDDR2, LPDDR3, LPDDR4, etc. The memory circuit 1908 may be implemented as one or more of a solder-in package integrated circuit, a single die package (SDP), a dual die package (DDP), or a quad die package (Q17P), a socketed memory module, a dual in-line memory module (DIMM) including a micro DIMM or a mini DIMM, and / or soldered to a motherboard via a ball grid array (BGA). In a low-power implementation, the memory circuit 1908 may be an on-chip memory or register associated with the application circuit 1902. In order to provide persistent storage of information such as data, applications, operating systems, etc., the memory circuit 1908 may include one or more mass storage devices, which may include, among others, a solid state disk drive (SSDD), a hard disk drive (HDD), a micro HDD, a resistive change memory, a phase change memory, a holographic memory, or a chemical memory. For example, the computer platform 1900 may be combined with a computer system obtained from and Three-dimensional (3D) cross-point (XPOINT) memory.

[0155] Removable memory 1926 may include devices, circuits, housings / casings, ports or receptacles, etc., for coupling portable data storage devices to platform 1900. These portable data storage devices may be used for mass storage, and may include, for example, flash memory cards (e.g., Secure Digital (SD) cards, micro SD cards, xD picture cards, etc.), as well as USB flash drives, optical disks, external HDDs, etc.

[0156] Platform 1900 may also include interface circuitry (not shown) for connecting external devices to platform 1900. External devices connected to platform 1900 via the interface circuitry include sensors 1922 and electromechanical components (shown as EMC 1924), as well as removable memory devices coupled to removable memory 1926.

[0157] Sensors 1922 include devices, modules, or subsystems that are designed to detect events or changes in their environment and send information about the detected events (sensor data) to some other device, module, subsystem, etc. Examples of such sensors include, among others: an inertial measurement unit (IMU) including an accelerometer, a gyroscope, and / or a magnetometer; a microelectromechanical system (MEMS) or a nanoelectromechanical system (NEMS) including a three-axis accelerometer, a three-axis gyroscope, and / or a magnetometer; a level sensor; a flow sensor; a temperature sensor (e.g., a thermistor); a pressure sensor; a barometric pressure sensor; a gravity meter; an altimeter; an image capture device (e.g., a camera or a lensless aperture); a light detection and ranging (LiDAR) sensor; a proximity sensor (e.g., an infrared radiation detector, etc.), a depth sensor, an ambient light sensor, an ultrasonic transceiver; a microphone or other similar audio capture device; etc.

[0158] EMC 1924 includes devices, modules or subsystems that are intended to enable platform 1900 to change its state, position and / or orientation or to move or control mechanisms or (sub) systems. In addition, EMC 1924 may be configured to generate messages / signaling and send messages / signaling to other components of platform 1900 to indicate the current state of EMC 1924. Examples of EMC 1924 include one or more power switches, relays (including electromechanical relays (EMR) and / or solid-state relays (SSR)), actuators (e.g., valve actuators, etc.), audible sound generators, visual warning devices, motors (e.g., DC motors, stepper motors, etc.), wheels, thrusters, propellers, claws, clamps, hooks and / or other similar electromechanical components. In an embodiment, platform 1900 is configured to operate one or more EMC 1924 based on one or more capture events and / or instructions or control signals received from service providers and / or various clients. In some specific implementations, the interface circuit may connect platform 1900 to positioning circuit 1916. The positioning circuit 1916 includes a circuit for receiving and decoding signals transmitted / broadcasted by a positioning network of a GNSS. Examples of navigation satellite constellations (or GNSS) may include the United States' GPS, Russia's GLONASS, the European Union's Galileo system, China's Beidou navigation satellite system, regional navigation systems or GNSS augmentation systems (e.g., NAVIC, Japan's QZSS, France's DORIS, etc.), etc. The positioning circuit 1916 includes various hardware elements (e.g., including hardware devices such as switches, filters, amplifiers, antenna elements, etc. for facilitating OTA communications) to communicate with components of the positioning network such as navigation satellite constellation nodes. In some embodiments, the positioning circuit 1916 may include a micro PNT IC that uses a master timing clock to perform position tracking / estimation without GNSS assistance. The positioning circuit 1916 may also be part of or interact with the baseband circuit 1904 and / or the radio front-end module 1906 to communicate with nodes and components of the positioning network. Positioning circuitry 1916 may also provide position data and / or time data to application circuitry 1902 , which may use the data to synchronize operations with various infrastructure (eg, radio base stations) for use in turn-by-turn navigation applications, and the like.

[0159] In some implementations, the interface circuit may connect the platform 1900 to a near field communication circuit (shown as NFC circuit 1912). The NFC circuit 1912 is configured to provide contactless short-range communication based on the radio frequency identification (RFID) standard, where magnetic field induction is used to enable communication between the NFC circuit 1912 and an NFC-enabled device (e.g., an "NFC touch point") external to the platform 1900. The NFC circuit 1912 includes an NFC controller coupled to an antenna element and a processor coupled to the NFC controller. The NFC controller may be a chip / IC that provides NFC functionality to the NFC circuit 1912 by executing NFC controller firmware and an NFC stack. The NFC stack may be executed by the processor to control the NFC controller, and the NFC controller firmware may be executed by the NFC controller to control the antenna element to transmit a short-range RF signal. The RF signal may power a passive NFC tag (e.g., a microchip embedded in a sticker or wristband) to transfer stored data to the NFC circuit 1912, or initiate data transfer between the NFC circuit 1912 and another active NFC device (e.g., a smart phone or an NFC-enabled POS terminal) near the platform 1900.

[0160] The driver circuit 1918 may include software and hardware elements for controlling specific devices embedded in, attached to, or otherwise communicatively coupled to the platform 1900. The driver circuit 1918 may include various drivers to allow other components of the platform 1900 to interact with or control various input / output (I / O) devices that may be present in or connected to the platform 1900. For example, the driver circuit 1918 may include: a display driver for controlling and allowing access to a display device, a touch screen driver for controlling and allowing access to a touch screen interface of the platform 1900, a sensor driver for obtaining sensor readings of a sensor 1922 and controlling and allowing access to the sensor 1922, an EMC driver for obtaining an actuator position of an EMC 1924 and / or controlling and allowing access to the EMC 1924, a camera driver for controlling and allowing access to an embedded image capture device, and an audio driver for controlling and allowing access to one or more audio devices.

[0161] A power management integrated circuit (illustrated as PMIC 1910 (also referred to as a “power management circuit”) may manage power provided to various components of the platform 1900. Specifically, with respect to the baseband circuit 1904, the PMIC 1910 may control power source selection, voltage scaling, battery charging, or DC-DC conversion. The PMIC 1910 may typically be included when the platform 1900 is capable of being powered by a battery 1914, such as when the device is included in a UE.

[0162] In some embodiments, the PMIC 1910 may control or otherwise be part of various power saving mechanisms of the platform 1900. For example, if the platform 1900 is in the RRC_Connected state, in which the platform is still connected to the RAN node because it expects to receive traffic soon, then after a period of inactivity, the platform may enter a state known as discontinuous reception mode (DRX). During this state, the platform 1900 may be powered off for short time intervals, thereby saving power. If there is no data traffic activity for an extended period of time, the platform 1900 may transition to the RRC_Idle state, in which the device is disconnected from the network and no operations such as channel quality feedback, handover, etc. are performed. The platform 1900 enters a very low power state and performs paging, in which the device wakes up periodically again to listen to the network and then powers off again. The platform 1900 may not receive data in this state; in order to receive data, the platform must transition back to the RRC_Connected state. Additional power saving modes may prevent the device from using the network for longer than the paging interval (ranging from a few seconds to a few hours). During this time, the device is completely unable to connect to the network and can be completely powered off. Any data sent during this time will be significantly delayed, and it is assumed that the delay is acceptable.

[0163] The battery 1914 can provide power to the platform 1900, but in some examples, the platform 1900 can be installed and deployed in a fixed location and can have a power source coupled to the power grid. The battery 1914 can be a lithium-ion battery, a metal-air battery such as a zinc-air battery, an aluminum-air battery, a lithium-air battery, etc. In some specific implementations, such as in V2X applications, the battery 1914 can be a typical lead-acid car battery.

[0164] In some implementations, the battery 1914 may be a "smart battery" that includes or is coupled to a battery management system (BMS) or a battery monitoring integrated circuit. The BMS may be included in the platform 1900 to track the state of charge (SoCh) of the battery 1914. The BMS may be used to monitor other parameters of the battery 1914, such as the state of health (SoH) and state of function (SoF) of the battery 1914 to provide fault prediction. The BMS may transmit information about the battery 1914 to the application circuit 1902 or other components of the platform 1900. The BMS may also include an analog-to-digital (ADC) converter that allows the application circuit 1902 to directly monitor the voltage of the battery 1914 or the current from the battery 1914. The battery parameters may be used to determine actions that the platform 1900 may perform, such as transmission frequency, network operation, sensing frequency, etc.

[0165] A power block or other power source coupled to the grid can be coupled to the BMS to charge the battery 1914. In some examples, the power block can be replaced with a wireless power receiver to obtain power wirelessly, for example, through a loop antenna in the computer platform 1900. In these examples, a wireless battery charging circuit can be included in the BMS. The specific charging circuit selected can depend on the size of the battery 1914 and therefore the current required. Charging can be performed using the aviation fuel standard published by the Aviation Fuel Alliance, the Qi wireless charging standard published by the Wireless Power Alliance, or the Rezence charging standard published by the Wireless Power Alliance.

[0166] The user interface circuit 1920 includes various input / output (I / O) devices present in or connected to the platform 1900, and includes one or more user interfaces designed to implement user interaction with the platform 1900 and / or a peripheral component interface designed to implement interaction with the peripheral components of the platform 1900. The user interface circuit 1920 includes input device circuits and output device circuits. The input device circuit includes any physical or virtual means for accepting input, including, in particular, one or more physical or virtual buttons (e.g., a reset button), a physical keyboard, a keypad, a mouse, a touchpad, a touch screen, a microphone, a scanner, a headset, etc. The output device circuit includes any physical or virtual means for displaying information or otherwise conveying information (such as sensor readings, actuator positions, or other similar information). The output device circuitry may include any number and / or combination of audio or visual displays, including, in particular, one or more simple visual outputs / indicators such as binary status indicators (e.g., light emitting diodes (LEDs)) and multi-character visual outputs, or more complex outputs such as a display device or touch screen (e.g., a liquid crystal display (LCD), an LED display, a quantum dot display, a projector, etc.), where the output of characters, graphics, multimedia objects, etc. is generated or produced by the operation of the platform 1900. The output device circuitry may also include a speaker or other audio emitting device, a printer, etc. In some embodiments, the sensor 1922 may be used as an input device circuit (e.g., an image capture device, a motion capture device, etc.) and one or more EMCs may be used as an output device circuit (e.g., an actuator for providing tactile feedback, etc.). In another example, an NFC circuit may be included to read an electronic tag and / or connect to another NFC-enabled device, the NFC circuit including an NFC controller and a processing device coupled to an antenna element. The peripheral component interface may include, but is not limited to, a non-volatile memory port, a USB port, an audio jack, a power interface, etc.

[0167] Although not shown, the components of platform 1900 may communicate with each other using a suitable bus or interconnect (IX) technology, which may include any number of technologies, including ISA, EISA, PCI, PCix, PCie, a time-triggered protocol (TTP) system, a FlexRay system, or any number of other technologies. The bus / IX may be a proprietary bus / IX, such as used in SoC-based systems. Other bus / IX systems, such as I 2 C interface, SPI interface, point-to-point interface and power bus, etc.

[0168] Fig. 20 Exemplary components of the device 2000 according to some embodiments are shown. In some embodiments, the device 2000 may include at least an application circuit 2006, a baseband circuit 2004, a radio frequency (RF) circuit (shown as RF circuit 2002), a front-end module (FEM) circuit (shown as FEM circuit 2032), one or more antennas 2030, and a power management circuit (PMC) (shown as PMC 2034) coupled together as shown in the figure. The components of the illustrated device 2000 may be included in a UE or a RAN node. In some embodiments, the device 2000 may include fewer elements (for example, the RAN node may not utilize the application circuit 2006, but include a processor / controller to process IP data received from the EPC). In some embodiments, the device 2000 may include additional elements, such as a memory / storage device, a display, a camera, a sensor, or an input / output (I / O) interface. In other embodiments, the following components may be included in more than one device (for example, the circuit may be separately included in more than one device for a specific implementation of a cloud-RAN (C-RAN)).

[0169] The application circuit 2006 may include one or more application processors. For example, the application circuit 2006 may include circuits such as, but not limited to, one or more single-core or multi-core processors. The one or more processors may include any combination of general-purpose processors and special-purpose processors (e.g., graphics processors, application processors, etc.). These processors may be coupled to or may include memory / storage devices, and may be configured to execute instructions stored in the memory / storage devices to enable various applications or operating systems to run on the device 2000. In some embodiments, the processor of the application circuit 2006 may process IP data packets received from the EPC.

[0170] The baseband circuit 2004 may include circuits such as, but not limited to, one or more single-core or multi-core processors. The baseband circuit 2004 may include one or more baseband processors or control logic components to process baseband signals received from the receive signal path of the RF circuit 2002 and generate baseband signals for the transmit signal path of the RF circuit 2002. The baseband circuit 2004 may interact with the application circuit 2006 to generate and process baseband signals and control the operation of the RF circuit 2002. For example, in some embodiments, the baseband circuit 2004 may include a third generation (3G) baseband processor (3G baseband processor 2008), a fourth generation (4G) baseband processor (4G baseband processor 2010), a fifth generation (5G) baseband processor (5G baseband processor 2012), or other baseband processors 2014 of other existing generations, generations under development, or generations to be developed in the future (e.g., second generation (2G), sixth generation (6G), etc.). The baseband circuit 2004 (e.g., one or more baseband processors in the baseband processor) can handle various radio control functions that can communicate with one or more radio networks via the RF circuit 2002. In other embodiments, some or all of the functions of the illustrated baseband processor may be included in a module stored in the memory 2020 and executed via the central processing unit (CPU 2016). The radio control functions may include, but are not limited to, signal modulation / demodulation, encoding / decoding, radio frequency shifting, etc. In some embodiments, the modulation / demodulation circuit of the baseband circuit 2004 may include a fast Fourier transform (FFT), precoding, or constellation mapping / demapping function. In some embodiments, the encoding / decoding circuit of the baseband circuit 2004 may include convolution, tail-biting convolution, turbo, Viterbi, or low-density parity check (LDPC) encoder / decoder functions. The implementation of the modulation / demodulation and encoder / decoder functions is not limited to these examples, and may include other suitable functions in other embodiments.

[0171] In some embodiments, the baseband circuit 2004 may include a digital signal processor (DSP), such as one or more audio DSPs 2018. The audio DSP 2018 may include elements for compression / decompression and echo cancellation, and may include other suitable processing elements in other embodiments. In some embodiments, the components of the baseband circuit may be appropriately combined in a single chip, a single chipset, or disposed on the same circuit board. In some embodiments, some or all of the components of the baseband circuit 2004 and the application circuit 2006 may be implemented together, such as on a system on a chip (SOC).

[0172] In some embodiments, the baseband circuit 2004 may provide communications compatible with one or more radio technologies. For example, in some embodiments, the baseband circuit 2004 may support communications with an Evolved Universal Terrestrial Radio Access Network (EUTRAN) or other wireless metropolitan area network (WMAN), wireless local area network (WLAN), or wireless personal area network (WPAN). Embodiments in which the baseband circuit 2004 is configured to support radio communications of more than one wireless protocol may be referred to as multi-mode baseband circuits.

[0173] The RF circuit 2002 may enable communication with a wireless network through a non-solid medium using modulated electromagnetic radiation. In various embodiments, the RF circuit 2002 may include switches, filters, amplifiers, etc. to facilitate communication with the wireless network. The RF circuit 2002 may include a receive signal path, which may include circuits for down-converting RF signals received from the FEM circuit 2032 and providing baseband signals to the baseband circuit 2004. The RF circuit 2002 may also include a transmit signal path, which may include circuits for up-converting baseband signals provided by the baseband circuit 2004 and providing an RF output signal for transmission to the FEM circuit 2032.

[0174] In some embodiments, the receive signal path of the RF circuit 2002 may include a mixer circuit 2022, an amplifier circuit 2024, and a filter circuit 2026. In some embodiments, the transmit signal path of the RF circuit 2002 may include a filter circuit 2026 and the mixer circuit 2022. The RF circuit 2002 may also include a synthesizer circuit 2028 for synthesizing frequencies used by the mixer circuits 2022 of the receive signal path and the transmit signal path. In some embodiments, the mixer circuit 2022 of the receive signal path may be configured to down-convert the RF signal received from the FEM circuit 2032 based on the synthesized frequency provided by the synthesizer circuit 2028. The amplifier circuit 2024 may be configured to amplify the down-converted signal, and the filter circuit 2026 may be a low pass filter (LPF) or a band pass filter (BPF) configured to remove unwanted signals from the down-converted signal to generate an output baseband signal. The output baseband signal may be provided to the baseband circuit 2004 for further processing. In some embodiments, the output baseband signal may be a zero frequency baseband signal, although this is not required.In some embodiments, mixer circuit 2022 of the receive signal path may include a passive mixer, although the scope of the embodiments is not limited in this respect.

[0175] In some embodiments, mixer circuit 2022 of the transmit signal path may be configured to up-convert an input baseband signal based on a synthesized frequency provided by synthesizer circuit 2028 to generate an RF output signal for FEM circuit 2032. The baseband signal may be provided by baseband circuit 2004 and may be filtered by filter circuit 2026.

[0176] In some embodiments, the mixer circuit 2022 of the receive signal path and the mixer circuit 2022 of the transmit signal path may include two or more mixers and may be arranged for quadrature down-conversion and up-conversion, respectively. In some embodiments, the mixer circuit 2022 of the receive signal path and the mixer circuit 2022 of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., Hartley image rejection). In some embodiments, the mixer circuit 2022 of the receive signal path and the mixer circuit 2022 may be arranged for direct down-conversion and direct up-conversion, respectively. In some embodiments, the mixer circuit 2022 of the receive signal path and the mixer circuit 2022 of the transmit signal path may be configured for superheterodyne operation.

[0177] In some embodiments, the output baseband signal and the input baseband signal may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternative embodiments, the output baseband signal and the input baseband signal may be digital baseband signals. In these alternative embodiments, RF circuit 2002 may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuits, and baseband circuit 2004 may include a digital baseband interface to communicate with RF circuit 2002.

[0178] In some dual-mode embodiments, separate radio IC circuits may be provided to process signals for each spectrum, although the scope of the embodiments is not limited in this respect.

[0179] In some embodiments, synthesizer circuit 2028 may be a fractional-N synthesizer or a fractional-N / N+1 synthesizer, but the scope of the embodiments is not limited in this regard, as other types of frequency synthesizers may also be suitable. For example, synthesizer circuit 2028 may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer including a phase-locked loop with a frequency divider.

[0180] The synthesizer circuit 2028 can be configured to synthesize an output frequency based on the frequency input and the divider control input for use by the mixer circuit 2022 of the RF circuit 2002. In some embodiments, the synthesizer circuit 2028 can be a fractional-N / N+1 synthesizer.

[0181] In some embodiments, the frequency input may be provided by a voltage controlled oscillator (VCO), although this is not required. The divider control input may be provided by baseband circuitry 2004 or application circuitry 2006 (such as an application processor) according to the desired output frequency. In some embodiments, the divider control input (e.g., N) may be determined from a lookup table based on the channel indicated by application circuitry 2006.

[0182] The synthesizer circuit 2028 of the RF circuit 2002 may include a frequency divider, a delay locked loop (DLL), a multiplexer, and a phase accumulator. In some embodiments, the frequency divider may be a dual-mode frequency divider (DMD), and the phase accumulator may be a digital phase accumulator (DPA). In some embodiments, the DMD may be configured to divide the input signal by N or N+1 (e.g., based on a carry) to provide a fractional division ratio. In some example embodiments, the DLL may include a cascaded, tunable, delay element, a phase detector, a charge pump, and a set of D-type flip-flops. In these embodiments, the delay element may be configured to divide the VCO cycle into Nd equal phase groups, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.

[0183] In some embodiments, the synthesizer circuit 2028 can be configured to generate a carrier frequency as an output frequency, while in other embodiments, the output frequency can be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used with a quadrature generator and divider circuit to generate multiple signals with multiple different phases relative to each other at the carrier frequency. In some embodiments, the output frequency can be the LO frequency (fLO). In some embodiments, the RF circuit 2002 can include an IQ / polarity converter.

[0184] The FEM circuitry 2032 may include a receive signal path that may include circuitry configured to operate on RF signals received from the one or more antennas 2030, amplify the receive signal, and provide an amplified version of the receive signal to the RF circuitry 2002 for further processing. The FEM circuitry 2032 may also include a transmit signal path that may include circuitry configured to amplify transmit signals provided by the RF circuitry 2002 for transmission by one or more of the one or more antennas 2030. In various embodiments, amplification by the transmit or receive signal path may be accomplished only in the RF circuitry 2002, only in the FEM circuitry 2032, or in both the RF circuitry 2002 and the FEM circuitry 2032.

[0185] In some embodiments, the FEM circuit 2032 may include a TX / RX switch to switch between transmit mode and receive mode operation. The FEM circuit 2032 may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuit 2032 may include an LNA to amplify the received RF signal and provide the amplified received RF signal as an output (e.g., provided to the RF circuit 2002). The transmit signal path of the FEM circuit 2032 may include a power amplifier (PA) to amplify the input RF signal (e.g., provided by the RF circuit 2002), and one or more filters to generate an RF signal for subsequent transmission (e.g., through one or more of the one or more antennas 2030).

[0186] In some embodiments, the PMC 2034 can manage the power provided to the baseband circuit 2004. In particular, the PMC 2034 can control power selection, voltage scaling, battery charging, or DC-DC conversion. When the device 2000 is capable of being powered by a battery, for example, when the device 2000 is included in a UE, the PMC 2034 can generally be included. The PMC 2034 can improve power conversion efficiency while providing a desired specific implementation size and heat dissipation characteristics.

[0187] Fig. 20 PMC 2034 is shown coupled only to baseband circuit 2004. However, in other embodiments, PMC 2034 may additionally or alternatively be coupled to other components (such as, but not limited to, application circuit 2006, RF circuit 2002, or FEM circuit 2032) and perform similar power management operations for these components.

[0188] In some embodiments, the PMC 2034 may control or otherwise be a part of various power saving mechanisms of the device 2000. For example, if the device 2000 is in the RRC_Connected state, where the device is still connected to the RAN node because it expects to receive traffic immediately, then after a period of inactivity, the device may enter a state known as discontinuous reception mode (DRX). During this state, the device 2000 may be powered off for short time intervals, thereby saving power.

[0189] If there is no data traffic activity for an extended period of time, the device 2000 may transition to the RRC_Idle state, in which the device is disconnected from the network and does not perform operations such as channel quality feedback, handover, etc. The device 2000 enters a very low power state and performs paging, in which the device periodically wakes up again to listen to the network and then powers down again. The device 2000 cannot receive data in this state, and in order to receive data, the device must transition back to the RRC_Connected state.

[0190] An additional power saving mode can keep a device from using the network for longer than the paging interval (which can range from a few seconds to several hours). During this time, the device is completely unable to connect to the network and can be completely powered down. Any data sent during this time will be significantly delayed, and it is assumed that the delay is acceptable.

[0191] The processor of the application circuit 2006 and the processor of the baseband circuit 2004 can be used to execute elements of one or more instances of the protocol stack. For example, the processor of the baseband circuit 2004 can be used alone or in combination to perform layer 3, layer 2, or layer 1 functions, while the processor of the application circuit 2006 can utilize data received from these layers (e.g., packet data) and further perform layer 4 functions (e.g., transport communication protocol (TCP) and user datagram protocol (UDP) layers). As mentioned herein, layer 3 may include a radio resource control (RRC) layer, which will be described in further detail below. As mentioned herein, layer 2 may include a medium access control (MAC) layer, a radio link control (RLC) layer, and a packet data convergence protocol (PDCP) layer, which will be described in further detail below. As mentioned herein, layer 1 may include a physical (PHY) layer of a UE / RAN node, which will be described in further detail below.

[0192] Fig.21 An exemplary interface 2100 of a baseband circuit according to some embodiments is shown. As discussed above, Fig. 20 The baseband circuit 2004 may include a 3G baseband processor 2008, a 4G baseband processor 2010, a 5G baseband processor 2012, other baseband processors 2014, a CPU 2016, and a memory 2020 used by the processors. As shown in the figure, each processor may include a corresponding memory interface 2102 for sending / receiving data to / from the memory 2020.

[0193] The baseband circuit 2004 may also include: one or more interfaces for communicatively coupling to other circuits / devices, such as a memory interface 2104 (e.g., an interface for sending / receiving data to / from a memory external to the baseband circuit 2004); an application circuit interface 2106 (e.g., an interface for sending / receiving data to / from a memory external to the baseband circuit 2004); Fig. 20 RF circuit interface 2108 (for example, for sending / receiving data to / from the application circuit 2006); Fig. 20 an interface for sending / receiving data to / from a RF circuit 2002); a wireless hardware connection interface 2110 (e.g., for sending / receiving data to / from a near field communication (NFC) component, Components (e.g. LowEnergy), components and other communication components to send / receive data); and a power management interface 2112 (for example, an interface for sending / receiving power or control signals to / from PMC 2034).

[0194] Fig. 22 2200 is a block diagram illustrating a component capable of reading instructions from a machine-readable or computer-readable medium (e.g., a non-transitory machine-readable storage medium) and capable of performing any one or more of the methods discussed herein, according to some exemplary embodiments. Specifically, Fig. 22 A schematic diagram of hardware resources 2202 is shown, which includes one or more processors 2206 (or processor cores), one or more memory / storage devices 2214, and one or more communication resources 2224, each of which can be communicatively coupled via a bus 2216. For embodiments in which node virtualization (e.g., NFV) is utilized, a hypervisor 2222 can be executed to provide an execution environment for one or more network slices / sub-slices to utilize the hardware resources 2202.

[0195] Processor 2206 (e.g., a central processing unit (CPU), a reduced instruction set computing (RISC) processor, a complex instruction set computing (CISC) processor, a graphics processing unit (GPU), a digital signal processor (DSP) (such as a baseband processor), an application specific integrated circuit (ASIC), a radio frequency integrated circuit (RFIC), another processor, or any suitable combination thereof) may include, for example, processor 2208 and processor 2210.

[0196] The memory / storage device 2214 may include main memory, disk storage, or any suitable combination thereof. The memory / storage device 2214 may include, but is not limited to, any type of volatile or non-volatile memory, such as dynamic random access memory (DRAM), static random access memory (SRAM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, solid-state storage, etc.

[0197] The communication resources 2224 may include interconnect or network interface components or other suitable devices to communicate with one or more peripheral devices 2204 or one or more databases 2220 via the network 2218. For example, the communication resources 2224 may include wired communication components (e.g., for coupling via a universal serial bus (USB)), cellular communication components, NFC components, Parts (such as Low power consumption), components and other communication components.

[0198] The instructions 2212 may include software, programs, applications, applets, applications, or other executable code for causing at least any one of the processors 2206 to perform any one or more of the methods discussed herein. The instructions 2212 may reside completely or partially in at least one of the processors 2206 (e.g., within a cache memory of the processor), the memory / storage device 2214, or any suitable combination thereof. In addition, any portion of the instructions 2212 may be transmitted to the hardware resources 2202 from any combination of the peripheral device 2204 or the database 2220. Therefore, the memory of the processor 2206, the memory / storage device 2214, the peripheral device 2204, and the database 2220 are examples of computer-readable and machine-readable media.

[0199] For one or more embodiments, at least one of the components shown in one or more of the foregoing figures may be configured to perform one or more operations, techniques, processes and / or methods described in the following examples section. For example, the baseband circuit described above in conjunction with one or more of the foregoing figures may be configured to operate according to one or more of the following examples. For another example, the circuits associated with the UE, base station, network element, etc. described above in conjunction with one or more of the foregoing figures may be configured to operate according to one or more of the examples shown in the examples section below.

[0200] Examples

[0201] The following examples relate to additional embodiments.

[0202] Embodiment 1C may include an apparatus comprising means for performing one or more elements of a method described in or related to any of the above embodiments or any other method or process described herein.

[0203] Embodiment 2C may include one or more non-transitory computer-readable media, which include instructions that, when executed by one or more processors of an electronic device, cause the electronic device to perform one or more elements of a method described in or related to any of the above embodiments or any other method or process described herein.

[0204] Embodiment 3C may include a device comprising logic components, modules, or circuits for performing one or more elements of the methods described in or related to any of the above embodiments or any other methods or processes described herein.

[0205] Embodiment 4C may include any of the methods, techniques or processes or parts or components thereof described in or related to any of the above embodiments.

[0206] Embodiment 5C may include a device comprising: one or more processors and one or more computer-readable media, wherein the one or more computer-readable media include instructions that, when executed by the one or more processors, cause the one or more processors to perform a method, technique, process, or portion thereof described in or related to any one of the above embodiments.

[0207] Embodiment 6C may include a signal or a portion or component thereof as described in or related to any of the above embodiments.

[0208] Embodiment 7C may include a datagram, packet, frame, segment, protocol data unit (PDU) or message or a portion or component thereof described in or related to any of the above embodiments, or content otherwise described in the present disclosure.

[0209] Embodiment 8C may include a signal encoded with data or a portion or component thereof as described in any of the above embodiments or related thereto, or as otherwise described in this disclosure.

[0210] Embodiment 9C may include a signal or a portion or component thereof encoded with a datagram, packet, frame, segment, PDU or message as described in or related to any of the above embodiments, or described in other ways in the present disclosure.

[0211] Embodiment 10C may include an electromagnetic signal carrying computer-readable instructions, wherein execution of the computer-readable instructions by one or more processors will cause the one or more processors to perform a method, technique, or process, or a portion thereof, described in or related to any of the above embodiments.

[0212] Embodiment 11C may include a computer program comprising instructions, wherein execution of the program by a processing element causes the processing element to perform a method, technique, or process, or a portion thereof, described in or related to any one of the above embodiments.

[0213] Embodiment 12C may include signals in a wireless network as shown and described herein.

[0214] Embodiment 13C may include a method of communicating in a wireless network as shown and described herein.

[0215] Embodiment 14C may include a system for providing wireless communications as shown and described herein.

[0216] Embodiment 15C may include an apparatus for providing wireless communications as shown and described herein.

[0217] Unless explicitly stated otherwise, any of the above embodiments may be combined with any other embodiment (or combination of embodiments). The foregoing description of one or more specific implementations provides illustration and description, but is not intended to be exhaustive or to limit the scope of the embodiments to the precise form disclosed. Modifications and variations are possible in view of the above teachings or may be obtained from the practice of the various embodiments.

[0218] Embodiments and implementations of the systems and methods described herein may include various operations that may be embodied in machine executable instructions to be executed by a computer system. A computer system may include one or more general or special purpose computers (or other electronic devices). A computer system may include hardware components that include specific logic components for performing operations, or may include a combination of hardware, software, and / or firmware.

[0219] It should be appreciated that the systems described herein include descriptions of specific embodiments. These embodiments may be combined into a single system, partially incorporated into other systems, separated into multiple systems, or otherwise divided or combined. In addition, it is contemplated that parameters, attributes, aspects, etc. of one embodiment may be used in another embodiment. For clarity, these parameters, attributes, aspects, etc. are described only in one or more embodiments, and it should be appreciated that unless otherwise stated herein, these parameters, attributes, aspects, etc. may be combined with or substituted for parameters, attributes, aspects, etc. of another embodiment.

[0220] It is understood that the use of personally identifiable information should be subject to privacy policies and practices that are generally recognized to meet or exceed industry or government requirements for maintaining user privacy. Specifically, personally identifiable information data should be managed and processed to minimize the risk of unintentional or unauthorized access or use, and the nature of the authorized use should be clearly stated to users.

[0221] Although the foregoing has been described in considerable detail for the sake of clarity, it will be apparent that certain changes and modifications may be made without departing from the principles of the invention. It should be noted that there are many alternative ways to implement both the processes and the apparatus described herein. Therefore, the embodiments of the present invention are to be regarded as illustrative rather than restrictive, and the specification is not limited to the details given herein, but may be modified within the scope and equivalents of the appended claims.

Claims

1. A method for a UE, the method comprising: Receiving a scheduling downlink control information (DCI) message, wherein the DCI message includes a skip indication; determining a time at which a skip is applied for physical downlink control channel (PDCCH) monitoring as a result of the skip indication; as well as The skipping is applied for the PDCCH for a preconfigured number of time slots at the determined time, wherein the skipping is cancelled based on a negative acknowledgement (NACK) message for downlink communications, wherein the skipping is cancelled when the NACK message is transmitted by the UE. The method of claim 1 , wherein the skipping is applied after receiving and processing the scheduling DCI.

3. The method according to claim 1, wherein for the downlink communication, the skipping is applied based on an acknowledgement ACK message, Wherein when transmitting the ACK message, the skipping is applied after the ACK.

4. The method according to claim 1, wherein for the downlink communication, the skipping is applied based on an acknowledgement ACK message, Wherein when transmitting the ACK message, the skipping is applied after the ACK. The method of claim 1 , wherein for the downlink communication, the skipping is applied when DRX-retransmissionTimerDL expires. The method of claim 1 , wherein for uplink communication, the skipping is applied when drx-HARQRTTTimerUL expires.

7. The method of claim 1, wherein for uplink communication, the skipping is applied immediately after the end of PSUCH transmission.

8. The method of claim 1, further comprising monitoring a drx-retransmissionTimerUL, and wherein the skipping is applied after expiration of the drx-retransmissionTimerUL.

9. The method according to claim 1, further comprising: wakes up after skipping a preconfigured number of time slots; Monitoring the PDCCH for a period of time; as well as If no scheduling DCI is received, another preconfigured number of time slots are skipped.

10. The method of claim 1, further comprising receiving a non-scheduled DCI, the non-scheduled DCI comprising a skip indication field, the skip indication field indicating whether the UE will apply PDCCH monitoring skipping for another preconfigured number of time slots.

11. A baseband processor of a user equipment UE, comprising: A circuit configured to perform the method according to any one of claims 1 to 10.

12. A non-transitory computer-readable storage medium comprising instructions, which, when executed by one or more processors of a user equipment (UE), cause the UE to perform the method according to any one of claims 1 to 10.

13. A computer program product comprising instructions which, when executed by a processor, cause the processor to perform the method according to any one of claims 1 to 10.