Circuit board structure with low cost and high heat dissipation and preparation method thereof

Abstract

The invention discloses a low-cost high-heat-dissipation circuit board structure which comprises a copper-clad ceramic substrate, a sintering layer, a chip, a first metal layer, a prepreg and a second metal layer which are sequentially compounded, the sintering layer is located between the copper-clad ceramic substrate and the chip, and a conductive via hole is formed between the first metal layer and the second metal layer. The copper-clad ceramic substrate comprises a ceramic substrate, a first copper layer and a second copper layer, wherein the first copper layer and the second copper layer respectively cover two surfaces of the ceramic substrate. According to the circuit board structure, the parasitic inductance value of the circuit is reduced, the power loss is reduced, the heat dissipation effect is enhanced, meanwhile, the gap filling process between the copper base and the chip is avoided, and the production cost is greatly reduced.

Description

Technical Field

[0001] The invention belongs to the technical field of printed circuit boards, and in particular relates to a circuit board structure with low cost and high heat dissipation and a preparation method thereof. Background Art

[0002] Printed Circuit Board (PCB) is an important electronic component that supports electronic components and is a carrier of electrical connections. With the development of technology, PCB has developed from single-layer to double-sided, constantly pursuing high precision, high density and high reliability, while also continuously reducing size, reducing costs and improving performance. PCB is widely used in various industries, such as new energy vehicles, power equipment, etc. In these fields, PCB is required to have high heat dissipation performance to solve the increasingly severe safety problems, and at the same time, it should be minimized to meet the requirements of equipment miniaturization and reduce production costs.

[0003] In order to improve the heat dissipation performance of PCB, many attempts have been made and different solutions have been proposed. For example, directly burying copper blocks in PCB and using high thermal conductivity materials are effective ways to solve the heat dissipation problem.

[0004] However, when the circuit passes a large current and generates high power heat, thicker copper blocks, cores (intermediate core boards) and more vias will result in higher costs, and it is difficult to ensure the consistency of board thickness after the copper blocks are pressed together. Traditional chips use bonding wires to connect to the circuit, which has large parasitic inductance, power loss, and affects heat dissipation. In addition, the PP (Prepreg, semi-solid sheet) material that meets the high thermal conductivity requirements has poor reliability, affecting the overall performance of the PCB.

[0005] For example, Chinese patent application CN103069936A discloses a printed circuit board with an insulating micro-heat sink, which includes a printed circuit board substrate, the printed circuit board substrate includes multiple layers of copper-clad wire insulation layers and multiple layers of solidified insulation layers that are cross-stacked in sequence, the printed circuit board with the insulating micro-heat sink also includes a columnar micro-heat sink, which is embedded in a columnar through hole that runs through the printed circuit board substrate, the height of the insulating micro-heat sink is the same as the thickness of the printed circuit board substrate, and the upper and lower bottom surfaces are both covered with a copper layer, one of which is provided with a heating element, and the other bottom surface is insulated from the copper layer circuit. Although the printed circuit board has good heat dissipation performance, its structure is relatively complex, and the board thickness is large, the parasitic inductance is large, the production is difficult, and the economic benefits are low. Chinese patent CN206251427U discloses a printed circuit board, which includes several plate layers pressed together, and a PP resin sheet is arranged between each two plate layers. The PP resin sheet is provided with a heat dissipation groove corresponding to the adjacent plate layers where heat dissipation is required, and the heat dissipation groove extends to the edge of the printed circuit board nearby and forms a window at the edge of the printed circuit board to communicate with the outside world; the heat dissipation grooves on the same PP resin sheet are interconnected; and windows are opened on at least two opposite sides of the printed circuit board. The heat dissipation performance of the circuit board is limited. Chinese patent CN219811489U discloses a chip heat dissipation structure on a PCB circuit board, which includes a heat sink arranged on the reverse side of the PCB circuit board, the chip is mounted on the front side of the PCB circuit board, the PCB circuit board is provided with a plurality of heat dissipation holes corresponding to the chip mounting area, and the heat sink is provided with a plurality of heat conducting columns corresponding to the heat dissipation holes, and the heat conducting columns penetrate the heat dissipation holes on the PCB circuit board from the bottom of the reverse side, and abut against the chip package shell of the chip, so as to conduct the heat of the chip package shell to the heat sink. The structure of the PCB circuit board is relatively complex, and a large number of heat dissipation holes and heat conducting columns need to be generated, and the production cost is high. Summary of the invention

[0006] The purpose of the present invention is to provide a circuit board structure with high heat dissipation performance, small parasitic inductance, small power loss, simple structure, simplified production process and low production cost in view of the above technical problems to be solved.

[0007] Another object of the present invention is to provide a method for preparing the above circuit board structure.

[0008] In order to achieve the above invention object, the present invention provides the following technical solutions:

[0009] A low-cost, high-heat dissipation circuit board structure comprises a copper-clad ceramic substrate, a sintered layer, a chip, a first metal layer, a prepreg, and a second metal layer which are composited in sequence, the sintered layer is located between the copper-clad ceramic substrate and the chip, and a conductive via is provided between the first metal layer and the second metal layer. The copper-clad ceramic substrate comprises a ceramic substrate and a first copper layer and a second copper layer respectively covering two surfaces of the ceramic substrate.

[0010] More preferably, the first copper layer is close to the sintering layer, and the second copper layer is far from the sintering layer.

[0011] Preferably, a conductive via is provided between the first copper layer and the second metal layer.

[0012] Preferably, the ceramic substrate may be a nitride ceramic substrate, wherein the nitride includes but is not limited to one or more of aluminum nitride (AlN), silicon nitride (Si3N4), and boron nitride (BN).

[0013] Preferably, the sintered layer is formed by sintering nano silver paste.

[0014] Preferably, the chip gate is connected to the sintering layer, and the chip source is connected to the first metal layer.

[0015] On the other hand, the present invention also provides a method for preparing the low-cost and high-heat dissipation circuit board, which comprises the following steps:

[0016] S1. Etching a circuit in the first copper layer of a copper-clad ceramic substrate;

[0017] S2. Sintering the chip on the first copper layer to form a sintered layer, and then plating a first metal layer on the chip;

[0018] S3. The prepreg is grooved, the position and size of the groove formed correspond to the position and size of the chip, and the grooved prepreg is pressed on the copper-clad ceramic substrate with the sintered chip;

[0019] S4. Press a second metal layer on the prepreg, drill holes to form conductive vias, and then etch circuits on the second metal layer.

[0020] Preferably, in step S2, the chip gate is sintered on the first copper layer to form a sintered layer, and then the first metal layer is plated on the chip source.

[0021] Compared with the prior art, the circuit board structure of the present invention eliminates the embedded copper seat and the PP material with high thermal conductivity, and eliminates a large number of heat dissipation holes in the lower layer of the copper seat, thereby reducing the parasitic inductance of the circuit, reducing power loss, and enhancing the heat dissipation effect. At the same time, it avoids the gap filling process between the copper seat and the chip, thereby greatly reducing the production cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a cross-sectional schematic diagram of a circuit board structure in the prior art.

[0023] Figure 2 is a schematic cross-sectional view of a circuit board structure according to an embodiment of the present invention.

[0024] Figure 3It is a cross-sectional schematic diagram of the connection relationship between the copper-clad ceramic substrate and the chip according to an embodiment of the present invention.

[0025] Figure 4 The figure is a schematic diagram of the structure of a circuit board product after pressing a prepreg according to an embodiment of the present invention.

[0026] Figure 5 is a circuit application schematic diagram of a circuit board structure according to an embodiment of the present invention.

[0027] Figure numerals: 1-copper-clad ceramic substrate; 101-first copper layer; 102-second copper layer; 103-ceramic substrate; 2-sintering layer; 3-chip; 301-chip gate; 302-chip source; 4-first metal layer; 5-prepreg; 6-second metal layer; 7-conductive via; 8-copper seat; 9-heat dissipation hole. DETAILED DESCRIPTION

[0028] The technical solution of the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments so that those skilled in the art can better understand the present invention and implement it, but the embodiments are not intended to limit the present invention. In different drawings, the same components are represented by the same reference numerals.

[0029] In this embodiment, it should be understood that the terms "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside" and "outside" etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present invention.

[0030] It should be noted that when an element is considered to be "connected" to another element, it may be directly connected to the other element and integrated therewith, or there may be an intermediate element at the same time. The terms "installed", "one end", "the other end" and similar expressions used in the present invention are for illustrative purposes only.

[0031] like Figure 1 As shown, in the prior art, there is a heat dissipation structure suitable for embedded circuits. The structure includes a heat-conducting copper seat 8 provided between two copper layers, the chip 3 is sintered on the copper seat 8, and then a layer of heat dissipation holes 9 is drilled under the copper seat 8 to dissipate the heat to a semi-cured sheet (PP) 5 or a copper-clad ceramic substrate with high thermal conductivity (5-10W / (m*K)), and then the heat is dissipated outward. The existing structure uses a copper seat, which takes up a large space, and also needs to set up a large number of heat dissipation holes 9 and fill the gap between the copper seat 8 and the chip 3. The process is cumbersome, the quality control requirements are high, and the production cost is also high. In addition, the current loop ( Figure 1 DC+ to DC-, including the chip) flows from below the copper seat 8 to above the chip 3, making the circuit parasitic inductance generated by this structure larger.

[0032] Figure 2 The schematic cross-sectional view of the circuit board structure according to the present invention is shown. As shown in the figure, the circuit board structure of the present invention with low cost and high heat dissipation is arranged from bottom to top (according to Figure 2 The embodiment of the present invention comprises a copper-clad ceramic substrate 1, a sintered layer 2, a chip 3, a first metal layer 4, a prepreg 5, and a second metal layer 6 in sequence, wherein the sintered layer 2 is located between the copper-clad ceramic substrate 1 and the chip 3, and the other side of the chip 3 opposite to the sintered layer 2 is covered with the first metal layer 4, the prepreg 5, and the second metal layer 6 in sequence, and a conductive via 7 is provided between the first metal layer 4 and the second metal layer 6. In certain cases, a conductive via 7 may also exist between the copper-clad ceramic substrate 1 and the second metal layer 6.

[0033] The copper-clad ceramic substrate 1 includes a ceramic substrate 103 and a plurality of copper-clad ceramic substrates 104 and 105 respectively covering one surface of the ceramic substrate 103 (for example, Figure 2 The first copper layer 101 on the upper surface shown in FIG. 1 and the first copper layer 101 on the other surface of the ceramic substrate 103 (eg, Figure 2 The first copper layer 101 is close to the sintered layer 2, and the second copper layer 102 is far away from the sintered layer 2. In certain cases, there may also be a conductive via 7 between the first copper layer 101 and the second metal layer 6.

[0034] Preferably, the ceramic substrate 103 may be a nitride ceramic substrate, the nitride including but not limited to one or more of aluminum nitride (AlN), silicon nitride (Si3N4), and boron nitride (BN). The ceramic substrate may be purchased through existing commercial channels. Preferably, the ceramic substrate 103 can withstand a high voltage of 3000V and has a thermal conductivity of at least 80W / (m*K).

[0035] Preferably, the thickness of the ceramic substrate 103 may be 250-380 micrometers.

[0036] Preferably, the thickness of the first copper layer 101 may be 200-500 microns.

[0037] Preferably, the thickness of the second copper layer 102 may be 200-500 microns.

[0038] Preferably, the thickness of the copper-clad ceramic substrate 1 may be 650-1380 micrometers.

[0039] Preferably, the material of the sintered layer 2 may be nanosilver, but not limited thereto, and its thermal conductivity may be between 200 W / (m*K) and 270 W / (m*K), preferably 270 W / (m*K). The thickness of the sintered layer 2 may be 25 microns.

[0040] Preferably, the first metal layer 4 may be a copper layer, and the thickness thereof may be 10 micrometers.

[0041] Preferably, the second metal layer 6 may be a copper layer, and the thickness thereof may be 200 micrometers.

[0042] The circuit board structure of the present invention does not need to use the high thermal conductivity (5-10W / (m*K)) prepreg in the above-mentioned prior art, and only conventional prepreg (thermal conductivity 0.2-0.4W / (m*K)) can achieve good heat dissipation effect.

[0043] The low-cost and high-heat dissipation circuit board structure of the present invention can be prepared according to the following process steps:

[0044] (1) On one surface of the copper-clad ceramic substrate 1 (for example, Figure 3 Etching a circuit on a copper layer (e.g., the first copper layer 101) on the upper surface shown in FIG.

[0045] (2) Sintering the chip gate 301 with nano silver paste (250° C., 5 min) on the first copper layer 101 to form a sintered layer 2, and then plating a first metal layer 4 (e.g., a copper layer) on the chip source 302;

[0046] (3) The prepreg 5 is grooved, and the position and size of the grooves formed correspond to the position and size of the chip 3. The grooved prepreg 5 is pressed onto the copper-clad ceramic substrate 1 on which the chip 3 is sintered (see Figure 4 );

[0047] (4) A second metal layer 6 (eg, a copper layer) is pressed on the prepreg 5, holes are drilled to form conductive vias 7, and then circuits are etched on the second metal layer 6 (eg, a copper layer).

[0048] like Figure 5 As shown, a via is drilled above chip 3 to add a circuit so that the current loop ( Figure 5 The DC+ to DC-, including the chip) is placed in the circuit board structure above the copper-clad ceramic substrate 1, which greatly reduces the parasitic inductance of the circuit board ( Figure 1 The parasitic inductance generated by the prior art solution is about 5-6nH, while the parasitic inductance generated by the present invention is about 1nH), which generates less power loss and satisfies the requirement of efficient heat dissipation ( Figure 1 The thermal resistance of the prior art solution reaches 0.8, while the thermal resistance produced by the present invention can be lower than 0.5).

[0049] It should be noted that the stacking structure and layer arrangement of the present invention are not limited to those shown in the figures, but can be arranged according to actual application requirements.

[0050] In addition, in the path that is not a direct heat dissipation path but has a large current (250-650A) flowing through it, multiple rows of conductive vias can be set, or copper blocks can be buried. For example, a thin copper block (for example, with a thickness of 200 microns) is buried between the copper layer of the copper-clad ceramic substrate and the semi-cured sheet and the thin copper block is connected to the second metal layer through a conductive via, so that it can withstand the current flowing through without affecting the heat dissipation effect.

[0051] Compared with the prior art, the present invention does not require a copper seat that occupies a large space, nor does it require the use of PP materials with high thermal conductivity but poor reliability. The chip gate is directly sintered on a copper-clad ceramic substrate with an etched circuit on one side, which reduces the size of the circuit board and is conducive to achieving lightweight and miniaturization. In addition, the circuit board structure of the present invention also reduces a large number of heat dissipation holes, while avoiding the gap filling process between the copper seat and the chip, greatly reducing production costs. More importantly, the structure of the present invention allows the current loop (including the chip) to run in the circuit board structure above the ceramic substrate, reducing the circuit parasitic inductance, reducing power loss, and enhancing heat dissipation.

[0052] In this specification, unless otherwise clearly specified and limited, a first feature being “on” or “below” a second feature may mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Moreover, a first feature being “above”, “above”, and “above” a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being “below”, “below”, and “below” a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0053] In the description of this specification, the description with reference to the terms "preferred embodiment", "further embodiment", "other embodiments" or "specific example" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they are contradictory.

[0054] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in the field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A low-cost and high-heat dissipation circuit board structure, characterized in that The invention comprises a copper-clad ceramic substrate, a sintered layer, a chip, a first metal layer, a prepreg, and a second metal layer which are compounded in sequence, wherein the sintered layer is located between the copper-clad ceramic substrate and the chip, and a conductive via is provided between the first metal layer and the second metal layer. The copper-clad ceramic substrate comprises a ceramic substrate and a first copper layer and a second copper layer respectively covering two surfaces of the ceramic substrate.

2. The circuit board structure according to claim 1, characterized in that: The first copper layer is close to the sintering layer, and the second copper layer is far away from the sintering layer.

3. The circuit board structure according to claim 2, characterized in that: A conductive via is provided between the first copper layer and the second metal layer.

4. The circuit board structure according to claim 1, characterized in that: The ceramic substrate may be a nitride ceramic substrate.

5. The circuit board structure according to claim 4, characterized in that: The nitride is one or more of aluminum nitride, silicon nitride, and boron nitride.

6. The circuit board structure according to claim 1, characterized in that: The sintered layer is formed by sintering nano silver paste.

7. The circuit board structure according to claim 1, characterized in that: The chip gate of the chip is connected to the sintering layer, and the chip source is connected to the first metal layer.

8. A method for preparing a circuit board structure as claimed in any one of claims 1 to 7, characterized in that The following steps are involved: S1. Etching a circuit in the first copper layer of the copper-clad ceramic substrate; S2. sintering the chip on the first copper layer to form the sintered layer, and then plating the first metal layer on the chip; S3. The prepreg is grooved, the position and size of the grooves formed correspond to the position and size of the chip, and the grooved prepreg is pressed onto the copper-clad ceramic substrate sintered with the chip; S4. Pressing the second metal layer on the prepreg, drilling holes to form the conductive vias, and then etching circuits on the second metal layer.

9. The method according to claim 8, characterized in that In the step S2, the chip gate of the chip is sintered on the first copper layer to form the sintered layer, and then the first metal layer is plated on the chip source.

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