Semiconductor device and method of manufacturing the same

Abstract

Embodiments relate to a semiconductor device and a method of manufacturing the same. According to one embodiment, a semiconductor device includes: a semiconductor substrate; an insulating film disposed on the semiconductor substrate and having a first recess formed in an upper surface thereof; a silicon film that is disposed on the insulating film, contains impurities, and has a second recess formed in a region directly above the first recess on the upper surface; a silicide layer disposed on the silicon film and in contact with the silicon film; and a first contact and a second contact that are connected to a portion of the silicide layer that sandwiches a region directly above the second recess.

Description

[0001] Related Applications

[0002] This application claims the priority of Japanese Patent Application No. 2023-158395 (filing date: September 22, 2023) as a basic application. The present application incorporates all the contents of the basic application by reference. Technical Field

[0003] Embodiments relate to a semiconductor device and a method for manufacturing the same. Background Art

[0004] In semiconductor devices, fuses are sometimes provided to form OTPROM (One Time Programmable Read only memory). There are two types of fuses: the type that is cut by irradiating a laser and the type that is cut by passing a current. The type that is cut by passing a current has the advantage of being able to be arranged at the bottom of a stacked structure, but on the other hand, a relatively large current supply circuit is required for cutting. Summary of the invention

[0005] A semiconductor device according to an embodiment comprises: a semiconductor substrate; an insulating film arranged on the semiconductor substrate and having a first recess formed on an upper surface; a silicon film arranged on the insulating film and containing impurities, having a second recess formed in an area directly above the first recess on the upper surface; a silicide layer arranged on the silicon film and in contact with the silicon film; and a first contact and a second contact connected to a portion of the silicide layer sandwiching an area directly above the second recess.

[0006] A method for manufacturing a semiconductor device according to an embodiment comprises: a process of forming a first LOCOS film and a second LOCOS film on an upper surface of a semiconductor substrate in a manner connected to each other; a process of forming a silicon film containing impurities on a region including a connecting portion of the first LOCOS film and the second LOCOS film; a process of forming a silicide layer on an upper surface of the silicon film; and a process of connecting a first contact and a second contact in a region of the silicide layer that is directly above the connecting portion.

[0007] According to the present embodiment, it is possible to provide a semiconductor device including a fuse that can be electrically cut with a small current, and a method for manufacturing the same. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 It is a plan view showing the semiconductor device according to the first embodiment.

[0009] Figure 2 yes Figure 1 The cross-sectional view along the line AA' is shown.

[0010] Figure 3 (a) to (d) are cross-sectional views showing the steps of the method for manufacturing the semiconductor device according to the first embodiment.

[0011] Figure 4 (a) to (c) are cross-sectional views showing the operation of the semiconductor device according to the first embodiment.

[0012] Figure 5 is a plan view showing a semiconductor device of a comparative example.

[0013] Figure 6 yes Figure 5 The cross-sectional view along the BB' line is shown.

[0014] Figure 7 This is a cross-sectional view showing a semiconductor device according to a first modification example of the first embodiment.

[0015] Figure 8 It is a cross-sectional view showing a semiconductor device according to a second modification example of the first embodiment.

[0016] Fig. 9 It is a cross-sectional view showing a semiconductor device according to a second embodiment.

[0017] Fig.10 It is a plan view showing a semiconductor device according to a third embodiment.

[0018] Fig.11 yes Fig.10 The cross-sectional view along the CC' line is shown.

[0019] Fig.12 (a) to (c) are cross-sectional views showing the steps of a method for manufacturing a semiconductor device according to the third embodiment.

[0020] Fig.13 It is a plan view showing a semiconductor device according to a fourth embodiment.

[0021] Fig.14 yes Fig.13 The cross-sectional view along the line DD' is shown.

[0022] Fig.15 yes Fig.13 The cross-sectional view along the EE' line is shown.

[0023] Fig.16 (a) to (d) are cross-sectional views showing the steps of a method for manufacturing a semiconductor device according to a fourth embodiment.

[0024] Fig.17 It is a plan view showing a semiconductor device according to a first modified example of the fourth embodiment.

[0025] Fig.18 yes Fig.17 The cross-sectional view along the FF' line is shown.

[0026] Fig.19 yes Fig.17 The cross-sectional view along the GG' line is shown.

[0027] Fig. 20 It is a cross-sectional view showing a semiconductor device according to a second modified example of the fourth embodiment.

[0028] Fig.21 It is a cross-sectional view showing a semiconductor device according to a third modified example of the fourth embodiment.

[0029] Fig. 22 The diagram is a cross-sectional view showing the steps of a method for manufacturing a semiconductor device according to a third modified example of the fourth embodiment.

[0030] Fig.23 It is a top view showing a semiconductor device according to a fifth embodiment.

[0031] Fig.24 yes Fig.23 The cross-sectional view along the line H-H' is shown.

[0032] Fig.25 yes Fig.23 The cross-sectional view along line II' is shown.

[0033] Fig.26 (a) to (c) are cross-sectional views showing the steps of a method for manufacturing a semiconductor device according to a fifth embodiment.

[0034] Fig. 27 It is a plan view showing a semiconductor device according to a modification of the fifth embodiment.

[0035] Fig.28 yes Fig. 27 The cross-sectional view along the J-J' line is shown.

[0036] Fig.29 yes Fig. 27 The cross-sectional view along the K-K' line is shown.

[0037] Fig.30 (a) and (b) are plan views showing other embodiments.

[0038] Fig.31 (a) and (b) are plan views showing other embodiments.

[0039] Description of Reference Numerals

[0040] 1, 1a, 1b, 2, 3, 4, 4a, 4b, 4c, 5, 5a semiconductor device

[0041] 10 Semiconductor substrate

[0042] 20 Insulation film

[0043] 21, 22 LOCOS membrane

[0044] 23 recess

[0045] 24 recess

[0046] 25 convex part

[0047] 26 Opening

[0048] 30 Silicon film

[0049] 30a Inclined portion

[0050] Section 30b

[0051] 30c, 30d Silicon film

[0052] 30e Single crystal part

[0053] 30f Polycrystalline part

[0054] 30g Stairs

[0055] 31, 32 pad part

[0056] 33 Fuse section

[0057] 34 recess

[0058] 36 recess

[0059] 38 High concentration part

[0060] 39 High resistance part

[0061] 40 Silicide layer

[0062] 43 recess

[0063] 44 recess

[0064] 45 bulge

[0065] 46 recess

[0066] 51, 52 contacts

[0067] 60 Sidewall

[0068] 101 Semiconductor Devices

[0069] 120 Insulation film

[0070] 121 LOCOS film

[0071] 130 Silicon film

[0072] 140 Silicide layer

[0073] 201, 202 resist mask

[0074] E electron current DETAILED DESCRIPTION

[0075] <First embodiment>

[0076] The semiconductor device 1 of the present embodiment is a semiconductor device including a fuse. The fuse constitutes, for example, an OTPROM.

[0077] (constitute)

[0078] Figure 1 It is a top view showing the semiconductor device according to the present embodiment.

[0079] Figure 2 yes Figure 1 The cross-sectional view along the line AA' is shown.

[0080] like Figure 1 and Figure 2 As shown in FIG. 1 , in the semiconductor device 1 of the present embodiment, a semiconductor substrate 10, an insulating film 20, a silicon film 30, a silicide layer 40, contacts 51 and 52, and a sidewall 60 are provided. Figure 1 In the figure, the side wall 60 is omitted. The same is true in other top views described later.

[0081] The semiconductor substrate 10 is made of, for example, single crystal silicon (Si), and impurities are introduced into each portion to make each portion have an n-type or p-type conductivity. The insulating film 20 is disposed on the semiconductor substrate 10 and is made of an insulating material, for example, silicon oxide (SiO2).

[0082] In this embodiment, the insulating film 20 includes two LOCOS (local oxidation of silicon) films 21 and 22. The LOCOS films 21 and 22 are formed by thermally oxidizing the upper layer of the semiconductor substrate 10. The peripheral portions of the LOCOS films 21 and 22 are bird beak-shaped, and become thinner as they approach the edge. The end of the LOCOS film 21 is connected to the end of the LOCOS film 22. Therefore, a recess 23 is formed on the upper surface of the boundary portion between the LOCOS film 21 and the LOCOS film 22.

[0083] The silicon film 30 is made of polycrystalline silicon into which impurities are introduced. The impurities introduced into the silicon film 30 are not particularly limited, and may be, for example, boron (B) or arsenic (As). The silicon film 30 is provided with pads 31 and 32 and a fuse 33 disposed between the pads 31 and 32. Figure 1In the example shown, the width of the fuse section 33 is narrower than the width of the pad section 31 and the width of the pad section 32. However, the width of the fuse section 33 may be equal to or wider than the width of the pad section 31 and the width of the pad section 32. The pad sections 31 and 32 and the fuse section 33 are formed integrally.

[0084] The fuse part 33 of the silicon film 30 is arranged at a position straddling the recess 23 of the insulating film 20. When viewed from above, the pad part 31 and the pad part 32 are arranged on both sides of the recess 23. A recess 34 is formed in the region just above the recess 23 on the upper surface of the fuse part 33.

[0085] The silicide layer 40 is composed of a compound of silicon and metal, for example, nickel silicide (NiSi) or cobalt silicide (CoSi). The silicide layer 40 is formed by silicideing the upper layer of the silicon film 30, and is formed continuously with the silicon film 30. A recess 43 reflecting the shape of the recess 23 is formed in the region directly above the recess 23 in the silicide layer 40.

[0086] Contacts 51 and 52 are arranged on the silicide layer 40. The contact 51 is connected to a portion of the silicide layer 40 arranged on the pad portion 31 of the silicon film 30, and the contact 52 is connected to a portion of the silicide layer 40 arranged on the pad portion 32 of the silicon film 30. Therefore, the contacts 51 and 52 are connected to portions of the silicide layer 40 that are separated from each other via the recess 43. In addition, in this specification, "connection" means electrical connection.

[0087] The sidewall 60 is insulating, and is, for example, a stacked film including a silicon oxide layer and a silicon nitride layer. The sidewall 60 is disposed on the side surface of the silicon film 30 .

[0088] Hereinafter, in this specification, for the convenience of explanation, an XYZ orthogonal coordinate system is used. The direction orthogonal to the upper surface of the semiconductor substrate 10 is set as the "Z direction", the direction from the contact 51 toward the contact 52 is set as the "X direction", and the direction orthogonal to the Z direction and the X direction is set as the "Y direction". The length direction of the fuse part 33 is the X direction, and the width direction is the Y direction. The number of contacts 51 and 52 is arbitrary. In the case where a plurality of contacts 51 and 52 are provided, for example, they are arranged in the Y direction. In addition, in the Z direction, the direction from the semiconductor substrate 10 toward the silicide layer 40 is also called "up", and the opposite direction is also called "down", but this expression is also for convenience and has nothing to do with the direction of gravity. Moreover, in this specification, the "directly above area" refers to an area above the object and overlapping when viewed from the Z direction. In other words, the area directly above a certain object is at the same position as the object in the X direction and the Y direction. Similarly, the "directly below area" refers to an area below the object and overlapping when viewed from the Z direction.

[0089] (Manufacturing method)

[0090] Figure 3 (a) to (d) are cross-sectional views showing the steps of the method for manufacturing the semiconductor device according to the present embodiment.

[0091] First, if Figure 3 As shown in (a), LOCOS films 21 and 22 are formed by selectively performing thermal oxidation treatment on the upper layer of the semiconductor substrate 10. A concave portion 23 formed in a bird's beak shape is formed on the upper surface of the boundary portion between the LOCOS film 21 and the LOCOS film 22. The LOCOS film 21 and the LOCOS film 22 constitute the insulating film 20.

[0092] Next, if Figure 3 As shown in (b), silicon and impurities are deposited by CVD (Chemical Vapor Deposition) to form a silicon film 30. The silicon film 30 is formed of polycrystalline silicon containing impurities. A recess 34 is formed in the region directly above the recess 23 on the upper surface of the silicon film 30.

[0093] Next, if Figure 3 As shown in (c), a resist mask 201 is formed in the region including the region directly above the recess 23. Next, the silicon film 30 is etched using the resist mask 201 as a mask. Thus, the silicon film 30 is patterned to integrally form the pads 31 and 32 and the fuse portion 33. The recess 34 is arranged on the upper surface of the fuse portion 33. Thereafter, the resist mask 201 is removed.

[0094] Next, if Figure 3 As shown in (d), a silicon oxide layer and a silicon nitride layer are formed, and anisotropic etching such as RIE is performed to form an insulating sidewall 60 on the side of the silicon film 30. Next, a metal is deposited on the silicon film 30, and a silicide layer 40 is formed on the upper surface of the silicon film 30 by performing a heat treatment. A recess 43 is formed in the silicide layer 40 in the area directly above the recess 23.

[0095] Next, an interlayer insulating film (not shown) is formed on the semiconductor substrate 10 so as to cover the insulating film 20, the silicon film 30, the silicide layer 40, and the sidewall 60. Next, a contact hole is formed in the interlayer insulating film so as to reach the silicide layer 40. Next, contacts 51 and 52 are formed in the contact hole. In this way, the semiconductor device 1 is manufactured.

[0096] (action)

[0097] Next, the operation of cutting the fuse portion 33 of the silicon film 30 will be described.

[0098] Figure 4 (a) to (c) are cross-sectional views showing the operation of the semiconductor device according to this embodiment.

[0099] like Figure 4 As shown in (a), a voltage with the contact 51 as the positive pole and the contact 52 as the negative pole is applied to the fuse part 33 to be cut. As a result, the electron current E flows from the contact 52 to the contact 51. The electron current E mainly flows through the silicide layer 40, and Joule heat is generated. At this time, since the current is concentrated in the recess 43 in the silicide layer 40, a large amount of heat is generated near the recess 43.

[0100] like Figure 4 As shown in (b), the heat generated by the electron current E and the movement of electrons cause electromigration, and the metal atoms in the silicide layer 40 move toward the contact 51. In addition, the electron current E also flows in the silicon film 30. At this time, the electron current E is concentrated in the recess 34. As a result, a large amount of heat is also generated near the recess 34. Therefore, the impurity atoms in the silicon film 30 also move toward the contact 51 by electromigration.

[0101] As a result, a high resistance portion 39 with reduced metal concentration and impurity concentration is formed in the region of the silicide layer 40 and the silicon film 30 on the contact 52 side. When the electron current E flows, the high resistance portion 39 spreads toward the contact 51. A high concentration portion 38 with increased impurity concentration is formed between the high resistance portion 39 and the silicon film 30.

[0102] like Figure 4 As shown in (c), when the high resistance portion 39 occupies a certain portion of the fuse portion 33, the resistance of the fuse portion 33 as a whole increases, and the contact 51 and the contact 52 are substantially insulated. In this way, the fuse portion 33 is electrically cut off. Hereinafter, in this specification, the case where a high resistance portion is formed in the fuse portion and the fuse portion is electrically cut off is referred to as "cutting off the fuse portion". By selectively cutting off a plurality of fuse portions 33, data is stored in the OTPROM.

[0103] (Effect)

[0104] According to the present embodiment, the recess 23 is formed in the insulating film 20, the recess 34 is formed in the silicon film 30, and the recess 43 is formed in the silicide layer 40. Therefore, when the electron current E flows between the contact 51 and the contact 52, the electron current E is concentrated near the recess 43 and generates heat. In addition, the electron current E is also concentrated near the recess 34 of the silicon film 30 and generates heat. Thus, electromigration can be promoted and the high resistance portion 39 can be formed efficiently. As a result, the fuse portion 33 can be cut off with a small current. If the electron current E used to cut off the fuse portion 33 can be reduced, the circuit for supplying the electron current E can be miniaturized, and the semiconductor device 1 can be highly integrated and low-cost.

[0105] <Comparative Example>

[0106] Figure 5is a plan view showing a semiconductor device of a comparative example.

[0107] Figure 6 yes Figure 5 The cross-sectional view along the BB' line is shown.

[0108] like Figure 5 and Figure 6 As shown, in the semiconductor device 101 of this embodiment, the insulating film 120 is composed of a single LOCOS film 121 and has no recessed portion. Therefore, no recessed portion is formed in the silicon film 130 and the silicide layer 140 either.

[0109] In the semiconductor device 101 of this comparative example, Figure 4 The fuse section is cut off by the actions shown in (a) to (c). However, since no portion where current is concentrated is formed in the silicide layer 140 and the silicon film 130, heat cannot be generated efficiently and electromigration cannot be fully promoted. Therefore, a large current needs to flow in order to cut off the fuse section. As a result, a large current supply circuit is required, which hinders the high integration and low cost of the semiconductor device 101.

[0110] <First Modification of First Embodiment>

[0111] Figure 7 : is a cross-sectional view showing a semiconductor device according to this modification.

[0112] like Figure 7 As shown, in the semiconductor device 1a of this modification, the recess 24 is formed by selectively etching the insulating film 20. Then, the silicon film 30 is formed so as to straddle the recess 24 to form the silicide layer 40. Thus, a recess 44 is formed in the silicide layer 40 in the region directly above the recess 24.

[0113] According to this modification, the fuse portion can be efficiently cut because the electron current E is concentrated in the recessed portion 44 of the silicide layer 40. The configuration, manufacturing method, operation, and effects of this modification other than those described above are the same as those of the first embodiment.

[0114] <Second Modification of First Embodiment>

[0115] Figure 8 : is a cross-sectional view showing a semiconductor device according to this modification.

[0116] like Figure 8 As shown, in the semiconductor device 1b of this modification, when forming the silicon film 30, for example, in the chamber of a CVD film forming device, silicon is deposited, and the deposited silicon film is etched. In addition, the side wall 60 is left in the area just above the recess 24 in the silicon film 30. Thereafter, a silicide treatment is performed to form the silicide layer 40.

[0117] Thus, in the semiconductor device 1b, the inclined portion 30a is formed in the region directly above the side surface of the recess 24 in the silicon film 30. Also, in a portion of the region directly above the recess 24, a portion 30b is generated where the silicide layer 40 is not formed on the upper surface.

[0118] As a result, the electron current E flows through the portion 30b of the silicon film 30. Since the resistance of the silicon film 30 is higher than the resistance of the silicide layer 40, heat is effectively generated in the portion 30b. In addition, the inclined portion 30a is thinner than other portions of the silicon film 30, so the electron current E is concentrated. Thus, heat is also effectively generated by the electron current E. The configuration, manufacturing method, operation, and effects other than those described above in this modification are the same as those of the first embodiment.

[0119] <Second embodiment>

[0120] The present embodiment is different from the first embodiment in that convex portions are formed in the insulating film 20 instead of concave portions.

[0121] Fig. 9 is a cross-sectional view showing a semiconductor device according to this embodiment.

[0122] like Fig. 9 As shown, in the semiconductor device 2 of this embodiment, the protrusion 25 is provided on the upper surface of the insulating film 20. Furthermore, the fuse part 33 of the silicon film 30 is formed so as to straddle the protrusion 25. As a result, a protrusion 45 is formed in the silicide layer 40 in the region directly above the protrusion 25.

[0123] In the semiconductor device 2, the current is concentrated on the protrusion 45 of the silicide layer 40, generating heat. In addition, the current is concentrated on the portion of the silicon film 30 that crosses the protrusion 25, generating heat. Thus, electromigration can be effectively generated, and the fuse can be cut with a small current. The configuration, manufacturing method, operation, and effects other than the above in this embodiment are the same as those in the first embodiment.

[0124] <Third Embodiment>

[0125] The present embodiment is different from the first embodiment in that an opening is provided in the insulating film 20 instead of a recess.

[0126] (constitute)

[0127] Fig.10 It is a top view showing the semiconductor device according to the present embodiment.

[0128] Fig.11 yes Fig.10 The cross-sectional view along the CC' line is shown.

[0129] like Fig.10 and Fig.11As shown, in the semiconductor device 3 of the present embodiment, a groove-shaped opening 26 extending in the Y direction is formed on the insulating film 20. Furthermore, the pad portion 31 and the pad portion 32 of the silicon film 30 are arranged at positions sandwiching the opening 26 on the insulating film 20, and the fuse portion 33 is arranged so as to straddle the opening 26. Thus, a recess 36 is formed in the region just above the opening 26 in the fuse portion 33, and a recess 46 is formed in the region just above the recess 36 in the silicide layer 40.

[0130] In addition, since the resistivity of the silicide layer 40 and the silicon film 30 is extremely low compared to the resistivity of the semiconductor substrate 10, the electron current E flowing between the contact 52 and the contact 51 when the fuse portion 33 is cut off hardly flows into the semiconductor substrate 10. In addition, a pn junction may be formed in the portion of the semiconductor substrate 10 that is in contact with the silicon film 30, so that the silicon film 30 is electrically separated from the semiconductor substrate 10.

[0131] (Manufacturing method)

[0132] Fig.12 (a) to (c) are cross-sectional views showing the steps of the method for manufacturing the semiconductor device according to the present embodiment.

[0133] First, if Fig.12 As shown in (a) of FIG. 1 , an insulating film 20 is formed on the upper surface of a semiconductor substrate 10. The insulating film 20 is formed of, for example, a LOCOS film.

[0134] Next, if Fig.12 As shown in (b) of FIG. 2 , the opening 26 is formed by selectively etching the insulating film 20 .

[0135] Next, if Fig.12 As shown in (c), silicon and impurities are deposited on the entire surface to form a silicon film 30. At this time, a recessed portion 36 is formed in the silicon film 30 in a region directly above the opening 26.

[0136] Subsequent processes and Figure 3 The steps (c) and (d) are the same as those shown in FIG.

[0137] (Effect)

[0138] In the semiconductor device 3, the electron current E is concentrated near the recess 46 in the silicide layer 40 to generate heat, and is concentrated near the recess 36 in the silicon film 30 to generate heat. As a result, electromigration is promoted, and the fuse part 33 can be cut off with a small current. The configuration, manufacturing method, operation, and effects other than the above in this embodiment are the same as those in the first embodiment.

[0139] <Fourth embodiment>

[0140] The present embodiment is different from the third embodiment in that the opening 26 of the insulating film 20 is formed inside the silicon film 30 when viewed from above.

[0141] (constitute)

[0142] Fig.13 It is a top view showing the semiconductor device according to the present embodiment.

[0143] Fig.14 yes Fig.13 The cross-sectional view along the line DD' is shown.

[0144] Fig.15 yes Fig.13 The cross-sectional view along the EE' line is shown.

[0145] like Figure 13 to Figure 15 As shown, in the semiconductor device 4 of the present embodiment, the shape of the opening 26 is rectangular when viewed from above, and the silicon film 30 is arranged so as to cover the entire opening 26. The pad portions 31 and 32 of the silicon film 30 are arranged on the insulating film 20 and sandwich the region directly above the opening 26. The portion of the silicon film 30 arranged in the opening 26 and the region directly above the opening 26 becomes the fuse portion 33.

[0146] When the silicon film 30 is thinner than the insulating film 20, the upper surface of the fuse portion 33 is located below the lower surfaces of the pad portions 31 and 32. When viewed from above, the recessed portion 36 of the silicon film 30 and the recessed portion 46 of the silicide layer 40 are arranged inside the opening 26. In the semiconductor device 4, one contact 51 and one contact 52 are provided, but the number of contacts 51 and 52 is arbitrary.

[0147] (Manufacturing method)

[0148] Fig.16 (a) to (d) are cross-sectional views showing the steps of the method for manufacturing the semiconductor device according to the present embodiment.

[0149] First, if Fig.16 As shown in (a) of FIG. 1 , an insulating film 20 is formed on the upper surface of a semiconductor substrate 10. The insulating film 20 is, for example, a LOCOS film.

[0150] Next, if Fig.16 As shown in (b) , an opening 26 is formed in the insulating film 20 .

[0151] Next, if Fig.16 As shown in (c) of FIG. 1 , a silicon film 30 is formed on the entire surface. The silicon film 30 is also formed inside the opening 26. When viewed from above, a recessed portion 36 of the silicon film 30 is formed inside the opening 26.

[0152] Next, if Fig.16 As shown in (d) of FIG. 1 , a resist mask 202 is formed on the silicon film 30. The resist mask 202 is formed so as to cover the entire opening 26. Next, the silicon film 30 is etched using the resist mask 202 as a mask.

[0153] Subsequent processes and Figure 3 The steps (c) and (d) are the same. In this way, the semiconductor device 4 is manufactured.

[0154] (Effect)

[0155] In the semiconductor device 4, the electron current E is also concentrated on the uneven portions in the silicide layer 40 and the silicon film 30, and heat is generated. Specifically, the electron current E is concentrated on the recessed portion 46 of the silicide layer 40 and the recessed portion 36 of the silicon film 30, and heat is generated. In addition, in the Y direction, since the film thickness of the silicon film 30 is uneven, the electron current E is also concentrated thereon. Thus, the fuse portion 33 can be effectively cut off. The configuration, manufacturing method, operation, and effects other than the above in this embodiment are the same as those of the first embodiment.

[0156] <First Modification of Fourth Embodiment>

[0157] This modification example is different from the fourth embodiment in that two fuse parts 33 are formed in one opening 26 of the insulating film 20 .

[0158] Fig.17 1 is a plan view showing a semiconductor device according to this modification.

[0159] Fig.18 yes Fig.17 The cross-sectional view along the FF' line is shown.

[0160] Fig.19 yes Fig.17 The cross-sectional view along the GG' line is shown.

[0161] like Figure 17 to Figure 19 As shown, in the semiconductor device 4a of this modification, the width of the opening 26, that is, the length in the Y direction is wider than the width of the opening 26 in the semiconductor device 4. In addition, two silicon films 30c and 30d are provided so as to straddle one opening 26. A fuse portion 33 is formed in each of the silicon films 30c and 30d.

[0162] According to this modification, as in the first embodiment, by concentrating the electron current E on the uneven parts in the silicide layer and the silicon film, electromigration is promoted, and the fuse part 33 can be cut off with a small current. As a result, the circuit for supplying the electron current E can be miniaturized, and the semiconductor device 4a can be highly integrated and low-cost. In addition, since two fuse parts 33 can be arranged in one opening 26, the width of one fuse part 33 can be narrowed. As a result, the electron current E can also be reduced. The configuration, manufacturing method, operation and effects other than the above in this modification are the same as those in the fourth embodiment.

[0163] <Second Modification of Fourth Embodiment>

[0164] This modification example is different from the fourth embodiment in that an inclined portion is provided on the upper surface of the silicon film 30 in the vicinity of a region immediately above the side surface of the opening 26 .

[0165] Fig. 20 : is a cross-sectional view showing a semiconductor device according to this modification.

[0166] like Fig. 20 As shown, in the semiconductor device 4 b of this modification, an inclined portion 30 a is provided on the upper surface of the silicon film 30 in the vicinity of a region immediately above the side surface of the opening 26 .

[0167] In this modification, Fig.16 In the process shown in (c) of FIG. 2 , when forming the silicon film 30, silicon deposition and etching are performed simultaneously or alternately. Thus, the corners of the silicon film 30 are selectively etched. As a result, an inclined portion 30a is formed in the silicon film 30 near the area just above the side surface of the opening 26 of the insulating film 20. In the area just below the inclined portion 30a, the silicon film 30 is thinner than other parts.

[0168] In this modification, when the electron current E flows in the silicon film 30, the current is concentrated in the region directly below the inclined portion 30a. The configuration, manufacturing method, operation, and effects of this modification other than those described above are the same as those of the fourth embodiment.

[0169] <Third Modification of Fourth Embodiment>

[0170] This modification example is different from the fourth embodiment in that a single crystal portion and a polycrystalline portion are provided in the silicon film 30 .

[0171] (constitute)

[0172] Fig.21 : is a cross-sectional view showing a semiconductor device according to this modification.

[0173] like Fig.21As shown, in the semiconductor device 4c of this modification, the semiconductor substrate 10 is made of single crystal silicon, and the insulating film 20 is made of silicon oxide. Moreover, in the silicon film 30, the portion arranged on the semiconductor substrate 10 is a single crystal portion 30e, and the portion arranged on the insulating film 20 is a polycrystalline portion 30f. The pad portions 31 and 32 are roughly the polycrystalline portion 30f, and the fuse portion 33 is roughly the single crystal portion 30e. A step 30g is formed at the boundary between the single crystal portion 30e and the polycrystalline portion 30f. In addition, there is also a case where no step is formed.

[0174] (Manufacturing method)

[0175] Fig. 22 The diagram is a cross-sectional view showing the steps of a method for manufacturing a semiconductor device according to the present modification.

[0176] First, implement Fig.16 The steps shown in (a) and (b).

[0177] Next, if Fig. 22 As shown, a silicon film 30 is formed. At this time, film formation is performed on a semiconductor substrate 10 composed of single crystal silicon under conditions such as growing a single crystal silicon film. Thus, a single crystal portion 30e is formed starting from the semiconductor substrate 10. In addition, since silicon oxide is amorphous, the silicon film formed on the insulating film 20 becomes polycrystalline. Therefore, a polycrystalline portion 30f is formed on the insulating film 20. Since the growth rates of the single crystal portion 30e and the polycrystalline portion 30f are different, a step 30g is sometimes formed at the boundary between the two portions.

[0178] Next, if Fig.21 As shown, the silicon film 30 is patterned. Next, the sidewall 60, the silicide layer 40, and the contacts 51 and 52 are formed. In this way, the semiconductor device 4c is formed.

[0179] (Effect)

[0180] In this modification, in the silicon film 30, since a step is formed at the boundary between the single crystal part 30e and the polycrystalline part 30f, the current is easily concentrated in the portion of the silicide layer 40 that covers the step. In addition, in the silicon film 30, since the resistivity of the single crystal part 30e is higher than that of the polycrystalline part 30f, when the electron current E flows, heat is easily generated in the single crystal part 30e. In addition, the electric field is easily concentrated at the interface between the single crystal part 30e and the polycrystalline part 30f. For these reasons, electromigration is promoted. The configuration, manufacturing method, operation and effects other than the above in this modification are the same as those of the fourth embodiment.

[0181] <Fifth Embodiment>

[0182] This embodiment is different from the fourth embodiment in that the entire silicon film 30 is disposed in the opening 26 of the insulating film 20 .

[0183] (constitute)

[0184] Fig.23 It is a top view showing the semiconductor device according to the present embodiment.

[0185] Fig.24 yes Fig.23 The cross-sectional view along the line H-H' is shown.

[0186] Fig.25 yes Fig.23 The cross-sectional view along line II' is shown.

[0187] like Figure 23 to Figure 25 As shown, in the semiconductor device 5 of the present embodiment, the silicon film 30 and the silicide layer 40 are arranged in the opening 26 of the insulating film 20. A recess 36 is formed on the upper surface of the silicon film 30. A recess 46 reflecting the recess 36 of the silicon film 30 is formed in the silicide layer 40. Contacts 51 and 52 are connected to the portion of the silicide layer 40 sandwiching the region directly above the recess 36. For example, the side surface of the recess 46 of the silicide layer 40 is inclined with respect to the XY plane, and the contacts 51 and 52 are connected to the side surfaces of the recess 46 that are opposite to each other.

[0188] (Manufacturing method)

[0189] Fig.26 (a) to (c) are cross-sectional views showing the steps of the method for manufacturing the semiconductor device according to the present embodiment.

[0190] First, implement Fig.16 Thus, as shown in (a) to (c) of Fig.26 As shown in (a), a silicon film 30 is formed to cover the semiconductor substrate 10 and the insulating film 20. At this time, a recess 36 is formed on the upper surface of the silicon film 30 in the area just above the opening 26 of the insulating film 20. When viewed from above, the recess 36 is located inside the opening 26.

[0191] Next, if Fig.26 As shown in (b), the silicon film 30 is etched. Thus, the portion of the silicon film 30 that is arranged outside the opening 26 when viewed from above is removed. As a result, the silicon film 30 having the recess 36 formed on the upper surface remains in the opening 26 of the insulating film 20.

[0192] Next, if Fig.26As shown in (c), a silicide layer 40 is formed on the upper surface of the silicon film 30. The silicide layer 40 is also formed only in the opening 26. A recess 46 is formed on the upper surface of the silicide layer 40 by reflecting the recess 36 of the silicon film 30. Next, contacts 51 and 52 are formed to be connected to the mutually opposing side surfaces of the recess 46 of the silicide layer 40. In this way, the semiconductor device 5 is manufactured.

[0193] (action)

[0194] In the semiconductor device 5, when the electron current E flows through the silicide layer 40, the current is concentrated at the boundary portion between the bottom and the side of the recess 46 to generate heat. In addition, when the electron current E flows through the silicon film 30, the current is concentrated in the recess 36 to generate heat. Thus, electromigration is promoted, and the fuse portion can be effectively cut off by a small current.

[0195] (Effect)

[0196] According to this embodiment, as in the first embodiment, by concentrating the electron current E on the uneven portion in the silicide layer and the silicon film, electromigration can be promoted, and the fuse portion 33 can be cut off with a small current. As a result, the circuit for supplying the electron current E can be miniaturized, and the semiconductor device 5 can be highly integrated and cost-effective. In addition, in the Y direction, since the film thickness of the silicon film 30 is uneven, the electron current E is also concentrated. The configuration, manufacturing method, operation, and effects other than the above in this embodiment are the same as those in the fourth embodiment.

[0197] <Modification of the Fifth Embodiment>

[0198] This modification example is different from the fifth embodiment in that two fuse parts 33 are formed in one opening 26 of the insulating film 20 .

[0199] Fig. 27 1 is a plan view showing a semiconductor device according to this modification.

[0200] Fig.28 yes Fig. 27 The cross-sectional view along the J-J' line is shown.

[0201] Fig.29 yes Fig. 27 The cross-sectional view along the K-K' line is shown.

[0202] like Figure 27 to Figure 29 As shown, in the semiconductor device 5a of this modification, two silicon films 30c and 30d are provided in one opening 26. Fuse parts 33 are formed on each of the silicon films 30c and 30d. Sidewalls 60 are provided between the silicon films 30c and 30d in the opening 26.

[0203] According to this modification, since two fuse parts 33 can be arranged in one opening 26, the width of one fuse part 33 can be narrowed. As a result, the electron current E can be reduced, and the circuit supplying the electron current E can be further miniaturized. As a result, further high integration and low cost of the semiconductor device 5a can be achieved. The configuration, manufacturing method, operation and effects other than the above in this modification are the same as those of the fifth embodiment.

[0204] <Other embodiments>

[0205] The positional relationship between the opening 26 of the insulating film 20 and the silicon film 30 is not limited to the above-mentioned embodiments and their modifications, and various forms are possible. Several specific examples will be described below.

[0206] Fig.30 (a)~ Fig.31 (b) is a plan view showing another embodiment.

[0207] For example, Fig.30 As shown in (a) of FIG. 1 , a plurality of openings 26 of the same size may be arranged in a matrix, and the silicon film 30 may be disposed so as to cover all of the openings 26 .

[0208] In addition, if Fig.30 As shown in (b) of FIG. 1 , a plurality of openings 26 of the same size may be arranged in a zigzag pattern, and the silicon film 30 may be disposed so as to cover all of them.

[0209] In addition, if Fig.31 As shown in (a), a plurality of openings 26 of different sizes may be arranged in a matrix, and the silicon film 30 may be disposed so as to cover a part of the openings 26.

[0210] Moreover, if Fig.31 As shown in (b), a plurality of openings 26 of different sizes may be arbitrarily arranged, and the silicon film 30 may be arranged so as to cover a part of them.

[0211] Thus, the opening 26 may be one or more. In addition, the silicon film 30 may cover the entire opening 26 or a part thereof. In addition, the shape of the opening 26 is not limited to a rectangle, and may be, for example, a circle, a rectangle with rounded corners, a groove extending in a direction inclined relative to the X direction and the Y direction, or a grid.

[0212] In each of the above-mentioned embodiments and their variations, the shape of the upper surface of the insulating film 20 is made non-uniform, and the shape of the silicon film 30 formed thereon is made non-uniform, so that a portion where the electron current E is concentrated is formed in the silicide layer 40 and the silicon film 30. However, the silicon film 30 may be formed on a flat region of the upper surface of the insulating film 20, and the portion where the current is concentrated may be formed by performing a process such as etching on the silicon film 30. In addition, the portion where the current is concentrated may be formed by performing a process such as etching on the silicide layer 40.

[0213] Furthermore, in the above-mentioned embodiments and their modifications, an example in which the fuse portion constitutes the OTPROM is shown, but the present invention is not limited to this, and the fuse portion may be used to cut off a defective portion or select a redundant circuit.

[0214] According to the above-described embodiments, it is possible to realize a semiconductor device including a fuse that can be electrically cut with a small current and a method for manufacturing the same.

[0215] Although several embodiments of the present invention have been described above, these embodiments are presented as examples and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and changes can be made without departing from the scope of the subject matter of the invention. These embodiments and their variations are included in the scope and subject matter of the invention, and are included in the invention described in the claims and the scope of their equivalents. In addition, the above embodiments can also be implemented in combination with each other.

[0216] The present invention includes the following aspects.

[0217] (Note 1)

[0218] A semiconductor device, characterized by comprising:

[0219] Semiconductor substrates;

[0220] An insulating film, disposed on the semiconductor substrate, having a first recess formed on an upper surface thereof;

[0221] a silicon film disposed on the insulating film, containing impurities, and having a second concave portion formed in a region directly above the first concave portion on the upper surface;

[0222] a silicide layer, disposed on the silicon film and in contact with the silicon film; and

[0223] The first contact and the second contact are connected to portions of the silicide layer sandwiching a region directly above the second recess.

[0224] (Note 2)

[0225] The semiconductor device according to Supplementary Note 1, characterized in that

[0226] The insulating film has:

[0227] a first LOCOS membrane; and

[0228] The second LOCOS membrane,

[0229] The first LOCOS membrane and the second LOCOS membrane are connected to each other,

[0230] The first recessed portion is a connecting portion between the first LOCOS film and the second LOCOS film.

[0231] (Note 3)

[0232] A semiconductor device, characterized by comprising:

[0233] Semiconductor substrates;

[0234] An insulating film, disposed on the semiconductor substrate, and having an opening;

[0235] a silicon film disposed on the insulating film across the opening and containing impurities;

[0236] a silicide layer, disposed on the silicon film and in contact with the silicon film; and

[0237] The first contact and the second contact are connected to portions of the silicide layer sandwiching a region directly above the opening.

[0238] (Note 4)

[0239] A semiconductor device, characterized by comprising:

[0240] Semiconductor substrates;

[0241] An insulating film, disposed on the semiconductor substrate, and having an opening;

[0242] a silicon film disposed on the insulating film so as to cover the opening and containing impurities;

[0243] a silicide layer, disposed on the silicon film and in contact with the silicon film; and

[0244] The first contact and the second contact are connected to portions of the silicide layer sandwiching a region directly above the opening.

[0245] (Note 5)

[0246] A semiconductor device, characterized by comprising:

[0247] Semiconductor substrates;

[0248] An insulating film, disposed on the semiconductor substrate, and having an opening;

[0249] A silicon film is disposed in the opening, contains impurities, and has a concave portion formed on the upper surface;

[0250] a silicide layer, disposed on the silicon film and in contact with the silicon film; and

[0251] The first contact and the second contact are connected to a portion of the silicide layer that is located directly above the bottom surface of the recessed portion.

[0252] (Note 6)

[0253] A method for manufacturing a semiconductor device, comprising:

[0254] A step of forming a first LOCOS film and a second LOCOS film on an upper surface of a semiconductor substrate in a manner connected to each other;

[0255] forming a silicon film containing impurities on a region including a connecting portion of the first LOCOS film and the second LOCOS film;

[0256] forming a silicide layer on the upper surface of the silicon film; and

[0257] The step of connecting a first contact and a second contact in a region sandwiching a region directly above the connecting portion in the silicide layer.

[0258] (Note 7)

[0259] A method for manufacturing a semiconductor device, comprising:

[0260] forming an insulating film on the upper surface of the semiconductor substrate;

[0261] forming an opening in the insulating film;

[0262] forming a silicon film containing impurities in a region including a region directly above the opening;

[0263] forming a silicide layer on the upper surface of the silicon film; and

[0264] The step of connecting a first contact and a second contact in a region sandwiching a region directly above the opening in the silicide layer.

[0265] (Note 8)

[0266] The method for manufacturing a semiconductor device as described in Supplementary Note 7 is characterized in that:

[0267] The silicon film is formed so as to straddle the opening.

[0268] (Note 9)

[0269] The method for manufacturing a semiconductor device as described in Supplementary Note 7 is characterized in that:

[0270] The silicon film is formed so as to cover the opening.

[0271] (Note 10)

[0272] A method for manufacturing a semiconductor device, comprising:

[0273] forming an insulating film on the upper surface of the semiconductor substrate;

[0274] forming an opening in the insulating film;

[0275] a step of forming a silicon film containing impurities and having a concave portion formed on an upper surface thereof in the opening;

[0276] forming a silicide layer on the upper surface of the silicon film; and

[0277] The step of connecting a first contact and a second contact to a portion of the silicide layer sandwiching a region directly above the bottom surface of the recess.

[0278] (Note 11)

[0279] The method for manufacturing a semiconductor device according to Supplementary Note 10, characterized in that

[0280] The process of forming the silicon film includes:

[0281] The steps include forming a silicon film on the insulating film so as to cover the opening; and removing a portion of the silicon film that is arranged outside the opening when viewed from above.

Claims

1. A semiconductor device, characterized in that: have: Semiconductor substrates; An insulating film, disposed on the semiconductor substrate, having a first recess formed on an upper surface thereof; a silicon film disposed on the insulating film, containing impurities, and having a second concave portion formed in a region of the upper surface just above the first concave portion; a silicide layer, disposed on the silicon film and in contact with the silicon film; as well as The first contact and the second contact are connected to portions of the silicide layer sandwiching a region directly above the second recess.

2. The semiconductor device according to claim 1, wherein The insulating film has: The first LOCOS membrane; as well as The second LOCOS membrane, The first LOCOS membrane and the second LOCOS membrane are connected to each other, The first recessed portion is a connecting portion between the first LOCOS film and the second LOCOS film.

3. A semiconductor device, characterized in that: have: Semiconductor substrates; An insulating film, disposed on the semiconductor substrate, and having an opening; a silicon film disposed on the insulating film across the opening and containing impurities; a silicide layer, disposed on the silicon film and in contact with the silicon film; as well as The first contact and the second contact are connected to portions of the silicide layer sandwiching a region directly above the opening.

4. A semiconductor device, characterized in that: have: Semiconductor substrates; An insulating film, disposed on the semiconductor substrate, and having an opening; a silicon film disposed on the insulating film so as to cover the opening and containing impurities; a silicide layer, disposed on the silicon film and in contact with the silicon film; as well as The first contact and the second contact are connected to portions of the silicide layer sandwiching a region directly above the opening.

5. A semiconductor device, characterized in that: have: Semiconductor substrates; An insulating film, disposed on the semiconductor substrate, and having an opening; A silicon film is disposed in the opening, contains impurities, and has a concave portion formed on the upper surface; a silicide layer, disposed on the silicon film and in contact with the silicon film; as well as The first contact and the second contact are connected to a portion of the silicide layer that is located directly above the bottom surface of the recessed portion.

6. A method for manufacturing a semiconductor device, characterized in that: have: A step of forming a first LOCOS film and a second LOCOS film on an upper surface of a semiconductor substrate in a manner connected to each other; forming a silicon film containing impurities on a region including a connecting portion of the first LOCOS film and the second LOCOS film; forming a silicide layer on the upper surface of the silicon film; as well as The step of connecting a first contact and a second contact in a region sandwiching a region directly above the connecting portion in the silicide layer.

7. A method for manufacturing a semiconductor device, characterized in that: have: forming an insulating film on the upper surface of the semiconductor substrate; A step of forming an opening in the insulating film; forming a silicon film containing impurities in a region including a region directly above the opening; forming a silicide layer on the upper surface of the silicon film; and The step of connecting a first contact and a second contact in a region sandwiching a region directly above the opening in the silicide layer.

8. The method for manufacturing a semiconductor device according to claim 7, wherein: The silicon film is formed so as to straddle the opening.

9. The method for manufacturing a semiconductor device according to claim 7, wherein: The silicon film is formed so as to cover the opening.

10. A method for manufacturing a semiconductor device, characterized in that: have: forming an insulating film on the upper surface of the semiconductor substrate; A step of forming an opening in the insulating film; a step of forming a silicon film containing impurities and having a concave portion formed on an upper surface thereof in the opening; forming a silicide layer on the upper surface of the silicon film; and The step of connecting a first contact and a second contact to a portion of the silicide layer sandwiching a region directly above the bottom surface of the recess.

11. The method for manufacturing a semiconductor device according to claim 10, wherein: The process of forming the silicon film includes: forming a silicon film on the insulating film so as to cover the opening; and A step of removing a portion of the silicon film that is arranged outside the opening when viewed from above.

Images