Biosensor with brim-shaped vertical tunneling field effect transistor and preparation method of biosensor

Abstract

The invention discloses a biosensor with a brim-shaped vertical tunneling field effect transistor and a preparation method thereof, and the sensor comprises a substrate, drain region contacts are arranged at two ends of the upper surface of the substrate, a drain region is arranged on the upper surface of the substrate between the drain region contacts, a T-shaped channel is arranged on the upper surface of the drain region, and high dielectric constant oxide layers are arranged at two sides of the bottom end of a vertical region of the channel. Gate metal is arranged on one side, far away from the channel, of each high-dielectric-constant oxide layer to form a bent biomolecule detection cavity, a horizontal region of the channel is embedded in a source region, the source region serves as an outer brim, the channel serves as an inner brim to form a brim-shaped structure, and an active region contact is arranged on the upper surface of the source region; a drain region, a channel and a source region gradually grow on a substrate through epitaxial growth, then a biomolecule detection cavity and a high dielectric constant oxide layer are formed through atomic layer deposition and etching, and finally a grid electrode, a source region contact and a drain region contact are deposited; the sensor has the advantages of high conduction current, sensitivity in biomolecule detection, low voltage requirement, low power consumption and simple preparation process.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductor devices, and in particular relates to a biosensor with a brim-shaped vertical tunneling field effect transistor and a preparation method thereof. Background Art

[0002] Biosensors can detect, record, and quantify physiological parameters and biochemical processes in the body, which has a significant impact on disease diagnosis and health status assessment. Label-free biosensors using dielectric modulation field-effect transistors have attracted much attention due to their fast response time, low power consumption, and size compatibility with complementary metal oxide semiconductor technology, solving the complexity and high manufacturing costs associated with labeled detection methods such as fluorescent labels and radioisotopes. In DMFETs, the cavity is usually etched within the gate metal or oxide region. When biomolecules with different intrinsic properties enter the cavity, changes in the electrical properties can be observed, which affects the effective degree of channel-gate coupling. This dielectric modulation-based technology is also well suited for detecting charged biomolecules.

[0003] However, as the device scale develops towards the nano field, MOSFET-based biosensors face increasingly serious short channel effects (SCEs). In particular, the power consumption increases significantly, which does not meet the current requirements of integrated circuits to develop in the direction of low power consumption. In addition, due to the hot injection mechanism of carriers, the subthreshold swing (SS) of MOSFET-based biosensors does not exceed 60mV / dec, which also leads to a slow device turn-on speed.

[0004] The working principle of the tunnel field effect transistor (TFET) is the quantum mechanical principle of the tunneling effect. It allows a lower subthreshold swing and can be achieved below 60mV / dec at room temperature by reducing the thickness of the oxide and silicon layers. At the same time, the determining factor affecting the TFET biosensor is not the filling amount of biomolecules. The length of its detector can be less than half of the gate length. It is also compatible with CMOS technology and is easy to manufacture and integrate. In recent years, researchers have shown great interest in dielectric modulated tunnel effect transistor (DM-TFET) biosensors.

[0005] The Chinese patent application with publication number CN112736142A discloses a biosensor based on a nanosheet stacked field effect transistor and a preparation method. Three vertically stacked nanosheets form a channel, and a nanocavity is etched on the side close to the source end. This structure overcomes the short channel effect, but the disadvantage is low sensitivity.

[0006] AadilAnam et al. disclose Design and Performance Analysis of Tunnel Field Effect Transistor With Buried Strained Si 1-x Ge x Source Structure BasedBiosensorfor Sensitivity Enhancement(AadilAnam.Design andPerformance Analysis ofTunnel Field Effect TransistorWithBuried Strained Si 1-x Ge x Source Structure Based Biosensor for Sensitivity Enhancement[J]. IEEE SENSORS JOURNAL, 2020, 20(22): 13178–13185. ), a buried source region of silicon germanium is introduced into the source region and embedded in the channel region, but the manufacturing process of this structure is more difficult, and the working gate voltage is high, which increases the power consumption of the device.

[0007] Shruti Shreya et al. disclosed a biosensor with a core-shell junctionless nanotube tunneling field effect transistor structure (Core-Shell Junctionless Nanotube Tunnel Field Effect Transistor: Design and Sensitivity Analysis for Biosensing Application (Shruti Shreya. Core-Shell Junctionless Nanotube Tunnel Field Effect Transistor: Design and Sensitivity Analysis for Biosensing Application [J]. IEEE SENSORS JOURNAL, 2020, 20(2): 672–679.), which uses plasma technology to induce regions with different carrier concentrations on the semiconductor surface to form source and drain regions. However, due to its principle of charge plasma technology, the device has the defect of low on-state current and low sensitivity when detecting biological molecules. Summary of the invention

[0008] In order to overcome the shortcomings of the above-mentioned prior art, the purpose of the present invention is to provide a biosensor with a brim-shaped vertical tunneling field effect transistor and a preparation method thereof. By introducing a brim buried structure, the channel is buried in the source region or the source region is buried in the channel to increase the area of ​​the tunnel junction, which greatly improves the probability of tunneling of carriers in the source region, thereby improving the device current and the sensitivity of detecting biological molecules. At the same time, the sensor can operate under a low drain-source voltage, effectively reducing the device power consumption.

[0009] In order to achieve the above object, the technical solution adopted by the present invention is:

[0010] A biosensor with a brim-shaped vertical tunneling field effect transistor, the biosensor comprising a substrate 8, drain contacts 7 are mirror-imaged at both ends of the upper surface of the substrate 8, a drain region 6 is disposed on the upper surface of the substrate 8 between the two drain contacts 7, a T-shaped channel 2 is disposed on the upper surface of the drain region 6, high dielectric constant oxide layers 4 are mirror-imaged at both sides of the bottom of the vertical region of the channel 2, a gate metal 5 is disposed on the side of each high dielectric constant oxide layer 4 away from the channel 2, a bent biomolecule detection cavity 3 is formed between the gate metal 5, the high dielectric constant oxide layer 4 and the channel 2, the horizontal region of the channel 2 is embedded in the source region 1, the source region 1 is used as the outer brim and the channel 2 is used as the inner brim to form a brim-shaped structure, and a source region contact 9 is disposed on the upper surface of the source region 1;

[0011] The source region 1 can also be embedded in the horizontal area of ​​the channel 2, with the channel 2 serving as the outer eaves and the source region 1 serving as the inner eaves to form a hat-like eaves structure.

[0012] The source region 1 is a P-type heavily doped region made of GaSb material with a doping concentration of 5×10 18 cm -3 ~1×10 20 cm -3 ;

[0013] Channel 2 is an N-type lightly doped region made of Si material; the carrier concentration is 1×10 15 cm -3 ~1×10 17 cm -3 ;

[0014] The drain region 6 and the substrate 8 are both N-type heavily doped regions with a doping concentration of 1×10 18 cm -3 ~5×10 19 cm -3 ;

[0015] The high dielectric constant oxide layer 4 is HfO2 or Al2O3;

[0016] The gate metal 5 is chromium or hafnium;

[0017] The source contact 9 and the drain contact 7 are both made of polysilicon.

[0018] The biosensor is axially symmetrical, wherein when the horizontal region of the channel 2 is embedded in the source region 1, the length of the source region 1 is 40nm to 80nm, and the width is 20nm to 40nm; the length of the horizontal portion of the channel 2 is 10nm to 16nm shorter than the length of the source region 1, and the bottom is flush with the bottom of the source region 1, and the width is 10nm to 15nm; the length of the vertical portion of the channel 2 is 10nm to 15nm, and the width is 10nm to 15nm;

[0019] When the source region 1 is embedded in the horizontal region of the channel 2, the length of the horizontal portion of the channel 2 is 40nm to 80nm, the width is 20nm to 40nm, the length of the vertical portion of the channel 2 is 10nm to 15nm, the width is 10nm to 15nm; the bottom of the source region 1 is 5nm to 8nm away from the bottom of the horizontal portion of the channel 2, and the length of the source region 1 is 10nm to 16nm smaller than the length of the horizontal portion of the channel 2;

[0020] The drain region 6 has the same length as the vertical portion of the channel 2 and a width of 10 nm to 20 nm;

[0021] The length of the substrate 8 is 40nm to 80nm, and the width is 20nm to 40nm;

[0022] The sum of the length of the horizontal portion of the biomolecule detection cavity 3 and the length of the vertical portion of the channel 2 is equal to the length of the horizontal portion of the channel 2, and the width of the horizontal portion of the biomolecule detection cavity 3 is 3nm to 5nm; the vertical portion of the biomolecule detection cavity 3 is the same size as the high dielectric constant oxide layer 4, the length of the vertical portion of the biomolecule detection cavity 3 and the high dielectric constant oxide layer 4 is the same as the width of the horizontal portion of the biomolecule detection cavity 3, and the sum of the width of the vertical portion of the biomolecule detection cavity 3 and the width of the high dielectric constant oxide layer 4 is equal to the width of the vertical portion of the channel 2;

[0023] The bottom of the high dielectric constant oxide layer 4 is flush with the bottom of the vertical portion of the trench 2;

[0024] The bottom of the gate metal 5 is flush with the bottom of the high dielectric constant oxide layer 4 , and the side surface is flush with the side surface of the biomolecule detection cavity 3 ;

[0025] Each drain contact 7 is arranged at the edge of the substrate 8, with a length of 8nm to 10nm and a width of 2nm to 3nm;

[0026] The length of the source region contact 9 is consistent with that of the source region 1 , and the width is 2 nm to 3 nm.

[0027] A method for preparing a biosensor having a brim-shaped vertical tunneling field effect transistor comprises the following steps:

[0028] Step 1: Prepare a heavily doped N-type semiconductor as a substrate 8;

[0029] Step 2: depositing a layer of polycrystalline material on the substrate 8 prepared in step 1;

[0030] Step 3: Etch the middle of the polycrystalline material deposited in step 2 to form drain contacts 7 at both ends of the substrate 8, and grow a semiconductor with the same doping concentration and type as the substrate 8 in the central area of ​​the substrate 8 as the drain region 6;

[0031] Step 4: depositing a layer of metal on the drain region 6 grown in step 3;

[0032] Step 5: Etch the middle of the metal deposited in step 4, retain the metal at both ends as gate metal 5, and deposit a layer of dielectric material with a high dielectric constant in the central area;

[0033] Step 6: etching the dielectric material deposited in step 5 to form a biomolecule detection cavity 3 and a high dielectric constant oxide layer 4;

[0034] Step 7: When the horizontal region of the channel 2 is embedded in the source region 1, a T-shaped lightly doped N-type semiconductor is grown in the region etched in step 6 as the channel 2;

[0035] When the source region 1 is embedded in the horizontal region of the channel 2, a T-shaped lightly doped N-type semiconductor grows in the region etched in step 6;

[0036] Step 8: When the horizontal region of the channel 2 is embedded in the source region 1, a layer of heavily doped P-type semiconductor is grown around the horizontal portion of the T-shaped channel 2 grown in step 7 as the source region 1, and a layer of polycrystalline material is deposited on the source region 1 as the source region contact 9;

[0037] When the source region 1 is embedded in the horizontal area of ​​the channel 2, the central area of ​​the horizontal part of the T-type N-type semiconductor grown in step 7 is etched to form the channel 2, and then a layer of heavily doped P-type semiconductor is grown in the etched area as the source region 1, and a layer of polycrystalline material is deposited above the source region 1 as the source region contact 9.

[0038] The heavily doped N-type semiconductor in step 1 is prepared by ion implantation. The heavily doped N-type semiconductor is silicon, and phosphorus (P) is selected as a dopant with a doping concentration of 1×10 18 cm -3 ~5×10 19 cm -3, control the injection energy to 50keV to 200keV, maintain the entire ion injection process at 20°C to 25°C, and after the ion injection is completed, perform thermal annealing to activate the phosphorus ions, the thermal annealing temperature is 600°C to 1000°C, and the thermal annealing time is controlled to be 30 minutes to 60 minutes;

[0039] The deposition of polycrystalline material in step 2 is carried out by using a chemical vapor deposition (CVD) process. First, the CVD reaction chamber is preheated to 500° C. to 700° C., and the pressure in the chamber is controlled at 10 -2 Torr~10 1 Torr, to promote subsequent deposition, dimethylsilane (SiH2(CH3)2) is introduced as a silicon source gas, and the flow rate is set to 50sccm~100sccm, hydrogen (H2) is used as a diluent gas, and the flow rate is set to 200sccm~500sccm, and the silicon source gas is decomposed through chemical reaction in the reaction chamber to deposit an electrode film on the surface of the substrate, and then the deposited electrode film is thermally annealed, the thermal annealing temperature is 500℃~1000℃, and the thermal annealing time is controlled to be 20 minutes~40 minutes;

[0040] The etching in step 3 adopts dry etching technology, uses a high-frequency inductively coupled plasma reactor (ICP-RIE), selects chlorine (Cl2) as the etching gas, sets the RF power at 100W-300W, the frequency at 13.56MHz, the pressure in the etching chamber at 10mTorr-50mTorr, and performs etching at 25°C-30°C, with an etching rate of 30nm / min-50nm / min. A semiconductor with the same doping concentration and type as the substrate 8 is generated by an epitaxial growth process, using silicon material, firstly The silicon substrate for epitaxial growth is cleaned and then placed in an epitaxial growth chamber for subsequent operations. The epitaxial growth chamber is a vacuum or inert gas environment. The growth temperature is set at 1100°C to 1300°C and the pressure is a low-pressure environment of 90Pa to 100Pa. The flow rate of the silicon source gas is set at 15sccm to 20sccm, and the flow rate of hydrogen as a carrier gas is set at 180sccm to 200sccm. During the growth process, phosphine (PH3) is introduced as a dopant gas with a doping concentration of 1×10 18 cm -3 ~5×10 19 cm -3 The growth time is set at 30 minutes to 120 minutes. After the growth is completed, a thermal annealing treatment is performed. The thermal annealing temperature is 400° C. to 800° C., and the thermal annealing time is controlled at 10 minutes to 30 minutes.

[0041] The deposited metal in step 4 is deposited by a reactive sputtering process. The deposited metal is metal chromium or metal hafnium. The reactive sputtering process uses a magnetron sputtering system for deposition. First, the target material is heated to 200°C to 400°C to increase the evaporation rate of the metal. At the same time, the temperature of the substrate is controlled at 100°C to 300°C to avoid thermal damage to the film on the substrate. The pressure of the sputtering chamber is set at 10 -6 Torr~10 -8 Torr, start the sputtering system, heat the target material for depositing metal and apply an electric field to sputter the target material from the surface of the target gun to the silicon substrate, set the sputtering power supply at 100W to 200W to form the required metal film on the semiconductor surface, and after the sputtering process is completed, release the vacuum chamber gas and remove the semiconductor substrate, and use characterization technology to evaluate the morphology, composition and bonding state of the metal film. Characterization technology includes SEM and XPS to ensure the quality and stability of the gate electrode;

[0042] The process of etching the metal in step 5 is a metal gate etching process, a mixed gas of Cl2 and Br2 is selected, the gas volume ratio is (1-3):1, the RF power is set to 200W-300W, the frequency is 13.56MHz, the pressure in the etching chamber is 20mTorr-40mTorr, the etching rate is 50nm / min-70nm / min, and the process of depositing the dielectric material is an atomic layer deposition process (ALD). The deposited dielectric material is HfO2 or Al2O3, the bottom of the dielectric material is flush with the bottom of the metal gate 5, and the width is the sum of the width of the metal gate 5 and the length of the high dielectric constant oxide layer 4. The atomic layer deposition process (ALD) first performs chemical cleaning or hydrogen treatment on the semiconductor material to Remove oxides and organic residues to ensure optimal surface acceptance, use trimethoxy hafnium or trimethoxy aluminum as a precursor for depositing a dielectric layer, introduce the precursor into a reaction chamber, adsorb the precursor on the silicon surface, introduce oxygen or nitrogen to remove unreacted precursors and byproducts, introduce water vapor as an oxidant to react with the adsorbed precursor to generate a dielectric film layer, repeat the purification step to remove byproducts and unreacted gases generated during the reaction, during this process, control the temperature at 200°C to 400°C, and adjust according to the characteristics of the ALD precursor and the reaction conditions, maintain the ambient pressure at 2Torr to 10Torr, and increase the thickness of the dielectric film by repeating the ALD cycle, with each cycle increasing the thickness by 5 angstroms to 20 angstroms;

[0043] The step 6 adopts dry etching, selects an inductively coupled plasma (ICP) etcher and hydrogen fluoride (HF) as the etching gas for operation, the overall ambient temperature needs to be maintained at 20°C to 25°C, starts the selected inductively coupled plasma (ICP) etcher to generate plasma, then inputs hydrogen fluoride (HF) etching gas, ensures that the flow rate is 40sccm to 50sccm, and adjusts the reaction chamber pressure to 40mTorr to 50mTorr to maintain a stable etching atmosphere. At a discharge power of 100W to 300W and a frequency of 13.56MHz, hydrogen fluoride (HF) reacts with the surface of the dielectric layer to generate fluoride, thereby achieving etching. After the etching is completed, cleaning is performed to remove the etching residues;

[0044] The step 7 adopts epitaxial growth technology to form a lightly doped N-type semiconductor, wherein the lightly doped N-type semiconductor is silicon. First, the device is cleaned and then the cleaned silicon substrate is placed in an epitaxial growth chamber for subsequent operations. The epitaxial growth chamber is a vacuum or inert gas environment, and the growth temperature is set at 1100° C. to 1300° C., and the pressure is a low-pressure environment of 90 Pa to 100 Pa. The flow rate of the silicon source gas is set at 15 sccm to 20 sccm, and the flow rate of hydrogen as a carrier gas is set at 180 sccm to 200 sccm. During the growth process, phosphine (PH3) is introduced as a dopant gas, and the doping concentration is 1×10 15 cm -3 ~1×10 17 cm -3 The growth time is set at 30 minutes to 120 minutes. After the growth is completed, the epitaxial layer is thermally annealed to optimize the crystal structure and electrical properties. The thermal annealing temperature is 600°C to 900°C, and the thermal annealing time is controlled at 20 minutes to 40 minutes.

[0045] In step 8, when the horizontal region of the channel 2 is embedded in the source region 1, a molecular beam epitaxy (MBE) technology is used to form a heavily doped P-type semiconductor, and the heavily doped P-type semiconductor is gallium antimonide (GaSb). When the source region 1 is embedded in the horizontal region of the channel 2, dry etching is used, a high-frequency inductively coupled plasma reactor (ICP-RIE) is used, chlorine (Cl2) is selected as the etching gas, the RF power is set to 100W~200W, the frequency is 13.56MHz, the pressure of the etching chamber is 20mTorr~30mTorr, the etching is performed at 25℃~30℃, and the etching rate is 30nm / m in~50nm / min, and then a molecular beam epitaxy (MBE) technology is used to form a heavily doped P-type semiconductor, wherein the heavily doped P-type semiconductor is gallium antimonide (GaSb). First, the silicon substrate for epitaxial growth is cleaned, and then the cleaned silicon substrate is placed in an MOCVD reaction chamber for subsequent operations. The reaction temperature is set to 500℃~700℃, and trimethylgallium (TMGa) and arsenic (AsH3) are used as reaction gases, and the gas volume ratio is 1:(8~12). During the growth process, dimethylgermanium (GeH2) or dimethylzinc (Zn(CH3)2) is added as a dopant, and the doping concentration is 5×10 18 cm -3 ~1×10 20 cm -3 After the growth is completed, a thermal annealing treatment is performed. The thermal annealing temperature is 300°C to 500°C for 30 minutes to 50 minutes. The polycrystalline material is deposited using chemical vapor deposition (CVD) technology. The polycrystalline material is polycrystalline silicon. First, the CVD reaction chamber is preheated to 500°C to 700°C, and the pressure in the chamber is controlled at 10 -2 Torr~10 1 Torr, to promote subsequent deposition, dimethylsilane (SiH2(CH3)2) is introduced as a silicon source gas, and the flow rate is set to 50sccm~100sccm, hydrogen (H2) is used as a diluent gas, and the flow rate is set to 200sccm~500sccm, the silicon source gas is decomposed in the reaction chamber and an electrode film is deposited on the surface of the substrate, and then the deposited electrode film is annealed to improve its crystallinity and electrical properties, the thermal annealing temperature is 500℃~1000℃, and the thermal annealing time is controlled at 20 minutes to 40 minutes.

[0046] The heavily doped N-type semiconductor in step 1 has a length of 40 nm to 80 nm and a width of 20 nm to 40 nm;

[0047] In step 2, the length of the polycrystalline material is consistent with the length of the substrate 8, and the width is 2nm to 3nm;

[0048] In step 3, the drain contact 7 is disposed at the edge of the substrate 8 and has a length of 8 nm to 10 nm. The semiconductor with the same doping concentration and type as the substrate 8 has a length of 10 nm to 15 nm and a width of 10 nm to 20 nm.

[0049] The length of the deposited metal in step 4 is 30nm to 35nm, and the width is 7nm to 10nm;

[0050] The length of the etched area in step 5 is the length of the drain region 6 plus the length of the high dielectric constant oxide layer 4 on both sides, and the length of the high dielectric constant oxide layer 4 on both sides is 3nm to 5nm;

[0051] The vertical part of the biomolecule detection cavity 3 formed in step 6 is the same size as the high dielectric constant oxide layer 4, the length of the horizontal part of the biomolecule detection cavity 3 on both sides is equal to the length of the vertical part of the channel 2, the width of the horizontal part of the biomolecule detection cavity 3 is 3nm to 5nm, the vertical part of the biomolecule detection cavity 3 is placed above the high dielectric constant oxide layer 4, the length is the same as the width of the horizontal part, and the width is equal to the width of the vertical part of the channel 2 when the width is added to the width of the high dielectric constant oxide layer 4; the bottom of the high dielectric constant oxide layer 4 is flush with the bottom of the vertical part of the channel 2, and the length is consistent with the length of the vertical part of the biomolecule detection cavity 3;

[0052] In step 7, when the horizontal region of the channel 2 is embedded in the source region 1, the vertical portion of the channel 2 has a length of 10 nm to 15 nm and a width of 10 nm to 15 nm; the length of the horizontal portion of the channel 2 is the same as the length of the drain region 6 and the length of the horizontal portions of the biomolecule detection cavities 3 on both sides;

[0053] When the source region 1 is embedded in the horizontal region of the channel 2, the horizontal portion of the T-shaped lightly doped N-type semiconductor has a width of 20nm to 40nm and a length of 40nm to 80nm, and the vertical portion of the T-shaped lightly doped N-type semiconductor has a length of 10nm to 15nm and a width of 10nm to 15nm;

[0054] In step 8, when the horizontal region of the channel 2 is embedded in the source region 1, the length of the source region 1 is 40nm to 80nm, and the width is 20nm to 40nm. At the same time, the spacing between the left and right sides of the source region 1 and the left and right sides of the horizontal portion of the channel 2 is the same, which is 5nm to 8nm. The length of the source region contact 9 is consistent with the length of the source region 1, and the width is 2nm to 3nm.

[0055] When the source region 1 is embedded in the horizontal area of ​​the channel 2, the bottom of the source region 1 is 5nm to 8nm above the bottom of the horizontal part of the channel 2, and the two sides of the source region 1 are inside the two sides of the horizontal part of the channel 2, and the spacing between the two sides is 5nm to 10nm; the material of the source region contact 9 is polycrystalline silicon, the length is consistent with the length of the source region 1, and the width is 2nm to 3nm.

[0056] Compared with the prior art, the beneficial effects of the present invention are:

[0057] 1. The present invention adopts a cap-shaped structure at the tunnel junction to increase the tunneling area of ​​the carriers. At the same time, due to the embedding of the inner cap-shaped channel 2, the carriers in the source region 1 will not only undergo lateral tunneling, but also vertical tunneling. When the voltage of the gate metal 5 gradually increases, the cap-shaped structure makes the device have a mutation point at a certain gate voltage, and the value of the on-current increases sharply. Compared with the recently published TFET biosensor device, the present invention effectively solves the defect of insufficient on-current of TFET.

[0058] 2. The biomolecule detection cavity 3 of the present invention adopts a bent structure, which increases the effective coupling degree between the gate metal 5 and the channel 2. The cavity arranged in the horizontal direction not only effectively affects the lateral tunneling occurring at the eaves, but also affects the vertical tunneling occurring at the eaves. The biosensor based on this structure can greatly change the electrical properties before and after the coupling of biomolecules and exhibits excellent sensitivity performance.

[0059] 3. The cap brim structure of the present invention increases the probability of band-to-band tunneling of carriers in the source region, effectively suppresses the barrier width at the tunneling junction, and enables the biosensor to exhibit excellent electrical properties at a lower voltage and can be used in the field of low power consumption.

[0060] 4. The structure of embedding the channel in the source region of the present invention increases the modulation effect of the biomolecules in the cavity region on the energy band at the tunnel junction, and increases the detection capability of the biosensor to the biomolecules before and after coupling.

[0061] 5. The present invention forms a drain contact 7 on an N-type heavily doped substrate 8 by chemical vapor deposition and dry etching technology, forms a biomolecule detection cavity 3 and a high dielectric constant oxide layer 4 by atomic layer deposition and dry etching technology, then grows a drain region 6, a channel 2 and a source region 1 by epitaxial growth process, forms a gate metal 5 on the surface of the biomolecule detection cavity 3 and the high dielectric constant oxide layer 4 by reactive sputtering process, and forms a polysilicon contact on the surface of the substrate 8 and the source region 1 by chemical vapor deposition. Compared with the existing biosensor with germanium silicon buried source region described in the background technology, the preparation process of such complex structures is simpler, reducing the process cost.

[0062] In summary, the present invention has the advantages of high conduction current, high sensitivity in detecting biomolecules, the ability to work at a relatively low voltage, the ability to meet low power consumption requirements, and a relatively simple preparation process. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] Figure 1 It is a schematic diagram of the structure of the biosensor of the present invention in which the channel 2 is embedded in the source region 1.

[0064] Figure 2 It is a schematic diagram of the structure of the source region 1 of the biosensor of the present invention embedded in the channel 2.

[0065] Figure 3 The flowchart of the structure preparation of the biosensor according to the present invention in which the channel 2 is embedded in the source region 1 is shown.

[0066] Figure 4 The flowchart of the structure preparation of the source region 1 of the biosensor of the present invention embedded in the channel 2 is shown.

[0067] Figure 5 This is a transfer characteristic curve diagram simulated by computer-aided design software of the biosensor of the present invention.

[0068] Figure 6 The figure is a comparison of the on-current sensitivity of the biosensor of the present invention and the traditional VTFET biosensor for biomolecules with different dielectric constants.

[0069] Figure 7 This is a transfer characteristic curve diagram of the biosensor of the present invention in which the source region 1 is embedded in the channel 2 using computer-aided design software simulation. Figure 8 This is a comparison diagram of the on-current sensitivity of the biosensor of the present invention in which the source region 1 is embedded in the channel 2 and the traditional VTFET biosensor in biomolecules with different dielectric constants. In the figure, 1 is the source region; 2 is the channel; 3 is the biomolecule detection cavity; 4 is the high dielectric constant oxide layer; 5 is the gate metal; 6 is the drain region; 7 is the drain region contact; 8 is the substrate; and 9 is the source region contact. DETAILED DESCRIPTION

[0070] The present invention will be described in detail below in conjunction with the accompanying drawings.

[0071] Example 1

[0072] See also Figure 1, a biosensor with a vertical tunneling field effect transistor in the shape of a brim, the biosensor comprises a substrate 8, drain contacts 7 are mirror-imaged at both ends of the upper surface of the substrate 8, a drain region 6 is disposed on the upper surface of the substrate 8 between the two drain contacts 7, a T-shaped channel 2 is disposed on the upper surface of the drain region 6, high dielectric constant oxide layers 4 are mirror-imaged on both sides of the bottom of the vertical region of the channel 2, a gate metal 5 is disposed on the side of each high dielectric constant oxide layer 4 away from the channel 2, a bent biomolecule detection cavity 3 is formed between the gate metal 5, the high dielectric constant oxide layer 4 and the channel 2, the horizontal region of the channel 2 is embedded in the source region 1, the source region 1 is used as an outer brim and the channel 2 is used as an inner brim to form a brim-shaped structure, and a source region contact 9 is disposed on the upper surface of the source region 1;

[0073] The source region 1 is a P-type heavily doped region made of GaSb material with a doping concentration of 5×10 18 cm -3 ;

[0074] Channel 2 is an N-type lightly doped region made of Si material; the carrier concentration is 1×10 15 cm -3 ;

[0075] The drain region 6 and the substrate 8 are both N-type heavily doped regions with a doping concentration of 1×10 18 cm -3 ;

[0076] The high dielectric constant oxide layer 4 is HfO2;

[0077] The gate metal 5 is chromium;

[0078] The source contact 9 and the drain contact 7 are both made of polysilicon.

[0079] The biosensor is axially symmetrical, wherein the source region 1 is 40 nm long and 20 nm wide; the horizontal portion of the channel 2 is 10 nm shorter than the source region 1, and the bottom is flush with the bottom of the source region 1, and the width is 10 nm; the vertical portion of the channel 2 is 10 nm long and 10 nm wide;

[0080] The drain region 6 has the same length as the vertical portion of the channel 2 and a width of 10 nm;

[0081] The length of substrate 8 is 40 nm and the width is 20 nm;

[0082] The sum of the length of the horizontal portion of the biomolecule detection cavity 3 and the length of the vertical portion of the channel 2 is equal to the length of the horizontal portion of the channel 2, and the width of the horizontal portion of the biomolecule detection cavity 3 is 3 nm; the vertical portion of the biomolecule detection cavity 3 is the same size as the high dielectric constant oxide layer 4, the length of the vertical portion of the biomolecule detection cavity 3 and the high dielectric constant oxide layer 4 is the same as the width of the horizontal portion of the biomolecule detection cavity 3, and the sum of the width of the vertical portion of the biomolecule detection cavity 3 and the width of the high dielectric constant oxide layer 4 is equal to the width of the vertical portion of the channel 2;

[0083] The bottom of the high dielectric constant oxide layer 4 is flush with the bottom of the vertical portion of the trench 2;

[0084] The bottom of the gate metal 5 is flush with the bottom of the high dielectric constant oxide layer 4 , and the side surface is flush with the side surface of the biomolecule detection cavity 3 ;

[0085] Each drain contact 7 is disposed at the edge of the substrate 8 and has a length of 8 nm and a width of 2 nm;

[0086] The length of the source region contact 9 is consistent with that of the source region 1 and the width is 2 nm.

[0087] See also Figure 3 , a method for preparing a biosensor having a brim-shaped vertical tunneling field effect transistor, comprising the following steps:

[0088] Step 1: Prepare a heavily doped N-type semiconductor as a substrate 8;

[0089] Step 2: depositing a layer of polycrystalline material on the substrate 8 prepared in step 1;

[0090] Step 3: Etch the middle of the polycrystalline material deposited in step 2 to form drain contacts 7 at both ends of the substrate 8, and grow a semiconductor with the same doping concentration and type as the substrate 8 in the central area of ​​the substrate 8 as the drain region 6;

[0091] Step 4: depositing a layer of metal on the drain region 6 grown in step 3;

[0092] Step 5: Etch the middle of the metal deposited in step 4, retain the metal at both ends as gate metal 5, and deposit a layer of dielectric material with a high dielectric constant in the central area;

[0093] Step 6: etching the dielectric material deposited in step 5 to form a biomolecule detection cavity 3 and a high dielectric constant oxide layer 4;

[0094] Step 7: growing a T-shaped lightly doped N-type semiconductor in the area etched in step 6 as channel 2;

[0095] Step 8: Grow another layer of heavily doped P-type semiconductor around the horizontal portion of the T-shaped channel 2 grown in step 7 as the source region 1, and deposit a layer of polycrystalline material on the source region 1 as the source region contact 9.

[0096] The heavily doped N-type semiconductor in step 1 is prepared by ion implantation. The heavily doped N-type semiconductor is silicon, and phosphorus (P) is selected as a dopant with a doping concentration of 1×10 18 cm -3 , the injection energy is controlled to be 50keV, the entire ion injection process is carried out at 20°C, after the ion injection is completed, thermal annealing is performed to activate the phosphorus ions, the thermal annealing temperature is 600°C, and the thermal annealing time is controlled to be 30 minutes;

[0097] The deposition of polycrystalline material in step 2 is carried out by using a chemical vapor deposition (CVD) process. First, the CVD reaction chamber is preheated to 500° C. and the pressure in the chamber is controlled at 10 -2 Torr, to promote subsequent deposition, dimethylsilane (SiH2(CH3)2) was introduced as the silicon source gas, with a flow rate of 50sccm, and hydrogen (H2) was used as the diluent gas, with a flow rate of 200sccm. The silicon source gas was decomposed by chemical reaction in the reaction chamber and an electrode film was deposited on the substrate surface. The deposited electrode film was then thermally annealed at a temperature of 500°C for 20 minutes.

[0098] The etching in step 3 adopts dry etching technology, uses a high-frequency inductively coupled plasma reactor (ICP-RIE), selects chlorine (Cl2) as the etching gas, sets the RF power at 100W, the frequency at 13.56MHz, the pressure of the etching chamber at 10mTorr, and performs etching at 25°C with an etching rate of 30nm / min. A semiconductor with the same doping concentration and type as substrate 8 is generated by an epitaxial growth process, using silicon material. First, the silicon substrate for epitaxial growth is cleaned, and then the cleaned silicon substrate is placed in the epitaxial growth chamber for subsequent operations. The epitaxial growth chamber is a vacuum gas environment, and the growth temperature is set at 1100°C, and the pressure is a low-pressure environment of 90Pa. The flow rate of the silicon source gas is set at 15sccm, and the flow rate of hydrogen as a carrier gas is set at 180sccm. During the growth process, phosphine (PH3) is introduced as a dopant gas with a doping concentration of 1×10 18 cm -3 The growth time is set at 30 minutes. After the growth is completed, it is subjected to thermal annealing treatment. The thermal annealing temperature is 400°C and the thermal annealing time is controlled at 10 minutes.

[0099] The deposited metal in step 4 is deposited by a reactive sputtering process. The deposited metal is chromium. The reactive sputtering process uses a magnetron sputtering system for deposition. First, the target is heated to 200°C to increase the evaporation rate of the metal. At the same time, the temperature of the substrate is controlled at 100°C to avoid thermal damage to the film on the substrate. The pressure of the sputtering chamber is set at 10 -6 Torr, start the sputtering system, heat the target material for depositing metal and apply an electric field to sputter the target material from the surface of the target gun to the silicon substrate, set the sputtering power at 100W to form the required metal film on the semiconductor surface, and after the sputtering process is completed, release the vacuum chamber gas and remove the semiconductor substrate, and use characterization technology to evaluate the morphology, composition and bonding state of the metal film. The characterization technology is SEM to ensure the quality and stability of the gate electrode;

[0100] The process of etching the metal in step 5 is a metal gate etching process, a mixed gas of Cl2 and Br2 is selected, the gas volume ratio is 1:1, the RF power is set to 200W, the frequency is 13.56MHz, the pressure in the etching chamber is 20mTorr, the etching rate is 50nm / min, and the process of depositing the dielectric material is an atomic layer deposition process (ALD). The deposited dielectric material is HfO2, the bottom of the dielectric material is flush with the bottom of the metal gate 5, and the width is the sum of the width of the metal gate 5 and the length of the high dielectric constant oxide layer 4. The atomic layer deposition process (ALD) first chemically cleans the semiconductor material to remove oxides and Organic residues, to ensure the best surface acceptance, trimethoxy hafnium is used as a precursor for depositing the dielectric layer, the precursor is introduced into the reaction chamber, the precursor is adsorbed on the silicon surface, oxygen is introduced to remove unreacted precursors and byproducts, water vapor is introduced as an oxidant, and reacts with the adsorbed precursor to form a dielectric layer film layer, and the purification step is repeated to remove byproducts and unreacted gases generated during the reaction. During this process, the temperature is controlled at 200°C and adjusted according to the characteristics of the ALD precursor and the reaction conditions. The ambient pressure is maintained at 2Torr, and the thickness of the dielectric layer film is increased by repeating the ALD cycle, and the thickness increases by 5 angstroms each cycle;

[0101] The step 6 adopts dry etching, selects an inductively coupled plasma (ICP) etcher and hydrogen fluoride (HF) as the etching gas for operation, the overall ambient temperature needs to be maintained at 20° C. The inductively coupled plasma (ICP) etcher is started to generate plasma, and then hydrogen fluoride (HF) etching gas is input to ensure that the flow rate is 40 sccm. The pressure of the reaction chamber is adjusted to 40 mTorr to maintain a stable etching atmosphere. At a discharge power of 100 W and a frequency of 13.56 MHz, hydrogen fluoride (HF) reacts with the surface of the dielectric layer to generate fluoride, thereby achieving etching. After the etching is completed, cleaning is performed to remove the etching residues;

[0102] The step 7 adopts epitaxial growth technology to form a lightly doped N-type semiconductor, wherein the lightly doped N-type semiconductor is silicon. First, the device is cleaned and then the cleaned silicon substrate is placed in an epitaxial growth chamber for subsequent operations. The epitaxial growth chamber is a vacuum or inert gas environment, and the growth temperature is set at 1100° C. and the pressure is set to a low-pressure environment of 90 Pa. The flow rate of the silicon source gas is set at 15 sccm, and the flow rate of hydrogen as a carrier gas is set at 180 sccm. During the growth process, phosphine (PH3) is introduced as a dopant gas, and the doping concentration is 1×10 15 cm -3 The growth time is set at 30 minutes. After the growth is completed, the epitaxial layer is thermally annealed to optimize the crystal structure and electrical properties. The thermal annealing temperature is 600°C and the thermal annealing time is controlled at 20 minutes.

[0103] The step 8 uses molecular beam epitaxy (MBE) technology to form a heavily doped P-type semiconductor, wherein the heavily doped P-type semiconductor is gallium antimonide (GaSb), and then uses molecular beam epitaxy (MBE) technology to form a heavily doped P-type semiconductor, wherein the heavily doped P-type semiconductor is gallium antimonide (GaSb). First, the silicon substrate for epitaxial growth is cleaned, and then the cleaned silicon substrate is placed in an MOCVD reaction chamber for subsequent operations. The reaction temperature is set to 500° C., trimethyl gallium (TMGa) and arsenic (AsH3) are used as reaction gases, and the gas volume ratio is 1:8. During the growth process, dimethyl germanium (GeH2) is added as a dopant, and the doping concentration is 5×10 18 cm -3 After the growth is completed, thermal annealing is performed. The thermal annealing temperature is 300°C and the time is 30 minutes. The polycrystalline material is deposited using chemical vapor deposition (CVD) technology. The polycrystalline material is polycrystalline silicon. First, the CVD reaction chamber is preheated to 500°C and the pressure in the chamber is controlled at 10 -2 Torr, to promote subsequent deposition, dimethylsilane (SiH2(CH3)2) is introduced as the silicon source gas with a flow rate of 50sccm, and hydrogen (H2) is used as the diluent gas with a flow rate of 200sccm. The silicon source gas is decomposed in the reaction chamber and an electrode film is deposited on the surface of the substrate. The deposited electrode film is then annealed to improve its crystallinity and electrical properties. The thermal annealing temperature is 500°C and the thermal annealing time is controlled to 20 minutes.

[0104] The heavily doped N-type semiconductor in step 1 has a length of 40 nm and a width of 20 nm;

[0105] In step 2, the length of the polycrystalline material is consistent with the length of the substrate 8, and the width is 2 nm;

[0106] In step 3, the drain contact 7 is disposed at the edge of the substrate 8 and has a length of 8 nm. The semiconductor with the same doping concentration and type as the substrate 8 has a length of 10 nm and a width of 10 nm.

[0107] The deposited metal in step 4 has a length of 30 nm and a width of 7 nm;

[0108] The length of the etched area in step 5 is the length of the drain region 6 plus the length of the high dielectric constant oxide layer 4 on both sides, and the length of the high dielectric constant oxide layer 4 on both sides is 3 nm;

[0109] The vertical part of the biomolecule detection cavity 3 formed in step 6 is the same size as the high dielectric constant oxide layer 4, the length of the horizontal part of the biomolecule detection cavity 3 on both sides is equal to the length of the vertical part of the channel 2, the width of the horizontal part of the biomolecule detection cavity 3 is 3nm, the vertical part of the biomolecule detection cavity 3 is placed above the high dielectric constant oxide layer 4, the length is the same as the width of the horizontal part, and the width is equal to the width of the vertical part of the channel 2 when the width is added to the width of the high dielectric constant oxide layer 4; the bottom of the high dielectric constant oxide layer 4 is flush with the bottom of the vertical part of the channel 2, and the length is consistent with the length of the vertical part of the biomolecule detection cavity 3;

[0110] In step 7, the vertical portion of the channel 2 is 10 nm long and 10 nm wide; the horizontal portion of the channel 2 is the same length as the drain region 6 and the horizontal portion of the biomolecule detection chambers 3 on both sides;

[0111] In step 8, the length of the source region 1 is 40nm and the width is 20nm. At the same time, the spacing between the left and right sides of the source region 1 and the left and right sides of the horizontal part of the channel 2 is the same, which is 5nm. The length of the source region contact 9 is consistent with the length of the source region 1 and the width is 2nm.

[0112] Example 2

[0113] See also Figure 2 , a biosensor with a vertical tunneling field effect transistor in the shape of a brim, the biosensor comprises a substrate 8, drain contacts 7 are mirror-imaged at both ends of the upper surface of the substrate 8, a drain region 6 is disposed on the upper surface of the substrate 8 between the two drain contacts 7, a T-shaped channel 2 is disposed on the upper surface of the drain region 6, high dielectric constant oxide layers 4 are mirror-imaged on both sides of the bottom of the vertical region of the channel 2, each high dielectric constant oxide layer 4 is disposed on a side away from the channel 2, a bent biomolecule detection cavity 3 is formed between the gate metal 5, the high dielectric constant oxide layer 4 and the channel 2, a source region 1 is embedded in the horizontal region of the channel 2, the channel 2 is used as an outer brim and the source region 1 is used as an inner brim to form a brim-shaped structure, and a source region contact 9 is disposed on the upper surface of the source region 1;

[0114] The source region 1 is a P-type heavily doped region made of GaSb material with a doping concentration of 1×10 20 cm -3 ;

[0115] Channel 2 is an N-type lightly doped region made of Si material; the carrier concentration is 1×10 17 cm -3 ;

[0116] The drain region 6 and the substrate 8 are both N-type heavily doped regions with a doping concentration of 5×10 19 cm -3 ;

[0117] The high dielectric constant oxide layer 4 is Al2O3;

[0118] The gate metal 5 is hafnium;

[0119] The source contact 9 and the drain contact 7 are both made of polysilicon.

[0120] The biosensor is axially symmetrical, wherein the length of the horizontal portion of the channel 2 is 80 nm and the width is 40 nm, and the length of the vertical portion of the channel 2 is 15 nm and the width is 15 nm; the bottom of the source region 1 is 8 nm away from the bottom of the horizontal portion of the channel 2, and the length of the source region 1 is 16 nm shorter than the length of the horizontal portion of the channel 2;

[0121] The drain region 6 has the same length as the vertical portion of the channel 2 and a width of 20 nm;

[0122] The length of substrate 8 is 80 nm and the width is 40 nm;

[0123] The sum of the length of the horizontal portion of the biomolecule detection cavity 3 and the length of the vertical portion of the channel 2 is equal to the length of the horizontal portion of the channel 2, and the width of the horizontal portion of the biomolecule detection cavity 3 is 5 nm; the vertical portion of the biomolecule detection cavity 3 is the same size as the high dielectric constant oxide layer 4, the length of the vertical portion of the biomolecule detection cavity 3 and the high dielectric constant oxide layer 4 is the same as the width of the horizontal portion of the biomolecule detection cavity 3, and the sum of the width of the vertical portion of the biomolecule detection cavity 3 and the width of the high dielectric constant oxide layer 4 is equal to the width of the vertical portion of the channel 2;

[0124] The bottom of the high dielectric constant oxide layer 4 is flush with the bottom of the vertical portion of the trench 2;

[0125] The bottom of the gate metal 5 is flush with the bottom of the high dielectric constant oxide layer 4 , and the side surface is flush with the side surface of the biomolecule detection cavity 3 ;

[0126] Each drain contact 7 is disposed at the edge of the substrate 8 and has a length of 10 nm and a width of 3 nm;

[0127] The length of the source region contact 9 is consistent with that of the source region 1 , and the width is 3 nm.

[0128] See also Figure 4 , a method for preparing a biosensor having a brim-shaped vertical tunneling field effect transistor, comprising the following steps:

[0129] Step 1: Prepare a heavily doped N-type semiconductor as a substrate 8;

[0130] Step 2: depositing a layer of polycrystalline material on the substrate 8 prepared in step 1;

[0131] Step 3: Etch the middle of the polycrystalline material deposited in step 2 to form drain contacts 7 at both ends of the substrate 8, and grow a semiconductor with the same doping concentration and type as the substrate 8 in the central area of ​​the substrate 8 as the drain region 6;

[0132] Step 4: depositing a layer of metal on the drain region 6 grown in step 3;

[0133] Step 5: Etch the middle of the metal deposited in step 4, retain the metal at both ends as gate metal 5, and deposit a layer of dielectric material with a high dielectric constant in the central area;

[0134] Step 6: etching the dielectric material deposited in step 5 to form a biomolecule detection cavity 3 and a high dielectric constant oxide layer 4;

[0135] Step 7: Grow a T-shaped lightly doped N-type semiconductor in the area etched in step 6;

[0136] Step 8: Etch the central area of ​​the horizontal part of the T-shaped N-type semiconductor grown in step 7 to form a channel 2, then grow a layer of heavily doped P-type semiconductor as a source region 1 in the etched area, and deposit a layer of polycrystalline material on the source region 1 as a source region contact 9.

[0137] The heavily doped N-type semiconductor in step 1 is prepared by ion implantation. The heavily doped N-type semiconductor is silicon, and phosphorus (P) is selected as a dopant with a doping concentration of 5×10 19 cm -3 , the injection energy is controlled to be 200keV, the entire ion injection process is carried out at 25°C, after the ion injection is completed, thermal annealing is performed to activate the phosphorus ions, the thermal annealing temperature is 1000°C, and the thermal annealing time is controlled to be 60 minutes;

[0138] The deposition of polycrystalline material in step 2 is carried out by using a chemical vapor deposition (CVD) process. First, the CVD reaction chamber is preheated to 700° C. and the pressure in the chamber is controlled at 10 1Torr, to promote subsequent deposition, dimethylsilane (SiH2(CH3)2) was introduced as the silicon source gas, with a flow rate of 100 sccm, and hydrogen (H2) was used as the diluent gas, with a flow rate of 500 sccm. The silicon source gas was decomposed by chemical reaction in the reaction chamber and an electrode film was deposited on the substrate surface. The deposited electrode film was then thermally annealed at a temperature of 1000°C for 40 minutes.

[0139] The etching in step 3 adopts dry etching technology, uses a high-frequency inductively coupled plasma reactor (ICP-RIE), selects chlorine (Cl2) as the etching gas, sets the RF power at 300W, the frequency at 13.56MHz, the pressure of the etching chamber at 50mTorr, and performs etching at 30°C with an etching rate of 50nm / min to generate a semiconductor with the same doping concentration and type as substrate 8. An epitaxial growth process is adopted, using silicon material. First, the silicon substrate for epitaxial growth is cleaned, and then the cleaned silicon substrate is placed in the epitaxial growth chamber for subsequent operations. The epitaxial growth chamber is a vacuum or inert gas environment, and the growth temperature is set at 1300°C, and the pressure is a low-pressure environment of 100Pa. The flow rate of the silicon source gas is set at 20sccm, and the flow rate of hydrogen as a carrier gas is set at 200sccm. During the growth process, phosphine (PH3) is introduced as a dopant gas with a doping concentration of 5×10 19 cm -3 The growth time is set at 120 minutes. After the growth is completed, it is subjected to thermal annealing treatment. The thermal annealing temperature is 800°C and the thermal annealing time is controlled at 30 minutes.

[0140] The deposited metal in step 4 is deposited by a reactive sputtering process. The deposited metal is hafnium metal. The reactive sputtering process uses a magnetron sputtering system for deposition. First, the target material is heated to 400°C to increase the evaporation rate of the metal. At the same time, the temperature of the substrate is controlled at 300°C to avoid thermal damage to the film on the substrate. The pressure of the sputtering chamber is set at 10 -8 Torr, start the sputtering system, heat the target material for depositing metal and apply an electric field to sputter the target material from the surface of the target gun to the silicon substrate, set the sputtering power at 200W to form the required metal film on the semiconductor surface, and after the sputtering process is completed, release the vacuum chamber gas and remove the semiconductor substrate, and use the characterization technology to evaluate the morphology, composition and bonding state of the metal film. The characterization technology is XPS to ensure the quality and stability of the gate electrode;

[0141] The process of etching the metal in step 5 is a metal gate etching process, a mixed gas of Cl2 and Br2 is selected, the gas volume ratio is 3:1, the RF power is set to 300W, the frequency is 13.56MHz, the pressure in the etching chamber is 40mTorr, the etching rate is 70nm / min, and the process of depositing the dielectric material is an atomic layer deposition process (ALD). The deposited dielectric material is Al2O3, the bottom of the dielectric material is flush with the bottom of the metal gate 5, and the width is the sum of the width of the metal gate 5 and the length of the high dielectric constant oxide layer 4. The atomic layer deposition process (ALD) first treats the semiconductor material with hydrogen to remove the oxide and Organic residues, to ensure the best surface acceptance, trimethoxyaluminum is used as a precursor for depositing the dielectric layer, the precursor is introduced into the reaction chamber, the precursor is adsorbed on the silicon surface, nitrogen is introduced to remove unreacted precursors and byproducts, water vapor is introduced as an oxidant, and reacts with the adsorbed precursor to form a dielectric layer film, and the purification step is repeated to remove byproducts and unreacted gases generated during the reaction. During this process, the temperature is controlled at 400°C and adjusted according to the characteristics of the ALD precursor and the reaction conditions. The ambient pressure is maintained at 10 Torr, and the thickness of the dielectric layer film is increased by repeating the ALD cycle, and the thickness increases by 20 angstroms per cycle;

[0142] The step 6 adopts dry etching, selects an inductively coupled plasma (ICP) etcher and hydrogen fluoride (HF) as the etching gas for operation, the overall ambient temperature needs to be maintained at 25° C. The inductively coupled plasma (ICP) etcher is started to generate plasma, and then hydrogen fluoride (HF) etching gas is input to ensure that the flow rate is 50 sccm. The pressure of the reaction chamber is adjusted to 50 mTorr to maintain a stable etching atmosphere. At a discharge power of 300 W and a frequency of 13.56 MHz, hydrogen fluoride (HF) reacts with the surface of the dielectric layer to generate fluoride, thereby achieving etching. After the etching is completed, cleaning is performed to remove the etching residues;

[0143] The step 7 adopts epitaxial growth technology to form a lightly doped N-type semiconductor, wherein the lightly doped N-type semiconductor is silicon. First, the device is cleaned and then the cleaned silicon substrate is placed in an epitaxial growth chamber for subsequent operations. The epitaxial growth chamber is a vacuum or inert gas environment, and the growth temperature is set at 1300° C. and the pressure is a low-pressure environment of 100 Pa. The flow rate of the silicon source gas is set at 20 sccm, and the flow rate of hydrogen as a carrier gas is set at 200 sccm. During the growth process, phosphine (PH3) is introduced as a dopant gas, and the doping concentration is 1×10 17 cm -3 The growth time is set at 120 minutes. After the growth is completed, the epitaxial layer is thermally annealed to optimize the crystal structure and electrical properties. The thermal annealing temperature is 900°C and the thermal annealing time is controlled at 40 minutes.

[0144] The step 8 adopts dry etching, uses a high-frequency inductively coupled plasma reactor (ICP-RIE), selects chlorine (Cl2) as the etching gas, sets the RF power to 200W, the frequency to 13.56MHz, the pressure of the etching chamber to 30mTorr, and performs etching at 30°C with an etching rate of 50nm / min. Then, a molecular beam epitaxy (MBE) technique is used to form a heavily doped P-type semiconductor, wherein the heavily doped P-type semiconductor is gallium antimonide (GaSb). First, the silicon substrate for epitaxial growth is cleaned, and then the cleaned silicon substrate is placed in the MOCVD reaction chamber for subsequent operations. The reaction temperature is set to 700°C, and trimethyl gallium (TMGa) and arsenic (AsH3) are used as reaction gases with a gas volume ratio of 1:12. During the growth process, dimethyl zinc (Zn(CH3)2) is added as a dopant with a doping concentration of 1×10 20 cm -3 After the growth is completed, thermal annealing is performed. The thermal annealing temperature is 500°C and the time is 50 minutes. The polycrystalline material is deposited using chemical vapor deposition (CVD) technology. The polycrystalline material is polycrystalline silicon. First, the CVD reaction chamber is preheated to 700°C and the pressure in the chamber is controlled at 10 1 Torr, to promote subsequent deposition, dimethylsilane (SiH2(CH3)2) is introduced as the silicon source gas with a flow rate of 100sccm, and hydrogen (H2) is used as the diluent gas with a flow rate of 500sccm. The silicon source gas is decomposed in the reaction chamber and an electrode film is deposited on the surface of the substrate. The deposited electrode film is then annealed to improve its crystallinity and electrical properties. The thermal annealing temperature is 1000°C and the thermal annealing time is controlled at 40 minutes.

[0145] The heavily doped N-type semiconductor in step 1 has a length of 80 nm and a width of 40 nm;

[0146] In step 2, the length of the polycrystalline material is consistent with the length of the substrate 8, and the width is 3 nm;

[0147] In step 3, the drain contact 7 is disposed at the edge of the substrate 8 and has a length of 10 nm. The semiconductor with the same doping concentration and type as the substrate 8 has a length of 15 nm and a width of 20 nm.

[0148] The deposited metal in step 4 has a length of 35 nm and a width of 10 nm;

[0149] The length of the etched area in step 5 is the length of the drain region 6 plus the length of the high dielectric constant oxide layer 4 on both sides, and the length of the high dielectric constant oxide layer 4 on both sides is 5 nm;

[0150] The vertical part of the biomolecule detection cavity 3 formed in step 6 is the same size as the high dielectric constant oxide layer 4, the length of the horizontal part of the biomolecule detection cavity 3 on both sides is equal to the length of the vertical part of the channel 2, the width of the horizontal part of the biomolecule detection cavity 3 is 5nm, the vertical part of the biomolecule detection cavity 3 is placed above the high dielectric constant oxide layer 4, the length is the same as the width of the horizontal part, and the width is equal to the width of the vertical part of the channel 2 when the width is added to the width of the high dielectric constant oxide layer 4; the bottom of the high dielectric constant oxide layer 4 is flush with the bottom of the vertical part of the channel 2, and the length is consistent with the length of the vertical part of the biomolecule detection cavity 3;

[0151] In step 7, the horizontal portion of the T-shaped lightly doped N-type semiconductor has a width of 40 nm and a length of 80 nm, and the vertical portion of the T-shaped lightly doped N-type semiconductor has a length of 15 nm and a width of 15 nm;

[0152] In step 8, the bottom of the source region 1 is 8 nm above the bottom of the horizontal portion of the channel 2, and both sides of the source region 1 are inside the horizontal portion of the channel 2, with a spacing of 10 nm on both sides; the material of the source region contact 9 is polysilicon, the length is consistent with the length of the source region 1, and the width is 3 nm.

[0153] Simulation experiment

[0154] Figure 5 The transfer characteristic curves obtained by the biosensor of Example 1 for detecting biomolecules with different dielectric constants. In the figure, K=3, 7, and 12 represent biomolecules with different dielectric constants, while K=1 represents the dielectric constant of air, i.e., the situation when no biomolecules enter. V DS represents the drain-source voltage; since the brim structure increases the area of ​​the tunneling region, the sensor can operate at a lower voltage and have a larger on-current. Figure 5 It can be seen that when detecting biological molecules with K = 12, it reaches about 8.71×10 -5 A / μm, reaching about 3.28×10 -6 A / μm, reaching about 3.12×10 -10 A / μm. Figure 6 : is a sensitivity comparison diagram of the biosensor of Example 1 and the traditional TFET biosensor when detecting biomolecules with different dielectric constants. The sensitivity is obtained by calculating the ratio of the saturated conduction current when biomolecules with different dielectric constants enter the cavity to the saturated conduction current when air enters the cavity, where V GS Represents the drain-source voltage, V DS Represents the drain-source voltage. Figure 6It can be seen that the sensitivity is about 102 when detecting biomolecules with K=3, and the sensitivity is about 6.05×10 5 , when detecting biological molecules with K=12, it is about 1.84×10 7 , indicating that the biosensor structure prepared by the present invention has a higher sensitivity for detecting biomolecules with larger dielectric constants. Compared with the traditional TFET biosensor, the sensitivity of the biomolecules with K=3 is improved by about 2.2 times, and the sensitivity of the biomolecules with K=7 is improved by about 1.7×10 3 times, and the detection of K = 12 biomolecules has been improved by about 8.6 × 10 3 times, indicating that the biosensor prepared by the present invention has higher sensitivity.

[0155] Figure 7 The transfer characteristic curves obtained by the biosensor of Example 2 for detecting biomolecules with different dielectric constants. In the figure, K=3, 7, and 12 represent biomolecules with different dielectric constants, while K=1 represents the dielectric constant of air, i.e., the situation when no biomolecules enter. V DS represents the drain-source voltage; since the brim structure increases the area of ​​the tunneling region, the sensor can operate at a lower voltage and have a larger on-current. Figure 7 It can be seen that when detecting biological molecules with K = 12, the value reached about 1.23×10 -4 A / μm, reaching about 2.63×10 -6 A / μm, reaching about 5.05×10 -10 A / μm. Figure 8 : is a sensitivity comparison diagram of the biosensor of Example 2 and the traditional TFET biosensor when detecting biomolecules with different dielectric constants. The sensitivity is obtained by calculating the ratio of the saturated conduction current when biomolecules with different dielectric constants enter the cavity to the saturated conduction current when air enters the cavity, where V GS Represents the drain-source voltage, V DS Represents the drain-source voltage. Figure 8 It can be seen that the sensitivity is about 124 when detecting biomolecules with K=3, and the sensitivity is about 6.55×10 5 , when detecting biological molecules with K=12, it is about 3.08×10 7, indicating that the biosensor structure prepared by the present invention has a higher sensitivity for detecting biomolecules with larger dielectric constants. Compared with the traditional TFET biosensor, the sensitivity of the biomolecules with K=3 is improved by about 2.7 times, and the sensitivity of the biomolecules with K=7 is improved by about 3.0×10 3 times, and improved by about 1.4×10 when detecting biological molecules with K=12 compared to traditional TFET biosensors. 4 times, indicating that the biosensor prepared by the present invention has higher sensitivity.

Claims

1. A biosensor having a vertical tunneling field effect transistor in the shape of a brim, the biosensor comprising a substrate (8), characterized in that: Drain contacts (7) are mirror-imaged at both ends of the upper surface of the substrate (8); a drain region (6) is disposed on the upper surface of the substrate (8) between the two drain contacts (7); a T-shaped channel (2) is disposed on the upper surface of the drain region (6); high dielectric constant oxide layers (4) are mirror-imaged at both sides of the bottom of the vertical region of the channel (2); a gate metal (5) is disposed on the side of each high dielectric constant oxide layer (4) away from the channel (2); a bent biomolecule detection cavity (3) is formed between the gate metal (5), the high dielectric constant oxide layer (4) and the channel (2); a horizontal region of the channel (2) is embedded in the source region (1); the source region (1) serves as an outer eave and the channel (2) serves as an inner eave to form a brim-like structure; a source region contact (9) is disposed on the upper surface of the source region (1); The source region (1) can also be embedded in the horizontal region of the channel (2), with the channel (2) serving as the outer edge and the source region (1) serving as the inner edge to form a hat-like brim structure.

2. A biosensor having a vertical tunneling field effect transistor in a brim shape according to claim 1, characterized in that: The source region (1) is a P-type heavily doped region made of GaSb material with a doping concentration of 5×10 18 cm -3 ~1×10 20 cm -3 ; The channel (2) is an N-type lightly doped region made of Si material; the carrier concentration is 1×10 15 cm -3 ~1×10 17 cm -3 ; The drain region (6) and the substrate (8) are both N-type heavily doped regions with a doping concentration of 1×10 18 cm -3 ~5×10 19 cm -3 ; The high dielectric constant oxide layer (4) is HfO2 or Al2O3; The gate metal (5) is chromium or hafnium; The source region contact (9) and the drain region contact (7) are both made of polysilicon.

3. The biosensor having a brim-shaped vertical tunneling field effect transistor according to claim 1, characterized in that: The biosensor is arranged axially symmetrically, wherein when the horizontal region of the channel (2) is embedded in the source region (1), the length of the source region (1) is 40nm to 80nm, and the width is 20nm to 40nm; the length of the horizontal portion of the channel (2) is 10nm to 16nm shorter than the length of the source region (1), and the bottom is flush with the bottom of the source region (1), and the width is 10nm to 15nm; the length of the vertical portion of the channel (2) is 10nm to 15nm, and the width is 10nm to 15nm; When the source region (1) is embedded in the horizontal region of the channel (2), the length of the horizontal portion of the channel (2) is 40nm to 80nm, the width is 20nm to 40nm, the length of the vertical portion of the channel (2) is 10nm to 15nm, the width is 10nm to 15nm; the bottom of the source region (1) is 5nm to 8nm away from the bottom of the horizontal portion of the channel (2), and the length of the source region (1) is 10nm to 16nm smaller than the length of the horizontal portion of the channel (2); The drain region (6) has the same length as the vertical portion of the channel (2) and a width of 10 nm to 20 nm; The length of the substrate (8) is 40 nm to 80 nm, and the width is 20 nm to 40 nm; The sum of the length of the horizontal portion of the biomolecule detection cavity (3) and the length of the vertical portion of the channel (2) is equal to the length of the horizontal portion of the channel (2), and the width of the horizontal portion of the biomolecule detection cavity (3) is 3 nm to 5 nm; the vertical portion of the biomolecule detection cavity (3) is the same size as the high dielectric constant oxide layer (4), the length of the vertical portion of the biomolecule detection cavity (3) and the high dielectric constant oxide layer (4) is the same as the width of the horizontal portion of the biomolecule detection cavity (3), and the sum of the width of the vertical portion of the biomolecule detection cavity (3) and the width of the high dielectric constant oxide layer (4) is equal to the width of the vertical portion of the channel (2); The bottom of the high dielectric constant oxide layer (4) is flush with the bottom of the vertical portion of the channel (2); The bottom of the gate metal (5) is flush with the bottom of the high dielectric constant oxide layer (4), and the side surface is flush with the side surface of the biomolecule detection cavity (3); Each drain contact (7) is arranged at the edge of the substrate (8) and has a length of 8nm to 10nm and a width of 2nm to 3nm; The length of the source region contact (9) is consistent with that of the source region (1), and the width is 2nm to 3nm.

4. A method for preparing a biosensor having a vertical tunneling field effect transistor in a brim shape according to any one of claims 1 to 3, characterized in that: The following steps are involved: Step 1: Prepare a heavily doped N-type semiconductor as a substrate (8); Step 2: depositing a layer of polycrystalline material on the substrate (8) prepared in step 1; Step 3: etching the middle of the polycrystalline material deposited in step 2 to form drain contacts (7) at both ends of the substrate (8), and growing a semiconductor having the same doping concentration and type as the substrate (8) in the central region of the substrate (8) as a drain region (6); Step 4: depositing a layer of metal on the drain region (6) grown in step 3; Step 5: Etching the middle of the metal deposited in step 4, retaining the metal at both ends as gate metal (5), and depositing a layer of dielectric material with a high dielectric constant in the central area; Step 6: etching the dielectric material deposited in step 5 to form a biomolecule detection cavity (3) and a high dielectric constant oxide layer (4); Step 7: When the horizontal region of the channel (2) is embedded in the source region (1), a T-shaped lightly doped N-type semiconductor is grown in the region etched in step 6 as the channel (2); When the source region (1) is embedded in the horizontal region of the channel (2), a T-shaped lightly doped N-type semiconductor grows in the region etched in step 6; Step 8: When the horizontal region of the channel (2) is embedded in the source region (1), a layer of heavily doped P-type semiconductor is grown around the horizontal portion of the T-shaped channel (2) grown in step 7 as the source region (1), and a layer of polycrystalline material is deposited above the source region (1) as a source region contact (9); When the source region (1) is embedded in the horizontal region of the channel (2), the central region of the horizontal portion of the T-shaped N-type semiconductor grown in step 7 is etched to form the channel (2), and then a layer of heavily doped P-type semiconductor is grown in the etched region as the source region (1), and a layer of polycrystalline material is deposited above the source region (1) as a source region contact (9).

5. The method for preparing a biosensor having a vertical tunneling field effect transistor with a brim shape according to claim 4, characterized in that: The heavily doped N-type semiconductor in step 1 is prepared by ion implantation. The heavily doped N-type semiconductor is silicon, and phosphorus (P) is selected as a dopant with a doping concentration of 1×10 18 cm -3 ~5×10 19 cm -3 , control the injection energy to 50keV to 200keV, maintain the entire ion injection process at 20°C to 25°C, and after the ion injection is completed, perform thermal annealing to activate the phosphorus ions, the thermal annealing temperature is 600°C to 1000°C, and the thermal annealing time is controlled to be 30 minutes to 60 minutes; The deposition of polycrystalline material in step 2 is carried out by using a chemical vapor deposition (CVD) process. First, the CVD reaction chamber is preheated to 500° C. to 700° C., and the pressure in the chamber is controlled at 10 -2 Torr~10 1 Torr, to promote subsequent deposition, dimethylsilane (SiH2(CH3)2) is introduced as a silicon source gas, and the flow rate is set to 50sccm~100sccm, hydrogen (H2) is used as a diluent gas, and the flow rate is set to 200sccm~500sccm, and the silicon source gas is decomposed through chemical reaction in the reaction chamber to deposit an electrode film on the surface of the substrate, and then the deposited electrode film is thermally annealed, the thermal annealing temperature is 500℃~1000℃, and the thermal annealing time is controlled to be 20 minutes~40 minutes; The etching in step 3 adopts dry etching technology, uses a high-frequency inductively coupled plasma reactor (ICP-RIE), selects chlorine (Cl2) as the etching gas, sets the RF power at 100W to 300W, the frequency at 13.56MHz, the pressure in the etching chamber at 10mTorr to 50mTorr, and performs etching at 25°C to 30°C, with an etching rate of 30nm / min to 50nm / min. A semiconductor with the same doping concentration and type as the substrate (8) is generated by an epitaxial growth process, using silicon material, first The silicon substrate for epitaxial growth is cleaned and then placed in an epitaxial growth chamber for subsequent operations. The epitaxial growth chamber is a vacuum or inert gas environment. The growth temperature is set at 1100°C to 1300°C and the pressure is a low-pressure environment of 90Pa to 100Pa. The flow rate of the silicon source gas is set at 15sccm to 20sccm, and the flow rate of hydrogen as a carrier gas is set at 180sccm to 200sccm. During the growth process, phosphine (PH3) is introduced as a dopant gas with a doping concentration of 1×10 18 cm -3 ~5×10 19 cm -3 The growth time is set at 30 minutes to 120 minutes. After the growth is completed, a thermal annealing treatment is performed. The thermal annealing temperature is 400° C. to 800° C., and the thermal annealing time is controlled at 10 minutes to 30 minutes. The deposited metal in step 4 is deposited by a reactive sputtering process. The deposited metal is metal chromium or metal hafnium. The reactive sputtering process uses a magnetron sputtering system for deposition. First, the target material is heated to 200°C to 400°C to increase the evaporation rate of the metal. At the same time, the temperature of the substrate is controlled at 100°C to 300°C to avoid thermal damage to the film on the substrate. The pressure of the sputtering chamber is set at 10 -6 Torr~10 -8 Torr, start the sputtering system, heat the target material for depositing metal and apply an electric field to sputter the target material from the surface of the target gun to the silicon substrate, set the sputtering power supply at 100W to 200W to form the required metal film on the semiconductor surface, and after the sputtering process is completed, release the vacuum chamber gas and remove the semiconductor substrate, and use characterization technology to evaluate the morphology, composition and bonding state of the metal film. Characterization technology includes SEM and XPS to ensure the quality and stability of the gate electrode; The process of etching the metal in step 5 is a metal gate etching process, wherein a mixed gas of Cl2 and Br2 is selected, the gas volume ratio is (1-3):1, the RF power is set to 200W-300W, the frequency is 13.56MHz, the pressure in the etching chamber is 20mTorr-40mTorr, the etching rate is 50nm / min-70nm / min, and the process of depositing the dielectric material is an atomic layer deposition process (ALD), wherein the deposited dielectric material is HfO2 or Al2O3, the bottom of the dielectric material is flush with the bottom of the metal gate (5), and the width is the sum of the width of the metal gate (5) and the length of the high dielectric constant oxide layer (4), and the atomic layer deposition process (ALD) first performs chemical cleaning or hydrogen treatment on the semiconductor material. ALD is a process for removing oxides and organic residues to ensure optimal surface acceptance. Hafnium trimethoxide or aluminum trimethoxide is used as a precursor for depositing a dielectric layer. The precursor is introduced into a reaction chamber to adsorb the precursor on the silicon surface. Oxygen or nitrogen is introduced to remove unreacted precursors and byproducts. Water vapor is introduced as an oxidant to react with the adsorbed precursor to generate a dielectric film. The purification step is repeated to remove byproducts and unreacted gases generated during the reaction. During this process, the temperature is controlled at 200° C. to 400° C. and adjusted according to the characteristics of the ALD precursor and the reaction conditions. The ambient pressure is maintained at 2 Torr to 10 Torr. The thickness of the dielectric film is increased by repeating the ALD cycle, and the thickness is increased by 5 angstroms to 20 angstroms per cycle. The step 6 adopts dry etching, selects an inductively coupled plasma (ICP) etcher and hydrogen fluoride (HF) as the etching gas for operation, the overall ambient temperature needs to be maintained at 20°C to 25°C, starts the selected inductively coupled plasma (ICP) etcher to generate plasma, then inputs hydrogen fluoride (HF) etching gas, ensures that the flow rate is 40sccm to 50sccm, and adjusts the reaction chamber pressure to 40mTorr to 50mTorr to maintain a stable etching atmosphere. At a discharge power of 100W to 300W and a frequency of 13.56MHz, hydrogen fluoride (HF) reacts with the surface of the dielectric layer to generate fluoride, thereby achieving etching. After the etching is completed, cleaning is performed to remove the etching residues; The step 7 adopts epitaxial growth technology to form a lightly doped N-type semiconductor, wherein the lightly doped N-type semiconductor is silicon. First, the device is cleaned and then the cleaned silicon substrate is placed in an epitaxial growth chamber for subsequent operations. The epitaxial growth chamber is a vacuum or inert gas environment, and the growth temperature is set at 1100° C. to 1300° C., and the pressure is a low-pressure environment of 90 Pa to 100 Pa. The flow rate of the silicon source gas is set at 15 sccm to 20 sccm, and the flow rate of hydrogen as a carrier gas is set at 180 sccm to 200 sccm. During the growth process, phosphine (PH3) is introduced as a dopant gas, and the doping concentration is 1×10 15 cm -3 ~1×10 17 cm -3 The growth time is set at 30 minutes to 120 minutes. After the growth is completed, the epitaxial layer is thermally annealed to optimize the crystal structure and electrical properties. The thermal annealing temperature is 600°C to 900°C, and the thermal annealing time is controlled at 20 minutes to 40 minutes. In step 8, when the horizontal region of the channel (2) is embedded in the source region (1), a molecular beam epitaxy (MBE) technique is used to form a heavily doped P-type semiconductor, wherein the heavily doped P-type semiconductor is gallium antimonide (GaSb). When the source region (1) is embedded in the horizontal region of the channel (2), dry etching is used, using a high-frequency inductively coupled plasma reactor (ICP-RIE), chlorine (Cl2) is selected as the etching gas, the RF power is set to 100W to 200W, the frequency is 13.56MHz, the pressure of the etching chamber is 20mTorr to 30mTorr, the etching is performed at 25°C to 30°C, and the etching rate is 30 nm / min~50nm / min, and then use molecular beam epitaxy (MBE) technology to form a heavily doped P-type semiconductor, wherein the heavily doped P-type semiconductor is gallium antimonide (GaSb). First, the silicon substrate for epitaxial growth is cleaned, and then the cleaned silicon substrate is placed in the MOCVD reaction chamber for subsequent operations. The reaction temperature is set to 500℃~700℃, and trimethylgallium (TMGa) and arsenic (AsH3) are used as reaction gases, and the gas volume ratio is 1: (8~12). During the growth process, dimethylgermanium (GeH2) or dimethylzinc (Zn(CH3)2) is added as a dopant, and the doping concentration is 5×10 18 cm -3 ~1×10 20 cm -3 After the growth is completed, a thermal annealing treatment is performed. The thermal annealing temperature is 300°C to 500°C for 30 minutes to 50 minutes. The polycrystalline material is deposited using chemical vapor deposition (CVD) technology. The polycrystalline material is polycrystalline silicon. First, the CVD reaction chamber is preheated to 500°C to 700°C, and the pressure in the chamber is controlled at 10 -2 Torr~10 1 Torr, to promote subsequent deposition, dimethylsilane (SiH2(CH3)2) is introduced as a silicon source gas, and the flow rate is set to 50sccm~100sccm, hydrogen (H2) is used as a diluent gas, and the flow rate is set to 200sccm~500sccm, the silicon source gas is decomposed in the reaction chamber and an electrode film is deposited on the surface of the substrate, and then the deposited electrode film is annealed to improve its crystallinity and electrical properties, the thermal annealing temperature is 500℃~1000℃, and the thermal annealing time is controlled at 20 minutes to 40 minutes.

6. The method for preparing a biosensor having a vertical tunneling field effect transistor with a brim shape according to claim 4, characterized in that: The heavily doped N-type semiconductor in step 1 has a length of 40 nm to 80 nm and a width of 20 nm to 40 nm; In step 2, the length of the polycrystalline material is consistent with the length of the substrate (8), and the width is 2nm to 3nm; In step 3, the drain contact (7) is arranged at the edge of the substrate (8) and has a length of 8 nm to 10 nm. The semiconductor with the same doping concentration and type as the substrate (8) has a length of 10 nm to 15 nm and a width of 10 nm to 20 nm. The length of the deposited metal in step 4 is 30nm to 35nm, and the width is 7nm to 10nm; The length of the etched area in step 5 is the length of the drain region (6) plus the length of the high dielectric constant oxide layer (4) on both sides, and the length of the high dielectric constant oxide layer (4) on both sides is 3nm to 5nm; The vertical portion of the biomolecule detection cavity (3) formed in step 6 is the same size as the high dielectric constant oxide layer (4); the sum of the length of the horizontal portion of the biomolecule detection cavity (3) on both sides and the length of the vertical portion of the channel (2) is equal to the length of the horizontal portion of the channel (2); the width of the horizontal portion of the biomolecule detection cavity (3) is 3 nm to 5 nm; the vertical portion of the biomolecule detection cavity (3) is placed above the high dielectric constant oxide layer (4); the length is the same as the width of the horizontal portion; the sum of the width and the width of the high dielectric constant oxide layer (4) is equal to the width of the vertical portion of the channel (2); the bottom of the high dielectric constant oxide layer (4) is flush with the bottom of the vertical portion of the channel (2); the length is consistent with the length of the vertical portion of the biomolecule detection cavity (3); In step 7, when the horizontal region of the channel (2) is embedded in the source region (1), the vertical portion of the channel (2) has a length of 10 nm to 15 nm and a width of 10 nm to 15 nm; the horizontal portion of the channel (2) is the same as the length of the drain region (6) and the horizontal portion of the biomolecule detection chambers (3) on both sides; When the source region (1) is embedded in the horizontal region of the channel (2), the horizontal portion of the T-shaped lightly doped N-type semiconductor has a width of 20 nm to 40 nm and a length of 40 nm to 80 nm, and the vertical portion of the T-shaped lightly doped N-type semiconductor has a length of 10 nm to 15 nm and a width of 10 nm to 15 nm; In step 8, when the horizontal region of the channel (2) is embedded in the source region (1), the length of the source region (1) is 40nm to 80nm, and the width is 20nm to 40nm. At the same time, the spacing between the left and right sides of the source region (1) and the left and right sides of the horizontal portion of the channel (2) is the same, which is 5nm to 8nm. The length of the source region contact (9) is consistent with the length of the source region (1), and the width is 2nm to 3nm. When the source region (1) is embedded in the horizontal region of the channel (2), the bottom of the source region (1) is 5nm to 8nm above the bottom of the horizontal portion of the channel (2), and both sides of the source region (1) are inside the horizontal portion of the channel (2), with a spacing of 5nm to 10nm on both sides; the material of the source region contact (9) is polycrystalline silicon, the length is consistent with the length of the source region (1), and the width is 2nm to 3nm.

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