Semiconductor device and preparation method thereof
By designing cross-set active regions and gates on the substrate and gate layers of the semiconductor device, additional transistors are formed, and the problem of increasing the number of transistors and increasing the integration is solved, and performance improvement is achieved.
Patent Information
- Application Number
- CN202510209347.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-25
- Publication Date
- 2025-03-25
- Estimated Expiration
- 2045-02-25
AI Technical Summary
In semiconductor devices, how to increase the number of transistors through arrangement designs to improve integration and performance, especially when the process node reaches its limit.
A semiconductor device is designed, wherein the substrate includes at least two first active regions and a second active regions, the gate layer includes at least two first gates and a second gate, at least four transistors are formed by cross-arrangement, and additional transistors are formed at the second active region and the second gate.
Without changing the structure of the semiconductor device, the number of transistors is increased, the degree of integration is improved, and the performance of the device is improved, which is specifically manifested as an increase in the number of transistors by 25%.