Image sensor, manufacturing method thereof and electronic equipment

Abstract

The invention discloses an image sensor, a manufacturing method thereof and electronic equipment, the image sensor comprises a device wafer and a packaging bearing wafer which are in bonding connection, and the device wafer comprises a photosensitive element and a micro lens located on one side of the photosensitive element. The packaging bearing wafer is arranged on one side, far away from the micro lens, of the photosensitive element; a rewiring layer electrically connected with the conductive block is arranged on one side of the packaging bearing wafer in the direction far away from the device wafer; an infrared absorption layer is further arranged on one side of the packaging bearing wafer, the infrared absorption layer is arranged on one side, close to the photosensitive element, of the rewiring layer, the infrared absorption layer and the rewiring layer are arranged in an insulated mode, and the orthographic projection of the infrared absorption layer in the direction perpendicular to the device wafer covers the photosensitive element. The infrared absorption layer absorbs infrared light from one side of the re-wiring layer away from the photosensitive element. The infrared absorption layer is arranged on one side of the packaging bearing wafer and between the rewiring layer and the device wafer, so that infrared light is prevented from entering the photosensitive area to avoid generating image shadows.

Description

Technical Field

[0001] The present application relates to the field of image sensors, and in particular to an image sensor and a manufacturing method thereof, and an electronic device. Background Art

[0002] Image sensor is an important part of digital camera. It is a device that converts optical images into electrical signals. It is widely used in electronic devices such as digital cameras, mobile terminals, and portable electronic devices. Image sensors include two categories: CCD (Charge Coupled Device) image sensors and CMOS (Complementary Metal Oxide Semiconductor) image sensors. CMOS image sensors have the advantages of high integration, low power consumption, high speed, and low cost, and have been widely used in many products. These products include mobile phones, tablets, cars, and security monitoring systems.

[0003] Image sensors are usually packaged using chip scale packaging technology, that is, a carrier wafer is set on one side of the device wafer of the image sensor and a redistribution layer (Re-Distribution Layer) and several solder balls are set on the carrier wafer to achieve high-density packaging with a larger number of pins. However, infrared light emitted from the carrier wafer away from the device wafer will irradiate the redistribution layer and the solder balls, and some infrared light will enter the device wafer, resulting in a shadow in the photosensitive area of ​​the device wafer, which in turn affects the imaging effect of the image sensor. Summary of the invention

[0004] The present application provides an image sensor and a manufacturing method thereof, and an electronic device, wherein an infrared absorption layer is arranged between a redistribution layer and a device wafer on one side of a package carrier wafer to block infrared light from entering a photosensitive area to avoid image shadows. The technical solution is as follows:

[0005] In a first aspect, an image sensor is provided, the image sensor comprising a device wafer and a package carrier wafer bonded together, the device wafer comprising a photosensitive element and a microlens located on one side of the photosensitive element, the package carrier wafer being arranged on a side of the photosensitive element away from the microlens, wherein:

[0006] A redistribution layer is provided on one side of the package carrier wafer in a direction away from the device wafer, the redistribution layer is provided on the side of the package carrier wafer away from the photosensitive element, the device wafer further comprises a conductive block connected to the ground, the conductive block is provided away from the photosensitive element in the horizontal direction of the device wafer, and the redistribution layer is electrically connected to the conductive block;

[0007] An infrared absorption layer is further arranged on one side of the package carrier wafer in a direction away from the device wafer. The infrared absorption layer is arranged on a side of the redistribution layer close to the photosensitive element. The infrared absorption layer is insulated from the redistribution layer, and the orthographic projection of the infrared absorption layer in a direction perpendicular to the device wafer covers the photosensitive element. The infrared absorption layer absorbs infrared light from the side of the redistribution layer away from the photosensitive element.

[0008] In the present application, the redistribution layer includes a ground terminal, the ground terminal extends toward a side close to the device wafer in a direction perpendicular to the package carrier wafer, and the ground terminal is connected to the infrared absorption layer.

[0009] The image sensor further includes a conductive solder ball, which is disposed on a side of the redistribution layer away from the infrared absorption layer and is electrically connected to the redistribution layer.

[0010] A first barrier layer and a second barrier layer are sequentially stacked between the redistribution layer and the infrared absorption layer. The second barrier layer covers the first barrier layer, and the first barrier layer covers the infrared absorption layer.

[0011] Optionally, the redistribution layer includes a stacked structure, and at least one layer in the stacked structure is a metal structure.

[0012] In the present application, the infrared absorption layer extends in a direction parallel to the device wafer and covers the package carrier wafer, the infrared absorption layer is electrically connected to the conductive block, and the infrared absorption layer is electrically connected to the redistribution layer through the conductive block.

[0013] On a side of the conductive block away from the microlens, the package carrier wafer includes a groove structure, the groove structure includes at least one slope, and the orthographic projection of the redistribution layer on the package carrier wafer covers the groove surface of the groove structure.

[0014] In a second aspect, a method for manufacturing an image sensor is provided, the method comprising the following steps:

[0015] A device wafer is provided, wherein the device wafer comprises a photosensitive element, a microlens located on one side of the photosensitive element, and a conductive block connected to a ground, wherein the conductive block is arranged away from the photosensitive element in a horizontal direction of the device wafer;

[0016] Providing a package carrier wafer, the package carrier wafer is arranged on a side of the photosensitive element away from the microlens, and on a side of the conductive block away from the microlens, the package carrier wafer is etched to form a groove structure, wherein the groove structure includes at least one slope;

[0017] An infrared absorption layer is arranged on a side of the package carrier wafer away from the device wafer, wherein the orthographic projection of the infrared absorption layer in a direction perpendicular to the device wafer covers the photosensitive element;

[0018] A first barrier layer and a second barrier layer are sequentially stacked on a side of the infrared absorbing layer away from the package carrier wafer, wherein the second barrier layer covers the first barrier layer, and the first barrier layer covers the infrared absorbing layer;

[0019] A redistribution layer is provided on a side of the second barrier layer away from the first barrier layer, the redistribution layer covers the second barrier layer, and the redistribution layer is electrically connected to the conductive block;

[0020] A conductive solder ball is arranged on a side of the redistribution layer away from the second barrier layer, and the conductive solder ball is electrically connected to the redistribution layer.

[0021] Further, in the step of providing a redistribution layer on a side of the second barrier layer away from the first barrier layer:

[0022] The redistribution layer comprises a grounding end, the grounding end is extended along a direction perpendicular to the package carrier wafer toward a side close to the device wafer, and the grounding end is connected to the infrared absorption layer.

[0023] In the step of providing an infrared absorption layer on a side of the package carrier wafer away from the device wafer:

[0024] The infrared absorption layer extends in a direction parallel to the device wafer and covers the package carrier wafer, and the infrared absorption layer is electrically connected to the conductive block.

[0025] According to a third aspect, an electronic device is provided, wherein the electronic device comprises the image sensor as described above.

[0026] It can be understood that the beneficial effects of the second and third aspects mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0028] Figure 1 is a structural schematic diagram of an image sensor provided in an embodiment of the present application;

[0029] Figure 2 is a schematic diagram of the structure of another image sensor provided in an embodiment of the present application;

[0030] Figure 3 is a structural schematic diagram of another image sensor provided in an embodiment of the present application;

[0031] Figure 4 is a process schematic diagram of a method for manufacturing an image sensor provided in an embodiment of the present application;

[0032] Figure 5 is another process schematic diagram of a method for manufacturing an image sensor provided in an embodiment of the present application;

[0033] Figure 6 This is another process schematic diagram of a method for manufacturing an image sensor provided in an embodiment of the present application. DETAILED DESCRIPTION

[0034] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0035] It should be understood that the "multiple" mentioned in this application refers to two or more. In the description of this application, unless otherwise specified, " / " means or, for example, A / B can mean A or B; "and / or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in order to facilitate the clear description of the technical solution of this application, the words "first" and "second" are used to distinguish between the same items or similar items with basically the same functions and effects. Those skilled in the art can understand that the words "first" and "second" do not limit the quantity and execution order, and the words "first" and "second" do not limit them to be different.

[0036] As introduced in the background technology, in the prior art, image sensors are usually packaged using chip scale packaging (Chip Scale Package) technology, that is, a carrier wafer is arranged on one side of the device wafer of the image sensor and a redistribution layer (Re-Distribution Layer) and a number of solder balls are arranged on the carrier wafer to achieve high-density packaging with a larger number of pins. However, infrared light emitted from the carrier wafer away from the device wafer side will irradiate the redistribution layer and the solder balls, and some infrared light will enter the device wafer, resulting in a shadow in the photosensitive area of ​​the device wafer, thereby affecting the imaging effect of the image sensor.

[0037] To this end, the embodiments of the present application provide an image sensor and a manufacturing method thereof, and an electronic device, wherein an infrared absorption layer is arranged on one side of the package carrier wafer, between the redistribution layer and the device wafer, to block infrared light from entering the photosensitive area to avoid image shadows.

[0038] The image sensor and its manufacturing method, and the electronic device provided in the embodiments of the present application are explained in detail below.

[0039] Embodiment 1

[0040] Figure 1 is a schematic diagram of the structure of an image sensor provided by an embodiment of the present application. Figure 1 The image sensor includes a device wafer 101 and a package carrier wafer 201 that are bonded together. The device wafer 101 includes a photosensitive element (not shown) and a microlens 103 located on one side of the photosensitive element. The package carrier wafer 201 is arranged on a side of the photosensitive element away from the microlens 103.

[0041] A redistribution layer 204 is provided on one side of the package carrier wafer 201 away from the photosensitive element along the direction away from the device wafer 101. The redistribution layer 204 is provided on the side of the package carrier wafer 201 away from the photosensitive element. The device wafer 101 also includes a grounded conductive block 102. The conductive block 102 is provided away from the photosensitive element in the horizontal direction of the device wafer 101. The redistribution layer 204 is electrically connected to the conductive block 102.

[0042] In the embodiment of the present application, the photosensitive element can be any photosensitive structure for converting visible light into electrons (photocharges), such as any one of a photodiode, a grating or a photoconductor. As a preferred embodiment, the photosensitive element in this embodiment is a photodiode.

[0043] In some optional embodiments, the redistribution layer 204 may include a laminated structure, and at least one layer in the laminated structure is a metal structure. The optional metal structure includes one or more of copper, aluminum, silver, tungsten, platinum, titanium, and nickel. Generally speaking, the number of laminated layers of the laminated structure can be three or more. Among them, copper metal is the most commonly used sputtering material for preparing the redistribution layer 204, and has the best conductivity and processability; aluminum has poorer conductivity than copper, but because of its lower cost, it can effectively control the packaging cost; silver has better conductivity than copper, but because of its rarity, it usually increases the cost. Using silver metal as a laminated metal can effectively improve the transmission speed and packaging performance of electrical signals; tungsten metal has a high melting point and good conductivity, so it is usually used to prepare a layer in the laminated structure of the redistribution layer 204 as a connector; platinum metal has good corrosion resistance, so it may be more effective in resisting the invasion of water vapor or other pollutants into the interior of the wafer; titanium metal and nickel metal have corrosion resistance and plasticity, so they are also widely used in the laminated structure of the redistribution layer 204. According to different product performance and packaging requirements, one or more of the above metal structures can be used to form a stacked structure, but the specific selection method is not specifically limited in the embodiments of the present application.

[0044] The conductive block 102 is also called a pad (PAD), which usually serves as a signal transmission hub between the device wafer 101 and the package carrier wafer 201. By electrically connecting the redistribution layer 204 to the conductive block 102, signal interconnection between the device wafer 101 and the package carrier wafer 201 can be further achieved.

[0045] An infrared absorption layer 205 is further provided on one side of the package carrier wafer 201 in a direction away from the device wafer 101. The infrared absorption layer 205 is provided on a side of the redistribution layer 204 close to the photosensitive element. The infrared absorption layer 205 is insulated from the redistribution layer 204, and the orthographic projection of the infrared absorption layer 205 in a direction perpendicular to the device wafer 101 covers the photosensitive element. The infrared absorption layer 205 absorbs infrared light from the side of the redistribution layer 204 away from the photosensitive element.

[0046] The infrared absorption layer 205 is usually made of aluminum metal, so it can have good infrared absorption ability. The infrared absorption layer 205 can absorb radiation in the infrared band (2.5-7.5 microns) and the far infrared band (7.0-14.0 microns). In the embodiment of the present application, the thickness of the infrared absorption layer 205 is 1-5 microns, so it can take into account the thickness of the packaging structure and the infrared absorption ability. In order to improve the reliability of the packaging structure, an insulation design is usually performed between the infrared absorption layer 205 and the redistribution layer 204. Specifically: the redistribution layer 204 and the infrared absorption layer 205 also include a first barrier layer 202 and a second barrier layer 203 stacked in sequence, the second barrier layer 203 covers the first barrier layer 202, and the first barrier layer 202 covers the infrared absorption layer 205. Since silicon oxide or silicon nitride has good stability, silicon oxide or silicon nitride is used as the material for forming the first barrier layer 202 and the second barrier layer 203, wherein the materials of the first barrier layer 202 and the second barrier layer 203 can be the same or different, and the embodiment of the present application does not limit this. Optionally, the sum of the thickness of the first barrier layer 202 and the second barrier layer 203 is 1-3 microns, so as to take into account both the thickness of the packaging structure and the reliability of the packaging structure.

[0047] At the same time, the image sensor further includes a conductive solder ball 206, which is disposed on a side of the redistribution layer 204 away from the infrared absorption layer 205 and is electrically connected to the redistribution layer 204. The conductive solder ball 206 can realize information exchange between the packaging structure and other structures outside the device wafer 101, and can effectively conduct heat inside the packaging structure, thereby reducing the internal temperature.

[0048] It can be understood that the device wafer 101 and the package carrier wafer 202 are both wafers with silicon as the main structure. A semiconductor structure with chip or device functions can be grown and prepared on the basis of the wafer. The two can be bonded by wire bonding or metal bonding in through silicon vias (Through Silicon Via), such as Figure 1As shown, on the side of the conductive block 102 away from the microlens 103, the package carrier wafer 201 includes a groove structure, and the groove structure includes at least one slope, and the slope range of the groove structure is between 20° and 90°. The groove structure is the basic structure of the metal overlap formed in the through-silicon via, and the metal overlap can be achieved by laying a redistribution layer 204 in the groove structure. In some optional embodiments, the orthographic projection of the redistribution layer 204 on the package carrier wafer 201 covers the groove surface of the groove structure, that is, the redistribution layer 204 and the groove structure can be tightly fitted. The purpose of such a setting is to save the internal space of the packaging structure, thereby making the internal layout of the packaging structure more compact. In some other optional embodiments, there may also be other structural settings between the redistribution layer 204 and the groove structure, and the embodiments of the present application are not limited to this.

[0049] In the embodiment of the present application, an infrared absorption layer 205 is provided on one side of the package carrier wafer 201 and between the redistribution layer 204 and the device wafer 101 to block infrared light from entering the photosensitive area to avoid image shadows.

[0050] Embodiment 2

[0051] According to the image sensor provided in the first embodiment, during the formation of the first barrier layer 202 and the second barrier layer 203, the shapes of the first barrier layer 202 and the second barrier layer 203 are usually modified by photolithography. However, during the execution of the mass production plan, the same mask is repeatedly used for photolithography during the formation of the first barrier layer 202 and the second barrier layer 203. After multiple photolithography operations, the edges of the mask openings will be worn, resulting in light leakage during exposure. The light leakage area will cause over-etching, causing the second barrier layer 203 and even the first barrier layer 202 to be damaged at the light leakage location, and even affecting the infrared absorption layer 205 and the packaging carrier wafer 201. Therefore, when the redistribution layer 204 is subsequently formed, the metal layer will be formed at the damaged location caused by the light leakage, and then directly contact the infrared absorption layer 205 and even the packaging carrier wafer 201, causing the redistribution layer 204 and the infrared absorption layer 205 or the packaging carrier wafer 201 to be short-circuited and generate capacitance to ground. In some embodiments, for example Figure 2 As shown in the figure, a fault point BUG will be formed. At the same time, since the above fault point BUG is difficult to be discovered or detected after it is formed, once it is formed, it may have an irreversible impact on the image sensor and affect the image effect produced by the image sensor.

[0052] Figure 2 is a schematic diagram of the structure of another image sensor provided in an embodiment of the present application. Figure 2Based on the first embodiment, the second embodiment further discloses the following structure: the redistribution layer 204 includes a grounding terminal, which extends toward a side close to the device wafer 101 in a direction perpendicular to the package carrier wafer 201, and is connected to the infrared absorption layer 205.

[0053] It is understandable that the ground terminal 2041 is connected to the ground signal, and the ground terminal 2041 and the redistribution layer 204 can be made of the same metal material or a metal material with stronger conductivity to ensure that the current of the redistribution layer 204 can be quickly conducted through the ground terminal 2041. Since the ground terminal 2041 is connected to the infrared absorption layer 205, for any packaging structure unit (i.e. Figure 1 or Figure 2 With regard to the single package structure shown in the figure, any package structure unit has a ground terminal 2041. When a fault point BUG occurs, the location of the fault point BUG can be quickly identified. At the same time, when the fault point BUG occurs, the redistribution layer 204 and the infrared absorption layer 205 or the package carrier wafer 201 are short-circuited and generate capacitance to the ground. The charge stored in the capacitance can be quickly discharged through the ground terminal 2041. In other words, even if a fault point BUG occurs in the manufacturing process, the problem of affecting the image effect produced by the image sensor caused by the fault point BUG can be effectively avoided by setting the ground terminal 2041.

[0054] Optionally, the ground signal connected to the ground terminal 2041 may be either an analog ground signal AGND or a digital ground signal DGND, and the embodiment of the present application does not impose any specific limitation on this.

[0055] Embodiment 3

[0056] Based on the same considerations as in the second embodiment, i.e., the same mask is repeatedly used for photolithography during the process of forming the first barrier layer 202 and the second barrier layer 203. After multiple photolithography operations, the edges of the mask openings will wear out, resulting in light leakage during exposure. The light leakage area will cause over-engraving, causing the second barrier layer 203 and even the first barrier layer 202 to be damaged at the light leakage location, and even affecting the infrared absorption layer 205 and the package carrier wafer 201. Therefore, when the redistribution layer 204 is subsequently formed, the metal layer will be formed at the damaged location caused by the light leakage, and then directly contact the infrared absorption layer 205 and even the package carrier wafer 201, causing the redistribution layer 204 and the infrared absorption layer 205 or the package carrier wafer 201 to be short-circuited and generate capacitance to ground. The third embodiment of the present application provides a structural schematic diagram of another image sensor. See. Figure 3 Based on the first embodiment, the third embodiment further discloses the following structure:

[0057] The infrared absorption layer 205 extends in a direction parallel to the device wafer 101 and covers the package carrier wafer 201. The infrared absorption layer 205 is electrically connected to the conductive block 102, and the infrared absorption layer 205 is electrically connected to the redistribution layer 204 through the conductive block 102. Among them, the conductive block 102 is connected to the ground signal, and the ground signal connected to the conductive block 102 can be either an analog ground signal AGND or a digital ground signal DGND, which is not specifically limited in the embodiment of the present application.

[0058] It can be understood that in Example 2, the orthographic projection of the infrared absorption layer 205 in the direction perpendicular to the device wafer 101 only covers the photosensitive element, but in Example 3, the orthographic projection of the infrared absorption layer 205 in the direction perpendicular to the device wafer 101 not only covers the photosensitive element, but also extends in a direction parallel to the device wafer 101 and covers the packaging carrier wafer 201.

[0059] The above arrangement can achieve a technical effect similar to that of the second embodiment. Specifically, since the redistribution layer 204 is arranged on the side of the package carrier wafer 201 away from the photosensitive element, the device wafer 101 also includes a grounded conductive block 102, and the conductive block 102 is arranged away from the photosensitive element in the horizontal direction of the device wafer 101. The redistribution layer 204 is electrically connected to the conductive block 102, and the infrared absorption layer 205 extends in a direction parallel to the device wafer 101 and covers the package carrier wafer 201. The arrangement can be electrically connected to the redistribution layer 204 at the conductive block 102 under the reliability protection of the first barrier layer 202 and the second barrier layer 203. Since the conductive block 102 is connected to the ground signal, and any package structure unit has Two power connection ports connecting the rewiring layer 204 and the infrared absorption layer 205 to the conductive block 102 can quickly identify the location of the fault point BUG when a fault point BUG occurs; at the same time, because when a fault point BUG occurs, the rewiring layer 204 and the infrared absorption layer 205 or the package carrier wafer 201 are short-circuited and generate capacitance to the ground, the charge stored in the capacitance can be quickly discharged through the above two power connection ports connecting the rewiring layer 204 and the infrared absorption layer 205 to the conductive block 102. In other words, even if a fault point BUG occurs in the manufacturing process, the problem of affecting the image effect produced by the image sensor caused by the fault point BUG can be effectively avoided by setting the ground terminal 2041.

[0060] Embodiment 4

[0061] The present application embodiment provides a method for manufacturing an image sensor. The manufacturing method is exemplified by the image sensor provided in the second embodiment. Figure 4-6 As shown, Figure 4-6 : is a process schematic diagram of a method for manufacturing an image sensor provided in an embodiment of the present application, the aforementioned manufacturing method comprises the following steps:

[0062] like Figure 4 As shown, a device wafer 101 is provided. The device wafer 101 includes a photosensitive element, a microlens 103 located on one side of the photosensitive element, and a conductive block 102 connected to the ground. The conductive block 102 is arranged away from the photosensitive element in the horizontal direction of the device wafer 101.

[0063] The conductive block 102 is also called a pad (PAD), which is usually used as a signal transmission hub between the device wafer 101 and the package carrier wafer 201; the conductive block 102 is connected to the ground signal, and the ground signal connected to the conductive block 102 can be either an analog ground signal AGND or a digital ground signal DGND, and the embodiment of the present application does not impose specific restrictions on this; the material of the conductive block can include at least one of copper, aluminum, silver, tungsten, platinum, titanium, and nickel.

[0064] A package carrier wafer 201 is provided. The package carrier wafer 201 is arranged on a side of the photosensitive element away from the microlens 103. On a side of the conductive block 102 away from the microlens 103, the package carrier wafer 201 is etched to form a groove structure. The groove structure includes at least one slope.

[0065] It can be understood that both the device wafer 101 and the package carrier wafer 202 are wafers with silicon as the main structure, and a semiconductor structure with chip or device functions can be grown and prepared on the basis of the wafer. The two can be bonded by wire bonding or metal bonding in through-silicon vias; the slope of the groove structure ranges from 20° to 90°, and the groove structure is the basic structure of the metal bonding formed in the through-silicon via, and the metal bonding can be achieved by laying a redistribution layer 204 in the groove structure.

[0066] An infrared absorption layer 205 is disposed on a side of the package carrier wafer 201 away from the device wafer 101 , and the orthographic projection of the infrared absorption layer 205 in a direction perpendicular to the device wafer 101 covers the photosensitive element.

[0067] It is understood that the infrared absorption layer 205 is usually made of aluminum metal, so it can have good infrared absorption ability. The infrared absorption layer 205 can absorb radiation in the infrared band (2.5-7.5 microns) and the far infrared band (7.0-14.0 microns). In the embodiment of the present application, the thickness of the infrared absorption layer 205 is 1-5 microns, so that the thickness of the packaging structure and the infrared absorption ability can be taken into account.

[0068] like Figure 5As shown, a first barrier layer 202 and a second barrier layer 203 are sequentially stacked on a side of the infrared absorbing layer 205 away from the package carrier wafer 201 , the second barrier layer 203 covers the first barrier layer 202 , and the first barrier layer 202 covers the infrared absorbing layer 205 .

[0069] It is understandable that, since silicon oxide or silicon nitride has good stability, silicon oxide or silicon nitride is used as the material for forming the first barrier layer 202 and the second barrier layer 203, wherein the materials of the first barrier layer 202 and the second barrier layer 203 can be the same or different, and the embodiment of the present application does not limit this. Optionally, the sum of the thickness of the first barrier layer 202 and the second barrier layer 203 is 1-3 microns, so as to take into account both the thickness of the packaging structure and the reliability of the packaging structure.

[0070] like Figure 6 As shown, a redistribution layer 204 is disposed on a side of the second barrier layer 203 away from the first barrier layer 202 , the redistribution layer 204 covers the second barrier layer 203 , and the redistribution layer 204 is electrically connected to the conductive block 102 .

[0071] In some optional embodiments, the redistribution layer 204 may include a laminated structure, at least one layer of which is a metal structure. The optional metal structure includes one or more of copper, aluminum, silver, tungsten, platinum, titanium, and nickel. Generally speaking, the number of laminated layers of the laminated structure may be three or more. Among them, copper metal is the most commonly used sputtering material for preparing the redistribution layer 204, and has the best conductivity and processability; aluminum has poorer conductivity than copper, but because of its lower cost, it can effectively control the packaging cost; silver has better conductivity than copper, but because of its rarity, it usually increases the cost. Using silver metal as a laminated metal can effectively improve the transmission speed and packaging performance of electrical signals; tungsten metal has a high melting point and good conductivity, so it is usually used to prepare a layer in the laminated structure of the redistribution layer 204 as a connector; platinum metal has good corrosion resistance, so it may be more effective in resisting the invasion of water vapor or other pollutants into the interior of the wafer; titanium metal and nickel metal have corrosion resistance and plasticity, so they are also widely used in the laminated structure of the redistribution layer 204. According to different product performance and packaging requirements, one or more of the above metal structures can be used to form a stacked structure, but the specific selection method is not specifically limited in the embodiments of the present application.

[0072] A conductive solder ball 206 is disposed on a side of the redistribution layer 204 away from the second barrier layer 203 , and the conductive solder ball 206 is electrically connected to the redistribution layer 204 .

[0073] It is understandable that the conductive solder balls 206 can realize information exchange between the packaging structure and other structures outside the device wafer 101 on the one hand, and can effectively conduct heat inside the packaging structure on the other hand, thereby reducing the internal temperature.

[0074] Further, in the step of providing the redistribution layer 204 on the side of the second barrier layer 203 away from the first barrier layer 202:

[0075] The redistribution layer 204 includes a grounding end, which is extended along a direction perpendicular to the package carrier wafer 201 toward a side close to the device wafer 101 , and is connected to the infrared absorption layer 205 .

[0076] It is understandable that the ground terminal is connected to the ground signal, and the ground terminal and the redistribution layer 204 can be made of the same metal material or a metal material with stronger conductivity to ensure that the current of the redistribution layer 204 can be quickly conducted through the ground terminal. Figure 1 or Figure 2 With regard to the single package structure shown in the figure, any package structure unit has a ground terminal, and when a fault point occurs, the location of the fault point can be quickly identified; at the same time, when the fault point occurs, the redistribution layer 204 and the infrared absorption layer 205 or the package carrier wafer 201 are short-circuited and generate capacitance to the ground, and the charge stored in the capacitor can be quickly discharged through the ground terminal. In other words, even if a fault point occurs in the manufacturing process, the problem of affecting the image effect produced by the image sensor caused by the fault point can be effectively avoided by setting the ground terminal.

[0077] In some optional implementations, in the step of providing the infrared absorption layer 205 on the side of the package carrier wafer 201 away from the device wafer 101:

[0078] The infrared absorption layer 205 extends in a direction parallel to the device wafer 101 and covers the package carrier wafer 201 . The infrared absorption layer 205 is electrically connected to the conductive block 102 .

[0079] Since the redistribution layer 204 is arranged on the side of the package carrier wafer 201 away from the photosensitive element, the device wafer 101 also includes a grounded conductive block 102, and the conductive block 102 is arranged away from the photosensitive element in the horizontal direction of the device wafer 101. The redistribution layer 204 is electrically connected to the conductive block 102, and the infrared absorption layer 205 extends in a direction parallel to the device wafer 101 and covers the package carrier wafer 201. It can be electrically connected to the redistribution layer 204 at the conductive block 102 under the reliability protection of the first barrier layer 202 and the second barrier layer 203. Since the conductive block 102 is connected to the ground signal, and any package structure unit has two redistribution layers. The power connection ports connecting the wiring layer 204, the infrared absorption layer 205 and the conductive block 102 can quickly identify the location of the fault point when a fault point occurs; at the same time, because when a fault point occurs, the rewiring layer 204 and the infrared absorption layer 205 or the package carrier wafer 201 are short-circuited and generate capacitance to the ground, the charge stored in the capacitance can be quickly discharged through the above two power connection ports connecting the rewiring layer 204, the infrared absorption layer 205 and the conductive block 102. In other words, even if a fault point occurs in the manufacturing process, the problem of the fault point affecting the image effect produced by the image sensor can be effectively avoided by setting the ground terminal.

[0080] Embodiment 5

[0081] The present application also provides an electronic device, comprising the image sensor provided by the above embodiment.

[0082] The embodiments described above are only some embodiments of the present application, rather than all embodiments. The components of the embodiments of the present application generally described and shown in the drawings can be arranged and designed in various configurations. Therefore, the detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of protection of the present application, but merely represents the selected embodiments of the present application. Based on this, the scope of protection of the present application shall be based on the scope of protection of the claims. In addition, based on the embodiments of the present application, all other embodiments that can be obtained by those skilled in the art without making creative work should belong to the scope of protection of the present application.

Claims

1. An image sensor, characterized in that: The image sensor comprises a device wafer and a package carrier wafer which are bonded together, wherein the device wafer comprises a photosensitive element and a microlens located on one side of the photosensitive element, and the package carrier wafer is arranged on a side of the photosensitive element away from the microlens, wherein: A redistribution layer is provided on one side of the package carrier wafer in a direction away from the device wafer, the redistribution layer is provided on the side of the package carrier wafer away from the photosensitive element, the device wafer further comprises a conductive block connected to the ground, the conductive block is provided away from the photosensitive element in the horizontal direction of the device wafer, and the redistribution layer is electrically connected to the conductive block; An infrared absorption layer is further arranged on one side of the package carrier wafer in a direction away from the device wafer. The infrared absorption layer is arranged on a side of the redistribution layer close to the photosensitive element. The infrared absorption layer is insulated from the redistribution layer, and the orthographic projection of the infrared absorption layer in a direction perpendicular to the device wafer covers the photosensitive element. The infrared absorption layer absorbs infrared light from the side of the redistribution layer away from the photosensitive element.

2. The image sensor according to claim 1, wherein: The redistribution layer comprises a grounding end, the grounding end extends toward a side close to the device wafer along a direction perpendicular to the package carrier wafer, and the grounding end is connected to the infrared absorption layer.

3. The image sensor according to claim 1, wherein: The image sensor further includes a conductive solder ball, which is disposed on a side of the redistribution layer away from the infrared absorption layer and is electrically connected to the redistribution layer.

4. The image sensor according to claim 1, wherein: A first barrier layer and a second barrier layer are sequentially stacked between the redistribution layer and the infrared absorption layer. The second barrier layer covers the first barrier layer, and the first barrier layer covers the infrared absorption layer.

5. The image sensor according to claim 1, wherein: The redistribution layer includes a stacked structure, and at least one layer in the stacked structure is a metal structure.

6. The image sensor according to claim 1, wherein: The infrared absorption layer extends in a direction parallel to the device wafer and covers the package carrier wafer. The infrared absorption layer is electrically connected to the conductive block, and the infrared absorption layer is electrically connected to the redistribution layer through the conductive block.

7. The image sensor according to claim 1, wherein: On a side of the conductive block away from the microlens, the package carrier wafer includes a groove structure, the groove structure includes at least one slope, and the orthographic projection of the redistribution layer on the package carrier wafer covers the groove surface of the groove structure.

8. A method for manufacturing an image sensor, characterized in that: The manufacturing method comprises the following steps: A device wafer is provided, wherein the device wafer comprises a photosensitive element, a microlens located on one side of the photosensitive element, and a conductive block connected to a ground, wherein the conductive block is arranged away from the photosensitive element in a horizontal direction of the device wafer; Providing a package carrier wafer, the package carrier wafer is arranged on a side of the photosensitive element away from the microlens, and on a side of the conductive block away from the microlens, the package carrier wafer is etched to form a groove structure, wherein the groove structure includes at least one slope; An infrared absorption layer is arranged on a side of the package carrier wafer away from the device wafer, wherein the orthographic projection of the infrared absorption layer in a direction perpendicular to the device wafer covers the photosensitive element; A first barrier layer and a second barrier layer are sequentially stacked on a side of the infrared absorbing layer away from the package carrier wafer, wherein the second barrier layer covers the first barrier layer, and the first barrier layer covers the infrared absorbing layer; A redistribution layer is provided on a side of the second barrier layer away from the first barrier layer, the redistribution layer covers the second barrier layer, and the redistribution layer is electrically connected to the conductive block; A conductive solder ball is arranged on a side of the redistribution layer away from the second barrier layer, and the conductive solder ball is electrically connected to the redistribution layer.

9. The method for manufacturing an image sensor according to claim 8, wherein: In the step of providing a redistribution layer on a side of the second barrier layer away from the first barrier layer: The redistribution layer comprises a grounding end, the grounding end is extended along a direction perpendicular to the package carrier wafer toward a side close to the device wafer, and the grounding end is connected to the infrared absorption layer.

10. The method for manufacturing an image sensor according to claim 8, wherein: In the step of providing an infrared absorption layer on a side of the package carrier wafer away from the device wafer: The infrared absorption layer extends in a direction parallel to the device wafer and covers the package carrier wafer, and the infrared absorption layer is electrically connected to the conductive block.

11. An electronic device, characterized in that: Comprising the image sensor as described in claims 1-7.

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