Semiconductor structure, manufacturing method of semiconductor structure and image sensor

Abstract

The embodiment of the invention provides a semiconductor structure, a manufacturing method of the semiconductor structure and an image sensor, and relates to the technical field of semiconductor manufacturing. The semiconductor structure comprises a substrate and a photoelectric function layer formed on the surface of the substrate, the photoelectric function layer comprises a photoelectric sensing layer and an isolation structure used for dividing the photoelectric sensing layer into a plurality of photoelectric sensing areas; the photoelectric sensing area comprises a plurality of photoelectric sensing material layers which are arranged in a stacked mode and a cross-layer doping structure which extends in the normal direction of the photoelectric sensing layers. The doping type of the cross-layer doping structure is the same as that of the photoelectric sensing layer; wherein the cross-layer doping structure is formed through an ion implantation process; the normal direction of the photoelectric sensing layer is taken as the depth direction of ion implantation and the thickness direction of the photoelectric sensing material layer, and the ion implantation depth of the cross-layer doped structure is at least greater than the thickness of the photoelectric sensing material layer farthest from the substrate along the normal direction of the photoelectric sensing layer. According to the embodiment of the invention, the imaging quality of the image sensor is improved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of semiconductor manufacturing technology, and specifically to a semiconductor structure, a method for manufacturing a semiconductor structure, and an image sensor. Background Art

[0002] Complementary Metal Oxide Semiconductor (CMOS) image sensors are widely used in consumer electronics, security monitoring, assisted driving, medical equipment and other fields due to their low cost, anti-blurring, and flexible access. Among them, the BackSide Illumination (BSI) CMOS image sensor changes the incident direction of light, allowing light to directly illuminate the photodiode, improving the device sensitivity and light utilization, and is often used in fields that require high pixel performance of image sensors.

[0003] However, in the existing back-illuminated CMOS image sensor manufacturing process, photodiodes (PDs) are usually formed using high-energy ion implantation. As the process size decreases, high-energy ion implantation may damage the back-illuminated CMOS image sensor and cause cross talk between pixels, reducing the device imaging quality. Summary of the invention

[0004] In view of this, multiple embodiments of the present application provide a semiconductor structure, a method for manufacturing the semiconductor structure, and an image sensor to improve the imaging quality of a back-illuminated CMOS image sensor.

[0005] In one aspect, an embodiment of the present application provides a semiconductor structure, comprising: a substrate and a photoelectric functional layer formed on the surface of the substrate; the photoelectric functional layer is used to realize photoelectric signal conversion based on the photoelectric effect; the photoelectric functional layer includes a photoelectric sensing layer and an isolation structure for separating the photoelectric sensing layer into multiple photoelectric sensing regions; the photoelectric sensing region includes multiple stacked photoelectric sensing material layers and a cross-layer doping structure extending along the normal direction of the photoelectric sensing layer; the doping type of the cross-layer doping structure is the same as the doping type of the photoelectric sensing layer; wherein the cross-layer doping structure is formed by an ion implantation process; with the normal direction of the photoelectric sensing layer as the depth direction of the ion implantation and the thickness direction of the photoelectric sensing material layer, the ion implantation depth of the cross-layer doping structure formed along the normal direction of the photoelectric sensing layer is at least greater than the thickness of the photoelectric sensing material layer farthest from the substrate.

[0006] Optionally, the doping elements of the photoelectric sensing material layer include: phosphorus, arsenic and antimony.

[0007] Optionally, among the multiple photoelectric sensing material layers, adjacent photoelectric sensing material layers have different doping elements.

[0008] Optionally, a photoelectric sensing material layer doped with phosphorus is formed between the photoelectric sensing material layer doped with arsenic and the photoelectric sensing material layer doped with antimony.

[0009] Optionally, the doping element of the cross-layer doping structure is phosphorus.

[0010] Optionally, the semiconductor structure also includes: a target grid structure formed on a side of the isolation structure away from the substrate; the target grid structure includes a first grid layer, a second grid layer and a third grid layer stacked together, wherein the material of the first grid layer is hafnium dioxide, the material of the second grid layer is titanium nitride, and the material of the third grid layer is tungsten.

[0011] In another aspect, an embodiment of the present application provides a method for manufacturing a semiconductor structure, the method comprising: providing a substrate; forming a photoelectric functional layer on the substrate; the photoelectric functional layer is used to realize photoelectric signal conversion based on the photoelectric effect; the photoelectric functional layer comprises a photoelectric sensing layer and an isolation structure for separating the photoelectric sensing layer into a plurality of photoelectric sensing regions; the photoelectric sensing region comprises a plurality of stacked photoelectric sensing material layers and a cross-layer doping structure extending along the normal direction of the photoelectric sensing layer; the doping type of the cross-layer doping structure is the same as the doping type of the photoelectric sensing layer; wherein the cross-layer doping structure is formed by an ion implantation process; taking the normal direction of the photoelectric sensing layer as the depth direction of the ion implantation and the thickness direction of the photoelectric sensing material layer, along the normal direction of the photoelectric sensing layer, the ion implantation depth of the cross-layer doping structure formed is at least greater than the thickness of the photoelectric sensing material layer farthest from the substrate.

[0012] Optionally, the semiconductor structure also includes a target grid structure formed on a side of the isolation structure away from the substrate; the step of preparing a photoelectric functional layer on the substrate includes: forming a plurality of the photoelectric sensing regions and the isolation structure on the substrate; forming a transition grid structure on a side of the photoelectric sensing region away from the substrate, and forming a target grid structure on a side of the isolation structure away from the substrate; wherein the transition grid structure and the target grid structure are alternately distributed; using the transition grid structure and the target grid structure as masks, an ion implantation process is used to form the cross-layer doping structure in the photoelectric sensing region; and removing the transition grid structure.

[0013] Optionally, the distance between adjacent transition grid structures and target grid structures falls within the range of 500 nm to 1000 nm.

[0014] In yet another aspect, an embodiment of the present application provides an image sensor, which includes the semiconductor structure as described in the above embodiment, or a semiconductor structure manufactured by the method for manufacturing the semiconductor structure as described in the above embodiment.

[0015] In multiple embodiments provided in the present application, a photoelectric functional layer including a photoelectric sensing layer and an isolation structure is formed on the surface of a substrate, and the photoelectric sensing layer is separated into multiple photoelectric sensing regions by using the isolation structure, each photoelectric sensing region includes multiple stacked photoelectric sensing material layers and cross-layer doping structures, wherein the cross-layer doping structure extends along the normal direction of the photoelectric sensing layer, and the doping type of the cross-layer doping structure is the same as the doping type of the photoelectric sensing layer, and the cross-layer doping structure is formed by an ion implantation process, and the ion implantation depth of the cross-layer doping structure formed along the normal direction of the photoelectric sensing layer is at least greater than the thickness of the photoelectric sensing material layer farthest from the substrate, and the unexpected effects achieved include: since the doping type of the cross-layer doping structure is the same as the doping type of the photoelectric sensing layer, and the cross-layer doping structure spans at least two photoelectric sensing material layers along the normal direction of the photoelectric sensing layer, the number of photogenerated carriers in the photoelectric conversion process is increased, thereby improving the imaging quality of the image sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for describing the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0017] Figure 1 A schematic flow chart of a method for manufacturing a semiconductor structure provided for one embodiment of the present application.

[0018] Figure 2 A schematic diagram of a front-end wafer prepared by a front-end of line (FEOL) process is provided for one embodiment of the present application.

[0019] Figure 3 A schematic flow chart of the steps of providing a substrate is provided for one embodiment of the present application.

[0020] Figure 4 A schematic diagram of forming an isolation layer in a semiconductor substrate is provided according to an embodiment of the present application.

[0021] Figure 5A schematic diagram of a substrate provided for one embodiment of the present application.

[0022] Figure 6 A schematic diagram of a process for preparing a photovoltaic functional layer on a substrate surface is provided for one embodiment of the present application.

[0023] Figure 7 A schematic diagram of forming a photoelectric sensing layer on a substrate surface is provided for one embodiment of the present application.

[0024] Figure 8 A schematic diagram of using an isolation structure to separate a photoelectric sensing layer into a plurality of photoelectric sensing regions is provided for one embodiment of the present application.

[0025] Fig. 9 A schematic diagram of forming a grid material layer on the surface of a photoelectric sensing layer provided for one embodiment of the present application.

[0026] Fig.10 A schematic diagram of forming a target grid structure and a transition grid structure is provided for one embodiment of the present application.

[0027] Fig.11 A schematic diagram of forming a cross-layer doping structure by ion implantation is provided for one embodiment of the present application.

[0028] Fig.12 A schematic structural diagram of a semiconductor structure provided for one embodiment of the present application.

[0029] Fig.13 A schematic diagram of the structure of an image sensor provided in one embodiment of the present application.

[0030] Structure number description 100, front-end wafer; 1001, front-end wafer substrate; 1011, first surface; 1012, second surface; 1002, semiconductor base substrate; 101, substrate; 102, protective layer; 1021, gate dielectric layer; 1022, etch stop layer; 103, dielectric layer; 104, shallow trench isolation structure; 105, gate structure; 106, contact structure; 1061, contact extension; 1062, contact connection; 200, substrate; 210, isolation layer; 220, photoelectric sensing layer; 220a, photoelectric sensing region; 221, first photoelectric sensing material layer; 222, second photoelectric sensing material layer; 223, third photoelectric sensing material layer Material layer; 224, fourth photoelectric sensing material layer; 230, isolation structure; 240, insulating layer; 250, grid material layer; 251, first sub-grid material layer; 252, second sub-grid material layer; 253, third sub-grid material layer; 260, target grid structure; 261, first grid layer; 262, second grid layer; 263, third grid layer; 270, transition grid structure; 280, cross-layer doping structure; 400, image sensor; 410, filter structure. DETAILED DESCRIPTION

[0031] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0032] The drawings provided in the embodiments of the present application are only used to illustrate the basic concept of the present application in a schematic manner. The drawings only show components related to the present application rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the shape, quantity and proportion of each component may be changed, and the layout of the components may also be more complicated.

[0033] In the description of the embodiments of the present application, it should be understood that the terms "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", "center", etc., indicate the orientation or position relationship based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing the present application, and does not indicate or imply that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. The terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the said features.

[0034] In the related art, in the process of manufacturing back-illuminated CMOS image sensors, a high-energy ion implantation process is usually used in the front-end process to prepare photodiodes. During the ion implantation process, a large number of high-speed moving ions collide with the semiconductor lattice, resulting in a large number of point defects, dislocations and other lattice damages in the area near the surface of the semiconductor substrate. These lattice damages may affect the transport of photogenerated carriers, reduce the carrier mobility and quantum efficiency of the photodiode, increase dark current, and lead to enhanced crosstalk between pixels, resulting in blurred imaging of the image sensor.

[0035] In addition, the lattice damage effect is related to the ion implantation parameters such as the dose and energy of the ion implantation. The degree of lattice damage will increase with the increase of dose and ion energy. In fact, when the energy of ion implantation is too large, the lattice structure close to the surface of the semiconductor substrate within the ion range will be completely destroyed and become amorphous, resulting in the degradation of photodiode performance or even failure, and the reliability of image sensors will be reduced.

[0036] Therefore, it is necessary to provide a semiconductor structure, a method for manufacturing a semiconductor structure, and an image sensor, wherein a photoelectric functional layer including a photoelectric sensing layer and an isolation structure is formed on the surface of a substrate, and the photoelectric sensing layer is divided into a plurality of photoelectric sensing regions by using the isolation structure, each photoelectric sensing region includes a plurality of stacked photoelectric sensing material layers and a cross-layer doping structure, wherein the cross-layer doping structure extends along the normal direction of the photoelectric sensing layer, and the doping type of the cross-layer doping structure is the same as the doping type of the photoelectric sensing layer, and the cross-layer doping structure is formed by an ion implantation process, and the ion implantation depth of the cross-layer doping structure formed along the normal direction of the photoelectric sensing layer is at least greater than the thickness of the photoelectric sensing material layer farthest from the substrate, since the doping type of the cross-layer doping structure is the same as the doping type of the photoelectric sensing layer, and the cross-layer doping structure spans at least two photoelectric sensing material layers along the normal direction of the photoelectric sensing layer, on the one hand, the damage to the device caused by ion implantation can be reduced, and the reliability of the image sensor can be improved, and on the other hand, the crosstalk and dark current between adjacent pixels can be reduced, the number of photogenerated carriers in the photoelectric conversion process can be increased, the photoelectric conversion efficiency of the photodiode can be improved, and the imaging quality of the image sensor can be improved.

[0037] See also Figure 1 An embodiment of the present application provides a method for manufacturing a semiconductor structure. The method for manufacturing a semiconductor structure may include the following steps.

[0038] S110: providing a substrate.

[0039] In this embodiment, the substrate can be prepared based on a semiconductor substrate. Specifically, the front-end wafer prepared by the front-end process can be bonded to a carrier wafer, and then the bonded wafer is turned over and the material on the back of the front-end wafer is thinned to obtain a semiconductor substrate. The degree of thinning of the material on the back of the front-end wafer can be determined according to the process requirements, and the embodiment of this application is not specifically limited. Among them, the front-end wafer can be manufactured through the following process steps.

[0040] See also Figure 2 The front-end wafer 100 may include a front-end wafer substrate 1001, a protective layer 102, a dielectric layer 103, and a plurality of shallow trench isolation structures 104. Among them, a plurality of gate structures 105 are arranged at intervals in the protective layer 102, and a plurality of contact structures 106 are arranged at intervals in the dielectric layer 103. The specific structures of the various parts of the front-end wafer 100 are as follows: The front-end wafer substrate 1001 can be made of semiconductor material, insulating material, conductive material or any combination thereof. For example, the front-end wafer substrate 1001 can be made of materials such as silicon (Si), silicon germanium (SiGe), silicon germanium carbon (SiGeC), and silicon carbide (SiC). The front-end wafer substrate 1001 can be a single-layer structure or a multi-layer structure. In this embodiment, a silicon wafer is used as the front-end wafer substrate 1001. Specifically, the thickness of the front-end wafer substrate 1001 can be 2.5um~3.5um, for example, 2.5um, 2.8um, 3um, 3.5um, etc. The front-end wafer substrate 1001 has a first surface 1011 and a second surface 1012 relative to each other.

[0041] A plurality of shallow trench isolation structures 104 are formed in the front-end wafer substrate 1001. The shallow trench isolation structure 104 can extend from the second surface 1012 to the first surface 1011. The distance between the shallow trench isolation structure 104 and the first surface 1011 is less than the thickness of the front-end wafer substrate 1001. The material filled in the shallow trench isolation structure 104 can be an oxide to isolate the electrical crosstalk between different active areas and improve the imaging quality of the image sensor. The shallow trench isolation structure 104 can be formed in any manner in the relevant technology, which will not be described here.

[0042] After the formation of multiple shallow trench isolation structures 104, a protection layer 102, multiple gate structures 105, a dielectric layer 103 and multiple contact structures 106 may be sequentially formed on the second surface 1012, wherein the protection layer 102 may include a gate dielectric layer 1021 and an etch stop layer 1022. The specific formation process is as follows: After the multiple shallow trench isolation structures 104 are formed, a gate dielectric layer 1021 for isolation and threshold voltage adjustment may be formed on the second surface 1012. Specifically, the gate dielectric layer 1021 made of silicon dioxide or a low dielectric constant material may be formed on the second surface 1012 by thermal oxidation or chemical vapor deposition (CVD).

[0043] After the gate dielectric layer 1021 is formed, polysilicon may be deposited on a surface of the gate dielectric layer 1021 away from the front-end wafer substrate 1001 by chemical vapor deposition or other methods to form a plurality of gate structures 105 distributed at intervals.

[0044] After the multiple gate structures 105 are formed, an etch stop layer 1022 may be formed between the surface of the gate dielectric layer 1021 away from the front-end wafer substrate 1001 and the multiple gate structures 105. Specifically, the etch stop layer 1022 may be multiple layers, for example, two layers. To reduce the risk of cracks in the etch stop layer 1022 causing the contact structure 106 to fail, the material of the etch stop layer 1022 may include silicon oxide, silicon carbonitride or silicon nitride. The etch stop layer 1022 may be formed by methods such as chemical vapor deposition or physical vapor deposition (PVD).

[0045] After the etch stop layer 1022 is formed, a dielectric layer 103 may be formed on the surface of the etch stop layer 1022 away from the front-end wafer substrate 1001. Specifically, to improve the reliability of the contact structure 106, the dielectric layer 103 made of silicon dioxide or other low dielectric constant materials may be formed by chemical vapor deposition or physical vapor deposition.

[0046] Subsequently, the dielectric layer 103 is etched to form a plurality of openings, and conductive materials are deposited in the openings, for example, titanium, titanium nitride and metal tungsten are deposited to form a plurality of contact extensions 1061 in contact with the gate structure 105. Next, a contact connection portion 1062 for connecting with other conductive layers is formed on the surface of the dielectric layer 103 away from the front-end wafer substrate 1001, thereby obtaining the front-end wafer 100. The contact connection portion 1062 and the contact extension portion 1061 form a contact structure 106.

[0047] The present embodiment does not specifically limit the thickness of the gate dielectric layer 1021, the etch stop layer 1022, the dielectric layer 103, and the size of the gate structure 105 and the contact structure 106. During the manufacturing process, the above structural parameters can be determined according to the process requirements.

[0048] See also Figures 3 to 5In this embodiment, the base 200 may include a substrate 101, an isolation layer 210, a protection layer 102, a dielectric layer 103, a plurality of shallow trench isolation structures 104, a plurality of gate structures 105 and a plurality of contact structures 106. Specifically, the step of providing a base may include sub-steps S111 and S112.

[0049] S111: forming an isolation layer in a substrate of a semiconductor base.

[0050] In this embodiment, the isolation layer 210 can be used to achieve electrical isolation between the front-end wafer 100 and the structure formed on the back of the front-end wafer 100. Specifically, the isolation layer 210 can be formed on the side of the shallow trench isolation structure 104 away from the protective layer 102. To improve the isolation effect, an ion implantation (IMP) process can be used to implant gallium silicide (SiGa) into the semiconductor base substrate 1002 to form the isolation layer 210.

[0051] In some embodiments, the isolation layer 210 may be formed by implanting other element ions of the Group III into the semiconductor base substrate 1002. For example, boron ions may be implanted.

[0052] S112: After the isolation layer is formed, the substrate of the semiconductor substrate on the side of the isolation layer away from the shallow trench isolation structure is removed to expose the surface of the isolation layer away from the shallow trench isolation structure.

[0053] In this embodiment, a planarization process such as chemical mechanical polishing (CMP) may be used to remove the semiconductor base substrate 1002 excluding the shallow trench isolation structure 104 to obtain the substrate 200 .

[0054] S120: preparing a photoelectric functional layer on a substrate.

[0055] In order to reduce the damage of ion implantation to the device, the optoelectronic functional layer can be directly formed on the surface of the substrate away from the front-end wafer. At the same time, in order to reduce the crosstalk between pixels, the optoelectronic sensing layer in the optoelectronic functional layer can be set as a multilayer structure composed of different materials to cover a wider spectral range, reduce the propagation distance of light when passing through the component, and thus reduce the light leakage between adjacent pixels.

[0056] In this embodiment, the photoelectric functional layer can be used to realize photoelectric signal conversion based on the photoelectric effect. Specifically, the photoelectric functional layer can include a photoelectric sensing layer and an isolation structure. Among them, the photoelectric sensing layer can be used to generate photogenerated carriers. The isolation structure can be used to separate the photoelectric sensing layer into multiple photoelectric sensing areas.

[0057] See also Figure 6The step of preparing the optoelectronic functional layer on the substrate may include sub-steps S121, S122, S123 and S124.

[0058] S121: forming a plurality of photoelectric sensing regions and isolation structures on a substrate.

[0059] In order to reduce the lateral movement of carriers between adjacent pixels, an isolation structure can be used to separate the photoelectric sensing layer into multiple photoelectric sensing regions to reduce the adverse effects of crosstalk between pixels on the imaging quality of the image sensor.

[0060] See also Figure 7 In this embodiment, a photoelectric sensing layer 220 with N-type doping can be first formed on the surface exposed by the isolation layer 210. In order to reduce crosstalk between pixels and reduce dark current, the photoelectric sensing layer 220 can include a plurality of stacked photoelectric sensing material layers. Specifically, the photoelectric sensing layer 220 can include a first photoelectric sensing material layer 221, a second photoelectric sensing material layer 222, a third photoelectric sensing material layer 223 and a fourth photoelectric sensing material layer 224.

[0061] In this embodiment, the doping elements of the photoelectric sensing material layer may include: phosphorus (P), arsenic (As) and antimony (Sb). In order to improve the photoelectric conversion efficiency of the photodiode, in the multiple photoelectric sensing material layers, the doping elements of adjacent photoelectric sensing material layers are different. Between the photoelectric sensing material layer doped with arsenic and the photoelectric sensing material layer doped with antimony, a photoelectric sensing material layer doped with phosphorus is formed. Specifically, the doping element of the first photoelectric sensing material layer 221 may be phosphorus, that is, the material of the first photoelectric sensing material layer 221 may be silicide phosphorus (SiP). The doping element of the second photoelectric sensing material layer 222 may be arsenic, that is, the material of the second photoelectric sensing material layer 222 may be silicide arsenic (SiAs). The doping element of the third photoelectric sensing material layer 223 may be phosphorus, that is, the material of the third photoelectric sensing material layer 223 may be silicide phosphorus (SiP). The doping element of the fourth photoelectric sensing material layer 224 may be antimony, that is, the material of the fourth photoelectric sensing material layer 224 may be antimony silicide (SiSb).

[0062] In some embodiments, the doping type of the photoelectric sensing layer 220 may be P-type. Accordingly, the doping elements of the photoelectric sensing material layer may include: boron (B) element, gallium (Ga) element and indium (In) element. The process of forming the photoelectric sensing layer 220 with a doping type of P-type is similar to the process of forming the photoelectric sensing layer 220 with a doping type of N-type, and will not be repeated here.

[0063] See also Figure 8. After the photoelectric sensing layer 220 is formed, the photoelectric sensing layer 220 and the isolation layer 210 can be etched based on the mask corresponding to the isolation structure 230 to obtain multiple etching openings, and then the glass material is filled into the etching openings using a spin-on process, and a flattening process is performed to obtain the isolation structure 230. In this embodiment, the isolation structure 230 can be a backside deep trench isolation (BDTI) structure. The embodiment of the present application does not specifically limit the shape of the isolation structure 230. The isolation structure 230 can separate the photoelectric sensing layer 220 into multiple photoelectric sensing areas 220a.

[0064] S122: forming a transition grid structure on a side of the photoelectric sensing region away from the substrate, and forming a target grid structure on a side of the isolation structure away from the substrate.

[0065] In order to simplify the subsequent process of manufacturing a cross-layer doped structure by ion implantation and reduce the number of masks and process steps added in the process of manufacturing the cross-layer doped structure, a transition grid structure and a target grid structure can be formed first, so that in the subsequent ion implantation process, ions can be implanted into the photoelectric sensing area using the two grid structures as masks.

[0066] See also Fig. 9 . To reduce current leakage and short circuit, in this embodiment, an insulating layer 240 may be first formed on the exposed surfaces of the photoelectric sensing layer 220 and the isolation structure 230. The material of the insulating layer 240 may be silicon dioxide (SiO2). Subsequently, a grid material layer 250 may be formed on the side of the insulating layer 240 away from the photoelectric sensing layer 220. Specifically, the grid material layer 250 may include a first sub-grid material layer 251, a second sub-grid material layer 252, and a third sub-grid material layer 253 that are stacked. Among them, the material of the first sub-grid material layer 251 may be hafnium dioxide (HfO2), the material of the second sub-grid material layer 252 may be titanium nitride (TiN), and the material of the third sub-grid material layer 253 may be tungsten (W). Among them, titanium nitride can be used as a stabilizing layer to reduce crosstalk between pixels.

[0067] See also Fig.10. In this embodiment, after the grid material layer 250 is formed, the grid material layer 250 can be etched based on the mask corresponding to the target grid structure 260 and the transition grid structure 270 to obtain the transition grid structure 270 and the target grid structure 260 that are alternately distributed on the surface of the insulating layer 240 away from the photoelectric sensing layer 220. Among them, the target grid structure 260 can be a grid structure corresponding to the isolation structure 230 in the normal direction of the photoelectric sensing layer 220. The transition grid structure 270 can be a grid structure corresponding to the photoelectric sensing area 220a in the normal direction of the photoelectric sensing layer 220. Any two transition grid structures 270 or any two target grid structures 260 are not adjacent. The specific structures of the two grid structures are the same. Taking the target grid structure 260 as an example, the specific structures of the two grid structures are briefly described.

[0068] The target grid structure 260 may include a first grid layer 261, a second grid layer 262, and a third grid layer 263. The first grid layer 261 corresponds to the first sub-grid material layer 251, and therefore, the material of the first grid layer 261 is hafnium dioxide. The second grid layer 262 corresponds to the second sub-grid material layer 252, and therefore, the material of the second grid layer 262 is titanium nitride. The third grid layer 263 corresponds to the third sub-grid material layer 253, and therefore, the material of the third grid layer 263 is tungsten. With the direction perpendicular to the normal direction of the photoelectric sensing layer 220 as the width direction, the widths of the first grid layer 261, the second grid layer 262, and the third grid layer 263 along the width direction may be equal.

[0069] In order to limit the size of the subsequently formed cross-layer doping structure, in this embodiment, the distance between the adjacent transition grid structure 270 and the target grid structure 260 may fall within the range of 500nm to 1000nm. For example, the distance between the adjacent transition grid structure 270 and the target grid structure 260 may be 500nm, 600nm, 750nm, 900nm, or 1000nm.

[0070] S123: Using the transition grid structure and the target grid structure as masks, an ion implantation process is used to form a cross-layer doping structure in the photoelectric sensing region.

[0071] See also Fig.11. In order to increase the number of photogenerated carriers generated when the photoelectric sensing layer 220 receives light, improve the photoelectric conversion efficiency of the photodiode, and thus improve the imaging quality of the photodiode, in this embodiment, the doping type of the ions injected into the photoelectric sensing area 220a can be the same as the doping type of the photoelectric sensing layer 220. At the same time, in order to realize that the cross-layer doping structure 280 extends along the normal direction of the photoelectric sensing layer 220 and spans at least two photoelectric sensing material layers, the normal direction of the photoelectric sensing layer 220 can be used as the depth direction of the ion implantation and the thickness direction of the photoelectric sensing material layer, and the ion implantation depth of the cross-layer doping structure 280 formed along the normal direction of the photoelectric sensing layer 220 is at least greater than the thickness of the photoelectric sensing material layer farthest from the substrate. Specifically, the doping type of the photoelectric sensing layer 220 and the doping type of the cross-layer doping structure 280 can both be N-type, or both be P-type. For example, when the doping type of the photoelectric sensing layer 220 and the doping type of the cross-layer doping structure 280 are both N-type, the doping element of the cross-layer doping structure 280 can be phosphorus. When the cross-layer doping structure 280 spans two photoelectric sensing material layers, the cross-layer doping structure 280 can span the fourth photoelectric sensing material layer 224 and the third photoelectric sensing material layer 223; when the cross-layer doping structure 280 spans three photoelectric sensing material layers, the cross-layer doping structure 280 can span the fourth photoelectric sensing material layer 224, the third photoelectric sensing material layer 223 and the second photoelectric sensing material layer 222; when the cross-layer doping structure 280 spans four photoelectric sensing material layers, the cross-layer doping structure 280 can span the fourth photoelectric sensing material layer 224, the third photoelectric sensing material layer 223, the second photoelectric sensing material layer 222 and the first photoelectric sensing material layer 221.

[0072] S124: Remove the transition grid structure.

[0073] See also Fig.12 In this embodiment, after the cross-layer doping structure 280 is formed, the transition grid structure 270 may be removed by an etching process to obtain the semiconductor structure 300 .

[0074] In some embodiments, in order to activate doped ions, reduce the generation of dark current, improve the photoelectric performance of the photodiode, and improve the yield and imaging quality of the image sensor, the semiconductor structure 300 may also be subjected to an annealing treatment. Specifically, in order to shorten the annealing time, reduce the area of ​​lateral diffusion, and make the boundary of the photosensitive area clear, laser annealing may be used for annealing. For example, laser annealing may be performed in an oxygen-containing environment, and the specific process parameters are as follows: the pulse energy may be 25mj~35mj, for example, 25mj, 27mj, 30mj, 32mj, 35mj. The laser annealing time may be 2s~4s, for example, 2s, 3s, 4s.

[0075] In some embodiments, the cross-layer doping structure 280 may be formed first, and then the target grid structure 260 may be formed. Specifically, after a plurality of photoelectric sensing regions 220a and an isolation structure 230 are formed on a substrate, ions may be firstly implanted into the photoelectric sensing region 220a based on a mask corresponding to the cross-layer doping structure 280 to form the cross-layer doping structure 280, and then the target grid structure 260 may be formed on a side of the isolation structure 230 away from the substrate.

[0076] Please continue reading Fig.12 Another embodiment of the present application provides a semiconductor structure 300 , which may include a substrate and a photoelectric functional layer formed on a surface of the substrate.

[0077] In this embodiment, the photoelectric functional layer can be used to realize photoelectric signal conversion based on the photoelectric effect. Specifically, the photoelectric functional layer may include a photoelectric sensing layer 220 and an isolation structure 230 for separating the photoelectric sensing layer 220 into a plurality of photoelectric sensing regions 220a. Among them, the photoelectric sensing region 220a may include a plurality of stacked photoelectric sensing material layers and a cross-layer doping structure 280 extending along the normal direction of the photoelectric sensing layer 220. The doping type of the cross-layer doping structure 280 is the same as the doping type of the photoelectric sensing layer 220.

[0078] In this embodiment, the cross-layer doping structure 280 can be formed by an ion implantation process. With the normal direction of the photoelectric sensing layer 220 as the depth direction of the ion implantation and the thickness direction of the photoelectric sensing material layer, along the normal direction of the photoelectric sensing layer 220, the ion implantation depth of the cross-layer doping structure 280 is at least greater than the thickness of the photoelectric sensing material layer farthest from the substrate.

[0079] In this embodiment, the doping elements of the photoelectric sensing material layer may include: phosphorus, arsenic and antimony.

[0080] In this embodiment, among the plurality of photoelectric sensing material layers, the doping elements of adjacent photoelectric sensing material layers are different. Among them, a photoelectric sensing material layer doped with phosphorus can be formed between a photoelectric sensing material layer doped with arsenic and a photoelectric sensing material layer doped with antimony.

[0081] In this embodiment, the doping element of the cross-layer doping structure 280 may be phosphorus.

[0082] In this embodiment, the semiconductor structure 300 may further include: a target grid structure 260 formed on a side of the isolation structure 230 away from the substrate. Specifically, the target grid structure 260 may include a first grid layer 261, a second grid layer 262, and a third grid layer 263 that are stacked, wherein the material of the first grid layer 261 may be hafnium dioxide, the material of the second grid layer 262 may be titanium nitride, and the material of the third grid layer 263 may be tungsten.

[0083] Regarding the technical effects of the semiconductor structure 300 described in the above embodiment, reference can be made to other embodiments of the present application for comparative explanation, and no further details will be given here.

[0084] See also Fig.13 Another embodiment of the present application provides an image sensor 400 , which may include: the semiconductor structure 300 as described in the above embodiment, or the semiconductor structure 300 manufactured by the semiconductor structure manufacturing method as described in the above embodiment, and a filter structure 410 .

[0085] In this embodiment, a color filter structure (ColorFilter) 410 may be formed between adjacent target grid structures 260. Specifically, the color filter structure 410 may be formed on a surface of the insulating layer 240 away from the photoelectric sensing layer 220. The color filter structure 410 may include a plurality of color filters, and the plurality of color filters form a color filter array.

[0086] In this embodiment, the filter structure 410 may include color filters of three primary colors, i.e., a blue filter, a green filter, and a red filter. Specifically, the color filter may be a polymer material, such as a negative photoresist with an acrylic polymer as a substrate, and may contain a color dye. When light passes through the color filter, the color may change, maintaining a high transmittance in a specific wavelength band, thereby enhancing the effect of photoelectric conversion. The color filters may be arranged in any suitable combination.

[0087] In some embodiments, a transparent filter may be provided on the basis of the color filter. The blue filter, the green filter, the red filter and the transparent filter may be arranged alternately.

[0088] In this embodiment, the top of the filter structure 410 may be in the shape of an arc protruding outward, so as to focus the incident light on the photoelectric sensing layer 220. The curvature of the surface of the filter structure 410 may be changed according to the light focusing requirements to improve the photosensitivity efficiency.

[0089] In some embodiments, after forming the filter structure 410, a microlens structure can be further formed on the filter structure 410. The microlens structure can be formed by any method of forming the microlens structure, which is not specifically limited in the embodiments of the present application. The number of filter structures 410 can be set according to actual needs, and the drawings of this embodiment are only used as examples.

[0090] Regarding the technical effects of the image sensor 400 described in the above embodiment, reference can be made to other embodiments of the present application for comparative explanation, and no further details will be given here.

[0091] In multiple embodiments of the present application, a photoelectric functional layer including a photoelectric sensing layer and an isolation structure is formed on the surface of a substrate, and the photoelectric sensing layer is divided into multiple photoelectric sensing regions by using the isolation structure, each photoelectric sensing region includes multiple stacked photoelectric sensing material layers and a cross-layer doping structure, wherein the cross-layer doping structure extends along the normal direction of the photoelectric sensing layer, and the doping type of the cross-layer doping structure is the same as the doping type of the photoelectric sensing layer, and the cross-layer doping structure is formed by an ion implantation process, and the ion implantation depth of the cross-layer doping structure formed along the normal direction of the photoelectric sensing layer is at least greater than the thickness of the photoelectric sensing material layer farthest from the substrate, and the unexpected effects achieved include: since the doping type of the cross-layer doping structure is the same as the doping type of the photoelectric sensing layer, and the cross-layer doping structure spans at least two photoelectric sensing material layers along the normal direction of the photoelectric sensing layer, on the one hand, the damage to the device caused by ion implantation can be reduced, and the production yield and reliability of the image sensor can be improved; on the other hand, the crosstalk and dark current between adjacent pixels can be reduced, the number of photogenerated carriers in the photoelectric conversion process can be increased, the photoelectric conversion efficiency of the photodiode can be improved, and the imaging quality of the image sensor can be improved.

[0092] It should be understood that the specific examples in this application are only intended to help those skilled in the art better understand the embodiments of this application, rather than to limit the scope of this application.

[0093] It can be understood that in the various embodiments of the present application, the size of the serial number of each process does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0094] It can be understood that the various embodiments described in this application can be implemented individually or in combination, and the embodiments of this application are not limited to this.

[0095] Unless otherwise stated, all technical and scientific terms used in the embodiments of the present application are identical with the meanings generally understood by those skilled in the art of the technical field of the present application. The terms used in the present application are only for the purpose of describing specific embodiments, and are not intended to limit the scope of the present application. The term "and / or" used in the present application includes any and all combinations of one or more related listed items. The singular forms "a kind of", "above-mentioned" and "the" used in the embodiments of the present application are also intended to include majority forms, unless the context clearly indicates other meanings.

[0096] In several embodiments provided in this application, it should be understood that the disclosed semiconductor structure or image sensor can be implemented in other ways. For example, the embodiments of the semiconductor structure or image sensor described above are merely illustrative.

[0097] The above is only a specific embodiment of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A semiconductor structure, characterized in that: include: substrate; A photoelectric functional layer formed on the surface of the substrate; the photoelectric functional layer is used to realize photoelectric signal conversion based on the photoelectric effect; the photoelectric functional layer includes a photoelectric sensing layer and an isolation structure for separating the photoelectric sensing layer into a plurality of photoelectric sensing regions; the photoelectric sensing region includes a plurality of stacked photoelectric sensing material layers and a cross-layer doping structure extending along the normal direction of the photoelectric sensing layer; the doping type of the cross-layer doping structure is the same as the doping type of the photoelectric sensing layer; Wherein, the cross-layer doping structure is formed by an ion implantation process; taking the normal direction of the photoelectric sensing layer as the depth direction of the ion implantation and the thickness direction of the photoelectric sensing material layer, along the normal direction of the photoelectric sensing layer, the ion implantation depth of the cross-layer doping structure is formed at least greater than the thickness of the photoelectric sensing material layer farthest from the substrate.

2. The semiconductor structure according to claim 1, characterized in that: The doping elements of the photoelectric sensing material layer include: phosphorus, arsenic and antimony.

3. The semiconductor structure according to claim 2, characterized in that: In the plurality of photoelectric sensing material layers, adjacent photoelectric sensing material layers have different doping elements.

4. The semiconductor structure according to claim 2, characterized in that: A photoelectric sensing material layer doped with phosphorus is formed between the photoelectric sensing material layer doped with arsenic and the photoelectric sensing material layer doped with antimony.

5. The semiconductor structure according to claim 1, characterized in that: The doping element of the cross-layer doping structure is phosphorus.

6. The semiconductor structure according to claim 1, characterized in that The semiconductor structure further comprises: A target grid structure is formed on a side of the isolation structure away from the substrate; the target grid structure comprises a first grid layer, a second grid layer and a third grid layer which are stacked, wherein the material of the first grid layer is hafnium dioxide, the material of the second grid layer is titanium nitride, and the material of the third grid layer is tungsten.

7. A method for manufacturing a semiconductor structure, characterized in that: The method comprises: providing a substrate; A photoelectric functional layer is formed on the surface of the substrate; the photoelectric functional layer is used to realize photoelectric signal conversion based on the photoelectric effect; the photoelectric functional layer includes a photoelectric sensing layer and an isolation structure used to separate the photoelectric sensing layer into a plurality of photoelectric sensing regions; the photoelectric sensing region includes a plurality of stacked photoelectric sensing material layers and a cross-layer doping structure extending along the normal direction of the photoelectric sensing layer; the doping type of the cross-layer doping structure is the same as the doping type of the photoelectric sensing layer; Wherein, the cross-layer doping structure is formed by an ion implantation process; taking the normal direction of the photoelectric sensing layer as the depth direction of the ion implantation and the thickness direction of the photoelectric sensing material layer, along the normal direction of the photoelectric sensing layer, the ion implantation depth of the cross-layer doping structure is formed at least greater than the thickness of the photoelectric sensing material layer farthest from the substrate.

8. The method according to claim 7, characterized in that The semiconductor structure further includes a target grid structure formed on a side of the isolation structure away from the substrate; The step of preparing the photoelectric functional layer on the substrate comprises: forming a plurality of the photoelectric sensing regions and the isolation structures on the substrate; A transition grid structure is formed on a side of the photoelectric sensing region away from the substrate, and a target grid structure is formed on a side of the isolation structure away from the substrate; wherein the transition grid structure and the target grid structure are alternately spaced; Using the transition grid structure and the target grid structure as masks, forming the cross-layer doping structure in the photoelectric sensing region by an ion implantation process; The transition grid structure is removed.

9. The method according to claim 8, characterized in that The distance between adjacent transition grid structures and target grid structures falls within the range of 500 nm to 1000 nm.

10. An image sensor, characterized in that: include: A semiconductor structure as claimed in any one of claims 1 to 6 or a semiconductor structure manufactured by the method for manufacturing a semiconductor structure as claimed in any one of claims 7 to 9.

Images