Preparation method of nano-micro composite suede of monocrystalline silicon wafer and application of nano-micro composite suede in solar cell
By forming a black silicon structure of nano-composite suede on a single crystal silicon wafer, the problems of low solar cell efficiency and difficulty in covering perovskite film layers caused by large and sharp pyramid suede in the prior art are solved, and lower reflectivity and higher battery efficiency are achieved.
Patent Information
- Application Number
- CN202411733693.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-29
- Publication Date
- 2025-03-25
AI Technical Summary
In the existing single-crystal silicon wafer shroud making technology, the size of the pyramid suede is large and sharp, resulting in low photoelectric conversion efficiency of solar cells and difficult to uniformly cover the perovskite film layer on this suede structure.
An N-type single crystal silicon wafer is used as the substrate, and a micro-scale pyramid structure is formed by cleaning and fleece making, and a second treatment is performed thereon to form a nano-scale pore structure to obtain a black silicon structure with nano-micro composite suede. The method includes technical means such as reactive plasma etching, metal catalytic chemical corrosion and laser etching.
By adjusting the process parameters, controlling the size of nano-micro-composite suede, further reducing the reflectance of the silicon wafer surface, improving the photoelectric conversion efficiency of solar cells, and making uniform coverage of the perovskite film layer possible, improving the long-term stability of the stacked battery.
Abstract
Description
Technical Field
[0001] The invention relates to a technology for making texturing of a single crystal silicon wafer, in particular to a method for preparing a nano-micro composite texturing surface of a single crystal silicon wafer, and application of the prepared silicon wafer with the nano-micro composite texturing surface in solar cells. Background Art
[0002] Heterojunction solar cells composed of crystalline silicon and amorphous silicon have the advantages of high cell efficiency and simple process flow. The current mainstream preparation process is to use N-type single crystal silicon wafers as substrates, and go through the steps of cleaning and texturing → intrinsic amorphous silicon film deposition → doped amorphous silicon film deposition → transparent conductive film deposition → screen printing → metal electrode formation. Among them, the first step of cleaning and texturing is mainly to form a light-trapping structure of pyramid velvet on the surface of the silicon wafer. The incident light is reflected and refracted twice or multiple times on the pyramid surface, thereby improving the utilization rate of sunlight and further improving the efficiency of solar cells. Therefore, the cleaning and texturing step is crucial for solar cells. The cleaning effect will also directly affect the deposition effect of amorphous silicon thin films, and directly determine the subsequent interface passivation and contact characteristics of the battery.
[0003] However, the current texturing of single crystal cells all uses alkali texturing to form pyramid velvet, which can obtain a lower surface reflectivity than conventional polycrystalline cells. The reflectivity after texturing is about 11%, but it does not fully utilize sunlight. The pyramid size of this velvet structure is relatively large, generally around 3.0μm, with a peak-to-valley drop of more than 3μm, and the peak of the pyramid is very sharp, which is not conducive to the uniform conformal deposition of subsequent amorphous silicon thin films and transparent conductive films.
[0004] For perovskite thin film batteries with a total film thickness of no more than 1μm, it is very difficult to prepare thin films on such a velvet structure. The thickness of some layers in perovskite batteries is only 20nm or even thinner. It is conceivable that it is very difficult to form a complete film on the sharp pyramid surface. It is necessary to adjust the velvet of this structure to make it suitable for perovskite film formation without reducing the light trapping effect.
[0005] In heterojunction / perovskite tandem cells, when the perovskite layer contacts crystalline silicon, the larger pyramid velvet makes it impossible for the perovskite film layer to evenly cover the sharp pyramid tops and valley bottoms, which will lead to new defects and low photovoltaic conversion efficiency of the cell. The key to preparing efficient tandem cells is to uniformly and conformally cover the perovskite layer on the crystalline silicon surface, which is one of the technical difficulties currently faced by tandem cells.
[0006] Black silicon technology can effectively solve the above problems. The optical reflectivity of the velvet structure of silicon wafers formed by black silicon technology is very low, and the reflectivity can reach 4-7%, which is lower than the pyramid structure formed by wet etching. It can further reduce the reflectivity of the battery surface and improve the utilization rate of sunlight. Conventional single crystals only have low reflectivity for vertically incident light, thereby increasing short-circuit current and battery efficiency. The surface micro-nano composite morphology structure formed by black silicon technology has no large particles and sharp pyramids. The gentle velvet morphology is suitable for thin film growth, which is conducive to the preparation of thin passivation layers and perovskite layers on it to form a uniform and complete coverage. Summary of the invention
[0007] Purpose of the invention: The purpose of the present invention is to provide a method for preparing a nano-micro composite velvet surface of a single-crystal silicon wafer to obtain a better silicon wafer with a nano-micro composite velvet surface. Another purpose of the present invention is to provide the application of this preparation method in the manufacture of solar cells.
[0008] Technical solution: A method for preparing a nano-micro composite texture surface of a single crystal silicon wafer, comprising the following steps:
[0009] Step 1, using an N-type single crystal silicon wafer as a substrate, cleaning and texturing, and forming a micron-scale pyramid structure on the surface of the silicon wafer;
[0010] Step 2, performing a second treatment on the silicon wafer to form a nanoscale hole structure on the micron-scale pyramid structure to obtain a black silicon structure with a nano-micro composite velvet surface.
[0011] Furthermore, the cleaning and texturing process is: pre-cleaning the silicon wafer in a mixed solution of KOH and H2O2, then roughly polishing it in a KOH solution, and then texturing it in a mixed solution of KOH and ADD, and then successively undergoing post-cleaning, pickling, slow pulling, and drying.
[0012] Furthermore, the black silicon structure with nano-micro composite suede has a reflectivity of <10%, a suede size of <2 μm, and a nano-pore size of <1 μm.
[0013] Furthermore, the second treatment is reactive plasma etching, and the specific process is: plasma etching is performed on the front side of the silicon wafer using a mixed gas composed of SF6, O2, and Cl2; the SF6 flow rate is 1000-1500sccm, the O2 flow rate is 1000-2000sccm, the Cl2 flow rate is 500-1000sccm, and the pressure is 25-30Pa.
[0014] Furthermore, the second treatment is metal catalytic chemical corrosion, and the specific process is: the silicon wafer is placed in an HF solution for cleaning, and then placed in an AgNO3 solution for reaction deposition for 2 to 60 seconds, and then placed in a mixed solution of HF and H2O2 for reaction etching for 10 to 300 seconds, and then washed with deionized water, HNO3, and deionized water in turn to remove metal residues, and finally dried; the AgNO3 concentration is 0.005 to 0.01 mol / L, the HF concentration is 5 to 10 mol / L, and the H2O2 concentration is 0.1 to 1.0 mol / L.
[0015] Furthermore, the second treatment is laser etching. The specific process is: bombarding the surface of the silicon wafer with a high-energy laser to form a surface structure of a nano-needle array; the laser is a femtosecond laser or a nanosecond laser, the pressure is 50-100 kPa, and the background vacuum is 5×10 ﹣1 ~5×10 ﹣5 Pa, the laser pulse width is 1 μs, the repetition frequency is 7.5 kHz, the scanning speed is 10 mm / s, and the scanning spacing is 0.01 mm.
[0016] The above-mentioned preparation method is applied to manufacture heterojunction solar cells, comprising the following steps:
[0017] Step 10, depositing an intrinsic amorphous silicon film on both sides of the prepared silicon wafer with nano-micro composite texture by PECVD method to form a passivation layer, and then depositing a doped amorphous silicon film on both sides to form a surface field and a PN junction;
[0018] Step 20, depositing a transparent conductive film on both sides of the silicon wafer using a magnetron sputtering device;
[0019] Step 30, screen-printing metal electrodes on both sides to produce a heterojunction solar cell.
[0020] Furthermore, the transparent conductive film is one of ITO, TCO, AZO and IWO.
[0021] The above-mentioned preparation method is applied to the preparation of heterojunction / perovskite tandem cells, comprising the following steps:
[0022] Step 100, depositing an intrinsic amorphous silicon film on both sides of the prepared silicon wafer with nano-micro composite texture by PECVD to form a passivation layer, and then depositing a doped amorphous silicon film on both sides to form a surface field and a PN junction;
[0023] Step 200, depositing a transparent conductive film on both sides of a silicon wafer using a magnetron sputtering device;
[0024] Step 300, sequentially fabricating a hole transport layer, a perovskite light absorption layer, and an electron transport layer on the transparent conductive film on the front side of the heterojunction solar cell;
[0025] Step 400, making a metal electrode on the electron transport layer to obtain a heterojunction / perovskite stacked cell.
[0026] Beneficial effects: The advantages of the present invention are: adjusting the process parameters to prepare the black silicon structure of the nano-micro composite velvet, controlling the size of the nano-micro composite velvet, and further reducing the reflectivity of the silicon wafer surface, so as to produce heterojunction solar cells, thereby improving the battery conversion efficiency, and thus producing heterojunction / perovskite stacked cells, making it possible to prepare a uniform perovskite film layer by a wet method, the black silicon structure of the nano-micro composite velvet can improve the wettability of the perovskite precursor solution and the anti-solvent, improve the crystal quality of the perovskite through nano-improvement and promote the separation and collection of carriers in the top cell, the velvet can also effectively release the internal stress of the perovskite film, and improve the long-term stability of the stacked device. DETAILED DESCRIPTION
[0027] The present invention will be further illustrated below in conjunction with specific embodiments.
[0028] A method for preparing a nano-micro composite textured surface of a single crystal silicon wafer specifically comprises steps 1 and 2.
[0029] Step 1: Use an N-type single crystal silicon wafer as a substrate, clean and texture it, and form a micron-scale pyramid structure on the surface of the silicon wafer.
[0030] The cleaning and texturing can adopt the existing technology, for example: pre-clean the N-type single crystal silicon wafer in a mixed solution of KOH and H2O2, then roughly polish it in a KOH solution, then texturing it in a mixed solution of KOH and ADD, then post-clean it in a mixed solution of KOH and H2O2, pickle it in a mixed solution of HF and HCL, and finally slowly pull it and dry it. A micron-level pyramid velvet surface is formed on the surface of the silicon wafer through anisotropic etching.
[0031] Step 2, subjecting the cleaned and textured sheet to a second treatment to form a nanometer-scale hole structure on the micrometer-scale pyramid structure, thereby obtaining a black silicon structure with a nano-micro composite texture surface.
[0032] The second treatment can be achieved through three processes.
[0033] The first is reactive plasma etching, and the specific process is: use a mixed gas of SF6, O2, and Cl2 to perform plasma etching on the front side of the cleaned and textured silicon wafer; the SF6 flow rate is 1000~1500sccm, the O2 flow rate is 1000~2000sccm, the Cl2 flow rate is 500~1000sccm, and the pressure is 25~30Pa.
[0034] The second is metal catalytic chemical corrosion. The specific process is: put the silicon wafer into HF solution for cleaning, then put it into AgNO3 solution for reaction deposition for 2 to 60 seconds, then put it into a mixed solution of HF and H2O2 for reaction etching for 10 to 300 seconds, then use deionized water, HNO3, and deionized water to clean and remove metal residues, and finally dry; the AgNO3 concentration is 0.005 to 0.01 mol / L, the HF concentration is 5 to 10 mol / L, and the H2O2 concentration is 0.1 to 1.0 mol / L.
[0035] The third is laser etching. The specific process is: bombard the surface of the silicon wafer with high-energy laser to form a surface structure of nano-needle array; the laser is a femtosecond laser or nanosecond laser, the pressure is 50-100 kPa, and the background vacuum is 5×10 ﹣1 ~5×10 ﹣5 Pa, the laser pulse width is 1 μs, the repetition frequency is 7.5 kHz, the scanning speed is 10 mm / s, and the scanning spacing is 0.01 mm.
[0036] The prepared black silicon structure with nano-micro composite suede has a reflectivity of less than 10%, a suede size of less than 2 μm, and a nano-pore size of less than 1 μm.
[0037] The above preparation method is applied to manufacture heterojunction solar cells, specifically including steps 10 to 30.
[0038] Step 10, deposit an intrinsic amorphous silicon film on both sides of the silicon wafer with nano-micro composite velvet obtained in step 2 by PECVD to form a passivation layer, and then deposit an impurity-doped amorphous silicon film on both sides to form a surface field and a PN junction.
[0039] Step 20, using magnetron sputtering equipment to deposit a transparent conductive film on both sides of the silicon wafer, the material of the transparent conductive film is one of ITO, TCO, AZO, and IWO.
[0040] Step 30, screen-printing metal electrodes on both sides to produce a heterojunction solar cell.
[0041] The above-mentioned preparation method is applied to manufacture heterojunction / perovskite stacked cells, which specifically includes steps 100 to 400.
[0042] Step 100, depositing an intrinsic amorphous silicon film on both sides of the silicon wafer with a nano-micro composite texture obtained in step 2 by a PECVD method to form a passivation layer, and then depositing a doped amorphous silicon film on both sides to form a surface field and a PN junction;
[0043] Step 200, depositing a transparent conductive film on both sides of a silicon wafer using a magnetron sputtering device;
[0044] Step 300, a hole transport layer, a perovskite light absorption layer, and an electron transport layer are sequentially fabricated on the transparent conductive film on the front side of the heterojunction solar cell.
[0045] The hole transport layer can be made by evaporation, spin coating, slit coating and the like; the perovskite light absorption layer can be made by evaporation, spin coating, slit coating and the like; the electron transport layer can be made by evaporation, spin coating and the like.
[0046] Step 400, making a metal electrode on the electron transport layer to obtain a heterojunction / perovskite stacked cell.
[0047] Taking the above-mentioned metal catalytic chemical corrosion process to form a nanoscale hole structure on a micron-scale pyramid structure as an example, when the deposition time is 10s, the AgNO3 concentration is 0.01mol / L, the H2O2 concentration is 0.9%, the HF concentration is 10%, and the etching time is 120s, the silicon wafer with a nano-micro composite suede surface has the lowest suede reflectivity. The suede surface is tested using a zate microscope, and the diameter of the surface nanopores is about 0.6μm. The reflectivity is tested using a solar reflective suede reflectometer D8, and the minimum can reach 5.47%. When the silicon wafer with a nano-micro composite suede surface is used in the above-mentioned production of heterojunction solar cells, the maximum efficiency of the cell can reach 25.43%.
[0048] The present invention prepares the black silicon structure of the nano-micro composite velvet by reactive plasma etching, metal catalytic chemical corrosion and laser etching, adjusts the process parameters, controls the size of the nano-micro composite velvet, and further reduces the reflectivity of the silicon wafer surface, thereby making heterojunction solar cells, thereby improving the battery conversion efficiency, and making heterojunction / perovskite stacked cells, making it possible to prepare a uniform perovskite film layer by a wet method, the black silicon structure of the nano-micro composite velvet can improve the wettability of the perovskite precursor solution and the anti-solvent, improve the crystal quality of the perovskite by nano-improvement and promote the separation and collection of carriers in the top battery, the velvet can also effectively release the internal stress of the perovskite film, and improve the long-term stability of the stacked device.
Claims
1. A method for preparing a nano-micro composite textured surface of a single crystal silicon wafer, characterized in that The following steps are involved: Step 1, using an N-type single crystal silicon wafer as a substrate, cleaning and texturing, and forming a micron-scale pyramid structure on the surface of the silicon wafer; Step 2, performing a second treatment on the silicon wafer to form a nanoscale hole structure on the micron-scale pyramid structure to obtain a black silicon structure with a nano-micro composite velvet surface.
2. The method for preparing a nano-micro composite textured surface of a single crystal silicon wafer according to claim 1, characterized in that: The cleaning and texturing process is as follows: pre-clean the silicon wafer in a mixed solution of KOH and H2O2, then roughly polish it in a KOH solution, and then texturize it in a mixed solution of KOH and ADD, and then successively undergo post-cleaning, pickling, slow pulling, and drying.
3. The method for preparing a nano-micro composite textured surface of a single crystal silicon wafer according to claim 1, characterized in that: The black silicon structure has a nano-micro composite suede surface, with a reflectivity of less than 10%, a suede surface size of less than 2 μm, and a nano-pore size of less than 1 μm.
4. The method for preparing nano-micro composite texture of a single crystal silicon wafer according to claim 1, characterized in that: The second treatment is reactive plasma etching, and the specific process is: plasma etching is performed on the front side of the silicon wafer using a mixed gas composed of SF6, O2, and Cl2; the SF6 flow rate is 1000~1500sccm, the O2 flow rate is 1000~2000sccm, the Cl2 flow rate is 500~1000sccm, and the pressure is 25~30Pa.
5. The method for preparing nano-micro composite texture of a single crystal silicon wafer according to claim 1, characterized in that: The second treatment is metal catalytic chemical corrosion. The specific process is: put the silicon wafer into HF solution for cleaning, then put it into AgNO3 solution for reaction deposition for 2 to 60 seconds, then put it into a mixed solution of HF and H2O2 for reaction etching for 10 to 300 seconds, and then use deionized water, HNO3, and deionized water to clean and remove metal residues, and finally dry; the AgNO3 concentration is 0.005 to 0.01 mol / L, the HF concentration is 5 to 10 mol / L, and the H2O2 concentration is 0.1 to 1.0 mol / L.
6. The method for preparing a nano-micro composite textured structure of a single crystal silicon wafer according to claim 1, characterized in that: The second treatment is laser etching. The specific process is: bombard the surface of the silicon wafer with high-energy laser to form a surface structure of nano-needle array; the laser is a femtosecond laser or nanosecond laser, the pressure is 50-100 kPa, and the background vacuum is 5×10 ﹣1 ~5×10 ﹣5 Pa, the laser pulse width is 1 μs, the repetition frequency is 7.5 kHz, the scanning speed is 10 mm / s, and the scanning spacing is 0.01 mm.
7. A preparation method according to any one of claims 1 to 6 is used to make a heterojunction solar cell, characterized in that The following steps are involved: Step 10, depositing an intrinsic amorphous silicon film on both sides of the prepared silicon wafer with nano-micro composite texture by PECVD method to form a passivation layer, and then depositing a doped amorphous silicon film on both sides to form a surface field and a PN junction; Step 20, depositing a transparent conductive film on both sides of the silicon wafer using a magnetron sputtering device; Step 30, screen-printing metal electrodes on both sides to produce a heterojunction solar cell.
8. The use according to claim 7, characterized in that: In step 200 , the transparent conductive film is one of ITO, TCO, AZO, and IWO.
9. A preparation method according to any one of claims 1 to 6 is used to make a heterojunction / perovskite stacked battery, characterized in that The following steps are involved: Step 100, depositing an intrinsic amorphous silicon film on both sides of the prepared silicon wafer with nano-micro composite texture by PECVD to form a passivation layer, and then depositing a doped amorphous silicon film on both sides to form a surface field and a PN junction; Step 200, depositing a transparent conductive film on both sides of a silicon wafer using a magnetron sputtering device; Step 300, sequentially fabricating a hole transport layer, a perovskite light absorption layer, and an electron transport layer on the transparent conductive film on the front side of the heterojunction solar cell; Step 400, making a metal electrode on the electron transport layer to obtain a heterojunction / perovskite stacked cell.
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