Optical crosstalk prevention isolation and microcavity enhancement method for top-emitting Micro-OLED laminated device

By depositing dielectric isolation material on the Micro-OLED anode structure and etching to form a cavity, combined with the structure of self-cutting organic layer and cathode, the electrical crosstalk problem caused by lateral leakage in stacked OLED devices is solved, and higher color gamut and external quantum efficiency are achieved.

CN119698207APending Publication Date: 2025-03-25ZHEJIANG HONGXI TECH CO LTD
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Patent Information

Application Number
CN202510201233.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-24
Publication Date
2025-03-25

AI Technical Summary

Technical Problem

In the existing stacked OLED devices, there is lateral leakage in the organic layer between adjacent anode pixels, resulting in a significant increase in electrical crosstalk, affecting the stability and luminous efficiency of the device.

Method used

By depositing the dielectric isolation material on the Micro-OLED anode structure and etching to form a cavity, self-cutting organic layer is deposited to prevent lateral conduction of current, the cathode is constructed to achieve the device's photo-proof crosstalk isolation and microcavity effect.

Benefits of technology

It effectively isolates the electrical crosstalk between adjacent pixels, improves the color gamut and external quantum efficiency of the device, enhances the microcavity effect, and thus improves the overall luminous performance.

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Abstract

The invention discloses an optical crosstalk prevention isolation and microcavity enhancement method for a top-emitting Micro-OLED laminated device, and relates to the technical field of OLEDs, and the preparation of the Micro-OLED laminated device comprises the following steps: depositing a dielectric isolation material on a Micro-OLED anode structure; wherein the Micro-OLED anode structure comprises an anode, and the dielectric isolation material comprises flat layer silicon dioxide, middle layer silicon nitride and top layer silicon dioxide; etching the dielectric isolation material positioned above the anode and transversely etching the interlayer silicon nitride positioned in the lateral direction of the anode so as to remove the dielectric isolation material above the anode and form a cavity in the interlayer silicon nitride positioned in the lateral direction of the anode; depositing a self-cutting organic layer; a cathode is constructed on the self-cutoff organic layer. By etching the dielectric isolation material, self-cutting isolation of the organic layer is formed, transverse conduction of current is prevented, the color gamut of the device is improved, meanwhile, the cavity is formed between the organic layer and the dielectric isolation material located in the lateral direction of the anode, and the external quantum efficiency of the device is improved.
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Description

Technical Field

[0001] The present invention belongs to the technical field of OLED, and in particular relates to a method for isolating and enhancing a microcavity for a top-emitting Micro-OLED stacked device to prevent light crosstalk. Background Art

[0002] Micro-OLED is a micro display device that combines semiconductor technology and OLED display technology. It uses single-crystal silicon as the substrate, integrates the driving circuit on the silicon substrate through the CMOS process, and then deposits organic light-emitting materials on it to form a high-resolution micro display. Micro-OLED does not require a backlight source and has the characteristics of self-luminescence. At the same time, Micro-OLED uses a very thin organic material coating, which has a simple manufacturing process, low energy consumption, light weight, good shock resistance, and is more environmentally friendly.

[0003] Tandem OLED is a new type of OLED device structure formed by connecting multiple light-emitting units in series. Its core lies in the introduction of a charge generation layer (CGL) to connect multiple light-emitting units together so that each light-emitting unit can emit light independently and the brightness can be superimposed, thereby significantly improving the overall brightness and luminous efficiency.

[0004] For example, the Chinese patent with the publication number CN112397666B discloses a stacked OLED device and a display device containing the same, which includes a first electrode, a second electrode and at least two light-emitting units arranged between the first electrode and the second electrode; a connecting layer is arranged between adjacent light-emitting units; each of the light-emitting units includes a hole transport region, a light-emitting layer and an electron transport region arranged in sequence; the electron transport region includes a first electron transport layer and a second electron transport layer. The design of the device hierarchical structure and the selection of electron transport materials effectively block the diffusion of the n-type doped layer material in the connecting layer to the light-emitting layer and the p-type doped layer, so that there is a good energy level matching degree between the layers, so that the stacked OLED device has excellent stability and luminous efficiency, and the working life is extended, which can fully meet the application requirements in high-performance display devices and electronic devices.

[0005] However, there is lateral leakage in the organic layer between adjacent anode pixels of the stacked OLED device, which leads to a significant increase in electrical crosstalk. Therefore, it is urgent to develop a method for isolating and enhancing the microcavity of the top-emitting Micro-OLED stacked device to prevent optical crosstalk to solve the problems in the prior art. Summary of the invention

[0006] The purpose of the present invention is to provide a method for isolating and enhancing a microcavity for preventing optical crosstalk in a top-emitting Micro-OLED stacked device, and to solve the problem of lateral leakage of the organic layer mentioned in the above background technology by constructing a self-cutting organic layer.

[0007] In order to solve the above technical problems, the specific technical solutions of the present invention are as follows:

[0008] A method for isolating and enhancing a microcavity for preventing light crosstalk in a top-emitting Micro-OLED stacked device, wherein the preparation of the Micro-OLED stacked device comprises the following steps:

[0009] Depositing a dielectric isolation material on the Micro-OLED anode structure; wherein the Micro-OLED anode structure includes an anode, and the dielectric isolation material includes a flat layer of silicon dioxide, an intermediate layer of silicon nitride, and a top layer of silicon dioxide;

[0010] Etching the dielectric isolation material above the anode and laterally etching the middle silicon nitride layer on the side of the anode to remove the dielectric isolation material above the anode and form a cavity in the middle silicon nitride layer on the side of the anode;

[0011] Deposition of self-cut organic layers;

[0012] A cathode is constructed on the self-severing organic layer.

[0013] Further, there is a gap between the flat layer of silicon dioxide located above the anode and the flat layer of silicon dioxide located to the side of the anode;

[0014] The etching of the dielectric isolation material located above the anode and the transverse etching of the intermediate layer silicon nitride located laterally to the anode include the following steps:

[0015] constructing a photoresist layer, wherein the photoresist layer is disposed on the top silicon dioxide layer in the region between adjacent anodes;

[0016] Etching the top layer of silicon dioxide above the anode;

[0017] Etching the middle layer of silicon nitride located above the anode and laterally etching the middle layer of silicon nitride located to the side of the anode;

[0018] The flat layer of silicon dioxide above the anode is etched.

[0019] Furthermore, the etching of the middle layer of silicon nitride above the anode and the lateral etching of the middle layer of silicon nitride on the side of the anode are achieved by inductively coupled plasma equipment, wherein the process gases are O2 and SF6, the flow rate of O2 is 5sccm-15sccm, and the flow rate of SF6 is 20sccm-60sccm.

[0020] Furthermore, the etching of the top layer of silicon dioxide above the anode and the etching of the flat layer of silicon dioxide above the anode are also achieved by inductively coupled plasma equipment, wherein the process gases are O2 and CF4, the flow rate of O2 is 5sccm-15sccm, the flow rate of CF4 is 20sccm-60sccm, the gas pressure is maintained at 0.5Pa-1Pa, the temperature in the cavity is controlled at 10℃-25℃, the RF power is 300W-400W, and the etching angle is 85°.

[0021] Furthermore, the thickness of the planar layer of silicon dioxide is 100nm-150nm, the thickness of the intermediate layer of silicon nitride is 120nm-150nm, and the thickness of the top layer of silicon dioxide is 80nm-100nm.

[0022] Further, when etching the middle silicon nitride layer above the anode and laterally etching the middle silicon nitride layer on the side of the anode, the etching depth of the middle silicon nitride layer on the side of the anode is 120nm-150nm.

[0023] Furthermore, the deposition of the self-cutting organic layer is achieved by an evaporation device, wherein the evaporation angle is 10° to 30°, and the distance from the evaporation source to the film substrate is 450mm-480mm.

[0024] Furthermore, the self-cutting organic layer includes a hole injection and transport layer, an organic light emitting layer, a CGL layer, an organic light emitting layer and an electron transport and injection layer.

[0025] Furthermore, the material of the cathode includes Mg and IZO, or the material of the cathode includes Ag and IZO.

[0026] Furthermore, it also includes:

[0027] constructing a device sealing layer;

[0028] constructing a color filter layer;

[0029] Assemble Micro-OLED stacked devices.

[0030] The present invention has the following advantages:

[0031] The present application achieves pixel isolation and light crosstalk prevention by etching the dielectric isolation material located above the anode and laterally etching the intermediate layer of silicon nitride located on the side of the anode. At the same time, when the organic layer is deposited on the device surface, due to the influence of factors such as gravity, the organic layer forms a conical or truncated cone-shaped deposition area at the anode position, and cannot be completely filled to the position of the dielectric isolation material located near the side of the anode, causing the organic layer to break, achieving self-cutoff isolation of the organic layer, preventing lateral conduction of current, and improving the color gamut of the device.

[0032] Furthermore, since the organic layer cannot be completely filled to the position close to the dielectric isolation material located on the side of the anode, a cavity is formed between the organic layer and the dielectric isolation material located on the side of the anode. When the exciton returns to the ground state from the high energy level, photons are released. A part of the emitted light is directly reflected by the metal of the anode high reflective layer and directly emitted from the front. The other part of the emitted light forms a microcavity effect in the cavity, causing this part of the light to be totally reflected from the optically dense medium of the organic light-emitting material to the optically sparse medium of the cavity, and then reflected by the anode high reflective layer and converged to the front position of the device to emit light, thereby improving the external quantum efficiency of the device.

[0033] Other features and advantages of the present invention will be disclosed in detail in the following specific embodiments and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 It is a structural schematic diagram of the Micro-OLED anode structure of the present invention;

[0035] Figure 2 This is a schematic diagram of the structure after the dielectric isolation material is deposited in the present invention;

[0036] Figure 3 It is a schematic diagram of the structure after etching the dielectric isolation material located above the anode and laterally etching the intermediate layer silicon nitride located on the side of the anode in the present invention;

[0037] Figure 4 This is a schematic diagram of the structure after the cathode is constructed according to the present invention.

[0038] Explanation of the marks in the figure: 1. Adhesion layer metal; 2. High reflective layer metal; 3. High work function material; 4. Circuit tungsten plug; 5. IC circuit; 6. Flat layer silicon dioxide; 7. Middle layer silicon nitride; 8. Top layer silicon dioxide; 9. Hole injection and transport layer; 10. Organic light-emitting layer one; 11. CGL layer; 12. Organic light-emitting layer two; 13. Electron transport and injection layer; 14. Cathode. DETAILED DESCRIPTION

[0039] In order to better understand the purpose, structure and function of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings.

[0040] A method for isolating and enhancing a microcavity for preventing optical crosstalk in a top-emitting Micro-OLED stacked device, such as Figures 1 to 4 As shown, the preparation of the Micro-OLED stacked device includes the following steps:

[0041] S1: depositing a dielectric isolation material on a Micro-OLED anode structure; wherein the Micro-OLED anode structure comprises an anode, and the dielectric isolation material comprises a flat layer of silicon dioxide 6, an intermediate layer of silicon nitride 7, and a top layer of silicon dioxide 8, wherein the flat layer of silicon dioxide 6 is located on an upper surface of the Micro-OLED anode structure, the intermediate layer of silicon nitride 7 is located on the flat layer of silicon dioxide 6, and the top layer of silicon dioxide 8 is located on the intermediate layer of silicon nitride 7;

[0042] S2: etching the dielectric isolation material above the anode and laterally etching the intermediate silicon nitride layer 7 on the side of the anode to remove the dielectric isolation material above the anode and form a cavity in the intermediate silicon nitride layer 7 on the side of the anode;

[0043] S3: Deposition of self-cut organic layer;

[0044] S4: constructing a cathode 14 on the self-cutting organic layer.

[0045] In this embodiment, the Micro-OLED anode structure includes:

[0046] IC circuit 5;

[0047] A circuit tungsten plug 4, wherein the circuit tungsten plug 4 is arranged on the IC circuit 5;

[0048] A high work function material 3, wherein the high work function material 3 is disposed on the IC circuit 5, and the high work function material 3 is connected to the circuit tungsten plug 4;

[0049] A high reflective layer metal 2, wherein the high reflective layer metal 2 is disposed on the high work function material 3;

[0050] The adhesion layer metal 1 is arranged on the high reflection layer metal 2 .

[0051] The anode is composed of a high work function material 3 , a high reflective layer metal 2 and an adhesion layer metal 1 .

[0052] In this embodiment, the adhesion layer metal 1 can use Cr, Ti or Ni as the base metal, with a purity of 99.9999% and a thickness of 10nm-15nm. Optionally, a high-purity film layer can be plated on the adhesion layer metal 1. The high reflective layer metal 2 uses Al or Ag and other materials with a thickness of 30nm-60nm. The high work function material 3 can use Mo or Pt and other materials with a thickness of 5nm-10nm. Optionally, the high work function material 3 can also use ITO material with a thickness of 30nm-50nm.

[0053] Optionally, the Micro-OLED anode structure may also be replaced by other existing composite electrode structures.

[0054] Depositing a dielectric isolation material on the Micro-OLED anode structure in S1 includes the following steps:

[0055] S11: depositing a flat layer of silicon dioxide 6 on the Micro-OLED anode structure;

[0056] S12: depositing an intermediate layer of silicon nitride 7 on the flat layer of silicon dioxide 6;

[0057] S13: depositing a top layer of silicon dioxide 8 on the middle layer of silicon nitride 7 .

[0058] In this embodiment, the deposition of the planar layer silicon dioxide 6 in S11 is achieved by an inductively coupled plasma enhanced chemical vapor deposition (ICP-PECVD) device, including the following steps:

[0059] Place the Micro-OLED anode structure into a vacuum chamber;

[0060] The vacuum chamber is evacuated to below 1Pa;

[0061] Process gas is introduced; wherein, the process gas includes SiH4, Ar and N2O, the flow rate of SiH4 is 10sccm-15sccm, the flow rate of Ar is 120sccm-150sccm, the flow rate of N2O is 5sccm-10sccm, the purity of SiH4, Ar and N2O is more than 99.99%, the gas pressure is maintained at 0.5Pa-1Pa, the temperature is controlled at 100℃-220℃, and finally 280w-310w RF power is used for ignition.

[0062] The deposition of the intermediate layer silicon nitride 7 in S12 is also prepared by an inductively coupled plasma enhanced chemical vapor deposition (ICP-PECVD) device, including the following steps:

[0063] Evacuate to below 1Pa;

[0064] Introduce process gas; wherein, the process gas includes SiH4, Ar and NH3, the flow rate of SiH4 is 10sccm-15sccm, the flow rate of Ar is 120sccm-150sccm, the flow rate of NH3 is 5sccm-10sccm, the purity of SiH4, Ar and NH3 is more than 99.99%, the gas pressure is maintained at 0.5Pa-1Pa, the temperature is controlled at 100℃-220℃, and after maintaining for 60s, 450w-500w RF power is used for ignition.

[0065] The top layer of silicon dioxide 8 in S13 is also prepared by an inductively coupled plasma enhanced chemical vapor deposition (ICP-PECVD) device, comprising the following steps:

[0066] Evacuate to below 1Pa;

[0067] Process gas is introduced; wherein, the process gas includes SiH4, Ar and N2O, the flow rate of SiH4 is 10sccm-15sccm, the flow rate of Ar is 120sccm-150sccm, the flow rate of N2O is 5sccm-10sccm, the purity of SiH4, Ar and N2O is more than 99.99%, the gas pressure is maintained at 0.5Pa-1Pa, the temperature is controlled at 100℃-220℃, and finally 280w-310w RF power is used for ignition.

[0068] In this embodiment, the thickness of the flat layer silicon dioxide 6 is 100nm-150nm, the thickness of the intermediate layer silicon nitride 7 is 120nm-150nm, and the thickness of the top layer silicon dioxide 8 is 80nm-100nm. Preferably, the thickness of the flat layer silicon dioxide 6 is close to the thickness of the anode. There is a gap between the flat layer silicon dioxide 6 located above the anode and the flat layer silicon dioxide 6 located on the side of the anode to facilitate the subsequent etching of the intermediate layer silicon nitride 7 located on the side of the anode. In this embodiment, the ICP equipment model is SI400.

[0069] In this embodiment, etching the dielectric isolation material located above the anode in S2 includes the following steps:

[0070] S21: etching the top layer of silicon dioxide 8 located above the anode;

[0071] S22: etching the middle layer of silicon nitride located above the anode and laterally etching the middle layer of silicon nitride 7 located to the side of the anode;

[0072] S23: Etching the flat layer of silicon dioxide 6 located above the anode.

[0073] In this embodiment, before etching the top silicon dioxide 8, the middle silicon nitride layer 7 and the flat silicon dioxide 6, a photoresist layer needs to be set on the top silicon dioxide 8 between adjacent anodes, and after the flat silicon dioxide 6 located above the anode is etched, the residual photoresist needs to be removed.

[0074] In this embodiment, the photoresist model is AZ6120, the spin coating speed of the photoresist is 3000m / s-4000m / s, the heating time during the photoresist hardening baking is 11min-15min, and the heating hot plate temperature is 80°C-90°C. The photoresist is used to protect the dielectric isolation material in the area between adjacent anodes. The setting of the photoresist layer is prior art and will not be repeated in this application.

[0075] In this embodiment, the photoresist is removed from residual photoresist by a plasma cleaning machine, wherein the flow rate of Ar in the plasma cleaning machine is 90sccm-80sccm, the flow rate of O2 is 10sccm-20sccm, the power is 300w-800w, and the cleaning time is 80s-100s.

[0076] In this embodiment, etching of the top silicon dioxide 8, the middle silicon nitride layer 7 and the planar silicon dioxide 6 is achieved by using an inductively coupled plasma (ICP) device.

[0077] The etching of the top layer of silicon dioxide 8 located above the anode in S21 comprises the following steps:

[0078] Placing the sample to be etched into the etching chamber of the inductively coupled plasma equipment;

[0079] The vacuum chamber of the etching chamber is evacuated to below 1 Pa;

[0080] O2 and CF4 with a purity of more than 99.99% are introduced as process gases, wherein the flow rate of O2 is 5sccm-15sccm, the flow rate of CF4 is 20sccm-60sccm, the gas pressure is maintained at 0.5Pa-1Pa, the temperature in the chamber is controlled at 10℃-25℃, and finally the ICP power is 300W-400W, and the bias RF power is 150W-180W. Preferably, the etching angle is 85°.

[0081] The etching of the middle layer silicon nitride 7 located above the anode in S22 comprises the following steps:

[0082] The ICP power of the inductively coupled plasma equipment is set to 400W, the bias RF power is set to 150W-180W, the process gases are O2 and SF6, the flow rate of O2 is 5sccm-15sccm, the flow rate of SF6 is 20sccm-60sccm, and the etching time is set to 35s.

[0083] In this embodiment, when etching the middle silicon nitride layer above the anode and laterally etching the middle silicon nitride layer 7 on the side of the anode, the etching depth of the middle silicon nitride layer 7 on the side of the anode is 120nm-150nm to facilitate the subsequent formation of a self-cutting organic layer.

[0084] The etching of the flat layer of silicon dioxide 6 located above the anode in S23 includes the following steps:

[0085] O2 and CF4 with a purity of more than 99.99% are introduced as process gases, wherein the flow rate of O2 is 5sccm-15sccm, the flow rate of CF4 is 20sccm-60sccm, the gas pressure is maintained at 0.5Pa-1Pa, the temperature in the chamber is controlled at 10℃-25℃, and finally the ICP power is 300W-400W, and the bias RF power is 150W-180W. Preferably, the etching angle is 85°.

[0086] The present application utilizes different selectivity ratios of etching gas to film layers to produce lateral etching, isolate RGB sub-pixels, prevent lateral current crosstalk, and ensure that the RGB colors of the OLED device do not interfere with each other.

[0087] In this embodiment, the organic layer in S3 includes a hole injection transport layer 9, an organic light-emitting layer 10, a CGL layer 11, an organic light-emitting layer 2 12 and an electron transport injection layer 13. The hole injection transport layer 9, the organic light-emitting layer 10, the CGL layer 11, the organic light-emitting layer 2 12 and the electron transport injection layer 13 are sequentially arranged on the anode from bottom to top, and a cathode 14 is arranged on the electron transport injection layer 13.

[0088] In this embodiment, the self-severing organic layer is an organic layer that is broken at a position close to the dielectric isolation material located on the side of the anode, and the deposition of the self-severing organic layer includes the following steps:

[0089] The hole injection and transport layer 9, the organic light-emitting layer 1 10, the CGL layer 11, the organic light-emitting layer 2 12 and the electron transport and injection layer 13 are sequentially deposited on the Micro-OLED anode structure by an evaporation process. The evaporation angle is 10° to 30°, and the distance from the evaporation source to the film substrate is 450mm-480mm.

[0090] The present application etches the dielectric isolation material located above the anode and laterally etches the middle layer silicon nitride 7 located on the side of the anode, so that when the organic layer is deposited on the surface of the Micro-OLED anode structure, due to the influence of factors such as gravity, the organic layer forms a conical or truncated cone-shaped deposition area at the anode position, and cannot be completely filled to the position close to the middle layer silicon nitride 7 located on the side of the anode, resulting in organic fracture, forming self-cutting isolation of the organic layer, preventing lateral conduction of current, and improving the color gamut of the device.

[0091] At the same time, since the organic layer cannot be completely filled to the position close to the dielectric isolation material located on the side of the anode, a cavity is formed between the organic layer and the dielectric isolation material located on the side of the anode. When the exciton returns to the ground state from the high energy level, photons are released. A part of the emitted light is directly reflected by the anode high reflective layer metal 2 and directly emitted from the front. The other part of the emitted light forms a microcavity effect in the cavity, causing this part of the light to be totally reflected from the optically dense medium of the organic light-emitting material to the optically sparse medium of the cavity, and then reflected by the anode high reflective layer and converged to the front position of the device to emit light, thereby improving the external quantum efficiency of the device.

[0092] In this embodiment, the material of the cathode 14 includes Mg and IZO or Ag and IZO to solve the problem of cathode breakage caused by dielectric isolation materials and ensure the continuity and maximum transmittance of the cathode.

[0093] The preparation of the Micro-OLED stacked device also includes:

[0094] constructing a device sealing layer;

[0095] constructing a color filter layer (CF);

[0096] Assemble Micro-OLED stacked devices.

[0097] Wherein, the construction of the device sealing layer comprises the following steps:

[0098] CVD deposition of SIN, SIN thickness is 200nm-300nm;

[0099] ALD deposits Al2O3 with a thickness of 400nm-800nm;

[0100] CVD deposits SiN with a thickness of 200nm-400nm.

[0101] Specifically, the sealing layer for constructing an OLED overlapping device is a prior art and will not be described in detail in this application.

[0102] In this embodiment, the color filter layer is composed of an OC1 layer, an R layer, a G layer, a B layer and an OC2 layer, wherein the thickness of the R layer, the G layer and the B layer are all 2.0 μm-2.5 μm. Specifically, the color filter layer is a prior art and will not be described in detail in this application. The OC1 layer and the OC2 layer are protective layers (Over Coat).

[0103] In this embodiment, the assembly of the Micro-OLED stacked device includes attaching a glass cover, laser opening of the pad area, connecting a PCB backplane, and glue dot packaging, etc. This is the prior art and will not be described in detail in this application.

[0104] A Micro-OLED stacked device includes a Micro-OLED anode structure, a dielectric isolation material, a self-cutting organic layer and a cathode, wherein the Micro-OLED anode structure, the dielectric isolation material, the self-cutting organic layer and the cathode are prepared by a method for isolating and enhancing a microcavity for preventing light crosstalk of a top-emitting Micro-OLED stacked device.

[0105] It is to be understood that the present invention is described by some embodiments, and it is known to those skilled in the art that various changes or equivalent substitutions may be made to these features and embodiments without departing from the spirit and scope of the present invention. In addition, under the teachings of the present invention, these features and embodiments may be modified to adapt to specific circumstances and materials without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the scope of protection of the present invention.

[0106] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A method for isolating and enhancing microcavity for top-emitting Micro-OLED stacked devices to prevent light crosstalk, characterized in that: The preparation of Micro-OLED stacked devices includes the following steps: Depositing a dielectric isolation material on the Micro-OLED anode structure; wherein the Micro-OLED anode structure includes an anode, and the dielectric isolation material includes a flat layer of silicon dioxide, an intermediate layer of silicon nitride, and a top layer of silicon dioxide; Etching the dielectric isolation material above the anode and laterally etching the middle silicon nitride layer on the side of the anode to remove the dielectric isolation material above the anode and form a cavity in the middle silicon nitride layer on the side of the anode; Deposition of self-cut organic layers; A cathode is constructed on the self-severing organic layer.

2. A method for isolating and enhancing microcavity for top-emitting Micro-OLED stacked devices to prevent optical crosstalk according to claim 1, characterized in that: There is a gap between the flat layer of silicon dioxide located above the anode and the flat layer of silicon dioxide located to the side of the anode; The etching of the dielectric isolation material located above the anode and the transverse etching of the intermediate layer silicon nitride located laterally to the anode include the following steps: constructing a photoresist layer, wherein the photoresist layer is disposed on the top silicon dioxide layer in the region between adjacent anodes; Etching the top layer of silicon dioxide above the anode; Etching the middle layer of silicon nitride located above the anode and laterally etching the middle layer of silicon nitride located to the side of the anode; The flat layer of silicon dioxide above the anode is etched.

3. A method for isolating and enhancing microcavity for top-emitting Micro-OLED stacked devices to prevent optical crosstalk according to claim 2, characterized in that: The etching of the middle layer of silicon nitride above the anode and the lateral etching of the middle layer of silicon nitride on the side of the anode are achieved by inductively coupled plasma equipment, wherein the process gases are O2 and SF6, the flow rate of O2 is 5sccm-15sccm, and the flow rate of SF6 is 20sccm-60sccm.

4. A method for isolating and enhancing microcavity for top-emitting Micro-OLED stacked devices to prevent optical crosstalk according to claim 3, characterized in that: The etching of the top layer of silicon dioxide above the anode and the etching of the flat layer of silicon dioxide above the anode are also achieved by inductively coupled plasma equipment, wherein the process gases are O2 and CF4, the flow rate of O2 is 5sccm-15sccm, the flow rate of CF4 is 20sccm-60sccm, the gas pressure is maintained at 0.5Pa-1Pa, the temperature in the cavity is controlled at 10℃-25℃, and the etching angle is 85°.

5. The method for isolating and enhancing the microcavity of a top-emitting Micro-OLED stacked device from optical crosstalk according to claim 3, characterized in that: The thickness of the planar layer silicon dioxide is 100nm-150nm, the thickness of the intermediate layer silicon nitride is 120nm-150nm, and the thickness of the top layer silicon dioxide is 80nm-100nm.

6. The method for isolating and enhancing the microcavity of a top-emitting Micro-OLED stacked device from optical crosstalk according to claim 3, characterized in that: When etching the middle silicon nitride layer above the anode and laterally etching the middle silicon nitride layer on the side of the anode, the etching depth of the middle silicon nitride layer on the side of the anode is 120nm-150nm.

7. A method for isolating and enhancing microcavity for top-emitting Micro-OLED stacked devices to prevent optical crosstalk according to any one of claims 1 to 6, characterized in that: The deposited self-cut organic layer is realized by evaporation equipment, wherein the evaporation angle is 10° to 30°, and the distance from the evaporation source to the film substrate is 450mm-480mm.

8. The method for isolating and enhancing the microcavity of a top-emitting Micro-OLED stacked device from optical crosstalk according to claim 7, characterized in that: The self-cutting organic layer includes a hole injection and transport layer, an organic light emitting layer, a CGL layer, an organic light emitting layer and an electron transport and injection layer.

9. A method for isolating and enhancing microcavity for top-emitting Micro-OLED stacked devices to prevent optical crosstalk according to claim 8, characterized in that: The material of the cathode includes Mg and IZO, or the material of the cathode includes Ag and IZO.

10. The method for isolating and enhancing the microcavity of a top-emitting Micro-OLED stacked device from optical crosstalk according to claim 8, characterized in that: Also includes: constructing a device sealing layer; constructing a color filter layer; Assemble Micro-OLED stacked devices.

Citation Information

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