A starting method of a terminal device, a terminal device, and a storage medium

Abstract

A starting method of a terminal device, the terminal device and a storage medium, the method comprising: a switching circuit receiving a starting instruction transmitted by a serial port of a central control device (S101), the switching circuit transmitting the starting instruction to an interface chip circuit (S102), the interface chip circuit generating a power-on signal in response to the starting instruction, transmitting the power-on signal to a power-on circuit (S103), the power-on circuit generating a plurality of different power-on voltages by voltage conversion on a voltage signal transmitted by a power supply circuit in response to the power-on signal, and powering on a central processing unit based on each power-on voltage (S104). Both remote starting through a network and starting operation on multiple terminal devices connected through a serial port can be achieved, improving the stability and reliability of remote starting terminal devices.

Description

TECHNICAL FIELD

[0001] The present specification relates to the technical field of computer, and particularly relates to a terminal device starting method, a terminal device and a storage medium. BACKGROUND

[0002] Nowadays, with the continuous development of electronic science and technology, in order to improve the operation convenience of users, there are scenarios that need to remotely start a device to control the operation of the device. SUMMARY

[0003] The terminal device starting method, the terminal device and the storage medium provided by the embodiments of the present specification can complete the starting of the terminal device, that is, can meet the network remote starting of the terminal device by the central control software and the central control device, and can also start the operation of the plurality of terminal devices connected according to one or more serial ports, thereby improving the stability and reliability of the remote starting of the terminal device.

[0004] In a first aspect, the embodiments of the present specification provide a device starting method, the method is applied to a terminal device, the terminal device is used to be connected with a central control device, the terminal device includes an interface chip circuit, a switching circuit, a central processing unit, a power-on circuit and a power supply circuit, one end of the interface chip circuit is connected with one end of the switching circuit, the other end of the interface chip circuit is connected with the first end of the power-on circuit, the other end of the switching circuit is connected with a serial port of the central control device, the second end of the power-on circuit is connected with the central processing unit, and the third end of the power-on circuit is connected with the power supply circuit.

[0005] The method includes:

[0006] The switching circuit receives a starting instruction transmitted by the serial port of the central control device, and the starting instruction is generated by the central control device in response to a starting instruction transmitted by a central control software;

[0007] The switching circuit transmits the starting instruction to the interface chip circuit;

[0008] The interface chip circuit generates a power-on signal in response to the starting instruction, and transmits the power-on signal to the power-on circuit;

[0009] The power-on circuit converts a direct current voltage transmitted by the power supply circuit into a plurality of different power-on voltages in response to the power-on signal, and powers on the central processing unit based on each power-on voltage.

[0010] According to the technical solution, the starting instruction generated by the network or offline operation is received by the central control software on the central control device, the generated starting instruction is transmitted to the terminal device through the serial port connected with the terminal device in response to the starting instruction, and the starting of the terminal device is completed, that is, the network remote starting of the terminal device by the central control software and the central control device can be met, and the starting operation on the plurality of terminal devices connected through one or more serial ports can be performed, and thus the stability and reliability of the remote starting of the terminal device are improved.

[0011] In combination with the first aspect, in some possible implementation manners, when the switching circuit is an isolation circuit, the isolation circuit comprises a first instruction receiving end, a field effect tube and a first instruction output end, the first instruction receiving end is connected with the ring detection port of the central control device, and the first instruction output end is connected with the interface chip circuit.

[0012] The gate of the field effect tube is connected with the first instruction receiving end, the drain of the field effect tube is connected with the first instruction output end, and the source of the field effect tube is grounded.

[0013] The switching circuit transmits the starting instruction to the interface chip circuit, comprising:

[0014] The first instruction receiving end transmits the received starting instruction to the gate of the field effect tube, when the starting instruction received by the gate of the field effect tube is a low-level signal, the drain and the source of the field effect tube are turned on, the first instruction output end transmits the low-level signal to the interface chip circuit, so that the interface chip circuit enables the power supply circuit and the power-on circuit to power on the central processing unit in response to the low-level signal transmitted by the isolation circuit.

[0015] According to the technical solution, when the central control device has the ring detection port, the isolation circuit enables the interface chip circuit to trigger the starting function, and the high-level signal is isolated to prevent the high-level signal from damaging the interface chip circuit, and thus the efficiency and safety of starting the terminal device are improved.

[0016] In combination with the first aspect and the above implementation manners, in some possible implementation manners, when the switching circuit comprises a first conversion circuit and a micro control circuit, one end of the first conversion circuit is connected with the output port of the central control device, the other end of the first conversion circuit is connected with one end of the micro control circuit, and the other end of the micro control circuit is connected with the interface chip circuit.

[0017] The switching circuit transmits the starting instruction to the interface chip circuit, comprising:

[0018] The first conversion circuit receives the starting instruction transmitted by the output port of the central control device, and transmits the starting instruction to the micro control circuit.

[0019] The micro control circuit compares the start-up instruction with the preset start-up condition, and generates a start-up signal and transmits the start-up signal to the interface chip circuit when the start-up instruction meets the start-up condition.

[0020] Through the technical solution, when the central control device does not have a ring detection port, the start-up instruction is transmitted to the switching circuit through the output port, so that the micro control circuit generates a start-up signal in response to the start-up instruction and transmits the start-up signal to the interface chip circuit, enabling the interface chip circuit to trigger the start-up function, meeting the equipment models of different central control devices, thereby ensuring that the central control device can start the terminal equipment through the output port while providing the stability of the isolation circuit solution, and improving the applicability of starting the terminal equipment through the central control device.

[0021] In combination with the first aspect and the above implementation manners, in some possible implementation manners, the first conversion circuit includes a first conversion chip, a second instruction receiving end and a second instruction output end, and the micro control circuit includes a micro control chip, a third instruction receiving end and a start-up signal output end;

[0022] The second instruction receiving end is connected with the output port of the central control device, the second instruction receiving end is connected with the first conversion chip, the first conversion signal is connected with the second instruction output end, the second instruction output end is connected with the third instruction receiving end, the third instruction receiving end is connected with the micro control chip, the micro control chip is connected with the start-up signal output end, and the start-up signal output end is connected with the interface chip circuit;

[0023] The switching circuit transmits the start-up instruction to the interface chip circuit, including:

[0024] The first conversion chip receives the start-up instruction output by the output port of the central control device based on the second instruction receiving end, and transmits the start-up instruction to the third instruction receiving end of the micro control circuit based on the second instruction output end;

[0025] The micro control chip receives the start-up instruction based on the third instruction receiving end, and compares the start-up code in the start-up instruction with the preset start-up condition;

[0026] When the start-up code matches the preset start-up condition, the micro control chip determines that the start-up instruction meets the preset start-up condition, and generates a start-up signal, which is transmitted to the interface chip circuit based on the start-up signal output end.

[0027] In combination with the first aspect and the above implementation manners, in some possible implementation manners, the interface chip circuit includes a fourth instruction receiving end, an interface chip and a first power-on signal output end, the fourth instruction receiving end is connected with the switching circuit, and the first power-on signal output end is connected with the power-on circuit;

[0028] The interface chip circuit generates a power-on signal in response to the start-up instruction, and transmits the power-on signal to the power-on circuit, including:

[0029] The interface chip receives the power-on instruction transmitted by the switching circuit based on the fourth instruction receiving end, generates a power-on signal in response to the power-on instruction, and transmits the power-on signal to the power-on circuit based on the first power-on signal output end.

[0030] In some possible implementation manners, in combination with the first aspect and the foregoing implementation manners, the power-on circuit includes a power-on control circuit and a power management circuit, one end of the power-on control circuit is connected with the interface chip circuit, the other end of the power-on control circuit is connected with one end of the power supply circuit, the other end of the power supply circuit is connected with one end of the power management circuit, and the other end of the power management circuit is connected with the central processing unit.

[0031] The power-on circuit generates a plurality of different power-on voltages by converting the direct-current power supply voltage transmitted by the power supply circuit in response to the power-on signal, and powers on the central processing unit based on each power-on voltage, including:

[0032] The power-on circuit transmits the power-on signal to the power supply circuit in response to the power-on signal.

[0033] The power supply circuit converts the alternating-current power supply into a direct-current power supply voltage in response to the power-on signal, and transmits the direct-current power supply voltage to the power management circuit.

[0034] The power management circuit converts voltages for each unit in the central processing unit, generates a power-on voltage corresponding to each unit, and transmits each power-on voltage to each unit in the central processing unit for power-on.

[0035] In some possible implementation manners, in combination with the first aspect and the foregoing implementation manners, the power-on control circuit includes a second signal receiving end, a power-on chip, and a second signal output end, the second signal receiving end is connected with the interface chip circuit, and the second signal output end is connected with the power supply circuit.

[0036] The power-on circuit transmits the power-on signal to the power supply circuit in response to the power-on signal, including:

[0037] The power-on chip receives the power-on signal transmitted by the interface chip circuit based on the first power-on signal receiving end, and transmits the power-on signal to the power supply circuit based on the second power-on signal output end.

[0038] In some possible implementation manners, in combination with the first aspect and the foregoing implementation manners, the power supply circuit includes a second power-on signal receiving end, a first voltage receiving end, a first voltage conversion chip, and a first voltage output end, the second power-on signal receiving end is connected with the power-on control circuit, the first voltage receiving end is connected with an external power supply, and the first voltage output end is connected with the power management circuit.

[0039] The power supply circuit converts the alternating power supply into a direct power supply voltage in response to the power-on signal, and transmits the direct power supply voltage to the power management circuit, including:

[0040] The power supply circuit transmits the alternating power supply received by the first voltage receiving end to the first voltage conversion chip in response to the power-on signal received by the second power-on signal receiving end.

[0041] The first voltage conversion chip converts the alternating power supply into a direct power supply voltage, and transmits the direct power supply voltage to the power management circuit based on the first voltage output end.

[0042] In combination with the first aspect and the above implementation manners, in some possible implementation manners, the power management circuit includes a second voltage receiving end, a second voltage conversion chip, a voltage distribution chip, and a second voltage output end, the second voltage receiving end is connected with the power supply circuit, and the voltage distribution chip is connected with each unit of the central processing unit based on the second voltage output end;

[0043] The power management circuit converts the voltage for each unit in the central processing unit to generate a corresponding power-on voltage for each unit, and transmits each power-on voltage to each unit in the central processing unit for power-on, including:

[0044] The second voltage conversion chip receives the direct power supply voltage based on the second voltage receiving end, converts the direct power supply voltage based on the working voltage of each unit in the central processing unit to generate a corresponding power-on voltage for each unit;

[0045] The power-on voltage is transmitted to the voltage distribution chip, and the voltage distribution chip powers on each unit in the central processing unit based on the second voltage output end and the power-on voltage.

[0046] Through the above technical solution, the direct power supply voltage transmitted by the power supply circuit is distributed according to the working voltage of each unit in the central processing unit, and each unit is powered on to enable the central processing unit to enter a working state.

[0047] In combination with the first aspect and the above implementation manners, in some possible implementation manners, the voltage distribution chip includes a first voltage supply end, a second voltage supply end, and a third voltage supply end, the central processing unit includes at least a processing unit, a memory unit, and a management unit, the voltage distribution chip is connected with the processing unit based on the first voltage supply end, connected with the memory unit based on the second voltage supply end, and connected with the management unit based on the third voltage supply end;

[0048] The voltage distribution chip powers on each unit in the central processing unit based on the second voltage output end, including:

[0049] The voltage distribution chip powers on the processing unit based on the first voltage supply end and the first voltage, and the first voltage is the power-on voltage corresponding to the processing unit.

[0050] The voltage distribution chip powers on the memory unit based on the second voltage supply end and the second voltage, and the second voltage is the power-on voltage corresponding to the memory unit.

[0051] The voltage distribution chip powers on the management unit based on the third voltage supply end and the third voltage, and the third voltage is the power-on voltage corresponding to the management unit.

[0052] In combination with the first aspect and the above implementation manners, in some possible implementation manners, the central processor includes a power-off instruction output end, the power-on circuit further includes a power supply circuit, the power supply circuit includes a power-off instruction receiving end, a third voltage receiving end, a first power supply end, a second power supply end and a third power supply end, the first conversion circuit further includes a first power supply receiving end, the micro-control circuit further includes a second power supply receiving end, and the interface chip circuit further includes a third power supply receiving end.

[0053] The power-off instruction output port is connected with the power-off instruction receiving port, the third voltage receiving end is connected with the power supply circuit, the first power supply end is connected with the first conversion circuit based on the first power supply receiving end, the second power supply end is connected with the micro-control circuit based on the second power supply receiving end, and the third power supply end is connected with the interface chip circuit based on the third power supply receiving end.

[0054] The method further includes:

[0055] When the central processor enters the power-off state, the central processor outputs the power-off instruction to the power-on circuit based on the power-off instruction output port, and the power-on circuit stops providing the power supply to the central processor in response to the power-off instruction received based on the power-off instruction receiving port;

[0056] The power supply circuit provides the power supply for the first conversion circuit based on the first power supply provided by the power supply circuit and the first power supply end, and enables the first conversion circuit to run in the low-power consumption state based on the power supply received by the first power supply receiving end;

[0057] The power supply circuit provides the power supply for the micro-control circuit based on the second power supply provided by the power supply circuit and the second power supply end, and enables the micro-control circuit to run in the low-power consumption state in response to the power supply received by the second power supply receiving end;

[0058] The power supply circuit provides the power supply for the interface chip circuit based on the third power supply provided by the power supply circuit and the third power supply end, and enables the interface chip circuit to run in the low-power consumption state based on the power supply received by the third power supply receiving end.

[0059] Through the above technical solution, the terminal device can respond to the start-up instruction transmitted by the central control device to start the terminal device.

[0060] With reference to the first aspect and the above implementation manners, in some possible implementation manners, the first adapting circuit includes a first signal receiving end, a first signal output end, a second signal receiving end and a second signal output end, and the micro control circuit further includes a third signal receiving end and a third signal output end;

[0061] The first signal receiving end is connected with the output port of the central control device, the first signal output end is connected with the third signal receiving end, the third signal output end is connected with the second signal receiving end, and the second signal output end is connected with the input port of the central control device;

[0062] The method further includes:

[0063] When the first signal receiving end of the first adapting circuit receives the state acquisition signal transmitted by the output port of the central control device in the case that the central processor is in the power-on state, the first adapting circuit transmits the state acquisition signal to the third signal receiving end of the micro control circuit based on the first signal output end;

[0064] The micro control circuit transmits the stored device state information to the second signal receiving end of the first adapting circuit based on the third output end;

[0065] The second signal output end of the first adapting circuit transmits the device state information to the central control device based on the input port of the central control device.

[0066] Through the above technical solution, the device state information is transmitted to the central control device according to the micro control circuit and the first adapting circuit, so as to realize the response of the state acquisition request of the central control device.

[0067] With reference to the first aspect and the above implementation manners, in some possible implementation manners, the central processor further includes a fourth signal output end, the interface chip circuit includes a fourth signal receiving end and a fifth signal output end, and the micro control circuit includes a fifth signal receiving end;

[0068] The fourth signal output end is connected with the fourth signal receiving end, and the fifth signal output end is connected with the fifth signal receiving end;

[0069] The method further includes:

[0070] When the device state of the terminal device changes, the central processor generates device state information corresponding to the device state, and transmits the device state information to the fourth signal receiving end of the interface chip circuit based on the fourth signal output end;

[0071] The interface chip circuit transmits the device state information to the fifth signal receiving end of the micro control circuit based on the fifth signal output end, and the micro control circuit stores the device state information.

[0072] By the technical solution, the micro control circuit receives and stores the device state information transmitted by the central processor, so that when the state acquisition request of the central control device is received, the state acquisition request can be responded based on the device state information.

[0073] With the first aspect and the above implementation, in some possible implementations, the terminal device further includes a second conversion circuit, the central processor includes a first output end and a first result receiving end, the interface chip circuit includes a first receiving end, a second result receiving end, a second output end and a first result output end, and the second conversion circuit includes a second receiving end, a third output end, a third result receiving end and a second result output end.

[0074] The first output end is connected with the first receiving end, the second output end is connected with the second receiving end, the third output end is connected with the input port of the central control device, the third result receiving end is connected with the output port of the central control device, the second result output end is connected with the second result receiving end, and the first result output end is connected with the first result receiving end.

[0075] The method further includes:

[0076] The first receiving end of the interface chip circuit receives the serial port debugging instruction transmitted by the central processor based on the first output end, and transmits the serial port debugging instruction to the second receiving end of the second conversion circuit based on the second output end.

[0077] The second conversion circuit transmits the serial port debugging instruction to the input port of the central control device based on the third output end, so as to perform serial port debugging on the serial port of the central control device.

[0078] The third result receiving end of the second conversion circuit receives the serial port debugging result of the central control device, and transmits the serial port debugging result to the second result receiving end of the interface chip circuit based on the second result output end.

[0079] The interface chip circuit transmits the serial port debugging result to the first result receiving end of the central processor based on the first result output end.

[0080] By the technical solution, the serial port of the central control device is detected by the terminal device according to the second conversion circuit, so that the serial port of the central control device can normally operate, and the stability of the terminal device and the central control device is improved.

[0081] In a second aspect, the embodiments of the present specification provide a terminal device, the terminal device is used for being connected with a central control device, the terminal device comprises an interface chip circuit, a switching circuit, a central processing unit, a power-on circuit and a power supply circuit, one end of the interface chip circuit is connected with one end of the switching circuit, the other end of the interface chip circuit is connected with the first end of the power-on circuit, the other end of the switching circuit is connected with a serial port of the central control device, the second end of the power-on circuit is connected with the central processing unit, and the third end of the power-on circuit is connected with the power supply circuit.

[0082] With reference to the second aspect, in some possible implementation manners, when the switching circuit is an isolation circuit, the isolation circuit comprises a first instruction receiving end, a field effect tube and a first instruction output end, the first instruction receiving end is connected with a ring detection port of the central control device, and the first instruction output end is connected with the interface chip circuit.

[0083] The gate of the field effect tube is connected with the first instruction receiving end, the drain of the field effect tube is connected with the first instruction output end, and the source of the field effect tube is grounded.

[0084] With reference to the second aspect and the above implementation manners, in some possible implementation manners, when the switching circuit comprises a first conversion circuit and a micro control circuit, one end of the first conversion circuit is connected with an output port of the central control device, the other end of the first conversion circuit is connected with one end of the micro control circuit, and the other end of the micro control circuit is connected with the interface chip circuit.

[0085] With reference to the second aspect and the above implementation manners, in some possible implementation manners, the first conversion circuit comprises a first conversion chip, a second instruction receiving end and a second instruction output end, the micro control circuit comprises a micro control chip, a third instruction receiving end and a start-up signal output end.

[0086] The second instruction receiving end is connected with the output port of the central control device, the second instruction receiving end is connected with the first conversion chip, the first conversion signal is connected with the second instruction output end, the second instruction output end is connected with the third instruction receiving end, the third instruction receiving end is connected with the micro control chip, the micro control chip is connected with the start-up signal output end, and the start-up signal output end is connected with the interface chip circuit.

[0087] With reference to the second aspect and the above implementation manners, in some possible implementation manners, the interface chip circuit comprises a fourth instruction receiving end, an interface chip and a first power-on signal output end, the fourth instruction receiving end is connected with the switching circuit, and the first power-on signal output end is connected with the power-on circuit.

[0088] With reference to the second aspect and the above implementation manners, in some possible implementation manners, the power-on circuit includes a power-on control circuit and a power management circuit, one end of the power-on control circuit is connected with the interface chip circuit, the other end of the power-on control circuit is connected with one end of the power supply circuit, the other end of the power supply circuit is connected with one end of the power management circuit, and the other end of the power management circuit is connected with the central processor.

[0089] With reference to the second aspect and the above implementation manners, in some possible implementation manners, the power-on control circuit includes a second signal receiving end, a power-on chip and a second signal output end, the second signal receiving end is connected with the interface chip circuit, and the second signal output end is connected with the power supply circuit.

[0090] With reference to the second aspect and the above implementation manners, in some possible implementation manners, the power supply circuit includes a second power-on signal receiving end, a first voltage receiving end, a first voltage conversion chip and a first voltage output end, the second power-on signal receiving end is connected with the power-on control circuit, the first voltage receiving end is connected with the external power supply, and the first voltage output end is connected with the power management circuit.

[0091] With reference to the second aspect and the above implementation manners, in some possible implementation manners, the power management circuit includes a second voltage receiving end, a second voltage conversion chip, a voltage distribution chip and a second voltage output end, the second voltage receiving end is connected with the power supply circuit, and the voltage distribution chip is connected with each unit of the central processor based on the second voltage output end.

[0092] With reference to the second aspect and the above implementation manners, in some possible implementation manners, the voltage distribution chip includes a first voltage supply end, a second voltage supply end and a third voltage supply end, the central processor at least includes a processing unit, a memory unit and a management unit, the voltage distribution chip is connected with the processing unit based on the first voltage supply end, is connected with the memory unit based on the second voltage supply end, and is connected with the management unit based on the third voltage supply end.

[0093] With reference to the second aspect and the above implementation manners, in some possible implementation manners, the central processor includes a power-off instruction output end, and the power-on circuit further includes a power supply circuit, the power supply circuit includes a power-off instruction receiving end, a third voltage receiving end, a first supply end, a second supply end and a third supply end, the first conversion circuit further includes a first power supply receiving end, the micro control circuit further includes a second power supply receiving end, and the interface chip circuit further includes a third power supply receiving end.

[0094] The power-off instruction output port is connected with the power-off instruction receiving port, the third voltage receiving end is connected with the power supply circuit, the first power supply end based on the first power source receiving end is connected with the first switching circuit, the second power supply end based on the second power source receiving end is connected with the micro-control circuit, and the third power supply end based on the third power source receiving end is connected with the interface chip circuit.

[0095] In some possible implementation manners, in combination with the second aspect and the foregoing implementation manners, the first switching circuit comprises a first signal receiving end, a first signal output end, a second signal receiving end and a second signal output end, and the micro-control circuit further comprises a third signal receiving end and a third signal output end.

[0096] The first signal receiving end is connected with the output port of the central control device, the first signal output end is connected with the third signal receiving end, the third signal output end is connected with the second signal receiving end, and the second signal output end is connected with the input port of the central control device.

[0097] In some possible implementation manners, in combination with the second aspect and the foregoing implementation manners, the central processor further comprises a fourth signal output end, the interface chip circuit comprises a fourth signal receiving end and a fifth signal output end, and the micro-control circuit comprises a fifth signal receiving end.

[0098] The fourth signal output end is connected with the fourth signal receiving end, and the fifth signal output end is connected with the fifth signal receiving end.

[0099] In some possible implementation manners, in combination with the second aspect and the foregoing implementation manners, the terminal device further comprises a second switching circuit, the central processor comprises a first output end and a first result receiving end, the interface chip circuit comprises a first receiving end, a second result receiving end, a second output end and a first result output end, and the second switching circuit comprises a second receiving end, a third output end, a third result receiving end and a second result output end.

[0100] The first output end is connected with the first receiving end, the second output end is connected with the second receiving end, the third output end is connected with the input port of the central control device, the third result receiving end is connected with the output port of the central control device, the second result output end is connected with the second result receiving end, and the first result output end is connected with the first result receiving end.

[0101] In a third aspect, a computer storage medium is provided in the embodiments of the present specification, and the computer storage medium stores a plurality of instructions. The instructions are suitable for being loaded by a processor and performing the steps of the foregoing method. BRIEF DESCRIPTION OF DRAWINGS

[0102] In order to more clearly illustrate the technical solutions in the specification or related art, the drawings needed to be used in the embodiments or related art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the specification, and other drawings can be obtained by those skilled in the art without creative labor.

[0103] Figure 1 A system architecture diagram of a device startup method provided for an embodiment of the specification;

[0104] Figure 2 A structural schematic diagram of a terminal device provided for an embodiment of the specification;

[0105] Figure 3 A flowchart of a device startup method provided for an embodiment of the specification;

[0106] Figure 4 A flowchart of a device startup method provided for an embodiment of the specification;

[0107] Figure 5 A structural schematic diagram of an isolation circuit provided for an embodiment of the specification;

[0108] Figure 6 A structural schematic diagram of a conversion circuit provided for an embodiment of the specification;

[0109] Figure 7 A structural schematic diagram of a conversion circuit provided for an embodiment of the specification;

[0110] Figure 8 A structural schematic diagram of a second conversion circuit provided for an embodiment of the specification;

[0111] Figure 9 A structural schematic diagram of an interface chip circuit provided for an embodiment of the specification;

[0112] Figure 10 A structural schematic diagram of a serial port debugging method provided for an embodiment of the specification;

[0113] Figure 11 A structural schematic diagram of a power-on circuit provided for an embodiment of the specification;

[0114] Figure 12 A structural schematic diagram of a power-on control circuit provided for an embodiment of the specification;

[0115] Figure 13 A structural schematic diagram of a power supply circuit provided for an embodiment of the specification;

[0116] Figure 14A structural schematic diagram of a power management circuit provided for an embodiment of the present specification is shown in the figure;

[0117] Figure 15 A structural schematic diagram of a voltage distribution method provided for an embodiment of the present specification is shown in the figure;

[0118] Figure 16 A structural schematic diagram of a power supply circuit provided for an embodiment of the present specification is shown in the figure. DETAILED DESCRIPTION

[0119] In order to make the features and advantages of the present specification more obvious and easy to understand, the technical solutions in the present specification will be described clearly and completely in conjunction with the drawings in the present specification. Obviously, the described embodiments are only part of the embodiments of the present specification, rather than all the embodiments. Based on the embodiments in the present specification, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present specification.

[0120] In the related art, when remotely starting a device, the method used is to wake up the device through the network. The Ethernet chip in the device receives the boot data packet transmitted by other terminal devices according to the network communication of the device, analyzes the boot data packet to obtain the boot instruction, transmits the boot instruction to the interface chip to power on the central processor of the terminal device, thereby realizing the wake-up of the device. However, this method is affected by the network configuration of the device. If the devices are not in the same local area network, or the network quality of the device is insufficient, etc., the boot data packet cannot be obtained, and there is a problem that the device cannot be successfully woken up by transmitting the boot data packet.

[0121] Specifically, in the classroom, the terminal device of the teacher as the administrator device is connected to other terminal devices in the classroom through the local area network. In order to facilitate the start of all terminal devices in the classroom before the teacher teaches the course, when remotely waking up the terminal device of the student, the administrator device transmits the boot data packet to each terminal device through the local area network, and the network communication module in the terminal device receives the boot data packet and analyzes it, and transmits the analyzed boot instruction to the interface chip in the terminal device to power on the central processor in the terminal device. However, when using wireless communication to wake up, the terminal device and other terminal devices need to be in the same local area network. If they are not in the same local area network, or the network signal is unstable, the boot data packet cannot be successfully transmitted to the terminal device, resulting in the failure of waking up the terminal device.

[0122] The device starting method provided in the application can connect the administrator device of the teacher with other terminal devices through a plurality of ports drawn from the serial port of the central control device in the classroom, or configure a central control device for each terminal device, and the teacher can transmit the starting instruction to each central control device through the cloud server of the central control software to wake up each terminal device connected with the central control device, or the administrator device can transmit the starting instruction to each terminal device through the central control device to wake up each terminal device.

[0123] Based on this, the application provides a device starting method, which receives a starting instruction generated by network or offline operation through the central control software on the central control device, and transmits the starting instruction to the terminal device through the serial port connected with the terminal device in response to the starting instruction, so as to complete the starting of the terminal device, that is, the network remote starting of the terminal device through the central control software and the central control device can be met, and the starting operation of the plurality of terminal devices connected through one or more serial ports can be performed, thereby improving the stability and reliability of the remote starting of the terminal device.

[0124] Please refer to Figure 1 The application provides a system structure diagram of the device starting method.

[0125] As Figure 1 shown, the central control device generates the starting instruction in response to the starting instruction received by the central control software installed on the central control device, and transmits the starting instruction to the terminal device since the serial port of the central control device is connected with the terminal device, and the terminal device powers on the central processing unit in response to the starting instruction, so as to complete the starting of the terminal device. The serial port of the central control device is connected with the terminal device, the starting instruction is transmitted to the central control device through the remote communication of the server of the central control software by other devices, the starting instruction generated by the starting instruction is transmitted to the connected terminal device, the remote starting of the terminal device is realized, and the stability and reliability of the remote starting of the terminal device are improved.

[0126] The terminal device can be a device with network communication function or port data receiving function, for example, a notebook computer, a personal computer or a smart interactive tablet, etc.; the central control device can be a device including a serial port for data transmission, and the central control device is installed with the central control software to generate and transmit the starting instruction to the terminal device for device wake-up.

[0127] Further, when the central control device is connected with a plurality of terminal devices through the serial port, the central control device sets a plurality of serial ports, connects each serial port with a plurality of terminal devices respectively, and generates the starting instruction through the operation of the central control software, and transmits the starting instruction generated by the starting instruction to each terminal device connected through each serial port respectively, so as to realize the remote starting of the terminal device according to the hardware connection.

[0128] In the embodiment of the present specification, the starting instruction generated by the network or offline operation is received by the central control software on the central control device, and the generated booting instruction is transmitted to the terminal device through the serial port connected with the terminal device in response to the starting instruction, so as to complete the starting of the terminal device, that is, the network remote starting of the terminal device by the central control software and the central control device can be met, and the starting operation of the plurality of terminal devices connected according to one or more serial ports can be performed, thereby improving the stability and reliability of the remote starting of the terminal device.

[0129] Based on Figure 1 the system architecture shown in the figure, the device starting method provided by the embodiment of the present specification will be described in detail. Figures 2-16 ,

[0130] Please refer to Figure 2 , Figure 2 is a structural schematic diagram of the terminal device. The terminal device is used to be connected with the central control device, and the terminal device comprises an interface chip circuit, a switching circuit, a central processing unit, a power-on circuit and a power supply circuit. One end of the interface chip circuit is connected with one end of the switching circuit, the other end of the interface chip circuit is connected with the first end of the power-on circuit, the other end of the switching circuit is connected with the serial port of the central control device, the second end of the power-on circuit is connected with the central processing unit, and the third end of the power-on circuit is connected with the power supply circuit.

[0131] The switching circuit can be used to detect the booting instruction transmitted by the central control device; the interface chip circuit is used to generate a power-on signal in response to the booting instruction, so that the power supply circuit transmits the power supply voltage to the power-on circuit; the power-on circuit is used to convert the power supply voltage transmitted by the power supply circuit to obtain the power-on voltage of each unit in the central processing unit, and power on each unit in the central processing unit to complete the starting of the terminal device.

[0132] Among them, the switching circuit can be an isolation circuit, or it can include a first conversion circuit and a micro control circuit. When the switching circuit is an isolation circuit, the isolation circuit is connected with the ring detection port of the central control device; when the switching circuit is the first switching circuit and the micro control circuit, the first switching circuit is connected with the output port of the central control device.

[0133] The central control device can generate a boot signal according to a start instruction of the central control software, and transmit the boot signal to the terminal device through the serial port of the central control device to start the terminal device. The serial port of the central control device can include an input port, an output port, and a ring detection port. The input port, the output port, and the ring detection port can be three pins on the serial port of the central control device. For example, when the serial port of the central control device is RS232, the input port can be the second pin in RS232, the output port can be the third pin in RS232, and the ring detection port can be the ninth pin in RS232.

[0134] Please refer to Figure 3 A flowchart of a device start method is provided for the embodiments of the present specification. As shown in Figure 3 The device start method can include the following steps S101-S104.

[0135] S101, the switching circuit receives the boot instruction transmitted by the serial port of the central control device;

[0136] In one embodiment, the central control software installed in the central control device generates a boot instruction when receiving a start instruction, and transmits the boot instruction to the switching circuit. The switching circuit receives the boot instruction transmitted by the serial port of the central control device.

[0137] The central control device can be a device installed with central control software. The central control device can include an RS232 serial port (asynchronous transmission standard interface), which can include an input port, an output port, and a ring detection port. The central control device can also have network communication function and communicate with other devices through connected local area network or Internet.

[0138] The central control software can be software installed on the central control device. Other devices can transmit a start instruction to the central control device through the server of the central control software according to network communication. The central control device generates a boot instruction in response to the start instruction and transmits the boot instruction to the switching circuit of the terminal device through the serial port of the central control device.

[0139] Further, in addition to receiving the start instruction transmitted by network communication, the user can also operate the central control software on the display interface of the central control device to generate a start instruction in response to the operation, and then generate a boot instruction according to the start instruction and transmit it to the switching circuit of the terminal device.

[0140] The switching circuit can be a circuit in the terminal device for receiving the boot instruction transmitted by the central control device and transmitting a boot signal to the interface chip circuit in response to the boot instruction.

[0141] The start-up instruction is an instruction generated by the central control device in response to a start-up instruction transmitted by the central control software. Different start-up instructions correspond to different ports connected to the switching circuit. If the port connected to the switching circuit is a ring detection port, the start-up instruction is a start-up signal with a low level. If the port connected to the switching circuit is an output port, the start-up instruction is a data packet including a start-up code. If the port connected to the central control device and the terminal device includes both a ring detection port and an output port, the corresponding start-up instruction can be generated according to the pre-set port and transmitted to the terminal device through the port.

[0142] S102, the switching circuit transmits the start-up instruction to the interface chip circuit;

[0143] In one embodiment, after receiving the start-up instruction, the switching circuit transmits the start-up instruction to the interface chip circuit in the terminal device.

[0144] Specifically, the switching circuit can be an isolation circuit or include a first conversion circuit and a micro control circuit. When the switching circuit is an isolation circuit, one end of the isolation circuit is connected to the ring detection port of the central control device, and the other end of the isolation circuit is connected to the interface chip circuit. When the switching circuit is the first conversion circuit and the micro control circuit, one end of the first conversion circuit is connected to the output port of the central control device, the other end of the first conversion circuit and one end of the micro control circuit are connected, and the other end of the micro control circuit is connected to the interface chip circuit.

[0145] When the serial port of the central control device includes a ring detection port, an isolation circuit can be selected as the switching circuit, which transmits the start-up instruction received through the ring detection port to the interface chip circuit. When the serial port of the central control device does not include a ring detection port, a first conversion circuit and a micro control circuit can be selected as the switching circuit, the first conversion circuit receives the start-up instruction transmitted from the output port of the central control device, the first conversion circuit transmits the start-up instruction to the micro control circuit, and the micro control circuit generates a start-up signal after verifying the start-up instruction and transmits the start-up signal to the interface chip circuit. It should be noted that when the serial port of the central control device includes a ring detection port and an output port, the transmission method of the start-up instruction can be set according to actual conditions.

[0146] S103, the interface chip circuit generates a power-on signal in response to the start-up instruction and transmits the power-on signal to the power-on circuit;

[0147] In one embodiment, the interface chip circuit can be an SIO chip (super input output chip) circuit in the terminal device, which generates a power-on signal after receiving the start-up instruction and transmits the power-on signal to the power-on circuit.

[0148] It can be understood that when the interface chip circuit receives the boot instruction, the wake-up boot function of the interface chip circuit is triggered, the power-on signal is generated, and the power-on circuit is transmitted to the power-on circuit to power on the central processor.

[0149] In S104, the power-on circuit generates a plurality of different power-on voltages by voltage conversion of the DC power supply voltage transmitted by the power supply circuit in response to the power-on signal, and powers on the central processor based on each power-on voltage.

[0150] In one embodiment, the power-on circuit transmits the power-on signal to the power supply circuit in the terminal device in response to the received power-on signal. The power supply circuit receives AC power from the outside of the terminal device according to the power supply interface in response to the power-on signal, and voltage converts the AC power received from the outside of the terminal device to generate a DC power supply voltage. The DC power supply voltage is output to the power management circuit in the power-on circuit for voltage distribution to generate power-on voltages for each unit in the central processor. Each power-on voltage is transmitted to each unit in the central processor to power on each unit in the central processor, thereby completing the boot of the terminal device.

[0151] The power-on circuit can be a circuit in the terminal device for powering on the central processor. According to the power-on signal, the voltage signal transmitted by the power supply circuit is obtained, and each unit in the central processor is powered on after voltage division. It should be noted that in order to enable the micro control circuit, the first conversion circuit and the interface chip circuit to power on the central processor in response to the boot instruction, the power-on circuit supplies power to the micro control circuit, the first conversion circuit and the interface chip circuit when the terminal device is in a power-off state. Since the isolation circuit does not need power supply to complete the transmission of the boot instruction, the power-on circuit does not supply power to the isolation circuit.

[0152] It can be understood that in order to reduce the power consumption of the terminal device when the central processor is in an unpowered state, the micro control circuit, the first conversion circuit and the interface chip circuit operate in a low power consumption mode. After powering on the central processor, the micro control circuit, the first conversion circuit and the interface chip circuit are switched from the low power consumption mode to the normal power consumption mode. The energy consumption of the normal power consumption mode is higher than that of the low power consumption mode.

[0153] The power supply circuit can be a circuit in the terminal device for voltage conversion of external AC power supply, such as converting external 220V AC to 12V DC, etc.

[0154] The AC power supply can be a stabilized AC signal source received by the power plug and other components of the terminal device from the outside of the terminal device.

[0155] The direct current power supply voltage can be a voltage obtained after voltage conversion of a power supply circuit, and is used to provide working power supply for each element or circuit in the terminal device, for example, can be 12V direct current.

[0156] The power-on voltage can be a voltage transmitted when each unit in the central processor is powered on. It can be understood that the operating voltages of each unit in the central processor are different, so the voltage signal needs to be divided by the power-on circuit to obtain the corresponding power-on voltage of each unit.

[0157] The central processor can be the operation and control core in the terminal device, used to perform data processing, program running and other behaviors. The central processor can include a plurality of units, for example, a processing unit for issuing and calculating various data, a memory unit for temporarily storing data, and a management unit for managing the relationship between various hardware.

[0158] In the embodiment of the present application, the starting instruction generated by the network or offline operation is received by the central control software on the central control device, and the generated boot signal is transmitted to the terminal device through the serial port connected to the terminal device in response to the starting instruction, thereby completing the starting of the terminal device, that is, the network remote starting of the terminal device through the central control software and the central control device can be realized, and the starting operation of the plurality of terminal devices connected through one or more serial ports can be realized, thereby improving the stability and reliability of the remote starting of the terminal device.

[0159] Please refer to Figure 4 , the present application provides a flowchart of a device starting method. As shown in Figure 4 , the method is applied to a device starting system, which can include the following steps S201-S208.

[0160] S201, the switching circuit receives the boot instruction transmitted by the serial port of the central control device;

[0161] In one embodiment, the central control software installed in the central control device generates a boot instruction when receiving a starting instruction, and transmits the boot instruction to the switching circuit, and the switching circuit receives the boot instruction transmitted by the serial port of the central control device.

[0162] The specific definitions of the central control device, the central control software, the switching circuit and the boot instruction can refer to the related contents in step S101, which will not be described here.

[0163] S202, the first instruction receiving end transmits the received boot instruction to the gate of the field effect tube, and when the boot instruction received by the gate of the field effect tube is a low level signal, the drain and the source are turned on, and the first instruction output end transmits the low level signal to the interface chip circuit;

[0164] In one embodiment, the first instruction receiving end in the isolation circuit receives the start-up instruction transmitted by the central control device through the ring detection port in the central control device, when the gate of the field effect tube in the isolation circuit receives the low-level signal of the start-up instruction received by the first instruction receiving end, the drain and the source of the field effect tube are turned on, and the low-level signal is transmitted to the interface chip circuit through the first instruction output port of the isolation circuit, so that the interface chip circuit enables the power supply circuit and the power-on circuit to power on the central processing unit in response to the low-level signal.

[0165] Specifically, as shown in Figure 5 when the switching circuit is the isolation circuit, the first instruction receiving end of the isolation circuit is connected with the ring detection port of the central control device, the first instruction output end of the isolation circuit is connected with the interface chip circuit, and the isolation circuit includes a field effect tube, the gate of the field effect tube is connected with the first instruction receiving end, the drain of the field effect tube is connected with the first instruction output end, and the source of the field effect tube is grounded.

[0166] Figure 5 The field effect tube in the isolation circuit receives the start-up instruction transmitted by the ring detection port through the first instruction receiving end, detects the start-up instruction, and when the gate (gate) of the field effect tube detects the low-level signal of the start-up instruction output by the ring detection port, the drain (drain) and the source (source) of the field effect tube are turned on. Because the field effect tube is turned on and the source is grounded, the first instruction output end transmits the low-level signal (0V) transmitted from the source to the drain of the field effect tube to the interface chip circuit.

[0167] Among them, the first instruction receiving end and the first instruction output end can be transmission ports of the isolation circuit.

[0168] Further, when the first instruction receiving end receives a high-level signal, the gate cuts off the drain and the source according to the received high-level signal, so as to realize isolation of the high-level signal transmitted by the central control device through the isolation circuit, prevent the high-level signal from damaging the interface chip circuit, and further improve the safety of starting the terminal device. If the terminal device is in the shutdown state, the central control device continuously transmits a high-level signal to the first instruction receiving end, so that the field effect tube remains in the cut-off state.

[0169] It should be noted that because the field effect tube includes two types of NMOS tube (N field effect tube) and PMOS tube (P field effect tube), and the conduction conditions of the two types are opposite, the detection conditions can be adjusted according to the type of the field effect tube. For example, if the field effect tube is a PMOS tube, the central control device transmits a low-level signal to the PMOS tube to turn on the PMOS tube; if the field effect tube is an NMOS tube, the central control device transmits a high-level signal to the NMOS tube to turn on the NMOS tube.

[0170] S203, the first conversion circuit receives the boot-up instruction transmitted by the output port of the central control device, and transmits the boot-up instruction to the micro control circuit;

[0171] In one embodiment, when the adapter circuit includes the first conversion circuit and the micro control circuit, the second instruction receiving end in the first conversion circuit receives the boot-up instruction transmitted by the output port of the central control device, and transmits the boot-up instruction to the third instruction receiving end of the micro control circuit based on the second instruction output end.

[0172] For example, as shown in Figure 6 When the adapter circuit includes the first conversion circuit and the micro control circuit, Figure 6 one end of the first conversion circuit in the adapter circuit is connected to the output port of the central control device, and the other end of the first conversion circuit is connected to one end of the micro control circuit. Specifically, the first conversion circuit includes a first conversion chip, a second instruction receiving end and a second instruction output end, the micro control circuit includes a third instruction receiving end, the second instruction receiving end of the first conversion circuit is connected to the output port of the central control device, the second instruction receiving end is connected to the first conversion chip, the first conversion chip is connected to the second instruction output end, and the second instruction output end is connected to the third instruction receiving end. Among them, the first conversion chip is a chip for data processing in the first conversion circuit.

[0173] Among them, the second instruction receiving end and the second instruction output end can be pins on the first conversion chip, and the third instruction receiving end can be a pin on the micro control chip.

[0174] The first conversion circuit can be used for level conversion of the boot-up instruction in the terminal device, and the converted boot-up instruction is transmitted to the micro control circuit.

[0175] The boot-up instruction can be a boot-up code sent by the central control device to the terminal device, and the boot-up code can be a pre-set string. For example, it can be "AA BB CC 01 00 00 01 DD EE FF".

[0176] S204, the micro control circuit compares the boot-up instruction with the preset boot-up condition, and generates a boot-up signal when the boot-up instruction meets the boot-up condition and transmits the boot-up signal to the interface chip circuit;

[0177] In one embodiment, the micro control circuit receives the boot-up signal transmitted by the second instruction output port of the first conversion circuit based on the second receiving end, compares the boot-up code in the boot-up instruction with the preset boot-up condition pre-stored in the micro control chip of the micro control circuit, and when the boot-up code matches the preset boot-up condition, the micro control chip determines that the boot-up instruction meets the preset boot-up condition, generates a boot-up signal, and transmits the boot-up signal to the interface chip circuit based on the boot-up signal output end.

[0178] As shown in Figure 6 , Figure 6 One end of the micro control circuit in the

[0179] The output end of the start-up signal can be a pin on the micro control chip.

[0180] The method that the micro control circuit and the first conversion circuit respond to the start-up instruction to generate the start-up signal and transmit to the interface chip circuit can be that the first conversion chip transmits the start-up instruction received by the second instruction receiving end from the output port of the control equipment to the third instruction receiving end of the micro control circuit based on the second instruction output end, the micro control chip receives the start-up instruction based on the third instruction receiving end, compares the start-up code in the start-up instruction with the preset start-up condition, when the start-up code matches the preset start-up condition, the micro control chip determines that the start-up instruction meets the preset start-up condition, and generates the start-up signal, and transmits the start-up signal to the interface chip circuit based on the output end of the start-up signal.

[0181] The micro control circuit can be an MCU (micro control unit) circuit, which is used for identifying and responding to the start-up instruction. It should be noted that the micro control circuit has a predetermined start-up code stored in advance, when the control equipment outputs the start-up instruction to the micro control circuit, the micro control circuit checks the start-up code in the start-up instruction, when the start-up code matches the start-up code stored in the micro control circuit, it can be considered that the start-up signal meets the preset start-up condition.

[0182] Further, as shown in Figure 7 , the central processing unit includes a fourth signal output end, the interface chip circuit includes a fourth signal receiving end and a fifth signal output end, the micro control circuit includes a fifth signal receiving end, Figure 7 The fourth signal output end in the

[0183] The fourth signal output end can be an output port on the central processing unit, the fourth signal receiving end and the fifth signal output end can be pins on the interface chip, and the fifth signal receiving end can be a pin on the micro control chip.

[0184] When the device state of the terminal device changes, the central processor generates device state information corresponding to the device state, and transmits the device state information to the fourth signal receiving end of the interface chip circuit through the fourth signal output end. The interface chip in the interface chip circuit transmits the device state information to the fifth signal receiving end of the micro control circuit based on the fifth signal output end. The micro control circuit stores the device state information received through the fifth signal receiving end in the micro control chip.

[0185] For example, when the device state of the terminal device changes, the central processor transmits the device state information carrying the device state to the micro control circuit. When the central control device transmits a state acquisition request to the terminal device to acquire the device state of the terminal device, the micro control circuit transmits the device state information to the central control device through the first conversion circuit.

[0186] The state acquisition request can be a pre-set state acquisition code. The micro control circuit checks the state acquisition code and transmits the device state information to the central control device through the first conversion circuit after the check is passed.

[0187] The device state can be the state of the terminal device, and the device state information can be information for indicating the device state of the terminal device, such as sleep state, hibernate state, and power-off state.

[0188] It should be noted that the interface chip circuit cannot recognize the state acquisition request transmitted by the central control device, so the device state information is not transmitted to the central control device through the interface chip circuit.

[0189] Further, as shown in Figure 8 The first conversion circuit further includes a first signal receiving end, a first signal output end, a second signal receiving end, and a second signal output end. The micro control circuit further includes a third signal receiving end and a third signal output end. The first signal receiving end is connected to the output port of the central control device. The first signal output end is connected to the third signal receiving end. The third signal output end is connected to the second signal receiving end. The second signal output end is connected to the input port of the central control device.

[0190] The first signal receiving end, the first signal output end, the second signal receiving end, and the second signal output end can be pins on the first conversion chip. The third signal receiving end and the third signal output end can be pins on the micro control chip.

[0191] Specifically, the method that the micro control circuit responds to the state acquisition signal transmitted by the central control device can be that, when the first signal receiving end of the first switching circuit receives the state acquisition signal transmitted by the output port of the central control device in the case that the central processing unit is in the power-on state, the first switching circuit transmits the state acquisition signal to the third signal receiving end of the micro control circuit based on the first signal output end, the micro control circuit transmits the stored device state information to the second signal receiving end of the first switching circuit based on the third output end, and the second signal output port of the first switching circuit transmits the device state information to the central control device based on the input port of the central control device.

[0192] S205, the interface chip circuit generates a power-on signal in response to the start-up signal and transmits the power-on signal to the power-on circuit.

[0193] In one embodiment, the interface chip circuit can be an SIO chip (super input output chip) circuit in the terminal device, which generates a power-on signal after receiving the start-up signal and transmits the power-on signal to the power-on circuit.

[0194] It can be understood that when the interface chip circuit receives the start-up signal, the wake-up start-up function of the interface chip circuit is triggered to generate a power-on signal, and the power-on signal is transmitted from the interface chip circuit to the power-on circuit.

[0195] For example, as shown in Figure 9 , the interface chip circuit includes a fourth instruction receiving end, an interface chip, and a first power-on signal output end. The fourth instruction receiving end is connected with the switching circuit, and the first power-on signal output end is connected with the power-on circuit. The interface chip generates a power-on signal in response to the start-up instruction transmitted by the switching circuit based on the fourth instruction receiving end, and transmits the power-on signal to the power-on circuit based on the first power-on signal output end. The power-on signal can be a signal generated by the interface chip to enable the power-on circuit to be in the power-on state. The interface chip can be a chip in the interface chip circuit for data processing, such as an SIO chip.

[0196] The first power-on signal output end and the fourth instruction receiving end can be pins on the interface chip.

[0197] Further, as shown in Figure 10 , the terminal device further includes Figure 10The second conversion circuit includes a second receiving end, a third output end, a third result receiving end, and a second result output end. The first output end is connected with the first receiving end. The second output end is connected with the second receiving end. The third output end is connected with the input port of the central control device. The third result receiving end is connected with the output port of the central control device. The second result output end is connected with the second result receiving end. The first result output end is connected with the first result receiving end.

[0198] The first output end and the first result receiving end can be transmission ports on the central processor. The first receiving end, the second result receiving end, the second output end, and the first result output end can be pins on the interface chip. The second receiving end, the third output end, the third result receiving end, and the second result output end can be pins on the micro control chip.

[0199] When the terminal device is started and the central processor is in the power-on state, if the serial port of the central control device needs to be debugged, a feasible method for serial port debugging can be that the first receiving end of the interface chip circuit receives the serial port debugging instruction transmitted by the central processor based on the first output end, transmits the serial port debugging instruction to the second receiving end of the second conversion circuit based on the second output end, transmits the serial port debugging instruction to the input port of the central control device based on the third output end of the second conversion circuit, to debug the serial port of the central control device, receives the serial port debugging result of the central control device based on the third result receiving end of the second conversion circuit, transmits the serial port debugging result to the second result receiving end of the interface chip circuit based on the second result output end, and transmits the serial port debugging result to the first result receiving end of the central processor based on the first result output end of the interface chip circuit.

[0200] It should be noted that, in addition to serial port debugging of the central control device, the second conversion circuit can also perform other data transmission and debugging operations, which can be set according to actual conditions.

[0201] The second conversion circuit can be a circuit in the terminal device for performing serial port debugging and other debugging operations on the serial port of the central control device.

[0202] The power-on signal can be a signal generated by the interface chip circuit to indicate that the power-on circuit powers on the central processor.

[0203] S206, the power-on circuit transmits the power-on signal to the power supply circuit in response to the power-on signal;

[0204] In one embodiment, the power-on circuit receives the power-on signal transmitted by the interface chip circuit, and transmits the power-on signal to the power supply circuit in the terminal device through the power-on control signal in the power-on circuit.

[0205] The power-on circuit can be used to supply power to various components in the terminal device, such as the central processor in the terminal device, the micro-control circuit in the terminal device, the interface chip circuit, and the like.

[0206] Specifically, the power-on circuit can include a power-on control circuit and a power management circuit. The power-on circuit that receives the power-on signal transmitted by the interface chip circuit to power on the central processor can be, for example, Figure 11 as shown in Figure 11 The power-on control circuit, the power supply circuit, the power management circuit, and the central processor are connected in series. One end of the power-on control circuit is connected to the interface chip circuit. The other end of the power-on control circuit is connected to one end of the power supply circuit. The other end of the power supply circuit is connected to one end of the power management circuit. The other end of the power management circuit is connected to the central processor.

[0207] Further, the power-on control circuit that transmits the power-on signal to the power supply circuit can be, for example, Figure 12 as shown in. The power-on control circuit includes a first power-on signal receiving end, a power-on chip, and a second power-on signal output end. The first power-on signal receiving end is connected to the interface chip circuit. The second power-on signal output end is connected to the power supply circuit. The method for the power-on control circuit to transmit the power-on signal to the power supply circuit can be that the power-on chip transmits the power-on signal received by the first power-on signal receiving end to the power supply circuit based on the second power-on signal output end. The power-on chip can be a chip in the power-on circuit for data processing.

[0208] The first power-on signal receiving end and the second power-on signal output end can be pins on the power-on chip.

[0209] The power-on control circuit can be a circuit in the terminal device for enabling the power supply circuit to work in a start mode in response to the power-on signal transmitted by the interface chip circuit.

[0210] The start mode can be a power supply mode corresponding to the power supply circuit in the start state and the running state of the terminal device.

[0211] S207, the power supply circuit converts the alternating current power into direct current power voltage in response to the power-on signal, and transmits the direct current power voltage to the power management circuit.

[0212] In one embodiment, the power supply circuit converts the AC power received from the external power supply into a DC power supply voltage in response to the power-on signal transmitted by the power-on control circuit, and transmits the DC power supply voltage to the power management circuit.

[0213] The AC power supply can be a power signal received from the outside of the terminal device, for example, can be 220V AC voltage, etc.

[0214] Specifically, the power management circuit for voltage conversion of the AC power supply, and the DC power supply voltage obtained by voltage conversion is transmitted to the circuit of the power management circuit can be as shown Figure 13 As shown, the power supply circuit includes a second power-on signal receiving end, a first voltage receiving end, a first voltage conversion chip and a first voltage output end, the second power-on signal receiving end is connected with the power-on control circuit, the first voltage receiving end is connected with the external power supply, the first voltage output end is connected with the power management circuit. The method of transmitting the DC power supply voltage from the power supply circuit to the power management circuit can be that the power supply circuit transmits the AC power received by the first voltage receiving end to the first voltage conversion chip in response to the power-on signal received based on the second power-on signal receiving end, the first voltage conversion chip converts the AC power to generate a DC power supply voltage, and the DC power supply voltage is transmitted to the power management circuit based on the first voltage output end.

[0215] Among them, the first voltage conversion chip can be a chip in the power supply circuit for converting AC power to DC power supply voltage. The first voltage output end and the second power-on signal receiving end can be pins on the first voltage conversion chip.

[0216] The power supply circuit can be a circuit in the terminal device connected with the external power supply for voltage conversion of the external AC power supply to generate a DC power supply voltage, and the converted DC power supply voltage is transmitted to the power management circuit on the mainboard of the terminal device. For example, converting the external 220V AC to 12V DC, etc. The external power supply can be used to provide AC power for the terminal device.

[0217] The DC power supply voltage can be the voltage obtained by voltage conversion of the power supply circuit, which is used to provide working power for each element or circuit in the terminal device, for example, can be 12V DC.

[0218] S208, the power management circuit converts the voltage for each unit in the central processing unit, generates the corresponding power-on voltage of each unit, and transmits each power-on voltage to each unit in the central processing unit for power-on;

[0219] In one embodiment, after the power management circuit receives the DC power supply voltage output by the power supply circuit, the power management circuit converts the voltage for the working voltage of each unit in the central processing unit, generates the power-on voltage of each unit, transmits each power-on voltage to each unit of the central processing unit, to realize the power-on of each unit, so that each unit enters the working state, and then completes the power-on of the central processing unit, and the central processing unit enters the power-on state.

[0220] Specifically, the circuit for powering on the central processing unit by the power management circuit according to the DC power supply voltage can be as shown in Figure 14 The power management circuit includes a second voltage receiving end, a second voltage conversion chip, a voltage distribution chip, and a second voltage output end. The second voltage receiving end is connected with the power supply circuit, and the voltage distribution chip is connected with each unit of the central processing unit based on the second voltage output end. The method for powering on the central processing unit by the power management circuit receiving voltage can be that the second voltage conversion chip receives the DC power supply voltage based on the second voltage receiving end, converts the voltage of the DC power supply voltage based on the working voltage of each unit in the central processing unit, generates the corresponding power-on voltage of each unit, transmits the power-on voltage to the voltage distribution chip, and the voltage distribution chip powers on each unit in the central processing unit based on the second voltage output end and the power-on voltage. The second voltage conversion chip can be a chip in the power management circuit for converting the voltage of the DC power supply voltage based on the working voltage of each unit in the central processing unit, and the voltage distribution chip can be a chip in the power management circuit for voltage distribution for each unit in the central processing unit, for transmitting the corresponding power-on voltage of each unit to the corresponding voltage supply end.

[0221] The second voltage receiving end can be a transmission port on the second voltage conversion chip in the power management circuit, and the second voltage output end can be a transmission port on the voltage distribution chip. The second voltage conversion chip and the voltage distribution chip can be connected by wires.

[0222] Further, the circuit used by the voltage distribution chip to supply power to each unit in the central processing unit can be as shown in Figure 15 The voltage distribution chip includes a first voltage supply end, a second voltage supply end, and a third voltage supply end. The central processing unit includes at least a processing unit, a memory unit, and a management unit. The voltage distribution chip is connected with the processing unit based on the first voltage supply end, connected with the memory unit based on the second voltage supply end, and connected with the management unit based on the third voltage supply end.

[0223] The first voltage supply end, the second voltage supply end, and the third voltage supply end can be included in the second voltage output end, and can be transmission ports on the voltage distribution chip, or can be three different wires.

[0224] For example, the method for the voltage distribution chip to power on the units in the central processor can be that the voltage distribution chip powers on the processing unit based on the first voltage supply end and the first voltage, powers on the memory unit based on the second voltage supply end and the second voltage, and powers on the management unit based on the third voltage supply end and the third voltage.

[0225] The first voltage is the power-on voltage corresponding to the processing unit, the second voltage is the power-on voltage corresponding to the memory unit, and the third voltage is the power-on voltage corresponding to the management unit. The specific values of the first voltage, the second voltage, and the third voltage correspond to the working voltages of the units and can be the same or different. It should be noted that the voltage distribution circuit powers on the units in the central processor based on the supply ends, and the processing unit, the memory unit, and the management unit are only used as examples for description in the embodiments of the present application.

[0226] The power management circuit can be a circuit for supplying power to the chips in the central processor in the terminal device.

[0227] It can be understood that the central processor includes at least one unit, and the working voltages of the units are different. Therefore, the voltage distribution is performed on the voltage signal by the power management circuit to obtain the power-on voltage corresponding to the working voltage of each unit.

[0228] Further, when the terminal device enters the power-off state from the working state, in order to ensure that the interface chip circuit, the micro control circuit, and the first conversion circuit in the terminal device can power on the central processor in response to the start-up instruction when the terminal device is in the power-off state, the supply circuit needs to be powered to ensure that the interface chip circuit, the micro control circuit, and the first conversion circuit are in the working state.

[0229] Specifically, a feasible method for the supply circuit to supply power can be that the supply circuit provides power for the first conversion circuit based on the first power supply and the first supply end provided by the power supply circuit, enables the first conversion circuit to run in a low-power state based on the power received by the first power supply receiving end, the supply circuit provides power for the micro control circuit based on the second power supply and the second supply end provided by the power supply circuit, enables the micro control circuit to run in a low-power state in response to the power received by the second power supply receiving end, and the supply circuit provides power for the interface chip circuit based on the third power supply and the third supply end provided by the power supply circuit, enables the interface chip circuit to run in a low-power state based on the power received by the third power supply receiving end.

[0230] For example, as shown in Figure 16 , the supply circuit includes a first power supply receiving end, a second power supply receiving end, and a third power supply receiving end. Figure 16The central processor in the central processing unit further comprises a power-off instruction output end, and the power-on circuit further comprises a power supply circuit, the power supply circuit comprising a power-off instruction receiving end, a third voltage receiving end, a first power supply end, a second power supply end and a third power supply end, the first conversion circuit further comprising a first power supply receiving end, the micro control circuit further comprising a second power supply receiving end, and the interface chip circuit further comprising a third power supply receiving end, the power-off instruction output port being connected with the power-off instruction receiving port, the third voltage receiving end being connected with the power supply circuit, the first power supply end being connected with the first conversion circuit based on the first power supply receiving end, the second power supply end being connected with the micro control circuit based on the second power supply receiving end, and the third power supply end being connected with the interface chip circuit based on the third power supply receiving end.

[0231] The power-off instruction receiving end, the third voltage receiving end, the first power supply end, the second power supply end and the third power supply end can be transmission ports on the power supply circuit or wires connected with the power supply circuit; the power-off instruction output end can be a transmission port or a pin on the central processor, the first power supply receiving end can be a pin on a first conversion chip in the first conversion circuit, the second power supply receiving end can be a pin on a micro control chip in the micro control circuit, and the third power supply receiving end can be a pin on an interface chip in the interface chip circuit.

[0232] The power-off state can be a state in which the central processor stops working, and only the power supply circuit provides the voltage required for the interface chip circuit, the micro control circuit and the first conversion circuit to run in a low-power state.

[0233] The power-off instruction can be an instruction generated by the central processor in response to a user's closing operation performed on the terminal device, for enabling the power-on circuit to stop providing power to the central processor.

[0234] The power supply circuit can be a circuit in the power-on circuit for providing power to the interface chip circuit, the micro control circuit and the first conversion circuit when the terminal device is in the power-off state. It can be understood that, in order to enable the terminal device to respond to the power-on signal and power on when the central control device transmits the power-on signal to the terminal device, it is necessary to ensure that the interface chip circuit, the micro control circuit and the first conversion circuit in the terminal device are always in a working state. In order to avoid unnecessary energy loss and component loss, the interface chip circuit and the micro control circuit can run in a low-power mode when the terminal device is in the power-off state.

[0235] It should be noted that, in the case that the power-on circuit powers on the central processor and the terminal device is in a running state after the power-on is completed, the power supply circuit in the power-on circuit continuously supplies power to the interface chip circuit, the micro-control circuit and the first conversion circuit, and the interface chip circuit, the micro-control circuit and the first conversion circuit are switched from the low-power mode to the normal power mode when the central processor is powered on. The energy consumption of the normal power mode is higher than that of the low-power mode. It can be understood that the power-on circuit is also used to supply power to other components in the terminal device, which is not listed here.

[0236] The receiving end and the output end involved in the above embodiments can be a pin or a transmission port of a chip, or can be set according to the actual product production situation. The specific pin position of the pin can be set according to the specific model of the chip. It can be understood that the pins on the same chip can be simultaneously different receiving ends or output ends, which can be set according to the specific model of the chip and the function of the pin.

[0237] In the embodiments of the present application, the starting instruction generated by the network or offline operation is received by the central control software on the central control device, and the generated boot signal is transmitted to the terminal device through the serial port connected to the terminal device in response to the starting instruction, so as to complete the starting of the terminal device, that is, the network remote starting of the terminal device through the central control software and the central control device can be met, and the starting operation of the plurality of terminal devices connected through one or more serial ports can be performed, thereby improving the stability and reliability of the remote starting of the terminal device. Further, by providing the isolation circuit and the ring detection port of the central control device, and the first conversion circuit and the output port of the micro-control circuit and the central control device, the device model of different central control devices is met, so as to provide the stability of the isolation circuit scheme, and ensure that the central control device can start the terminal device through the output port, thereby improving the applicability of starting the terminal device through the central control device. In addition, the information of the terminal device is transmitted to the central control device through the first conversion circuit and the second conversion circuit, so as to realize the data interaction between the terminal device and the central control device. Further, the power supply circuit in the power-on circuit provides power for the interface chip circuit, the micro-control circuit and the first conversion circuit, so that the terminal device can respond to the boot signal transmitted by the central control device, and the starting of the terminal device is realized.

[0238] The embodiments of the present application also provide a computer storage medium, which can store a plurality of program instructions, the program instructions being suitable for being loaded and executed by a processor to perform the method steps of the embodiments as shown in the above Figures 1-16 The specific execution process can be referred to the specific description of the embodiments as shown in the above Figures 1-16 The specific execution process can be referred to the specific description of the embodiments as shown in the above

[0239] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by a computer program instructing related hardware. The program can be stored in a computer readable storage medium, and when the program is executed, the processes of the above-mentioned embodiment methods can be included. The storage medium can be a magnetic disc, an optical disc, a read-only memory (ROM), a random access memory (RAM), or the like.

[0240] The above disclosure is only the preferred embodiment of the present application, and of course cannot limit the scope of the present application. Therefore, equivalent changes made according to the claims of the present application are still within the scope of the present application.

Claims

1. A method for starting a terminal device, characterized in that, The method is applied to a terminal device for connecting to a central control device. The terminal device includes an interface chip circuit, a converter circuit, a central processing unit, a power-on circuit, and a power supply circuit. One end of the interface chip circuit is connected to one end of the converter circuit, the other end of the interface chip circuit is connected to the first end of the power-on circuit, the other end of the converter circuit is connected to the serial port of the central control device, the second end of the power-on circuit is connected to the central processing unit, and the third end of the power-on circuit is connected to the power supply circuit. The method includes: The adapter circuit receives the power-on command transmitted via the serial port of the central control device. The power-on command is generated by the central control device in response to the start command transmitted by the central control software. The adapter circuit transmits the power-on command to the interface chip circuit; The interface chip circuit generates a power-on signal in response to the power-on command and transmits the power-on signal to the power-on circuit; The power-on circuit responds to the power-on signal by converting the DC power supply voltage transmitted by the power supply circuit into several different power-on voltages, and powers on the central processing unit based on each of the power-on voltages.

2. The method according to claim 1, characterized in that, When the adapter circuit is an isolation circuit, the isolation circuit includes a first instruction receiving terminal, a field-effect transistor, and a first instruction output terminal. The first instruction receiving terminal is connected to the ringing detection port of the central control device, and the first instruction output terminal is connected to the interface chip circuit. The gate of the field-effect transistor is connected to the first instruction receiving terminal, the drain of the field-effect transistor is connected to the first instruction output terminal, and the source of the field-effect transistor is grounded. The adapter circuit transmits the power-on command to the interface chip circuit, including: The first instruction receiving end transmits the received power-on instruction to the gate of the field-effect transistor. When the power-on instruction received by the gate of the field-effect transistor is a low-level signal, the drain and the source are turned on. The first instruction output end transmits a low-level signal to the interface chip circuit so that the interface chip circuit enables the power supply circuit and the power-on circuit to power on the central processing unit in response to the low-level signal.

3. The method according to claim 1, characterized in that, When the adapter circuit includes a first conversion circuit and a microcontroller circuit, one end of the first conversion circuit is connected to the output port of the central control device, the other end of the first conversion circuit is connected to one end of the microcontroller circuit, and the other end of the microcontroller circuit is connected to the interface chip circuit. The adapter circuit transmits the power-on command to the interface chip circuit, including: The first conversion circuit receives the power-on command transmitted from the output port of the central control device and transmits the power-on command to the microcontroller circuit; The microcontroller circuit compares the power-on command with the preset power-on conditions. When the power-on command meets the power-on conditions, it generates a power-on signal and transmits the power-on signal to the interface chip circuit.

4. The method according to claim 3, characterized in that, The first conversion circuit includes a first conversion chip, a second instruction receiving terminal, and a second instruction output terminal; the microcontroller circuit includes a microcontroller chip, a third instruction receiving terminal, and a power-on signal output terminal. The second instruction receiving end is connected to the output port of the central control device, the second instruction receiving end is connected to the first conversion chip, the first conversion chip is connected to the second instruction output end, the second instruction output end is connected to the third instruction receiving end, the third instruction receiving end is connected to the microcontroller chip, the microcontroller chip is connected to the power-on signal output end, and the power-on signal output end is connected to the interface chip circuit. The adapter circuit transmits the power-on command to the interface chip circuit, including: The first conversion chip receives the power-on command output from the output port of the central control device based on the second command receiving end, and transmits the power-on command to the third command receiving end of the microcontroller circuit based on the second command output end; The microcontroller chip receives the power-on command based on the third command receiving terminal and compares the power-on code in the power-on command with the preset power-on conditions; When the power-on code matches the preset power-on conditions, the microcontroller chip determines that the power-on command meets the preset power-on conditions, generates a power-on signal, and transmits the power-on signal to the interface chip circuit based on the power-on signal output terminal.

5. The method according to claim 1, characterized in that, The interface chip circuit includes a fourth instruction receiving terminal, an interface chip, and a first power-on signal output terminal. The fourth instruction receiving terminal is connected to the adapter circuit, and the first power-on signal output terminal is connected to the power-on circuit. The interface chip circuit generates a power-on signal in response to the power-on command and transmits the power-on signal to the power-on circuit, including: The interface chip receives the power-on command transmitted by the adapter circuit based on the fourth command receiving terminal, generates a power-on signal in response to the power-on command, and transmits the power-on signal to the power-on circuit based on the first power-on signal output terminal.

6. The method according to claim 1, characterized in that, The power-on circuit includes a power-on control circuit and a power management circuit. One end of the power-on control circuit is connected to the interface chip circuit, the other end of the power-on control circuit is connected to one end of the power supply circuit, the other end of the power supply circuit is connected to one end of the power management circuit, and the other end of the power management circuit is connected to the central processing unit. The power-on circuit, in response to the power-on signal, performs voltage conversion on the DC power supply voltage transmitted by the power supply circuit to generate several different power-on voltages, and powers on the central processing unit based on each of the power-on voltages, including: The power-on circuit transmits the power-on signal to the power supply circuit in response to the power-on signal; The power supply circuit responds to the power-on signal by converting the AC power supply to a DC power supply voltage, and then transmits the DC power supply voltage to the power management circuit. The power management circuit performs voltage conversion for each unit in the central processing unit, generates a power-on voltage for each unit, and transmits each power-on voltage to the respective unit in the central processing unit to power on.

7. The method according to claim 6, characterized in that, The power-on control circuit includes a first power-on signal receiving terminal, a power-on chip, and a second power-on signal output terminal. The first power-on signal receiving terminal is connected to the interface chip circuit, and the second power-on signal output terminal is connected to the power supply circuit. The power-on circuit, in response to the power-on signal, transmits the power-on signal to the power supply circuit, including: The power-on chip receives the power-on signal transmitted by the interface chip circuit based on the first power-on signal receiving terminal, and transmits the power-on signal to the power supply circuit based on the second power-on signal output terminal.

8. The method according to claim 7, characterized in that, The power supply circuit includes a second power-on signal receiving terminal, a first voltage receiving terminal, a first voltage conversion chip, and a first voltage output terminal. The second power-on signal receiving terminal is connected to the power-on control circuit, the first voltage receiving terminal is connected to an external power supply, and the first voltage output terminal is connected to the power management circuit. The power supply circuit, in response to the power-on signal, converts the AC power supply to a DC power supply voltage, and transmits the DC power supply voltage to the power management circuit, including: The power supply circuit responds to the power-on signal received by the second power-on signal receiving terminal and transmits the AC power received by the first voltage receiving terminal to the first voltage conversion chip. The first voltage conversion chip converts the AC power supply to generate a DC power supply voltage, and transmits the DC power supply voltage to the power management circuit based on the first voltage output terminal.

9. The method according to claim 8, characterized in that, The power management circuit includes a second voltage receiver, a second voltage conversion chip, a voltage distribution chip, and a second voltage output terminal. The second voltage receiver is connected to the power supply circuit, and the voltage distribution chip is connected to each unit of the central processing unit based on the second voltage output terminal. The power management circuit performs voltage conversion for each unit in the central processing unit, generates a power-on voltage corresponding to each unit, and transmits each power-on voltage to the respective unit in the central processing unit for power-on, including: The second voltage conversion chip receives the DC power supply voltage from the second voltage receiving terminal, and performs voltage conversion on the DC power supply voltage based on the operating voltage of each unit in the central processing unit to generate the power-on voltage corresponding to each unit; The power-on voltage is transmitted to the voltage distribution chip, which powers on each unit in the central processing unit based on the second voltage output terminal and the power-on voltage.

10. The method according to claim 9, characterized in that, The voltage distribution chip includes a first voltage power supply terminal, a second voltage power supply terminal, and a third voltage power supply terminal. The central processing unit includes at least a processing unit, a memory unit, and a management unit. The voltage distribution chip is connected to the processing unit via the first voltage power supply terminal, to the memory unit via the second voltage power supply terminal, and to the management unit via the third voltage power supply terminal. The voltage distribution chip powers on each unit in the central processing unit based on the second voltage output terminal, including: The voltage distribution chip powers on the processing unit based on the first voltage power supply terminal and the first voltage, wherein the first voltage is the power-on voltage corresponding to the processing unit. The voltage distribution chip powers on the memory unit based on the second voltage power supply terminal and the second voltage, where the second voltage is the power-on voltage corresponding to the memory unit. The voltage distribution chip powers on the management unit based on the third voltage power supply terminal and the third voltage, where the third voltage is the power-on voltage corresponding to the management unit.

11. The method according to claim 3, characterized in that, The central processing unit includes a power-off command output terminal, the power-on circuit includes a power supply circuit, the power supply circuit includes a power-off command receiving terminal, a third voltage receiving terminal, a first power supply terminal, a second power supply terminal and a third power supply terminal, the first conversion circuit includes a first power receiving terminal, the microcontroller circuit includes a second power receiving terminal, and the interface chip circuit includes a third power receiving terminal. The power-off command output port is connected to the power-off command receiving port, the third voltage receiving end is connected to the power supply circuit, the first power supply end is connected to the first conversion circuit based on the first power supply receiving end, the second power supply end is connected to the microcontroller circuit based on the second power supply receiving end, and the third power supply end is connected to the interface chip circuit based on the third power supply receiving end. The method further includes: When the central processing unit enters a power-off state, the central processing unit outputs a power-off command to the power-on circuit based on the power-off command output port, and the power-on circuit stops providing power to the central processing unit in response to the power-off command received based on the power-off command receiving port. The power supply circuit provides power to the first conversion circuit based on the first power supply circuit and the first power supply terminal, enabling the first conversion circuit to operate in a low-power state based on the power received by the first power supply receiving terminal. The power supply circuit provides power to the microcontroller circuit based on the second power supply circuit and the second power supply terminal, enabling the microcontroller circuit to operate in a low-power state in response to the power received based on the second power supply receiving terminal. The power supply circuit provides power to the interface chip circuit based on the third power supply circuit and the third power supply terminal, enabling the interface chip circuit to operate in a low-power state based on the power received by the third power supply receiving terminal.

12. The method according to claim 3, characterized in that, The first conversion circuit includes a first signal receiving terminal, a first signal output terminal, a second signal receiving terminal, and a second signal output terminal; the microcontroller circuit also includes a third signal receiving terminal and a third signal output terminal. The first signal receiving end is connected to the output port of the central control device, the first signal output end is connected to the third signal receiving end, the third signal output end is connected to the second signal receiving end, and the second signal output end is connected to the input port of the central control device. The method further includes: When the central processing unit is powered on, when the first signal receiving terminal of the first conversion circuit receives the status acquisition signal transmitted from the output port of the central control device, the first conversion circuit transmits the status acquisition signal to the third signal receiving terminal of the microcontroller circuit based on the first signal output terminal. The microcontroller circuit transmits the stored device status information to the second signal receiving terminal of the first conversion circuit based on the third signal output terminal. The second signal output port of the first conversion circuit transmits the device status information to the central control device based on the input port of the central control device.

13. The method according to claim 12, characterized in that, The central processing unit also includes a fourth signal output terminal, the interface chip circuit includes a fourth signal receiving terminal and a fifth signal output terminal, and the microcontroller circuit includes a fifth signal receiving terminal. The fourth signal output terminal is connected to the fourth signal receiving terminal, and the fifth signal output terminal is connected to the fifth signal receiving terminal; The method further includes: When the device status of the terminal device changes, the central processing unit generates device status information corresponding to the device status, and transmits the device status information to the fourth signal receiving terminal of the interface chip circuit based on the fourth signal output terminal. The interface chip circuit transmits the device status information to the fifth signal receiving terminal of the microcontroller circuit based on the fifth signal output terminal, and the microcontroller circuit stores the device status information.

14. The method according to claim 1, characterized in that, The terminal device further includes a second conversion circuit, the central processing unit includes a first output terminal and a first result receiving terminal, the interface chip circuit includes a first receiving terminal, a second result receiving terminal, a second output terminal and a first result output terminal, and the second conversion circuit includes a second receiving terminal, a third output terminal, a third result receiving terminal and a second result output terminal; The first output terminal is connected to the first receiving terminal, the second output terminal is connected to the second receiving terminal, the third output terminal is connected to the input port of the central control device, the third result receiving terminal is connected to the output port of the central control device, the second result output terminal is connected to the second result receiving terminal, and the first result output terminal is connected to the first result receiving terminal. The method further includes: The first receiving end of the interface chip circuit receives the serial port debugging command transmitted by the central processing unit based on the first output end, and transmits the serial port debugging command to the second receiving end of the second conversion circuit based on the second output end; The second conversion circuit transmits the serial port debugging command to the input port of the central control device based on the third output terminal, so as to perform serial port debugging on the serial port of the central control device; The third result receiving end of the second conversion circuit receives the serial port debugging result of the central control device and transmits the serial port debugging result to the second result receiving end of the interface chip circuit based on the second result output end; The interface chip circuit transmits the serial port debugging result to the first result receiving end of the central processing unit based on the first result output end.

15. A terminal device for connecting to a central control device, the terminal device comprising an interface chip circuit, a converter circuit, a central processing unit, a power-on circuit, and a power supply circuit, one end of the interface chip circuit being connected to one end of the converter circuit, the other end of the interface chip circuit being connected to a first end of the power-on circuit, the other end of the converter circuit being connected to a serial port of the central control device, a second end of the power-on circuit being connected to the central processing unit, and a third end of the power-on circuit being connected to the power supply circuit, the terminal device being used to perform the steps of the method as described in any one of claims 1 to 14.

16. The terminal device according to claim 15, characterized in that, When the adapter circuit is an isolation circuit, the isolation circuit includes a first instruction receiving terminal, a field-effect transistor, and a first instruction output terminal. The first instruction receiving terminal is connected to the ringing detection port of the central control device, and the first instruction output terminal is connected to the interface chip circuit. The isolation circuit includes a field-effect transistor (FET), the gate of which is connected to the ringing detection port of the central control device, the drain of which is connected to the interface chip circuit, and the source of which is grounded.

17. The terminal device according to claim 15, characterized in that, When the adapter circuit includes a first conversion circuit and a microcontroller circuit, one end of the first conversion circuit is connected to the output port of the central control device, the other end of the first conversion circuit is connected to one end of the microcontroller circuit, and the other end of the microcontroller circuit is connected to the interface chip circuit.

18. The terminal device according to claim 17, characterized in that, The first conversion circuit includes a first conversion chip, a second instruction receiving terminal, and a second instruction output terminal; the microcontroller circuit includes a microcontroller chip, a third instruction receiving terminal, and a power-on signal output terminal. The second instruction receiving end is connected to the output port of the central control device, the second instruction receiving end is connected to the first conversion chip, the first conversion chip is connected to the second instruction output end, the second instruction output end is connected to the third instruction receiving end, the third instruction receiving end is connected to the microcontroller chip, the microcontroller chip is connected to the power-on signal output end, and the power-on signal output end is connected to the interface chip circuit.

19. The terminal device according to claim 15, characterized in that, The interface chip circuit includes a fourth instruction receiving terminal, an interface chip, and a first power-on signal output terminal. The fourth instruction receiving terminal is connected to the adapter circuit, and the first power-on signal output terminal is connected to the power-on circuit.

20. The terminal device according to claim 15, characterized in that, The power-on circuit includes a power-on control circuit and a power management circuit. One end of the power-on control circuit is connected to the interface chip circuit, and the other end of the power-on control circuit is connected to one end of the power supply circuit. The other end of the power supply circuit is connected to one end of the power management circuit, and the other end of the power management circuit is connected to the central processing unit.

21. The terminal device according to claim 20, characterized in that, The power-on control circuit includes a first power-on signal receiving terminal, a power-on chip, and a second power-on signal output terminal. The first power-on signal receiving terminal is connected to the interface chip circuit, and the second power-on signal output terminal is connected to the power supply circuit.

22. The terminal device according to claim 20, characterized in that, The power supply circuit includes a second power-on signal receiving terminal, a first voltage receiving terminal, a first voltage conversion chip, and a first voltage output terminal. The second power-on signal receiving terminal is connected to the power-on control circuit, the first voltage receiving terminal is connected to an external power supply, and the first voltage output terminal is connected to the power management circuit.

23. The terminal device according to claim 20, characterized in that, The power management circuit includes a second voltage receiver, a second voltage conversion chip, a voltage distribution chip, and a second voltage output terminal. The second voltage receiver is connected to the power supply circuit, and the voltage distribution chip is connected to each unit of the central processing unit based on the second voltage output terminal.

24. The terminal device according to claim 23, characterized in that, The voltage distribution chip includes a first voltage power supply terminal, a second voltage power supply terminal, and a third voltage power supply terminal. The central processing unit includes at least a processing unit, a memory unit, and a management unit. The voltage distribution chip is connected to the processing unit via the first voltage power supply terminal, to the memory unit via the second voltage power supply terminal, and to the management unit via the third voltage power supply terminal.

25. The terminal device according to claim 17, characterized in that, The central processing unit includes a power-off command output terminal, the power-on circuit includes a power supply circuit, the power supply circuit includes a power-off command receiving terminal, a third voltage receiving terminal, a first power supply terminal, a second power supply terminal and a third power supply terminal, the first conversion circuit includes a first power receiving terminal, the microcontroller circuit includes a second power receiving terminal, and the interface chip circuit includes a third power receiving terminal. The power-off command output port is connected to the power-off command receiving port, the third voltage receiving end is connected to the power supply circuit, the first power supply end is connected to the first conversion circuit based on the first power supply receiving end, the second power supply end is connected to the microcontroller circuit based on the second power supply receiving end, and the third power supply end is connected to the interface chip circuit based on the third power supply receiving end.

26. The terminal device according to claim 17, characterized in that, The first conversion circuit includes a first signal receiving terminal, a first signal output terminal, a second signal receiving terminal, and a second signal output terminal; the microcontroller circuit also includes a third signal receiving terminal and a third signal output terminal. The first signal receiving end is connected to the output port of the central control device, the first signal output end is connected to the third signal receiving end, the third signal output end is connected to the second signal receiving end, and the second signal output end is connected to the input port of the central control device.

27. The terminal device according to claim 26, characterized in that, The central processing unit also includes a fourth signal output terminal, the interface chip circuit includes a fourth signal receiving terminal and a fifth signal output terminal, and the microcontroller circuit includes a fifth signal receiving terminal. The fourth signal output terminal is connected to the fourth signal receiving terminal, and the fifth signal output terminal is connected to the fifth signal receiving terminal.

28. The terminal device according to claim 15, characterized in that, The terminal device further includes a second conversion circuit, the central processing unit includes a first output terminal and a first result receiving terminal, the interface chip circuit includes a first receiving terminal, a second result receiving terminal, a second output terminal and a first result output terminal, and the second conversion circuit includes a second receiving terminal, a third output terminal, a third result receiving terminal and a second result output terminal; The first output terminal is connected to the first receiving terminal, the second output terminal is connected to the second receiving terminal, the third output terminal is connected to the input port of the central control device, the third result receiving terminal is connected to the output port of the central control device, the second result output port is connected to the second result receiving terminal, and the first result output terminal is connected to the first result receiving terminal.

29. A computer storage medium storing a plurality of instructions adapted for loading by a processor and performing the steps of the method as claimed in any one of claims 1 to 14.

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