Heterojunction device interface state concentration characterization method and device

Abstract

The invention provides a characterization method, device and equipment for the interface state concentration of a heterojunction device and a storage medium, and can be applied to the technical field of semiconductor heterojunctions. The method comprises the steps that based on an equivalent circuit model corresponding to a to-be-tested heterojunction device, according to a selected bias voltage range, capacitance-frequency characteristics of the to-be-tested heterojunction device under different bias voltages are acquired, and the equivalent circuit model of the to-be-tested heterojunction device is established according to electrical characteristics of all areas of the to-be-tested heterojunction device; aiming at each capacitance-frequency characteristic of the to-be-tested heterojunction device, obtaining the capacitance-voltage characteristic of the to-be-tested heterojunction device according to the variation trend of the capacitance-frequency characteristic; carrying out data processing on the capacitance-voltage characteristics of the heterojunction device to be detected to obtain carrier concentrations under different frequencies; and obtaining the interface state concentration of the heterojunction device to be detected according to the carrier concentrations under different frequencies.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor heterojunction technology, and in particular to a method, device, equipment, medium and program product for characterizing interface state concentration of a heterojunction device. Background Art

[0002] In recent years, semiconductor devices have developed rapidly. As the performance of semiconductor devices improves, the decisive role of the interface characteristics of semiconductor devices on device performance has become increasingly apparent. The interface passivation of semiconductor materials is generally caused by the introduction of new processes or new materials. The introduction of some new materials will form a heterojunction structure at the interface of semiconductor devices.

[0003] Since the heterojunction interface state concentration can characterize the passivation effect of the heterojunction on the device, how to accurately measure the heterojunction interface state concentration of semiconductor devices is a technical problem that needs to be solved in the relevant technology. Summary of the invention

[0004] In view of the above problems, the present disclosure provides a method, apparatus, device, medium and program product for characterizing the interface state concentration of a heterojunction device.

[0005] According to a first aspect of the present disclosure, a method for characterizing interface state concentration of a heterojunction device is provided, comprising:

[0006] Based on an equivalent circuit model corresponding to the heterojunction device to be tested, and according to a selected bias voltage range, obtaining the capacitance-frequency characteristics of the heterojunction device to be tested under different bias voltages, wherein the equivalent circuit model of the heterojunction device to be tested is established according to the electrical characteristics of each region of the heterojunction device to be tested;

[0007] For each capacitance-frequency characteristic of the heterojunction device to be tested, according to the variation trend of the capacitance-frequency characteristic, obtaining the capacitance-voltage characteristic of the heterojunction device to be tested;

[0008] Performing data processing on the capacitance-voltage characteristics of the heterojunction device to be tested to obtain carrier concentrations at different frequencies; and

[0009] According to the carrier concentrations at the different frequencies, the interface state concentration of the heterojunction device to be tested is obtained.

[0010] According to an embodiment of the present disclosure, based on the equivalent circuit model corresponding to the heterojunction device to be tested, and according to the selected bias voltage range, the capacitance-frequency characteristics of the heterojunction device to be tested under different bias voltages are obtained, including:

[0011] The current-voltage characteristics of the heterojunction device to be tested are obtained by testing;

[0012] According to the current-voltage characteristics of the heterojunction device to be tested, under the premise of ensuring that the current is small enough, selecting a bias voltage range for testing the capacitance-frequency characteristics of the heterojunction device to be tested; and

[0013] According to the selected bias voltage range of the heterojunction device to be tested, the capacitance-frequency characteristic of the heterojunction device to be tested under the target bias voltage is obtained, wherein the target bias voltage represents the bias voltage within the bias voltage range.

[0014] According to the embodiments of the present disclosure, based on the current-voltage characteristics of the heterojunction device to be tested, under the premise of ensuring that the current is small enough, the bias voltage range for testing the capacitance-frequency characteristics of the heterojunction device to be tested includes:

[0015] According to the current-voltage characteristics of the heterojunction device to be tested, under the premise of ensuring that the current is small enough, obtaining a bias voltage range for testing the capacitance-voltage characteristics of the heterojunction device to be tested;

[0016] According to the bias voltage range of the capacitance-voltage characteristic, testing the capacitance-voltage characteristic curve of the heterojunction device to be tested at the target frequency; and

[0017] According to the variation trend of the capacitance-voltage characteristic curve at the target frequency, the bias voltage range for testing the capacitance-frequency characteristic of the heterojunction device to be tested is determined.

[0018] According to an embodiment of the present disclosure, for each capacitance-frequency characteristic of the heterojunction device to be tested, according to the variation trend of the capacitance-frequency characteristic, obtaining the capacitance-voltage characteristic of the heterojunction device to be tested includes:

[0019] According to the variation trend of the capacitance-frequency characteristic of the heterojunction device to be tested, obtaining a low-frequency AC small signal frequency and a high-frequency AC small signal frequency for testing the capacitance-voltage characteristic of the heterojunction device to be tested; and

[0020] The capacitance-voltage characteristics of the heterojunction device to be tested at the low-frequency AC small signal frequency and the capacitance-voltage characteristics at the high-frequency AC small signal frequency are obtained respectively.

[0021] According to an embodiment of the present disclosure, the frequency of the low-frequency AC small signal and the frequency of the high-frequency AC small signal are both within a frequency range of 1 kHz to 1 MHz.

[0022] According to an embodiment of the present disclosure, the data processing of the capacitance-voltage characteristic of the heterojunction device to be tested is performed to obtain carrier concentrations at different frequencies, including:

[0023] Performing curve processing on the capacitance-voltage characteristic of the heterojunction device to be tested at the low-frequency AC small signal frequency and the capacitance-voltage characteristic at the high-frequency AC small signal frequency, respectively, to obtain a first curve corresponding to the low-frequency AC small signal frequency and a second curve corresponding to the high-frequency AC small signal frequency;

[0024] Performing linear fitting operations on the first curve and the second curve respectively to obtain a third curve corresponding to the first curve and a fourth curve corresponding to the second curve;

[0025] According to the slope of the third curve and the slope of the fourth curve, the carrier concentration corresponding to the low-frequency AC small signal frequency and the carrier concentration corresponding to the high-frequency AC small signal frequency are obtained respectively.

[0026] According to an embodiment of the present disclosure, obtaining the interface state concentration of the heterojunction device to be tested according to the carrier concentrations at the different frequencies includes:

[0027] The carrier concentration corresponding to the frequency of the low-frequency AC small signal is subtracted from the carrier concentration corresponding to the frequency of the high-frequency AC small signal to obtain the interface state concentration of the heterojunction device to be tested.

[0028] The second aspect of the present disclosure provides a device for characterizing the interface state concentration of a heterojunction device, comprising: a first acquisition module, a second acquisition module, an acquisition module and a third acquisition module. The first acquisition module is used to acquire the capacitance-frequency characteristics of the heterojunction device under different bias voltages based on the equivalent circuit model corresponding to the heterojunction device under test and according to the selected bias voltage range, wherein the equivalent circuit model of the heterojunction device under test is established according to the electrical characteristics of each region of the heterojunction device under test. The second acquisition module is used to acquire the capacitance-voltage characteristics of the heterojunction device under test according to the capacitance-frequency characteristics for each capacitance-frequency characteristic of the heterojunction device under test. The acquisition module is used to perform data processing on the capacitance-voltage characteristics of the heterojunction device under test to obtain the carrier concentrations at different frequencies. The third acquisition module is used to acquire the interface state concentration of the heterojunction device under test according to the carrier concentrations at different frequencies.

[0029] A third aspect of the present disclosure provides an electronic device, comprising: one or more processors; and a memory for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors execute the above method.

[0030] The fourth aspect of the present disclosure also provides a computer-readable storage medium having executable instructions stored thereon, which, when executed by a processor, causes the processor to execute the above method.

[0031] The fifth aspect of the present disclosure also provides a computer program product, including a computer program, which implements the above method when executed by a processor.

[0032] According to the method, device, equipment, medium and program product for characterizing the interface state concentration of a heterojunction device provided by the present disclosure, based on the equivalent circuit model corresponding to the heterojunction device to be tested and according to the selected bias voltage range, the capacitance-frequency characteristics of the heterojunction device to be tested under different bias voltages can be obtained, and for each capacitance-frequency characteristic of the heterojunction device to be tested, the capacitance-voltage characteristics of the heterojunction device to be tested can be obtained according to the change trend of the capacitance-frequency characteristics, so that the carrier concentrations at different frequencies can be obtained by performing data processing on the capacitance-voltage characteristics of the heterojunction device to be tested, so as to obtain the interface state concentration of the heterojunction device to be tested according to the carrier concentrations at different frequencies, so that the interface state concentrations of the heterojunction device to be tested at different frequencies can be obtained without damaging the device structure, so as to characterize the passivation effect of the heterojunction on the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The above contents and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0034] Figure 1 A schematic diagram showing an application scenario of a method, apparatus, device, medium, and program product for characterizing interface state concentration of a heterojunction device according to an embodiment of the present disclosure;

[0035] Figure 2 A flow chart schematically shows a method for characterizing the interface state concentration of a heterojunction device according to an embodiment of the present disclosure;

[0036] Figure 3 The structure diagram of the copper indium gallium selenide battery according to the embodiment of the present disclosure is schematically shown;

[0037] Figure 4 A flow chart for obtaining the capacitance-frequency characteristics of a heterojunction device to be tested according to an embodiment of the present disclosure is schematically shown;

[0038] Figure 5 A flow chart schematically shows a method for characterizing the interface state concentration of a heterojunction device according to an embodiment of the present disclosure;

[0039] Figure 6 A structural block diagram schematically shows a device for characterizing interface state concentration of a heterojunction device according to an embodiment of the present disclosure; and

[0040] Figure 7A block diagram of an electronic device suitable for implementing a method for characterizing interface state concentration of a heterojunction device according to an embodiment of the present disclosure is schematically shown. DETAILED DESCRIPTION

[0041] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present disclosure. In the following detailed description, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present disclosure. However, it is apparent that one or more embodiments may also be implemented without these specific details. In addition, in the following description, descriptions of known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present disclosure.

[0042] The terms used herein are only for describing specific embodiments and are not intended to limit the present disclosure. The terms "comprise", "include", etc. used herein indicate the existence of the features, steps, operations and / or components, but do not exclude the existence or addition of one or more other features, steps, operations or components.

[0043] All terms (including technical and scientific terms) used herein have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification, and should not be interpreted in an idealized or overly rigid manner.

[0044] When using expressions such as "at least one of A, B, and C, etc.", they should generally be interpreted according to the meaning of the expression commonly understood by those skilled in the art (for example, "a system having at least one of A, B, and C" should include but is not limited to a system having A alone, B alone, C alone, A and B, A and C, B and C, and / or A, B, C, etc.).

[0045] In the technical solution of the present invention, the user information (including but not limited to user personal information, user image information, user device information, such as location information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved are all information and data authorized by the user or fully authorized by all parties, and the collection, storage, use, processing, transmission, provision, disclosure and application of relevant data comply with the relevant laws, regulations and standards of relevant countries and regions, take necessary confidentiality measures, do not violate public order and good morals, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0046] In the process of implementing the present disclosure, it is found that the capacitance of a semiconductor device can reflect the change of defect charge in the device. At a certain temperature, the rate of defect emission and capture of carriers in a semiconductor device is basically fixed. Therefore, there is a certain limit on the frequency of defect charge response to an applied AC signal. When the frequency of the AC signal exceeds the frequency of defect exchange carriers, the defect charge will not contribute to the capacitance of the device. Therefore, how to accurately measure the heterojunction interface state concentration of a semiconductor device is a technical problem that needs to be solved in the related art.

[0047] To this end, an embodiment of the present disclosure provides a method for characterizing the interface state concentration of a heterojunction device, comprising: based on an equivalent circuit model corresponding to the heterojunction device to be tested, and according to a selected bias voltage range, obtaining the capacitance-frequency characteristics of the heterojunction device to be tested under different bias voltages, wherein the equivalent circuit model of the heterojunction device to be tested is established according to the electrical characteristics of each region of the heterojunction device to be tested; for each capacitance-frequency characteristic of the heterojunction device to be tested, according to a change trend of the capacitance-frequency characteristic, obtaining the capacitance-voltage characteristic of the heterojunction device to be tested; performing data processing on the capacitance-voltage characteristic of the heterojunction device to be tested to obtain carrier concentrations at different frequencies; and obtaining the interface state concentration of the heterojunction device to be tested according to the carrier concentrations at different frequencies.

[0048] Figure 1 The application scenario diagram of the method for characterizing the interface state concentration of a heterojunction device according to an embodiment of the present disclosure is schematically shown.

[0049] like Figure 1 As shown, the application scenario 100 according to this embodiment may include a first terminal device 101, a second terminal device 102, a third terminal device 103, a network 104, and a server 105. The network 104 is used to provide a medium for a communication link between the first terminal device 101, the second terminal device 102, the third terminal device 103, and the server 105. The network 104 may include various connection types, such as wired, wireless communication links, or optical fiber cables, etc.

[0050] The user may use at least one of the first terminal device 101, the second terminal device 102, and the third terminal device 103 to interact with the server 105 through the network 104 to receive or send messages, etc. Various communication client applications may be installed on the first terminal device 101, the second terminal device 102, and the third terminal device 103, such as shopping applications, web browser applications, search applications, instant messaging tools, email clients, social platform software, etc. (only as examples).

[0051] The first terminal device 101, the second terminal device 102, and the third terminal device 103 may be various electronic devices having display screens and supporting web browsing, including but not limited to smart phones, tablet computers, laptop computers, desktop computers, and the like.

[0052] The server 105 may be a server that provides various services, such as a background management server (only as an example) that provides support for websites browsed by users using the first terminal device 101, the second terminal device 102, and the third terminal device 103. The background management server may analyze and process the received data such as user requests, and feed back the processing results (such as web pages, information, or data obtained or generated according to user requests) to the terminal device.

[0053] For example, the server 105 can obtain the capacitance-frequency characteristics of the heterojunction device to be tested at different bias voltages based on the equivalent circuit model corresponding to the heterojunction device to be tested and according to the selected bias voltage range, and then obtain the capacitance-voltage characteristics of the heterojunction device to be tested according to the variation trend of the capacitance-frequency characteristics for each capacitance-frequency characteristic of the heterojunction device to be tested, thereby performing data processing on the capacitance-voltage characteristics of the heterojunction device to be tested to obtain the carrier concentrations at different frequencies, and finally, according to the carrier concentrations at different frequencies, the interface state concentration of the heterojunction device to be tested can be obtained.

[0054] It should be noted that the method for characterizing the interface state concentration of the heterojunction device provided in the embodiment of the present disclosure can generally be executed by the server 105. Accordingly, the device for characterizing the interface state concentration of the heterojunction device provided in the embodiment of the present disclosure can generally be set in the server 105. The method for characterizing the interface state concentration of the heterojunction device provided in the embodiment of the present disclosure can also be executed by a server or server cluster that is different from the server 105 and can communicate with the first terminal device 101, the second terminal device 102, the third terminal device 103 and / or the server 105. Accordingly, the device for characterizing the interface state concentration of the heterojunction device provided in the embodiment of the present disclosure can also be set in a server or server cluster that is different from the server 105 and can communicate with the first terminal device 101, the second terminal device 102, the third terminal device 103 and / or the server 105.

[0055] It should be understood that Figure 1 The number of terminal devices, networks and servers in the embodiment is only for illustration. Any number of terminal devices, networks and servers may be provided according to implementation requirements.

[0056] The following will be based on Figure 1 The scene described by Figure 2 to Figure 5 A method for characterizing the interface state concentration of a heterojunction device of the disclosed embodiment is described in detail.

[0057] Figure 2 The flowchart of the method for characterizing the interface state concentration of a heterojunction device according to an embodiment of the present disclosure is schematically shown.

[0058] like Figure 2 As shown, the method 200 includes operations S210 to S240.

[0059] In operation S210, based on an equivalent circuit model corresponding to the heterojunction device to be tested, and according to a selected bias voltage range, capacitance-frequency characteristics of the heterojunction device to be tested under different bias voltages are obtained.

[0060] According to an embodiment of the present disclosure, an equivalent circuit model of the heterojunction device to be tested is established based on the electrical characteristics of each region of the heterojunction device to be tested.

[0061] According to an embodiment of the present disclosure, the heterojunction device to be tested may include a semiconductor device. Since the substrate and active region of the heterojunction device to be tested with different structures have an influence on the admittance signal of the device, it is necessary to first establish an equivalent circuit model of the device according to the electrical characteristics of each region (each hierarchical structure) of the device, and then characterize some subsequent parameters related to the interface state concentration, such as too large defects, according to the constructed equivalent circuit model.

[0062] According to the embodiments of the present disclosure, an equivalent circuit model can be established according to the different needs of the heterojunction device to be tested, and the established equivalent circuit model can be used to measure the heterojunction interface state concentration. The impact on the measurement result of the interface state concentration is relatively small. The equivalent circuit model is established to facilitate analysis.

[0063] Among them, the capacitance of the equivalent circuit model is mostly dominated by the junction region (heterojunction interface). Depending on the body resistance in the heterojunction device to be tested or whether the body provides capacitance, the constructed equivalent circuit model is different.

[0064] For example, a copper indium gallium selenide cell can be used as the heterojunction device to be tested.

[0065] Figure 3 The structural diagram of a copper indium gallium selenide cell according to an embodiment of the present disclosure is schematically shown.

[0066] like Figure 3 As shown, the structure of the copper indium gallium selenide cell 300 (CIGS, Cu copper, In indium, Ga gallium, Se selenium) from bottom to top is a stainless steel substrate 301, metal molybdenum (Mo) 302, a P-CIGSe absorption layer (P-type copper indium gallium selenide layer) 303, a CdS buffer layer 304, a zinc oxide layer (ZnO) 305, an aluminum-doped zinc oxide layer (Al-ZnO) 306 and metal Ni / Al electrodes 307_1, 307_2 and 307_3.

[0067] The stainless steel substrate 301 may include a glass substrate. The metal molybdenum 302 may represent the back electrode of the battery 300, and the metal Ni / Al electrodes 307_1, 307_2 and 307_3 may represent the front electrode of the battery 300. The metal Ni / Al electrodes 307_1, 307_2 and 307_3 may represent the electrode Ni / Al stacked structure in the battery 300.

[0068] According to an embodiment of the present disclosure, the heterojunction device to be tested is Figure 3 The CIGS solar cell 300 in the example is used for explanation. The manufacturing process of the CIGS cell 300 may include: depositing a metal Mo 302 with a thickness of 500nm on a glass substrate 301 by magnetron sputtering, then depositing a 2μm thick P-CIGSe absorption layer 303 by a three-step co-evaporation method, after depositing the CIGSe absorption layer 303, depositing a CdS buffer layer 304 with a thickness of 50nm by a chemical co-bath method, and finally sputtering a ZnO layer 305 and an Al-ZnO layer 306 with a thickness of 150nm and 250nm respectively by DC magnetron sputtering and RF magnetron sputtering. Among them, the CdS buffer layer 304 is deposited between the ZnO layer 305 and the CIGSe absorption layer 303 to prevent the ZnO layer 305 and the CIGSe absorption layer 303 from directly contacting each other and introducing a large number of interface states.

[0069] According to the embodiments of the present disclosure, Figure 3 Taking the heterojunction device to be tested in as an example, the CIGSe absorption layer 303 and the CdS buffer layer 304 will form a heterojunction. The equivalent circuit model of the heterojunction device to be tested can be characterized as follows: the power consumption area and the non-power consumption area of ​​the CdS buffer layer 304 can respectively form a resistor and a capacitor equivalently, and the resistor and the capacitor are in parallel and then connected in series with the capacitor equivalent to the heterojunction.

[0070] According to the embodiments of the present disclosure, when the frequency of the AC signal of the capacitor of the semiconductor device exceeds the frequency of the defect exchange carriers, the defect charges will not contribute to the capacitance of the device, and therefore, it is necessary to obtain the capacitance-frequency characteristics of the heterojunction device to be tested to determine the frequency range of the contributing capacitance. The capacitance-frequency characteristics can characterize the Cf curve.

[0071] According to the embodiments of the present disclosure, the capacitance-frequency characteristics of the heterojunction device under test under different bias voltages can be tested based on the established equivalent circuit model of the heterojunction device under test to obtain the frequency range of the device capacitance of the device interface defects.

[0072] In operation S220, for each capacitance-frequency characteristic of the heterojunction device to be tested, the capacitance-voltage characteristic of the heterojunction device to be tested is obtained according to a variation trend of the capacitance-frequency characteristic.

[0073] According to the embodiments of the present disclosure, for each capacitance-frequency characteristic of the heterojunction device to be tested, the frequency for testing the capacitance-voltage characteristic of the heterojunction device to be tested can be determined according to the changing trend of the Cf characteristic curve, so that the capacitance-voltage characteristic of the heterojunction device to be tested can be obtained by scanning at different frequencies according to the established equivalent circuit model.

[0074] Wherein, at the frequency determined according to the Cf characteristic curve, the capacitance-voltage characteristic of the heterojunction device to be measured is relatively accurate.

[0075] In operation S230 , data processing is performed on the capacitance-voltage characteristic of the heterojunction device to be measured to obtain carrier concentrations at different frequencies.

[0076] According to the embodiments of the present disclosure, data processing may be performed on the capacitance-voltage characteristic curve of the heterojunction device to be tested, so as to determine the carrier concentration of the heterojunction device to be tested at different frequencies according to the slope of the curve after data processing.

[0077] In operation S240, the interface state concentration of the heterojunction device to be tested is obtained according to the carrier concentrations at different frequencies.

[0078] According to the embodiments of the present disclosure, based on the carrier concentrations at different frequencies, the carrier concentration measured at a low frequency may be subtracted from the carrier concentration measured at a high frequency to obtain the interface state concentration of the heterojunction device to be measured.

[0079] According to the embodiments of the present disclosure, based on the equivalent circuit model corresponding to the heterojunction device to be tested and according to the selected bias voltage range, the capacitance-frequency characteristics of the heterojunction device to be tested under different bias voltages can be obtained, and for each capacitance-frequency characteristic of the heterojunction device to be tested, according to the change trend of the capacitance-frequency characteristic, the capacitance-voltage characteristic of the heterojunction device to be tested can be obtained, so that the carrier concentration at different frequencies can be obtained by performing data processing on the capacitance-voltage characteristic of the heterojunction device to be tested, so as to obtain the interface state concentration of the heterojunction device to be tested according to the carrier concentration at different frequencies, so that the interface state concentration of the heterojunction device at different frequencies can be obtained without damaging the device structure, so as to characterize the passivation effect of the heterojunction on the semiconductor device.

[0080] Figure 4 The flowchart for obtaining the capacitance-frequency characteristics of the heterojunction device to be tested according to an embodiment of the present disclosure is schematically shown.

[0081] like Figure 4 As shown, the method 400 includes operations S410 to S430.

[0082] In operation S410, a current-voltage characteristic of the heterojunction device to be tested is obtained by testing.

[0083] According to the embodiments of the present disclosure, when the voltage applied to the heterojunction device to be tested is relatively large, the current of the heterojunction device to be tested will also be relatively large, thereby affecting the accuracy of subsequent measurements of CV and CF characteristics. Therefore, it is necessary to first test the current characteristics of the heterojunction device to be tested, that is, the current-voltage characteristics of the heterojunction device to be tested, so as to obtain the bias voltage range under a smaller current range and reduce the influence of excessive current on the accuracy of subsequent measurement characteristics.

[0084] Among them, the current characteristics of the heterojunction device to be tested may include forward current characteristics and reverse current characteristics (dark current). The forward current characteristics can be ignored because a slight change in voltage in the forward current characteristics will cause a large change in current; the reverse current characteristics will have a zero negative effect and a small reverse bias voltage. If the reverse bias voltage is too large, it will cause too much dark current.

[0085] In operation S420, based on the current-voltage characteristic of the heterojunction device to be tested, a bias voltage range for testing the capacitance-frequency characteristic of the heterojunction device to be tested is selected while ensuring that the current is sufficiently small.

[0086] According to the embodiments of the present disclosure, a bias voltage range for testing the capacitance-frequency characteristics of the heterojunction device to be tested can be selected based on the current-voltage characteristics of the heterojunction device to be tested, while ensuring that the current is small enough, wherein the bias voltage range is generally around 0 to -1V.

[0087] In operation S430, a capacitance-frequency characteristic of the heterojunction device to be tested under a target bias voltage is obtained according to the selected bias voltage range of the heterojunction device to be tested.

[0088] According to an embodiment of the present disclosure, the target bias voltage may represent a bias voltage value within a bias voltage range.

[0089] According to the embodiments of the present disclosure, a target bias voltage for testing the heterojunction device to be tested can be selected based on the bias voltage range of the selected heterojunction device to be tested, so as to obtain the capacitance-frequency characteristics under the target bias voltage, that is, target bias voltages can be selected one by one from the bias voltage range in turn, and the capacitance-frequency characteristics of the heterojunction device to be tested under different target bias voltages can be obtained by testing respectively.

[0090] According to the embodiments of the present disclosure, the current-voltage characteristics of the heterojunction device to be tested can be first obtained through the equivalent circuit model of the heterojunction device to be tested, so that the bias voltage range for testing the capacitance-frequency characteristics of the heterojunction device to be tested can be obtained under the premise of ensuring that the current is small enough, so as to obtain the capacitance-frequency characteristics of the heterojunction device to be tested under different target bias voltages, so as to determine the frequency of measuring the capacitance-voltage characteristics according to the capacitance-frequency characteristics, thereby improving the accuracy of the subsequent measured capacitance-voltage characteristics.

[0091] According to an embodiment of the present disclosure, based on the current-voltage characteristics of the heterojunction device to be tested, on the premise that the current is small enough, a bias voltage range for testing the capacitance-frequency characteristics of the heterojunction device to be tested is selected, including: based on the current-voltage characteristics of the heterojunction device to be tested, on the premise that the current is small enough, obtaining the bias voltage range for testing the capacitance-voltage characteristics of the heterojunction device to be tested; based on the bias voltage range of the capacitance-voltage characteristics, testing the capacitance-voltage characteristic curve of the heterojunction device to be tested at a target frequency; and determining the bias voltage range for testing the capacitance-frequency characteristics of the heterojunction device to be tested based on the change trend of the capacitance-voltage characteristic curve at the target frequency.

[0092] According to the embodiments of the present disclosure, after the dark-state IV characteristic (reverse current characteristic) test is completed, a CV characteristic scan may be performed based on the dark-state IV characteristic to obtain a capacitance-voltage characteristic curve of the heterojunction device to be tested.

[0093] The obtained CV characteristic curve is only a rough characteristic curve, not a precise CV characteristic.

[0094] According to the embodiments of the present disclosure, based on the current-voltage characteristics of the heterojunction device to be tested, the bias voltage range for testing the capacitance-voltage characteristics of the heterojunction device to be tested can be obtained while ensuring that the current is sufficiently small, so that the capacitance-voltage characteristic curve of the heterojunction device to be tested at the target frequency can be tested based on the bias voltage range of the capacitance-voltage characteristics.

[0095] The target frequency can represent a random high-frequency AC signal.

[0096] According to the embodiments of the present disclosure, a voltage range in which the capacitance change is relatively stable can be selected according to the change trend of the capacitance-voltage characteristic curve to determine the bias voltage range of the capacitance-frequency characteristic of the heterojunction device to be tested.

[0097] According to the embodiments of the present disclosure, the approximate capacitance-voltage characteristic curve of the heterojunction device to be tested can be first obtained based on the current-voltage characteristics of the heterojunction device to be tested, so as to determine the bias voltage range for testing the capacitance-frequency characteristics of the heterojunction device to be tested based on the change trend of the high capacitance-voltage characteristic curve, so as to facilitate the subsequent acquisition of the capacitance-frequency characteristics of the heterojunction device to be tested based on the bias voltage range.

[0098] According to an embodiment of the present disclosure, for each capacitance-frequency characteristic of the heterojunction device to be tested, the capacitance-voltage characteristic of the heterojunction device to be tested is obtained according to the variation trend of the capacitance-frequency characteristic, including: obtaining a low-frequency AC small signal frequency and a high-frequency AC small signal frequency for testing the capacitance-voltage characteristic of the heterojunction device to be tested according to the variation trend of the capacitance-frequency characteristic of the heterojunction device to be tested; and respectively obtaining the capacitance-voltage characteristic of the heterojunction device to be tested at the low-frequency AC small signal frequency and the capacitance-voltage characteristic at the high-frequency AC small signal frequency.

[0099] According to the embodiments of the present disclosure, the AC small signal frequency that characterizes the capacitance-voltage characteristic of the heterojunction device to be tested can be obtained according to the variation trend of the capacitance-frequency characteristic of the device obtained. According to the variation of capacitance and frequency in the capacitance-frequency characteristic curve, it is necessary to select capacitance and frequency values ​​with relatively stable frequency on the capacitance-frequency characteristic curve.

[0100] Among them, there will be a stable low frequency band and a stable high frequency band in the capacitance-frequency characteristic curve. There is also an interval in the capacitance-frequency characteristic curve where the capacitance changes with the frequency. The subsequent measurement of CV characteristics needs to avoid this interval.

[0101] According to the embodiments of the present disclosure, since the high frequency band and the low frequency band are two stable frequency ranges, the selected frequency has little effect on the test results. A low frequency AC small signal frequency can be randomly selected from the low frequency band, and a high frequency AC small signal frequency can be randomly selected from the high frequency band, so that the capacitance-voltage characteristics of the heterojunction device to be tested at the low frequency AC small signal frequency and the capacitance-voltage characteristics at the high frequency AC small signal frequency can be obtained respectively.

[0102] According to the embodiments of the present disclosure, the low-frequency AC small signal frequency and the high-frequency AC small signal frequency for testing the capacitance-voltage characteristics of the heterojunction device to be tested can be determined based on the acquired capacitance-frequency characteristics, so as to obtain the corresponding capacitance-voltage characteristics at the low-frequency AC small signal frequency and the high-frequency AC small signal frequency, respectively, so that the acquired capacitance-voltage characteristics have higher accuracy.

[0103] According to an embodiment of the present disclosure, the low-frequency AC small signal frequency and the high-frequency AC small signal frequency are both within the frequency range of 1 kHz to 1 MHz.

[0104] According to the embodiments of the present disclosure, Figure 3 Taking the battery 300 shown as an example, when the frequency of the AC small signal of the high potential test of the capacitance of the heterojunction device to be tested at the back electrode metal Mo302 junction of the battery 300 is in the low frequency band, the interface state of the heterojunction can contribute to the capacitance of the device, but when the frequency of the test signal is in the high frequency band, especially when the frequency of the signal is close to 1MHz, the speed of the interface state exchanging carriers cannot keep up with the changes of the AC signal. Therefore, when using a high-frequency signal to test the capacitance of the device, the interface state of the device does not participate in the exchange of carriers. It can be seen that the test frequency range needs to be set to 1kHz to 1MHz, that is, the low-frequency AC small signal frequency and the high-frequency AC small signal frequency are both in the frequency range of 1kHz to 1MHz.

[0105] According to the embodiments of the present disclosure, both the low-frequency AC small signal frequency and the high-frequency AC small signal frequency are within the frequency range of 1 kHz to 1 MHz, to ensure that the interface states of the heterojunction within this frequency range can contribute to the capacitance of the device.

[0106] Figure 5 The flowchart of the method for characterizing the interface state concentration of a heterojunction device according to an embodiment of the present disclosure is schematically shown.

[0107] like Figure 5 As shown, the method 500 includes operations S510 to S530.

[0108] In operation S510, curve processing is performed on the capacitance-voltage characteristics of the heterojunction device under test at a low-frequency AC small signal frequency and a capacitance-voltage characteristics at a high-frequency AC small signal frequency, respectively, to obtain a first curve corresponding to the low-frequency AC small signal frequency and a second curve corresponding to the high-frequency AC small signal frequency.

[0109] According to an embodiment of the present disclosure, the curve processing can represent the 1 / C2 vs. V curve processing. The 1 / C2 vs. V curve processing can be performed on the capacitance-voltage characteristic at the low-frequency AC small signal frequency and the capacitance-voltage characteristic at the high-frequency AC small signal frequency to obtain the corresponding first curve and second curve.

[0110] In operation S520, linear fitting operations are performed on the first curve and the second curve respectively to obtain a third curve corresponding to the first curve and a fourth curve corresponding to the second curve.

[0111] According to an embodiment of the present disclosure, linear fitting operations may be performed on the first curve and the second curve respectively to obtain the corresponding third curve and fourth curve.

[0112] In operation S530, a carrier concentration corresponding to the low-frequency AC small signal frequency and a carrier concentration corresponding to the high-frequency AC small signal frequency are respectively obtained according to the slope of the third curve and the slope of the fourth curve.

[0113] According to the embodiment of the present disclosure, the curve slopes of the third curve and the fourth curve are respectively related to the carrier concentration, the indirect constant between materials, and the electron charge. Since the indirect constant between materials and the electron charge are two constants, the slope is inversely proportional to the carrier concentration, so that the carrier concentration corresponding to the low-frequency AC small signal frequency and the carrier concentration corresponding to the high-frequency AC small signal frequency can be obtained according to the slope of the third curve and the slope of the fourth curve.

[0114] According to an embodiment of the present disclosure, the acquired data of the device CV characteristics are processed into a 1 / C2 vs. V curve, and a linear fit is performed on the curve to obtain the slope of the curve, thereby obtaining the carrier concentration of the heterojunction device to be tested.

[0115] According to an embodiment of the present disclosure, the interface state concentration of the heterojunction device to be tested is obtained according to the carrier concentrations at different frequencies, including: subtracting the carrier concentration corresponding to the high-frequency AC small signal frequency from the carrier concentration corresponding to the low-frequency AC small signal frequency to obtain the interface state concentration of the heterojunction device to be tested.

[0116] According to an embodiment of the present disclosure, the carrier concentration corresponding to the low-frequency AC small signal frequency can characterize the carrier concentration obtained in the frequency band where the trapped charges contribute to the device capacitance; the carrier concentration corresponding to the high-frequency AC small signal frequency can characterize the carrier concentration obtained in the frequency band where the trapped charges cannot contribute to the device capacitance.

[0117] According to the embodiments of the present disclosure, the interface state density of the heterojunction device can be obtained by subtracting the carrier concentration obtained in the high-frequency region from the carrier concentration obtained in the low-frequency region.

[0118] Among them, the capacitance-voltage characteristics of the device are tested based on external AC small signals of different frequencies to obtain the carrier concentration in the space charge region under AC small signals of different frequencies. The charge concentration provided by the heterojunction interface state (interface state concentration) can represent the total free carrier concentration in the space charge region minus the carrier concentration contributed by the depletion layer in the space charge region.

[0119] According to the embodiments of the present disclosure, the interface state concentration of the heterojunction device to be tested can be obtained by subtracting the carrier concentration corresponding to the low-frequency AC small signal frequency from the carrier concentration corresponding to the high-frequency AC small signal frequency, so that the interface state concentration of the heterojunction device to be tested can be obtained without losing the device performance.

[0120] According to the embodiments of the present disclosure, the method for characterizing the interface state concentration of a heterojunction device is suitable for characterizing the interface state of a semiconductor heterojunction device, so that the influence mechanism of different preparation process conditions or processing conditions on device performance can be studied by testing the interface state concentration obtained.

[0121] According to the embodiments of the present disclosure, during the capacitance test of the heterojunction device to be tested, it is necessary to eliminate the influence of the external circuit on the capacitance test of the device through calibration, that is, to calibrate the test equipment using a standard capacitor to ensure that the capacitance maintains an accurate value to avoid the capacitance being measured to be directly wrong.

[0122] According to the embodiments of the present disclosure, the CV characteristics of a semiconductor heterojunction device can be tested under the stimulation of different small AC signals to obtain the carrier concentration in the space charge region of the device at different test signal frequencies according to the CV characteristics of the device.

[0123] According to the embodiments of the present disclosure, the interface state concentration between CdS and CIGSe of the CIGSe battery can be detected using the admittance spectroscopy method, so that the interface state concentration of the battery under different growth conditions can be detected without losing the device performance, so as to analyze the mechanism of the influence of different growth conditions on the battery performance, and at the same time, the influence of different passivation methods on the device performance can be detected.

[0124] According to the embodiments of the present disclosure, when testing the interface state concentration of a device through admittance spectroscopy, the introduction of other electrical devices (resistors, capacitors) should be minimized as much as possible, that is, strict calibration should be performed to reduce the influence of other battery devices on its characterization results.

[0125] Based on the above-mentioned method for characterizing the interface state concentration of a heterojunction device, the present disclosure also provides a device for characterizing the interface state concentration of a heterojunction device. Figure 6 The device is described in detail.

[0126] Figure 6 The structural block diagram of the device for characterizing the interface state concentration of a heterojunction device according to an embodiment of the present disclosure is schematically shown.

[0127] like Figure 6 As shown, the device 600 for characterizing the interface state concentration of a heterojunction device of this embodiment includes a first acquisition module 610 , a second acquisition module 620 , an acquisition module 630 and a third acquisition module 640 .

[0128] The first acquisition module 610 is used to acquire the capacitance-frequency characteristics of the heterojunction device under different bias voltages based on the equivalent circuit model corresponding to the heterojunction device under test and according to the selected bias voltage range, wherein the equivalent circuit model of the heterojunction device under test is established according to the electrical characteristics of each region of the heterojunction device under test. In one embodiment, the first acquisition module 610 can be used to perform the operation S210 described above, which will not be repeated here.

[0129] The second acquisition module 620 is used to acquire the capacitance-voltage characteristic of the heterojunction device to be tested according to the variation trend of the capacitance-frequency characteristic for each capacitance-frequency characteristic of the heterojunction device to be tested. In one embodiment, the second acquisition module 620 can be used to perform the operation S220 described above, which will not be described in detail here.

[0130] The acquisition module 630 is used to process the capacitance-voltage characteristics of the heterojunction device to be measured to obtain the carrier concentration at different frequencies. In one embodiment, the acquisition module 630 can be used to perform the operation S230 described above, which will not be repeated here.

[0131] The third acquisition module 640 is used to acquire the interface state concentration of the heterojunction device to be tested according to the carrier concentration at different frequencies. In one embodiment, the third acquisition module 640 can be used to perform the operation S240 described above, which will not be described in detail here.

[0132] According to an embodiment of the present disclosure, the first acquisition module 610 includes a testing unit, a selection unit, and a first acquisition unit.

[0133] The test unit is used to test and obtain the current-voltage characteristics of the heterojunction device to be tested.

[0134] The selection unit is used to select a bias voltage range for testing the capacitance-frequency characteristic of the heterojunction device to be tested based on the current-voltage characteristic of the heterojunction device to be tested, while ensuring that the current is small enough.

[0135] The first acquisition unit is used to acquire the capacitance-frequency characteristic of the heterojunction device to be tested under a target bias voltage according to the selected bias voltage range of the heterojunction device to be tested, wherein the target bias voltage represents the bias voltage within the bias voltage range.

[0136] According to an embodiment of the present disclosure, the selection unit includes an acquisition subunit, a test subunit and a determination subunit.

[0137] The acquisition subunit is used to acquire a bias voltage range for testing the capacitance-voltage characteristic of the heterojunction device to be tested based on the current-voltage characteristic of the heterojunction device to be tested, while ensuring that the current is small enough.

[0138] The test subunit is used to test the capacitance-voltage characteristic curve of the heterojunction device to be tested at a target frequency according to the bias voltage range of the capacitance-voltage characteristic.

[0139] The determination subunit is used to determine the bias voltage range for testing the capacitance-frequency characteristic of the heterojunction device to be tested according to the change trend of the capacitance-voltage characteristic curve at the target frequency.

[0140] According to an embodiment of the present disclosure, the second acquisition module 620 includes a second acquisition unit and a third acquisition unit.

[0141] The second acquisition unit is used to acquire the low-frequency AC small signal frequency and the high-frequency AC small signal frequency for testing the capacitance-voltage characteristic of the heterojunction device to be tested according to the variation trend of the capacitance-frequency characteristic of the heterojunction device to be tested.

[0142] The third acquisition unit is used to respectively acquire the capacitance-voltage characteristics of the heterojunction device to be tested at a low-frequency AC small signal frequency and the capacitance-voltage characteristics at a high-frequency AC small signal frequency.

[0143] According to an embodiment of the present disclosure, the obtaining module 630 includes a first obtaining unit, a second obtaining unit and a fourth obtaining unit.

[0144] The first acquisition unit is used to perform curve processing on the capacitance-voltage characteristics of the heterojunction device to be tested at a low-frequency AC small signal frequency and a capacitance-voltage characteristics at a high-frequency AC small signal frequency, respectively, to obtain a first curve corresponding to the low-frequency AC small signal frequency and a second curve corresponding to the high-frequency AC small signal frequency.

[0145] The second obtaining unit is used to perform linear fitting operations on the first curve and the second curve respectively to obtain a third curve corresponding to the first curve and a fourth curve corresponding to the second curve.

[0146] The fourth acquisition unit is used to respectively acquire the carrier concentration corresponding to the low-frequency AC small signal frequency and the carrier concentration corresponding to the high-frequency AC small signal frequency according to the slope of the third curve and the slope of the fourth curve.

[0147] According to an embodiment of the present disclosure, the third acquisition module 640 includes a third obtaining unit.

[0148] The third obtaining unit is used to subtract the carrier concentration corresponding to the frequency of the high-frequency AC small signal from the carrier concentration corresponding to the frequency of the low-frequency AC small signal to obtain the interface state concentration of the heterojunction device to be tested.

[0149] According to an embodiment of the present disclosure, any multiple modules of the first acquisition module 610, the second acquisition module 620, the acquisition module 630, and the third acquisition module 640 can be combined in one module for implementation, or any one of the modules can be split into multiple modules. Alternatively, at least part of the functions of one or more of these modules can be combined with at least part of the functions of other modules and implemented in one module. According to an embodiment of the present disclosure, at least one of the first acquisition module 610, the second acquisition module 620, the acquisition module 630, and the third acquisition module 640 can be at least partially implemented as a hardware circuit, such as a field programmable gate array (FPGA), a programmable logic array (PLA), a system on a chip, a system on a substrate, a system on a package, an application specific integrated circuit (ASIC), or can be implemented by hardware or firmware such as any other reasonable way of integrating or packaging the circuit, or implemented in any one of the three implementation methods of software, hardware, and firmware, or in any appropriate combination of any of them. Alternatively, at least one of the first acquisition module 610 , the second acquisition module 620 , the obtaining module 630 , and the third acquisition module 640 may be at least partially implemented as a computer program module, and when the computer program module is executed, a corresponding function may be performed.

[0150] Figure 7 A block diagram of an electronic device suitable for implementing a method for characterizing interface state concentration of a heterojunction device according to an embodiment of the present disclosure is schematically shown.

[0151] like Figure 7 As shown, the electronic device 700 according to an embodiment of the present disclosure includes a processor 701, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 702 or a program loaded from a storage part 708 into a random access memory (RAM) 703. The processor 701 may include, for example, a general-purpose microprocessor (e.g., a CPU), an instruction set processor and / or a related chipset and / or a special-purpose microprocessor (e.g., an application-specific integrated circuit (ASIC)), etc. The processor 701 may also include an onboard memory for caching purposes. The processor 701 may include a single processing unit or multiple processing units for performing different actions of the method flow according to an embodiment of the present disclosure.

[0152] In RAM 703, various programs and data required for the operation of electronic device 700 are stored. Processor 701, ROM 702 and RAM 703 are connected to each other via bus 704. Processor 701 performs various operations of the method flow according to the embodiment of the present disclosure by executing the program in ROM 702 and / or RAM 703. It should be noted that the program can also be stored in one or more memories other than ROM 702 and RAM 703. Processor 701 can also perform various operations of the method flow according to the embodiment of the present disclosure by executing the program stored in the one or more memories.

[0153] According to an embodiment of the present disclosure, the electronic device 700 may further include an input / output (I / O) interface 705, which is also connected to the bus 704. The electronic device 700 may further include one or more of the following components connected to the input / output (I / O) interface 705: an input portion 706 including a keyboard, a mouse, etc.; an output portion 707 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker, etc.; a storage portion 708 including a hard disk, etc.; and a communication portion 709 including a network interface card such as a LAN card, a modem, etc. The communication portion 709 performs communication processing via a network such as the Internet. A drive 710 is also connected to the input / output (I / O) interface 705 as needed. A removable medium 711, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 710 as needed, so that a computer program read therefrom is installed into the storage portion 708 as needed.

[0154] The present disclosure also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments; or may exist independently without being assembled into the device / apparatus / system. The above computer-readable storage medium carries one or more programs, and when the above one or more programs are executed, the method according to the embodiment of the present disclosure is implemented.

[0155] According to an embodiment of the present disclosure, the computer-readable storage medium may be a non-volatile computer-readable storage medium, for example, may include but is not limited to: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by or in combination with an instruction execution system, an apparatus or a device. For example, according to an embodiment of the present disclosure, a computer-readable storage medium may include the ROM 702 and / or RAM 703 described above and / or one or more memories other than ROM 702 and RAM 703.

[0156] The embodiment of the present disclosure also includes a computer program product, which includes a computer program, and the computer program contains program code for executing the method shown in the flowchart. When the computer program product is run in a computer system, the program code is used to enable the computer system to implement the item recommendation method provided by the embodiment of the present disclosure.

[0157] The above functions defined in the system / device of the embodiment of the present disclosure are performed when the computer program is executed by the processor 701. According to the embodiment of the present disclosure, the system, device, module, unit, etc. described above can be implemented by a computer program module.

[0158] In one embodiment, the computer program may rely on tangible storage media such as optical storage devices, magnetic storage devices, etc. In another embodiment, the computer program may also be transmitted and distributed in the form of signals on a network medium, and downloaded and installed through the communication part 709, and / or installed from the removable medium 711. The program code contained in the computer program may be transmitted using any appropriate network medium, including but not limited to: wireless, wired, etc., or any suitable combination of the above.

[0159] In such an embodiment, the computer program can be downloaded and installed from the network through the communication part 709, and / or installed from the removable medium 711. When the computer program is executed by the processor 701, the above functions defined in the system of the embodiment of the present disclosure are performed. According to the embodiment of the present disclosure, the system, device, means, module, unit, etc. described above can be implemented by a computer program module.

[0160] According to an embodiment of the present disclosure, the program code for executing the computer program provided by the embodiment of the present disclosure can be written in any combination of one or more programming languages. Specifically, these computing programs can be implemented using high-level process and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, Java, C++, python, "C" language or similar programming languages. The program code can be executed entirely on the user computing device, partially on the user device, partially on the remote computing device, or entirely on the remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (for example, using an Internet service provider to connect through the Internet).

[0161] The flow charts and block diagrams in the accompanying drawings illustrate the possible architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each box in the flow chart or block diagram can represent a module, a program segment, or a part of a code, and the above-mentioned module, program segment, or a part of a code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flow chart, and the combination of the boxes in the block diagram or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0162] It will be appreciated by those skilled in the art that the features described in the various embodiments and / or claims of the present disclosure may be combined and / or combined in a variety of ways, even if such combinations and / or combinations are not explicitly described in the present disclosure. In particular, the features described in the various embodiments and / or claims of the present disclosure may be combined and / or combined in a variety of ways without departing from the spirit and teachings of the present disclosure. All of these combinations and / or combinations fall within the scope of the present disclosure.

[0163] The embodiments of the present disclosure are described above. However, these embodiments are only for illustrative purposes and are not intended to limit the scope of the present disclosure. Although the embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage. The scope of the present disclosure is defined by the attached claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art may make a variety of substitutions and modifications, which should all fall within the scope of the present disclosure.

Claims

1. A method for characterizing the interface state concentration of a heterojunction device, comprising: Based on an equivalent circuit model corresponding to the heterojunction device to be tested, and according to a selected bias voltage range, obtaining the capacitance-frequency characteristics of the heterojunction device to be tested under different bias voltages, wherein the equivalent circuit model of the heterojunction device to be tested is established according to the electrical characteristics of each region of the heterojunction device to be tested; For each capacitance-frequency characteristic of the heterojunction device to be tested, according to a change trend of the capacitance-frequency characteristic, obtaining a capacitance-voltage characteristic of the heterojunction device to be tested; Performing data processing on the capacitance-voltage characteristics of the heterojunction device to be tested to obtain carrier concentrations at different frequencies; and The interface state concentration of the heterojunction device to be tested is obtained according to the carrier concentrations at the different frequencies.

2. The method according to claim 1, wherein: The method of obtaining the capacitance-frequency characteristics of the heterojunction device under different bias voltages based on an equivalent circuit model corresponding to the heterojunction device under test and according to a selected bias voltage range comprises: Testing and obtaining the current-voltage characteristics of the heterojunction device to be tested; According to the current-voltage characteristics of the heterojunction device to be tested, under the premise of ensuring that the current is sufficiently small, selecting a bias voltage range for testing the capacitance-frequency characteristics of the heterojunction device to be tested; and According to the selected bias voltage range of the heterojunction device to be tested, the capacitance-frequency characteristic of the heterojunction device to be tested under a target bias voltage is obtained, wherein the target bias voltage represents the bias voltage within the bias voltage range.

3. The method according to claim 2, wherein: The step of selecting a bias voltage range for testing the capacitance-frequency characteristics of the heterojunction device to be tested based on the current-voltage characteristics of the heterojunction device to be tested, while ensuring that the current is sufficiently small, includes: According to the current-voltage characteristic of the heterojunction device to be tested, under the premise of ensuring that the current is small enough, obtaining a bias voltage range for testing the capacitance-voltage characteristic of the heterojunction device to be tested; Testing the capacitance-voltage characteristic curve of the heterojunction device to be tested at a target frequency according to the bias voltage range of the capacitance-voltage characteristic; and According to the variation trend of the capacitance-voltage characteristic curve at the target frequency, a bias voltage range for testing the capacitance-frequency characteristic of the heterojunction device to be tested is determined.

4. The method according to claim 1, wherein: The step of obtaining the capacitance-voltage characteristic of the heterojunction device to be tested according to the variation trend of each capacitance-frequency characteristic of the heterojunction device to be tested comprises: According to the variation trend of the capacitance-frequency characteristic of the heterojunction device to be tested, obtaining a low-frequency AC small signal frequency and a high-frequency AC small signal frequency for testing the capacitance-voltage characteristic of the heterojunction device to be tested; and The capacitance-voltage characteristics of the heterojunction device to be tested at the low-frequency AC small signal frequency and the capacitance-voltage characteristics at the high-frequency AC small signal frequency are obtained respectively.

5. The method according to claim 4, wherein: The low-frequency AC small signal frequency and the high-frequency AC small signal frequency are both within the frequency range of 1 kHz to 1 MHz.

6. The method according to claim 4, wherein: The step of performing data processing on the capacitance-voltage characteristic of the heterojunction device to be tested to obtain carrier concentrations at different frequencies includes: Performing curve processing on the capacitance-voltage characteristic of the heterojunction device to be tested at the low-frequency AC small signal frequency and the capacitance-voltage characteristic at the high-frequency AC small signal frequency, respectively, to obtain a first curve corresponding to the low-frequency AC small signal frequency and a second curve corresponding to the high-frequency AC small signal frequency; Performing linear fitting operations on the first curve and the second curve respectively to obtain a third curve corresponding to the first curve and a fourth curve corresponding to the second curve; According to the slope of the third curve and the slope of the fourth curve, the carrier concentration corresponding to the low-frequency AC small signal frequency and the carrier concentration corresponding to the high-frequency AC small signal frequency are respectively obtained.

7. The method according to claim 6, wherein: The step of obtaining the interface state concentration of the heterojunction device to be tested according to the carrier concentrations at different frequencies includes: The carrier concentration corresponding to the frequency of the low-frequency AC small signal is subtracted from the carrier concentration corresponding to the frequency of the high-frequency AC small signal to obtain the interface state concentration of the heterojunction device to be measured.

8. A device for characterizing the interface state concentration of a heterojunction device, comprising: A first acquisition module is used to acquire the capacitance-frequency characteristics of the heterojunction device under different bias voltages based on an equivalent circuit model corresponding to the heterojunction device under test and according to a selected bias voltage range, wherein the equivalent circuit model of the heterojunction device under test is established according to the electrical characteristics of each region of the heterojunction device under test; A second acquisition module is used to acquire the capacitance-voltage characteristic of the heterojunction device to be tested according to each capacitance-frequency characteristic of the heterojunction device to be tested; an acquisition module, used for performing data processing on the capacitance-voltage characteristic of the heterojunction device to be tested to obtain carrier concentrations at different frequencies; and The third acquisition module is used to acquire the interface state concentration of the heterojunction device to be tested according to the carrier concentrations at different frequencies.

9. An electronic device, comprising: one or more processors; a storage device for storing one or more programs, When the one or more programs are executed by the one or more processors, the one or more processors are enabled to execute the method according to any one of claims 1 to 7.

10. A computer-readable storage medium having executable instructions stored thereon, which, when executed by a processor, causes the processor to execute the method according to any one of claims 1 to 7.

11. A computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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