ATE-based UIS and Rdson joint test circuit and test method

Abstract

The invention provides a UIS and Rdson combined test circuit and test method based on ATE, and relates to the technical field of integrated circuit test. The invention discloses a UIS and Rdson combined test circuit based on ATE. The UIS and Rdson combined test circuit comprises the ATE, a generation circuit, an amplification circuit and a comparison circuit. The power supply in the generation circuit, the amplification circuit and the comparison circuit is provided by the ATE, and the generation circuit comprises a first high-speed switch group, a second high-speed switch group, an air core inductor, a current detection resistor and a first diode. According to the invention, the current detection resistor, the amplification circuit and the comparison circuit are used to complete replacement and monitoring of current waveforms in the circuit, related programs are written, control of a test circuit power supply and collection of related data and waveforms are realized on an ATE machine table, and the size of avalanche energy and an Rdson test value are accurately obtained. Therefore, the writing number of test items is reduced, the test time is shortened, the test efficiency is improved, and the test cost is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuit testing, and in particular to an ATE-based UIS and Rdson combined testing circuit and testing method. Background Art

[0002] With the continuous development of power electronics technology, especially in the context of the gradual increase in the frequency of modern power electronic circuits, the working environment faced by power switching devices has become increasingly complex and severe. Under high-frequency working conditions, power switching devices need to withstand higher voltage and current change rates, which puts higher requirements on the reliability and performance of the devices. Especially in practical applications, loads usually include loads with significant inductive characteristics such as solenoids and motors, as well as additional stray inductance introduced due to improper circuit design and complex system wiring. These factors will cause voltage overshoot or ringing during the switching process, causing the voltage across the device to instantly exceed its rated operating voltage range, which may cause device damage and ultimately cause power electronic system failure.

[0003] In order to gain a deeper understanding of the performance of power switching devices in such a complex working environment, researchers have designed a variety of test methods, among which the UIS (unclamped inductive load switch) test is the most important one. The UIS test can be used to evaluate the tolerance of power switching devices when encountering high voltage and current shocks, especially the energy tolerance of the device when avalanche breakdown occurs. This test is not only crucial for evaluating the stability of the device, but also can provide valuable data for the design of the device, helping engineers optimize the performance of the device and improve its reliability in harsh working environments. In addition, the Rdson (on-resistance) test of the power switching device is also an important indicator for evaluating its performance. Rdson refers to the resistance value between the drain and the source when the device is in the on state, which directly affects the size of the power loss. The conduction loss of the power switching device is usually closely related to the Rdson value, because the larger the on-resistance, the greater the power loss generated by the device when it is turned on, thereby affecting the overall efficiency of the system. Therefore, accurately measuring the avalanche breakdown energy Rdson value is of great significance to the design and application of power switching devices.

[0004] Most existing test solutions are for testing a single parameter, and it is impossible to obtain two parameters at the same time in the same test process. However, in practical applications, switching power devices often need to withstand high voltage shocks and high on-resistance at the same time, so the test requirements for UIS and Rdson are synchronized. The existing test solutions perform UIS and Rdson tests separately, which has low test efficiency. Summary of the invention

[0005] 1. Technical issues to be solved

[0006] In view of the deficiencies in the prior art, the present invention provides an ATE-based UIS and Rdson combined test circuit and test method, which solves the technical problem of low test efficiency of the existing test scheme.

[0007] (II) Technical solution

[0008] To achieve the above objectives, the present invention is implemented through the following technical solutions:

[0009] In a first aspect, the present invention provides a UIS and Rdson joint test circuit based on ATE, comprising: ATE, a generating circuit, an amplifying circuit and a comparing circuit; wherein the power supply in the generating circuit, the amplifying circuit and the comparing circuit is provided by ATE;

[0010] The generating circuit includes a first high-speed switch group, a second high-speed switch group, an air-core inductor, a current-sense resistor and a first diode.

[0011] The first end of the first high-speed switch group is connected to the control end of the power switch device to be tested;

[0012] The first end of the power switch device to be tested is connected to the first end of the second high-speed switch group via an air-core inductor, and the second end of the second high-speed switch group is connected to the second end of the power switch device to be tested via a current-sense resistor;

[0013] The anode of the first diode is connected to the common end of the current sensing resistor and the second high-speed switch group, and the cathode is connected to the common end of the air-core inductor and the second high-speed switch group;

[0014] The two input terminals of the amplifier circuit are connected to the two ends of the current-sense resistor, and the output terminal is connected to the first input terminal of the comparison circuit. The second input terminal of the comparison circuit is connected to the reference voltage; the output terminal of the comparison circuit is connected to the third terminal of the second high-speed switch group;

[0015] The second end of the first high-speed switch group is connected to the common end of the comparison circuit and the second high-speed switch group;

[0016] The amplifier circuit is used to obtain the current waveform in the circuit, and capture it through ATE related resources to obtain the peak current in the entire avalanche process; the comparison circuit is used to detect the peak current in the circuit. When the peak current is reached, the comparison circuit outputs a negative voltage to control the disconnection of the high-speed switches in the first high-speed switch group and the second high-speed switch group, thereby stopping the voltage supply of the ATE resources, so that the power switch device to be tested enters the off state, and the air-core inductor causes the power switch device to be tested to enter the avalanche breakdown state through discharge. The entire process of avalanche breakdown obtains relevant test data and related waveforms through ATE resources.

[0017] Preferably, the first high-speed switch group includes a first switch tube, a second switch tube and a second resistor;

[0018] Wherein, the first end of the first switch tube is the first end of the first high-speed switch group; the gate of the first switch tube is connected to the first end of the second switch tube, and the second end of the second switch tube is the second end of the first high-speed switch group; the two ends of the second resistor are respectively connected to the second end and the gate of the first switch tube;

[0019] The second end of the first switch tube is connected to the power supply provided by the ATE; the second end of the second switch tube is grounded or at a low voltage.

[0020] Preferably, the first switch tube is a PMOS, and the second switch tube is an NMOS, wherein the first end of the PMOS and the NMOS is a drain, and the second end is a source;

[0021] Alternatively, the first switch tube is a P-channel IGBT, and the second switch tube is an N-channel IGBT, wherein the first end of the P-channel IGBT and the N-channel IGBT is the collector, and the second end is the emitter.

[0022] Preferably, the second high-speed switch group includes a third switch tube, a fourth switch tube and a third resistor;

[0023] Wherein, the first end of the third switch tube is the first end of the second high-speed switch group;

[0024] The gate of the third switch tube is connected to the first end of the fourth switch tube, and the common end thereof is the second end of the second high-speed switch group;

[0025] The gate of the fourth switch tube is the third terminal of the first high-speed switch group;

[0026] Two ends of the third resistor are respectively connected to the second end and the gate of the third switch tube;

[0027] The second end of the third switch tube is connected to the power supply provided by the ATE; the second end of the fourth switch tube is grounded or at a low voltage.

[0028] Preferably, the third switch tube is a PMOS, and the fourth switch tube is an NMOS, wherein the first end of the PMOS and the NMOS is a drain, and the second end is a source;

[0029] Alternatively, the third switch tube is a P-channel IGBT, and the fourth switch tube is an N-channel IGBT, wherein the first end of the P-channel IGBT and the N-channel IGBT is the collector, and the second end is the emitter.

[0030] Preferably, a compensation circuit is further included, and the compensation circuit is used to compensate for the offset error in the amplification circuit.

[0031] In a second aspect, the present invention provides a UIS and Rdson joint test method based on ATE, wherein the UIS and Rdson joint test method is used to control the UIS and Rdson joint test circuit as described above to perform the following steps:

[0032] Use the ATE machine to provide the power required for the test circuit to turn on the device, and select the ATE test board resources according to the parameters of the power switch device to be tested;

[0033] Use a power supply to charge the air-core inductor to reach the peak current of the test;

[0034] Use current sensing resistors and amplifier circuits to monitor the current in the circuit;

[0035] Use a comparison circuit to monitor the peak current under test;

[0036] When the comparator outputs a negative voltage, the power supply is stopped and the power switch device to be tested is controlled to be turned off;

[0037] Use an air-core inductor to discharge and put the power switch device under test into an avalanche state;

[0038] Use ATE equipment to collect test data and waveforms.

[0039] Preferably, when using a current sensing resistor and an amplifier circuit to monitor the current in the circuit, the UIS and Rdson joint testing method further comprises: performing real-time compensation on the amplifier circuit through a compensation circuit.

[0040] Preferably, when the comparator outputs a negative voltage, stopping the supply of power and controlling the shutdown of the power switch device to be tested includes:

[0041] The output voltage of the comparator is detected. When the comparator outputs a negative voltage, the high-speed switch that controls the gate voltage of the device under test and the charging voltage of the air-core inductor is disconnected, the voltage stops supplying, and the device under test enters the shutdown state.

[0042] Preferably, the ATE test board resources include the gate voltage required for the power switch device to be tested, the air-core inductor charging voltage, and the power supply voltage of the comparator and the amplifier.

[0043] (III) Beneficial effects

[0044] The present invention provides a UIS and Rdson combined test circuit and test method based on ATE. Compared with the prior art, it has the following beneficial effects:

[0045] The present invention uses a current-sensing resistor, an amplifier circuit and a comparison circuit to complete the replacement and monitoring of the current waveform in the circuit, and writes relevant programs to control the power supply of the test circuit and collect relevant data and waveforms on an ATE machine, and accurately obtain the size of the avalanche energy and the Rdson test value, thereby reducing the number of test items to be written and the test time, improving the test efficiency and reducing the test cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0047] Figure 1 This is a schematic diagram of a UIS and Rdson joint test circuit based on ATE in Example 1;

[0048] Figure 2 A circuit diagram of a UIS and Rdson joint test circuit based on ATE in Example 1;

[0049] Figure 3 A circuit diagram of a UIS and Rdson combined test circuit based on ATE in Example 1 including a compensation circuit;

[0050] Figure 4 A block diagram of a UIS and Rdson joint test based on ATE in Example 2;

[0051] Figure 5 This is a specific flow chart of step S5 in Example 2. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention are clearly and completely described. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0053] The embodiment of the present application solves the technical problem of low test efficiency of existing test schemes by providing an ATE-based UIS and Rdson joint test circuit and test method, and achieves the ability to simultaneously obtain two key parameters, avalanche energy and Rdson, through one test process, thereby ensuring accuracy and greatly improving test efficiency.

[0054] The technical solution in the embodiment of the present application is to solve the above technical problems, and the overall idea is as follows:

[0055] The UIS test and Rdson test of power switching devices are two important indicators for evaluating the performance of power switching devices. At present, although there are some mature solutions for measuring UIS and Rdson respectively at home and abroad, most of the existing technologies are for testing a single parameter and cannot obtain two parameters at the same time in the same test process. In fact, in practical applications, switching power devices often need to withstand high voltage shocks and high on-resistance at the same time, so the testing requirements for UIS and Rdson are synchronized. If a test method can be designed to test UIS and Rdson at the same time, it will be able to greatly improve the test efficiency, save time and cost, especially in large-scale production or product quality control. It has important economic value. At the same time, it is of great significance to reduce the cost of integrated circuit testing and improve test efficiency.

[0056] In order to solve the above problems, the embodiment of the present invention provides a UIS and Rdson joint test circuit and test method based on ATE. First, voltage is provided to the gate and air-core inductor of the power switch device to be tested through the resources of the ATE machine, so that the power switch device to be tested is turned on. At the same time, the air-core inductor starts to charge, and the voltage across the drain and source of the power switch device to be tested also rises. Then, the current in the circuit is converted into voltage through a high-precision current-sense resistor, and is reasonably amplified through an amplifier. At the same time, a compensation amplifier supplements the amplification circuit. By setting the flip voltage of the comparator, when the set threshold is reached, When the voltage is high, the amplifier output jumps from a positive voltage to a negative voltage. Due to the application of the negative voltage, the high-speed switch that controls the gate input voltage and the air-core inductor charging voltage is turned off, the power switch device to be tested enters the off state, and the air-core inductor charging ends. Since the current in the air-core inductor cannot change suddenly, the air-core inductor will quickly discharge the current into the power switch device to be tested, causing the power switch device to be tested to enter an avalanche breakdown state. The voltage across the drain and source of the power switch device to be tested will be clamped to the breakdown voltage. When the current is reduced to zero, the avalanche breakdown ends, and the voltage across the drain and source of the power switch device to be tested will be reduced to zero.

[0057] During the conduction period of the power switch device to be tested, when the current in the circuit reaches the current condition of the Rdson test, the voltage across the drain and source of the power switch device to be tested can be obtained by controlling the ATE, and then the Rdson value of the power switch device to be tested can be obtained. When the avalanche breakdown is over, the avalanche energy during the avalanche process can be obtained by reading the relevant test parameters through the ATE, and the results can be printed out on the ATE software interface, thereby realizing the simultaneous measurement of the two parameters. This method can effectively shorten the test time, reduce the writing of test items, and improve the test efficiency.

[0058] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0059] Embodiment 1:

[0060] This embodiment provides a UIS and Rdson joint test circuit based on ATE, such as Figure 1 As shown, it includes: ATE, a generating circuit, an amplifying circuit and a comparing circuit; wherein the power supplies in the generating circuit, the amplifying circuit and the comparing circuit are provided by the relevant resources of the ATE;

[0061] The generating circuit includes a first high-speed switch group, a second high-speed switch group, an air-core inductor L, a current-sense resistor R1 and a first diode D1.

[0062] The first end of the first high-speed switch group is connected to the control end of the power switch device to be tested;

[0063] The first end of the power switch device to be tested is connected to the first end of the second high-speed switch group via an air-core inductor L, and the second end of the second high-speed switch group is connected to the second end of the power switch device to be tested via a current-sense resistor R1;

[0064] The anode of the first diode D1 is connected to the common end of the current sensing resistor R1 and the second high-speed switch group, and the cathode is connected to the common end of the air-core inductor and the second high-speed switch group;

[0065] The two input terminals of the amplifier circuit are connected to the two ends of the current-sense resistor, and the output terminal is connected to the first input terminal of the comparison circuit. The second input terminal of the comparison circuit is connected to the reference voltage; the output terminal of the comparison circuit is connected to the third terminal of the second high-speed switch group;

[0066] The second end of the first high-speed switch group is connected to the common end of the comparison circuit and the second high-speed switch group;

[0067] The amplifier circuit is used to obtain the current waveform in the circuit, and capture it through ATE related resources to obtain the peak current in the entire avalanche process; the comparison circuit is used to detect the peak current in the circuit. When the peak current is reached, the comparison circuit outputs a negative voltage to control the disconnection of the high-speed switches in the first high-speed switch group and the second high-speed switch group, thereby stopping the voltage supply of the ATE resources, so that the power switch device to be tested enters the off state, and the air-core inductor causes the power switch device to be tested to enter the avalanche breakdown state through discharge. The entire process of avalanche breakdown obtains relevant test data and related waveforms through ATE resources.

[0068] It should be noted that in Figure 1The power switch device to be tested is an NMOS, whose first end is a drain, the second end is a source, and the control end is a gate. In the specific implementation process, the power switch device to be tested can also be a PMOS, an N-channel IGBT, or a P-channel IGBT. For an IGBT, its first end is a collector, the second end is an emitter, and the control end is a gate. The connection method of an N-channel IGBT or a P-channel IGBT is the same.

[0069] It should be noted that in the implementation process, in the joint test, the current and test frequency are relatively large, and ordinary inductors may saturate under high current conditions, resulting in changes in inductance value. Air-core inductors will not saturate and can maintain consistent inductance values ​​over a wider current range. In addition, ordinary inductors tend to concentrate magnetic fields and generate electromagnetic interference, while air-core inductors reduce the generation of electromagnetic interference and avoid magnetic saturation.

[0070] It should be noted that if Figure 1 In the embodiment, the amplifying circuit adopts an amplifier, and the comparing circuit adopts a comparator.

[0071] like Figure 2 As shown, the first high-speed switch group and the second high-speed switch group both include PMOS, NMOS and some resistors. Since it is a high-end drive, PMOS should be used at one end connected to the power switch device to be tested. Since the power supply voltage is relatively large, in order to ensure the switching speed of PMOS, it is necessary to match NMOS for level conversion to drive the on and off of PMOS. During operation, when the amplifier output is high level, NMOS is turned on, so that the G pole level of PMOS is pulled down to 0, there is a voltage difference between SG of PMOS, so that PMOS is turned on, the power switch device to be tested is turned on, and the power supply can charge the air inductor. When the amplifier output is low level, NMOS is turned off, so that the G pole level of PMOS is pulled up to the power supply voltage through the resistor, there is no voltage difference between SG of PMOS, so that PMOS is turned off, the power switch device to be tested is turned off, and the power supply stops charging the air inductor. At this time, the current drops rapidly and enters the power switch device to be tested, so that the power switch device to be tested enters an avalanche breakdown state. In the specific implementation process, PMOS is changed to P-channel IGBT, NMOS is changed to N-channel IGBT, SG corresponds to EG, and the connection method is to change the source to the emitter of IGBT, and the drain to the collector of IGBT.

[0072] like Figure 3As shown, in the specific implementation process, in order to avoid the detection error caused by the offset error of the amplifier in the amplification circuit, the UIS and Rdson joint test circuit also includes a compensation circuit, which is an amplifier (for the convenience of description, the amplifier in the amplification circuit is called the first amplifier, and the amplifier in the compensation circuit is called the second amplifier), and the inverting input end of the second amplifier is connected to the non-inverting input end of the first amplifier. Two connection ports A and B are sequentially arranged on the connection line between the output end of the first amplifier and the inverting input end of the comparator (that is, A is close to the first amplifier, and B is closer to the stronger), the output end of the second amplifier is connected to the A connection port, and the inverting input end of the second amplifier is connected to the B port.

[0073] Embodiment 2:

[0074] This embodiment provides a UIS and Rdson joint test method based on ATE, which is used to control the UIS and Rdson joint test circuit described in embodiment 1 to perform the following steps: Figure 4 The steps shown in the figure complete the joint test of UIS and Rdson. The steps to be performed are as follows:

[0075] S1. Use the ATE machine to provide the power required for the test circuit to turn on the device, and select the ATE test board resources according to the parameters of the power switch device to be tested;

[0076] S2. Use a power supply to charge the air-core inductor to reach the peak current of the test;

[0077] S3, using a current sensing resistor and an amplifier circuit to monitor the current in the circuit;

[0078] S4, using a comparison circuit to monitor the peak current during the test;

[0079] S5. When the comparator outputs a negative voltage, the power supply is stopped and the power switch device to be tested is turned off;

[0080] S6, using an air-core inductor to discharge, so that the power switch device to be tested enters an avalanche state;

[0081] S7. Use ATE machine to collect test data and waveform.

[0082] The following is a detailed description of each step:

[0083] In step S1, the ATE machine is used to provide the power required for the test circuit to turn on the device, and the ATE test board resources are selected according to the parameters of the power switch device to be tested. The specific implementation process is as follows:

[0084] First, according to the voltage provided by each part of the test circuit and the accuracy of the required test data, select the appropriate ATE test board resources, configure these boards on the ATE machine, and connect the ATE test resources to the circuit to be tested.

[0085] Then, the power-on of different boards of the ATE machine is controlled through software programming, including the turn-on voltage of the gate of the power switch device to be tested, the charging voltage of the air-core inductor connected to the drain of the power switch device to be tested, and the supply voltage of the amplifier and comparator.

[0086] Finally, software programming is used to control different boards of the ATE machine to obtain test circuit related data, including the output voltage of the amplifier and the voltage across the drain and source.

[0087] In step S2, a power supply is used to charge the air-core inductor to reach the peak current of the test. The specific implementation process is as follows:

[0088] During the on-time period under test, the ATE machine resources are connected to the air-core inductor and a voltage is provided. Current begins to flow through the air-core inductor. This current does not change instantaneously because the air-core inductor has the characteristic of resisting current changes. Air-core inductors have an important physical property called self-inductance. When current begins to flow through an air-core inductor, the change in current generates a magnetic field in the air-core inductor. According to Faraday's law of electromagnetic induction, the change in the magnetic field generates a reverse electromotive force (i.e., induced electromotive force), which resists the change in current. Due to the air-core inductor's resistance to current changes, the current does not immediately reach the maximum value of the power supply, but gradually increases until it reaches the peak current required for the test.

[0089] In step S3, a current sensing resistor and an amplifier circuit are used to monitor the current in the circuit. The specific implementation process is as follows:

[0090] It should be noted that, in the specific implementation process, in order to improve the detection accuracy, a compensation circuit is used to perform real-time compensation on the amplification circuit through negative feedback.

[0091] A high-precision current-sense resistor is connected to the source of the power switching device to be tested. Since the charging current of the air-core inductor will also flow through the high-precision current-sense resistor, the current in the circuit is converted into voltage through the high-precision current-sense resistor, which is convenient for observation and capture of the test. By setting a reasonable resistance size, the voltage across the current-sense resistor is amplified, and a compensation amplifier with extremely small offset voltage is selected. The amplifier circuit is compensated through negative feedback to make the output waveform more accurate, and the current waveform is replaced by a voltage waveform, and connected to the comparator circuit.

[0092] The ATE resource is connected to the amplifier output, and the amplifier waveform is obtained through programming, thereby obtaining the current waveform in the circuit. At the same time, the output of the amplifier is connected to the comparator, so that the comparator can compare the voltage in real time.

[0093] In step S4, a comparison circuit is used to monitor the peak current in the test. The specific implementation process is as follows:

[0094] The output of the amplifier is connected to the input of the comparator. When the output voltage of the amplifier does not reach the flip voltage set by the comparator, the amplifier outputs a positive voltage to control the high-speed switch closing of the gate voltage of the power switching device to be tested and the charging voltage of the air-core inductor, and the voltage is provided normally. When the output voltage of the amplifier is equal to the flip voltage set by the amplifier, the comparator immediately outputs a negative voltage.

[0095] In step S5, when the comparator outputs a negative voltage, the power supply is stopped and the power switch device to be tested is controlled to be turned off. The specific implementation process is as follows:

[0096] When the comparator outputs a negative voltage, the high-speed switch that controls the gate voltage of the power switch device to be tested and the charging voltage of the air-core inductor is disconnected, the voltage stops supplying, and the power switch device to be tested enters the off state. The specific flow chart is as follows Figure 5 shown.

[0097] The high-speed switch is composed of two MOS tubes. The NMOS is connected to the amplifier output, and the PMOS is connected to the NMOS and the air-core inductor charging voltage. The drain of the NMOS is connected to the gate of the PMOS through a resistor. When the amplifier output voltage is positive, the NMOS is turned on, and through a resistor, the gate voltage of the PMOS is pulled down to a low voltage, and a voltage difference is generated across the gate and source of the PMOS. The PMOS is turned on and the air-core inductor is charged. When the amplifier output voltage is negative, the NMOS is turned off, and the voltage across the resistor approaches a large voltage, which pulls up the gate voltage of the PMOS. There is no voltage difference across the gate and source of the PMOS, and the PMOS is turned off, and the ATE stops charging the air-core inductor.

[0098] In step S6, an air-core inductor is used for discharge to make the power switch device to be tested enter an avalanche state. The specific implementation process is as follows:

[0099] When the high-speed switch is turned off, the air-core inductor stops charging, the magnetic field inside the air-core inductor begins to collapse, and the current stored in the air-core inductor cannot change suddenly, causing the current to flow out of the air-core inductor. The current in the air-core inductor will gradually decrease according to the principle of energy conservation, and this discharge process usually exhibits exponential decay. Since the air-core inductor discharge circuit contains a freewheeling diode, the current will flow through the circuit path of the power switch device to be tested and the freewheeling diode.

[0100] Since the power switch device under test cannot withstand the fast-discharged current pulse, it will be forced to enter an avalanche breakdown state. At this time, the voltage across the drain and source of the power switch device under test will quickly rise to the breakdown voltage, and the current of the air-core inductor will drop rapidly. The duration of the avalanche breakdown is consistent with the current reduction time.

[0101] ATE resources are connected to the drain and source ends of the power switch device to be tested to obtain the waveform of the entire UIS test process, and the duration of the avalanche process and the magnitude of the breakdown voltage during the avalanche process are obtained through the program.

[0102] In step S7, the test data and waveform are collected using an ATE machine. The specific implementation process is as follows:

[0103] ATE resources are connected to the drain and source ends of the power switch device to be tested to obtain the waveform of the entire UIS test process. By reading the test waveform, the voltage across the drain and source ends of the power switch device to be tested when the specified current is reached in the Rdson test can be obtained, and then the Rdson value can be obtained. By reading the test waveform and the program to obtain the duration of the avalanche process and the magnitude of the breakdown voltage during the avalanche process, the magnitude of the avalanche energy borne by the power switch device to be tested during the avalanche process can be calculated, which proves the effectiveness of the embodiment of the present invention.

[0104] The embodiment of the present invention can flexibly set reasonable parameters according to the different power switch devices to be tested, so as to realize the joint test of UIS and Rdson for different power switch devices to be tested. By comparing the avalanche energy obtained by measuring UIS alone and the data of measuring Rdson alone, the test accuracy of avalanche energy and Rdson of different devices can be controlled within the error range.

[0105] In summary, compared with the prior art, the present invention has the following beneficial effects:

[0106] The embodiment of the present invention uses a current sensing resistor, an amplifier circuit and a comparison circuit to complete the replacement and monitoring of the current waveform in the circuit, and writes relevant programs to control the power supply of the test circuit and collect relevant data and waveforms on an ATE machine, and accurately obtain the size of the avalanche energy and the Rdson test value, thereby reducing the number of test items to be written and the test time, improving test efficiency and reducing test costs.

[0107] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0108] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A UIS and Rdson joint test circuit based on ATE, characterized in that: include: ATE, a generating circuit, an amplifying circuit and a comparing circuit; wherein the power supplies in the generating circuit, the amplifying circuit and the comparing circuit are provided by ATE; The generating circuit includes a first high-speed switch group, a second high-speed switch group, an air-core inductor, a current-sense resistor and a first diode. The first end of the first high-speed switch group is connected to the control end of the power switch device to be tested; The first end of the power switch device to be tested is connected to the first end of the second high-speed switch group via an air-core inductor, and the second end of the second high-speed switch group is connected to the second end of the power switch device to be tested via a current-sense resistor; The anode of the first diode is connected to the common end of the current sensing resistor and the second high-speed switch group, and the cathode is connected to the common end of the air-core inductor and the second high-speed switch group; The two input terminals of the amplifier circuit are connected to the two ends of the current-sense resistor, and the output terminal is connected to the first input terminal of the comparison circuit. The second input terminal of the comparison circuit is connected to the reference voltage; the output terminal of the comparison circuit is connected to the third terminal of the second high-speed switch group; The second end of the first high-speed switch group is connected to the common end of the comparison circuit and the second high-speed switch group; The amplifier circuit is used to obtain the current waveform in the circuit, and capture it through ATE related resources to obtain the peak current in the entire avalanche process; the comparison circuit is used to detect the peak current in the circuit. When the peak current is reached, the comparison circuit outputs a negative voltage to control the disconnection of the high-speed switches in the first high-speed switch group and the second high-speed switch group, thereby stopping the voltage supply of the ATE resources, so that the power switch device to be tested enters the off state, and the air-core inductor causes the power switch device to be tested to enter the avalanche breakdown state through discharge. The entire process of avalanche breakdown obtains relevant test data and related waveforms through ATE resources.

2. The ATE-based UIS and Rdson joint test circuit according to claim 1, characterized in that: The first high-speed switch group includes a first switch tube, a second switch tube and a second resistor; Wherein, the first end of the first switch tube is the first end of the first high-speed switch group; the gate of the first switch tube is connected to the first end of the second switch tube, and the second end of the second switch tube is the second end of the first high-speed switch group; the two ends of the second resistor are respectively connected to the second end and the gate of the first switch tube; The second end of the first switch tube is connected to the power supply provided by the ATE; the second end of the second switch tube is grounded or at a low voltage.

3. The ATE-based UIS and Rdson joint test circuit as claimed in claim 2, characterized in that: The first switch tube is a PMOS, and the second switch tube is an NMOS, wherein the first end of the PMOS and the NMOS is a drain, and the second end is a source; Alternatively, the first switch tube is a P-channel IGBT, and the second switch tube is an N-channel IGBT, wherein the first end of the P-channel IGBT and the N-channel IGBT is the collector, and the second end is the emitter.

4. The ATE-based UIS and Rdson joint test circuit according to claim 1, characterized in that: The second high-speed switch group includes a third switch tube, a fourth switch tube and a third resistor; Wherein, the first end of the third switch tube is the first end of the second high-speed switch group; The gate of the third switch tube is connected to the first end of the fourth switch tube, and the common end thereof is the second end of the second high-speed switch group; The gate of the fourth switch tube is the third terminal of the first high-speed switch group; Two ends of the third resistor are respectively connected to the second end and the gate of the third switch tube; The second end of the third switch tube is connected to the power supply provided by the ATE; the second end of the fourth switch tube is grounded or at a low voltage.

5. The ATE-based UIS and Rdson joint test circuit as claimed in claim 4, characterized in that: The third switch tube is a PMOS, and the fourth switch tube is an NMOS, wherein the first end of the PMOS and the NMOS is a drain, and the second end is a source; Alternatively, the third switch tube is a P-channel IGBT, and the fourth switch tube is an N-channel IGBT, wherein the first end of the P-channel IGBT and the N-channel IGBT is the collector, and the second end is the emitter.

6. The ATE-based UIS and Rdson joint test circuit according to any one of claims 1 to 5, characterized in that: A compensation circuit is also included, and the compensation circuit is used to compensate for offset errors in the amplification circuit.

7. A UIS and Rdson joint testing method based on ATE, characterized in that: The UIS and Rdson joint test method is used to control the UIS and Rdson joint test circuit as described in any one of claims 1 to 6 to perform the following steps: Use the ATE machine to provide the power required for the test circuit to turn on the device, and select the ATE test board resources according to the parameters of the power switch device to be tested; Use a power supply to charge the air-core inductor to reach the peak current of the test; Use current sensing resistors and amplifier circuits to monitor the current in the circuit; Use a comparison circuit to monitor the peak current under test; When the comparator outputs a negative voltage, the power supply is stopped and the power switch device to be tested is controlled to be turned off; Use an air-core inductor to discharge and put the power switch device under test into an avalanche state; Use ATE equipment to collect test data and waveforms.

8. The ATE-based UIS and Rdson joint testing method according to claim 7, characterized in that: When using a current sensing resistor and an amplifier circuit to monitor the current in the circuit, the UIS and Rdson joint testing method further includes: performing real-time compensation on the amplifier circuit through a compensation circuit.

9. The ATE-based UIS and Rdson joint testing method according to claim 7, characterized in that: When the comparator outputs a negative voltage, stopping the supply of power and controlling the shutdown of the power switch device to be tested comprises: The output voltage of the comparator is detected. When the comparator outputs a negative voltage, the high-speed switch that controls the gate voltage of the device under test and the charging voltage of the air-core inductor is disconnected, the voltage stops supplying, and the device under test enters the shutdown state.

10. The ATE-based UIS and Rdson joint testing method according to claim 7, characterized in that: ATE test board resources include the gate voltage required for the power switch device to be tested, the air-core inductor charging voltage, and the power supply voltage of the comparator and amplifier.

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