A local oscillator signal calibration system for radar signal processing

Abstract

This invention provides a local oscillator (LO) signal calibration system for radar signal processing, comprising: an antenna assembly, a radio frequency (RF) transceiver chip, and an FPGA main control chip; the FPGA main control chip is used to implement LO signal calibration; the LO signal calibration includes the following steps: device initialization, switching device operating mode, device operation, and performing FPGA loopback calibration; the FPGA loopback calibration includes: the FPGA main control chip acquiring the initial calibration coefficients of the RF transceiver chip, and performing secondary calibration compensation on the initial calibration coefficients through the FPGA main control chip; the secondary calibration compensation and automatic threshold control are used to adjust the loopback calibration, and the obtained optimal calibration coefficients are written into the calibration coefficient register group corresponding to the RF transceiver chip; this invention, by acquiring the initial calibration coefficients of the RF transceiver chip and then using secondary calibration compensation and automatic threshold control calibration adjustment through the FPGA, maintains good relative calibration capability even when radar transceivers of different types and frequency bands are operating with channel matching.

Description

Technical Field

[0001] This invention belongs to the field of radar signal processing, and specifically relates to a local oscillator signal calibration system for radar signal processing. Background Technology

[0002] In fields such as radar, communications, and medicine, it is necessary to calibrate the local oscillator signal in radar signals.

[0003] In the field of radar signal processing, existing radar signal processing methods such as... Figure 1 As shown, the signal from the RF SOC is sent to the front-end channel through the transmit channel, then up-converted by the channel before being sent to the radar antenna transceiver assembly. There is also a dedicated channel for antenna calibration. The radar signal enters the receive channel of the front-end channel through the receive channel, and then the signal is connected to the receive signal port of the RF SOC via a connector.

[0004] During RF SOC initialization, the SOC generates a calibration signal internally to calibrate the transmit link loopback signal to the receive link. Then it enters the normal operating process. However, RF SOC signal transmission and reception can cause DC local oscillator leakage.

[0005] This leakage is generally caused by factors such as circuit non-idealities, interference between the local oscillator and RF signals, and chip design and layout. Circuit non-idealities are caused by I / Q signal imbalance and DC offset error. Ideally, during quadrature modulation and demodulation of an RF SOC chip, the I-channel (in-phase) and Q-channel (quadrature-phase) signals should be perfectly quadrature and have equal amplitude. However, in actual circuits, due to manufacturing process deviations and inconsistent device parameters, the I / Q signals may exhibit amplitude and phase imbalances. This imbalance causes some energy of the local oscillator signal to leak into the RF signal, resulting in DC local oscillator leakage. DC offset error arises from uncalibrated DC bias in active components within the circuit. These biases cause DC components to be generated during signal transmission. Furthermore, some passive components in the RF system may exhibit leakage current, further increasing the DC offset and leading to DC local oscillator leakage.

[0006] The mutual interference between the local oscillator signal and the radio frequency signal is due to the fact that the entire radio frequency system is composed of multiple sub-units and various connectors connected in series. There may be reasons such as imperfect shielding, signal coupling, and low isolation, which may cause the local oscillator signal to leak or couple into the receiving or transmitting radio frequency path, thus forming or aggravating DC local oscillator leakage.

[0007] Although the leakage can be calibrated and suppressed internally by the SOC chip, the mechanism of the leakage mentioned above suggests that external RF links and radar antenna transceiver links have similar underlying principles. As a result, external RF links and radar antenna transceiver links can degrade the calibration state already completed by the SOC itself. This may cause the SOC to complete its own calibration, but the leakage of the entire link is still not suppressed or the suppression effect is reduced.

[0008] Therefore, a technical solution is needed to optimize the local oscillator signal calibration problem in radar signal processing. Summary of the Invention

[0009] To solve the above problems, the technical solution of the present invention is as follows:

[0010] A local oscillator signal calibration system for radar signal processing includes: an antenna assembly, a radio frequency transceiver chip, and an FPGA main control chip;

[0011] The antenna components include: radar antenna and channel;

[0012] The FPGA main control chip is used to implement local oscillator signal calibration;

[0013] The local oscillator signal calibration includes the following steps:

[0014] Device initialization;

[0015] Switch device operating mode: Adjust the device operating mode to the mode used for local oscillator signal calibration;

[0016] Equipment operation: This includes operating the antenna assembly, RF transceiver chip, and FPGA main control chip;

[0017] Performing FPGA loopback calibration includes: the FPGA main control chip obtains the initial calibration coefficients of the RF transceiver chip, and the FPGA main control chip performs secondary calibration compensation on the initial calibration coefficients; the secondary calibration compensation and automatic threshold control are used to perform loopback calibration adjustment, and the obtained optimal calibration coefficients are written into the calibration coefficient register group corresponding to the RF transceiver chip.

[0018] The device initialization process uses the FPGA main control chip to perform initialization work on the RF transceiver chip and external clock chip through the SPI interface according to the initialization protocol.

[0019] Switching the device's operating mode involves the following steps:

[0020] The FPGA main control chip is used to switch the working mode of the antenna in the antenna assembly to the calibration mode via the SPI channel;

[0021] The FPGA main control chip is used to control the RF transceiver chip to switch its working mode to normal transceiver mode through the SPI channel with the RF transceiver chip.

[0022] The equipment operation includes the following steps:

[0023] The FPGA main control chip configures its own DDS to generate a single-tone signal with the same frequency as the RF chip during the initialization calibration process. The FPGA main control chip then sends this single-tone signal to the RF transceiver chip through the LVDS interface.

[0024] The RF transceiver chip performs digital-to-analog conversion on the single-tone signal and sends it to the antenna through the intermediate frequency (IF) TX RF interface;

[0025] The antenna receives an analog signal through the calibration channel and feeds it back to the receiving link. The analog-to-digital conversion is completed through the RX receiving channel of the RF transceiver chip. The digitized received signal is then returned to the FPGA main control chip through the LVDS interface.

[0026] Performing FPGA loopback calibration includes the following steps:

[0027] S1. The FPGA main control chip reads the complex number of local oscillator calibration coefficients generated in the initialization calibration mode of the RF transceiver chip via SPI.

[0028] S2. The FPGA main control chip performs phase rotation on the complex number of local oscillator calibration coefficients generated by the RF transceiver chip read in step S1 through its internal computing unit; then, it configures the phase-rotated local oscillator calibration coefficients into the RF transceiver chip through the SPI channel.

[0029] S3. The FPGA main control chip continuously performs spectrum analysis on the data returned from the RX channel of the RF transceiver chip, determines the amplitude of its zero-frequency local oscillator signal and records it; if the minimum amplitude is obtained, it proceeds to S4, otherwise it jumps back to S2.

[0030] S4. The FPGA main control chip takes the calibration coefficients determined in S3 for the best calibration effect and writes them into the corresponding calibration coefficient register group of the RF transceiver chip via the SPI channel. This completes the local oscillator signal calibration of the entire device.

[0031] The phase rotation method includes rotating the complex local oscillator calibration coefficient from 0° to 360° in 1° increments.

[0032] Determining the zero-frequency local oscillator signal involves: using a non-fixed zero-frequency local oscillator threshold to judge the calibration and suppression effect of the calibration coefficient after phase adjustment.

[0033] Determining the amplitude of the zero-frequency local oscillator signal involves: recording the amplitude of the zero-frequency local oscillator signal after all degree phase rotations and local oscillator calibration coefficients, and finding the amplitude of the smallest zero-frequency local oscillator signal and its corresponding local oscillator calibration coefficient by iterating through the data.

[0034] The present invention has the following beneficial effects:

[0035] 1) After obtaining the initial calibration coefficients of the RF transceiver chip, the initial calibration coefficients are phase-transformed and then recompensated. Through the primary calibration of the RF SOC plus the secondary calibration compensation and automatic threshold control calibration adjustment performed by the FPGA, the relative calibration capability is still well maintained when different types and frequency bands of radar transceivers and channel matching work.

[0036] 2) The FPGA adaptively adjusts the phase of the calibration coefficients and performs spectral analysis of the RX channel loop signal. It judges the calibration and suppression effect of the calibration coefficients after phase adjustment by using a non-fixed zero-frequency local oscillator threshold, thereby selecting the most suitable calibration coefficients for the hardware running the current program.

[0037] 3) Automatically adapts to suppress and calibrate local oscillator leakage in antennas, channels, and RF circuits under different product conditions. Slight differences caused by different production conditions and environments can be compensated, calibrated, and suppressed for local oscillator leakage of the whole machine using this invention. Attached Figure Description

[0038] Figure 1 Diagram of existing radar signal transmission and reception framework;

[0039] Figure 2 A block diagram illustrating the implementation principle of this invention;

[0040] Figure 3 This is a flowchart of the FPGA loopback calibration process provided in an embodiment of the present invention. Detailed Implementation

[0041] The specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0042] Figure 2 As shown in the figure, a local oscillator signal calibration system for radar signal processing includes an antenna assembly, a radio frequency transceiver chip, and an FPGA main control chip.

[0043] The antenna components include: radar antenna and channel;

[0044] The FPGA main control chip is used to implement local oscillator signal calibration;

[0045] The local oscillator signal calibration includes the following steps:

[0046] 1. Device initialization;

[0047] Furthermore, the device initialization process uses the FPGA main control chip to perform initialization work on the RF transceiver chip and the external clock chip through the SPI interface according to the initialization protocol.

[0048] 2. Switch device operating mode: Adjust the device operating mode to the mode used for local oscillator signal calibration;

[0049] Furthermore, switching the device's operating mode includes the following steps:

[0050] The FPGA main control chip is used to switch the working mode of the antenna in the antenna assembly to the calibration mode via the SPI channel;

[0051] The FPGA main control chip is used to control the RF transceiver chip to switch its working mode to normal transceiver mode through the SPI channel with the RF transceiver chip.

[0052] 3. Equipment operation: This includes operating the antenna assembly, RF transceiver chip, and FPGA main control chip;

[0053] Furthermore, the operation of the equipment includes the following steps:

[0054] The FPGA main control chip configures its own DDS to generate a single-tone signal with the same frequency as the RF chip during the initialization calibration process. The FPGA main control chip then sends this single-tone signal to the RF transceiver chip through the LVDS interface.

[0055] The RF transceiver chip performs digital-to-analog conversion on the single-tone signal and sends it to the antenna through the intermediate frequency (IF) TX RF interface;

[0056] The antenna receives an analog signal through the calibration channel and feeds it back to the receiving link. The analog-to-digital conversion is completed through the RX receiving channel of the RF transceiver chip. The digitized received signal is then returned to the FPGA main control chip through the LVDS interface.

[0057] 4. Perform FPGA loopback calibration, including: the FPGA main control chip acquires the initial calibration coefficients of the RF transceiver chip; the FPGA main control chip performs secondary calibration compensation on the initial calibration coefficients; the secondary calibration compensation and automatic threshold control perform loopback calibration adjustment; and the obtained optimal calibration coefficients are written into the corresponding calibration coefficient register group of the RF transceiver chip. It automatically adapts to local oscillator leakage suppression and calibration for antennas, channels, and RF circuits in different product states; the adaptive calibration frequency and calibration threshold maintain good relative calibration capability even when radar transceivers and channels are matched in different types and frequency bands, and the calibration effect is independent of the capabilities of external application programs.

[0058] Figure 3 The FPGA loopback calibration flowchart provided in this embodiment of the invention is shown in the figure. Performing FPGA loopback calibration includes the following steps:

[0059] S1. The FPGA main control chip reads the complex number of local oscillator calibration coefficients generated in the initialization calibration mode of the RF transceiver chip via SPI.

[0060] S2. The FPGA main control chip performs phase rotation on the complex number of local oscillator calibration coefficients generated by the RF transceiver chip read in step S1 through its internal computing unit; then, it configures the phase-rotated local oscillator calibration coefficients into the RF transceiver chip through the SPI channel.

[0061] The phase rotation method includes rotating the complex local oscillator calibration coefficient from 0° to 360° in 1° increments.

[0062] S3. The FPGA main control chip continuously performs spectrum analysis on the data returned from the RX channel of the RF transceiver chip, determines the amplitude of its zero-frequency local oscillator signal and records it; if the minimum amplitude is obtained, it proceeds to S4, otherwise it jumps back to S2.

[0063] Determining the zero-frequency local oscillator signal involves: using a non-fixed zero-frequency local oscillator threshold to judge the calibration and suppression effect of the calibration coefficient after phase adjustment, thereby selecting the most suitable calibration coefficient for the hardware running the current program.

[0064] Determining the amplitude of the zero-frequency local oscillator signal involves: recording the amplitude of the zero-frequency local oscillator signal after all degree phase rotations and local oscillator calibration coefficients, and finding the amplitude of the smallest zero-frequency local oscillator signal and its corresponding local oscillator calibration coefficient by iterating through the data.

[0065] S4. The FPGA main control chip takes the calibration coefficients determined in S3 for the best calibration effect and writes them into the corresponding calibration coefficient register group of the RF transceiver chip via the SPI channel. This completes the local oscillator signal calibration of the entire device.

[0066] Through the design process and calibration method of this invention, the same software can automatically match and adapt to the hardware states of antennas, channels, and RF links from different manufacturers and in different production states. Utilizing the common calibration modes of antennas and the calibration capabilities of RF transceiver chips, the overall calibration effect is provided and optimized. By using a comprehensive RF transceiver chip combined with the programmable characteristics of an FPGA, the radar transmit / receive link is incorporated into the calibration link, which also includes front-end sensitive RF channel components. Through primary calibration by the RF SOC plus secondary calibration compensation and automatic threshold control calibration adjustment by the FPGA, good relative calibration capability is maintained even when different types and frequency bands of radar transceivers and channels are matched. Adaptive thresholds improve the reliability of calibration under different temperatures and operating conditions. The adaptive calibration frequency and calibration threshold make the calibration effect independent of the capabilities of external programs, allowing the calibration software of this invention to be integrated into the initialization process of existing radar signal processing software. This improves the automation and degree of equipment calibration, reduces calibration effect anomalies and differences caused by hardware differences, and improves the reliability of the overall signal processing software.

[0067] The above-disclosed embodiments are merely a few specific examples of the present invention. However, the present invention is not limited thereto, and any variations that can be conceived by those skilled in the art should fall within the protection scope of the present invention.

Claims

1. A local oscillator signal calibration system for radar signal processing, characterized in that, include: Antenna components, RF transceiver chips, and FPGA main control chips; The antenna components include: radar antenna and channel; The FPGA main control chip is used to implement local oscillator signal calibration; The local oscillator signal calibration includes the following steps: Device initialization; Switch device operating mode: Adjust the device operating mode to the mode used for local oscillator signal calibration; Equipment operation: This includes operating the antenna assembly, RF transceiver chip, and FPGA main control chip; Performing FPGA loopback calibration includes the following steps: S1. The FPGA main control chip reads the complex number of local oscillator calibration coefficients generated in the initialization calibration mode of the RF transceiver chip via SPI. S2. The FPGA main control chip performs phase rotation on the complex number of local oscillator calibration coefficients generated by the RF transceiver chip read in step S1 through its internal computing unit; then, it configures the phase-rotated local oscillator calibration coefficients into the RF transceiver chip through the SPI channel. S3. The FPGA main control chip continuously performs spectrum analysis on the data returned from the RX channel of the RF transceiver chip, determines the amplitude of its zero-frequency local oscillator signal and records it; if the minimum amplitude is obtained, it proceeds to S4, otherwise it jumps back to S2. S4. The FPGA main control chip takes the calibration coefficients that determine the best calibration effect in S3 and writes them into the corresponding calibration coefficient register group of the RF transceiver chip through the SPI channel.

2. The local oscillator signal calibration system for radar signal processing according to claim 1, characterized in that, The device initialization uses the FPGA main control chip via the SPI interface according to the initial... The initialization protocol completes the initialization work for the RF transceiver chip and the external clock chip.

3. The local oscillator signal calibration system for radar signal processing according to claim 1, characterized in that, The switching of the device's operating mode includes the following steps: The FPGA main control chip is used to switch the working mode of the antenna in the antenna assembly to the calibration mode via the SPI channel; The FPGA main control chip is used to control the RF transceiver chip to switch its working mode to normal transceiver mode through the SPI channel with the RF transceiver chip.

4. The local oscillator signal calibration system for radar signal processing according to claim 1, characterized in that, The operation of the device includes the following steps: The FPGA main control chip configures its own DDS to generate a single-tone signal with the same frequency as the RF chip during the initialization calibration process. The FPGA main control chip then sends this single-tone signal to the RF transceiver chip through the LVDS interface. The RF transceiver chip performs digital-to-analog conversion on the single-tone signal and sends it to the antenna through the intermediate frequency (IF) TX RF interface; The antenna receives an analog signal through the calibration channel and feeds it back to the receiving link. The analog-to-digital conversion is completed through the RX receiving channel of the RF transceiver chip. The digitized received signal is then returned to the FPGA main control chip through the LVDS interface.

5. The local oscillator signal calibration system for radar signal processing according to claim 1, characterized in that... The phase rotation method includes rotating the complex local oscillator calibration coefficient from 0° to 360° in 1° increments.

6. The local oscillator signal calibration system for radar signal processing according to claim 1, characterized in that, The determination of its zero-frequency local oscillator signal includes: judging the calibration and suppression effect of the calibration coefficient after phase adjustment by using a non-fixed zero-frequency local oscillator threshold. Break.

7. The local oscillator signal calibration system for radar signal processing according to claim 1, characterized in that, The determination of the amplitude of the zero-frequency local oscillator signal includes: recording the amplitude of the zero-frequency local oscillator signal after all degree phase rotations and local oscillator calibration coefficients, and finding the amplitude of the smallest zero-frequency local oscillator signal and its corresponding local oscillator calibration coefficient by traversing the spectrum.

Images