LCoS display panel and preparation method thereof

Abstract

The invention provides an LCoS display panel and a preparation method thereof, and relates to the technical field of semiconductors, the LCoS display panel comprises a substrate, a driving circuit, an insulating layer, a reflecting layer, a multi-layer dielectric film, an ITO pixel electrode, a first orientation layer, a liquid crystal layer, a second orientation layer, an ITO electrode and a glass substrate which are sequentially stacked, the driving circuit comprises a transistor, and the insulating layer is arranged on the substrate. And the ITO pixel electrode is connected with the transistor. The reflecting layer, the multi-layer dielectric film layer and the ITO pixel electrode are arranged on the whole face, the multi-layer dielectric film layer is located below the ITO pixel electrode, the situation that the voltage of the ITO pixel electrode to the liquid crystal layer is reduced due to voltage division of the multi-layer dielectric film layer can be avoided, and the situation that the switch performance of a device is degraded due to voltage division of the multi-layer dielectric film layer is avoided.

Description

Technical Field

[0001] The present application relates to the technical field of micro-display technology, and in particular to an LCoS display panel and a method for preparing the same. Background Art

[0002] Liquid Crystal on Silicon (LCoS) technology is a reflective display technology based on CMOS (Complementary Metal Oxide Semiconductor). It has the characteristics of high integration, high resolution, and high device aperture ratio, and is widely used in display technology, optical control, and wavelength selection switch. In particular, LCoS reflective display technology modulates the voltage of the electrode layer to deflect the liquid crystal, and then modulates the wavefront amplitude or phase of the external light to meet different application scenarios. Therefore, enhancing the light reflection ability is crucial to improving the display brightness, contrast, color performance, and optical utilization of the LCoS display panel.

[0003] At present, pixel electrodes are generally composed of a reflective metal layer and a multi-layer dielectric film material thereon to enhance the reflectivity of the display panel. However, the dielectric layer is generally composed of two or more layers of materials with different refractive indices, and the sum of their thicknesses is generally less than or equal to one-third of the thickness of the liquid crystal layer. The voltage actually given to the liquid crystal layer by the pixel electrode is reduced due to the voltage division of the dielectric film layer, thereby causing the performance of the LCoS display panel to degrade. Summary of the invention

[0004] The purpose of the embodiments of the present application is to provide an LCoS display panel and a method for manufacturing the same, which can avoid the situation where the voltage from the ITO pixel electrode to the liquid crystal layer is reduced due to the voltage division of the multi-layer dielectric film layer, and effectively improve the performance degradation of the LCoS display panel.

[0005] In one aspect of an embodiment of the present application, a method for preparing an LCoS display panel is provided, comprising a substrate, a driving circuit, an insulating layer, a reflective layer, a multilayer dielectric film, an ITO pixel electrode, a first orientation layer, a liquid crystal layer, a second orientation layer, an ITO electrode and a glass substrate stacked in sequence, wherein the driving circuit comprises a transistor, and the ITO pixel electrode is connected to the transistor.

[0006] Optionally, the transistor is located in the substrate and extends to the surface of the insulating layer, and the ITO pixel electrode is connected to the transistor through the multi-layer dielectric film and the reflective layer.

[0007] Optionally, the multilayer dielectric film and the ITO pixel electrode extend into the reflective layer.

[0008] Optionally, a third via is provided in the multilayer dielectric film, and the ITO pixel electrode is filled in the third via; a second via is provided in the reflective layer, and the multilayer dielectric film is filled in the second via; a first via is provided in the insulating layer and the substrate, and the transistor is provided in the first via, and the aperture of the second via is respectively larger than the aperture of the third via and the aperture of the first via.

[0009] Optionally, the thickness of the reflective layer along the stacking direction is 1000 angstroms to 10000 angstroms.

[0010] Optionally, the multilayer dielectric film includes at least two film layers, and the refractive indices of at least two of the film layers are different.

[0011] Optionally, in the multilayer dielectric film, there is at least one film layer whose optical thickness is not equal to an integer multiple of one quarter of the wavelength, so that the optical path difference of the light after reflection through the multilayer dielectric film is an integer multiple of the wavelength or presents a phase difference of 2nπ with the wavelength, where n is a positive integer.

[0012] Optionally, the material of the liquid crystal layer includes positive liquid crystal material or negative liquid crystal material.

[0013] Another aspect of the embodiments of the present application provides a method for preparing an LCoS display panel, which is used to prepare the above-mentioned LCoS display panel, and the method includes: A driving circuit, an insulating layer, a reflective layer, a multilayer dielectric film, an ITO pixel electrode, and a first alignment layer are sequentially formed on the substrate; An ITO electrode and a second alignment layer are sequentially formed on a glass substrate; The glass substrate and the substrate are aligned and bonded to form a liquid crystal layer between the first alignment layer and the second alignment layer.

[0014] Optionally, the step of sequentially forming a driving circuit, an insulating layer, a reflective layer, a multilayer dielectric film, an ITO pixel electrode, and a first alignment layer on a substrate includes: The driving circuit, the insulating layer, and the reflective layer are sequentially formed on the substrate; A first via hole is opened from the reflective layer toward the substrate, wherein the first via hole extends from the reflective layer into the substrate; Enlarging a hole region of the first via hole located in the reflective layer to form a second via hole in the reflective layer; Disposing a transistor in the first via hole in the insulating layer and the substrate; forming a multi-layer dielectric film on the reflective layer, wherein the multi-layer dielectric film is also filled in the second via hole; The multilayer dielectric film has a third via hole at a position corresponding to the first via hole; forming an ITO pixel electrode on the multilayer dielectric film, wherein the ITO pixel electrode is also filled in the third via hole; The first alignment layer is formed on the surface of the ITO pixel electrode.

[0015] The LCoS display panel and its preparation method provided by the embodiment of the present application include: a substrate, a driving circuit, an insulating layer, a reflective layer, a multi-layer dielectric film, an ITO pixel electrode, a first alignment layer, a liquid crystal layer, a second alignment layer, an ITO electrode and a glass substrate which are stacked in sequence, wherein the driving circuit includes a transistor, and the ITO pixel electrode is connected to the transistor. The reflective layer, the multi-layer dielectric film layer and the ITO pixel electrode are arranged on the whole surface, and the multi-layer dielectric film layer is below the ITO pixel electrode, which can avoid the situation where the voltage from the ITO pixel electrode to the liquid crystal layer is reduced due to the voltage division of the multi-layer dielectric film layer, and the switching performance of the device will not be degraded due to the voltage division of the multi-layer dielectric film layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0017] Figure 1 is a flow chart of a method for preparing an LCoS display panel provided in this embodiment; Figure 2 This is one of the schematic diagrams of the LCoS display panel structure provided in this embodiment; Figure 3 yes Figure 2 A top view of the structural pixel surface in ; Figure 4 This is the second schematic diagram of the LCoS display panel structure provided in this embodiment.

[0018] Icon: 100-substrate; 101-driving circuit; 101a-transistor; 101b-first via; 102-insulating layer; 103-reflective layer; 104-multilayer dielectric film; 105-ITO pixel electrode; 105a-pixel electrode surface; 105b-third via; 201a-first orientation layer; 201b-liquid crystal layer; 201c-second orientation layer; 300-glass substrate; 301-ITO electrode. DETAILED DESCRIPTION

[0019] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application.

[0020] In the description of this application, it should be noted that the terms "inside", "outside", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the product of the application is usually placed when in use, which is only for the convenience of describing this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application. In addition, the terms "first", "second", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0021] It should also be noted that, unless otherwise clearly specified and limited, the terms "disposed" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0022] Please refer to Figure 1 As shown, an embodiment of the present application provides a method for preparing an LCoS display panel, the method comprising: Step 400: forming a driving circuit 101 , an insulating layer 102 , a reflective layer 103 , a multilayer dielectric film 104 , an ITO pixel electrode 105 (ITO is indium tin oxide), and a first alignment layer 201 a on the substrate 100 in sequence.

[0023] The substrate 100 may be any base material for carrying semiconductor circuit components. The substrate 100 may be a wafer or a wafer processed by an epitaxial growth process. Specifically, it may include a silicon on insulator (SOI) substrate, a bulk silicon (Bulk Silicon) substrate, a germanium-based substrate, a germanium silicon-based substrate, an indium phosphide (InP) substrate, a gallium arsenide (GaAs) substrate or a germanium on insulator substrate, etc.

[0024] like Figure 2 As shown, the driving circuit 101 is sequentially formed on the bottom and surface of the substrate 100, and an insulating layer 102 and a reflective layer 103 are sequentially deposited on the surface thereof.

[0025] Then, a first via hole 101b is opened in the reflective layer 103 and the insulating layer 102 to the substrate 100. The first via hole 101b is opened from the reflective layer 103 and the insulating layer 102 to the substrate 100 through an exposure and etching process in the corresponding area of ​​the first via hole 101b. The hole area of ​​the first via hole 101b located in the reflective layer 103 is enlarged to form a second via hole in the reflective layer 103. The first via hole 101b is located in the insulating layer 102 and the substrate 100 to set the transistor 101a, specifically a MOSFET (oxide semiconductor field effect transistor). The aperture of the second via hole of the reflective layer 103 needs to be larger than the aperture of the first via hole 101b to avoid connection.

[0026] Then, the surface of the reflective layer 103 is polished by using a CMP (chemical mechanical polishing) process, and then a multilayer dielectric film 104 with different refractive indices is sequentially deposited, and the multilayer dielectric film 104 is also filled in the hole area of ​​the first via hole 101b located in the reflective layer 103. The material of the multilayer dielectric film 104 is a combination of at least two layers of film layers with high and low refractive indices, and the optical path difference of the external light after being reflected by the above-mentioned film layers of different thicknesses is equal to an integer multiple of the wavelength of the light (or the phase difference is 2nπ, where n is a positive integer), and constructive interference can occur to enhance light reflection.

[0027] Afterwards, a third via hole 105b is opened on the multilayer dielectric film 104 at a position corresponding to the first via hole 101b by an etching process, and an ITO pixel electrode 105 is manufactured by an ITO thin film deposition process. The ITO pixel electrode 105 is also filled in the third via hole 105b, and is polished by a CMP process to ensure that the pixel electrode surface 105a on the multilayer dielectric film 104 is flat, wherein the ITO pixel electrode 105 is connected to the first via hole 101b through the third via hole 105b. The multilayer dielectric film 104 not only serves to separate the ITO pixel electrode 105 from the reflective layer 103, but also protects the reflective layer 103 from being oxidized and damaged. The reflective layer 103 is opened only in the corresponding pixel voltage connection area (the third via hole 105b and the second via hole, the third via hole 105b is filled with the ITO pixel electrode 105, and the second via hole is filled with a multilayer dielectric film), so that the reflective layer 103 structure has no pixel gap, which can effectively avoid the problem of device characteristics and life degradation caused by external light entering the thin film transistor area from the pixel gap, thereby extending the stability of the device.

[0028] Finally, a first alignment layer 201 a is formed on the surface of the ITO pixel electrode 105 .

[0029] The difference between the present application and the prior art is that, firstly, the reflective layer 103 of the present application is evenly laid in the entire display area without pixel gaps, such as Figure 3As shown, most of the external light can be reflected and utilized without entering the driving circuit 101 area to cause the characteristics and life of the MOSFET to decay. Secondly, the multilayer dielectric film 104 is deposited on the reflective layer 103 in sequence, and there will be no pixel gap gap. By digging holes in the multilayer dielectric film 104 and the reflective layer 103 at the corresponding ITO pixel electrode 105 connection position, after the ITO film is deposited, the third via 105b is connected to the first via 101b, and finally connected to one end of the pixel driving MOSFET on the substrate 100. Since the multilayer dielectric film 104 is located below the ITO pixel electrode 105, there is no multilayer dielectric film 104 on the ITO pixel electrode 105 to divide the pressure, which will not cause the performance of the display panel to decay. Then, the pixel electrode surface 105a is polished by CMP process to make an alignment layer. The resulting ITO pixel electrode 105 is thin and has a flat surface, which will not cause edge liquid crystal arrangement disorder.

[0030] Furthermore, the material of the reflective layer 103 includes one or more of aluminum (Al), chromium (Cr), titanium (Ti), gold (Au), silver (Ag), tungsten (W), copper (Cu), germanium (Ge), and silicon (Si).

[0031] The thickness of the reflective layer 103 is 1000 angstroms to 10000 angstroms.

[0032] The multilayer dielectric film 104 is a multilayer structure of at least two layers, which is generally a combination of a high refractive index film layer and a low refractive index film layer.

[0033] The multilayer dielectric film 104 is not limited to a specific material and can be made of silicon oxide (SiO 2 )、Silicon Nitride(Si 3 N 4 )、Magnesium fluoride(MgF 2 ), titanium oxide (TiO 2 )

[0034] In the multilayer dielectric film 104, at least one layer has an optical thickness that is not an integer multiple of one quarter of the design wavelength. By adjusting the thickness of each layer, the optical path difference of light after reflection through each layer is an integer multiple of the light wavelength or a phase difference of 2nπ (n is an integer).

[0035] The diameters of the first via hole 101 b and the third via hole 105 b are both 100 nm to 500 nm.

[0036] The first via hole 101b and the third via hole 105b may be located in the middle of the pixel or at any position on the pixel surface.

[0037] Step 401 : forming an ITO electrode 301 and a second alignment layer 201 c on a glass substrate 300 in sequence.

[0038] An ITO electrode 301 is fabricated on the glass substrate 300 , and a second alignment layer 201 c is fabricated on the surface of the ITO electrode 301 .

[0039] The ITO pixel electrode 105 can be manufactured by using a thin film deposition technology, and its thickness is 100 angstroms to 2000 angstroms.

[0040] The first alignment layer 201a and the second alignment layer 201c can be made of polyimide (PI) or an inorganic alignment layer (SiO 2 )

[0041] The first alignment layer 201a and the second alignment layer 201c are made of different materials depending on the positive or negative liquid crystal used. The present application does not limit the types of alignment layers and liquid crystals used.

[0042] Step 402: Align and bond the glass substrate 300 and the substrate 100 to form a liquid crystal layer 201b between the first alignment layer 201a and the second alignment layer 201c.

[0043] The glass substrate 300 and the substrate 100 are bonded and packaged by an alignment bonding process to produce a VA mode LCoS display panel, wherein the liquid crystal layer 201 b is a negative liquid crystal material.

[0044] It should be particularly noted that, in order to meet the vertical alignment (VA) requirement of negative liquid crystal, the first alignment layer 201 a and the second alignment layer 201 c may be VA PI or an inorganic alignment layer.

[0045] In other embodiments, Figure 4 As shown, the above-mentioned liquid crystal layer 201b can also be positive liquid crystal. Specifically, the same as the above steps, it is only necessary to use positive liquid crystal material as the liquid crystal layer 201b. In order to meet the requirements of positive liquid crystal orientation, the first orientation layer 201a and the second orientation layer 201c can be TN PI; the glass substrate 300 and the substrate 100 are assembled and packaged through an alignment bonding process to produce ECB (Electronic Code Book), OCB (Optically Compensated Birefringence), TN (Twisted Nematic) mode LCoS display panel.

[0046] On this basis, please also refer to Figure 2As shown, the embodiment of the present application further discloses an LCoS display panel, which can be manufactured by any of the above methods for manufacturing an LCoS display panel. The LCoS display panel includes: a substrate 100, a driving circuit 101, an insulating layer 102, a reflective layer 103, a multilayer dielectric film 104, an ITO pixel electrode 105, a first orientation layer 201a, a liquid crystal layer 201b, a second orientation layer 201c, an ITO electrode 301 and a glass substrate 300 stacked in sequence, the driving circuit 101 includes a transistor 101a, and the ITO pixel electrode 105 is connected to the transistor 101a.

[0047] The transistor 101 a is located in the substrate 100 and extends to the surface of the insulating layer 102 . The ITO pixel electrode 105 passes through the multi-layer dielectric film 104 and the reflective layer 103 and is connected to one end of the transistor 101 a .

[0048] A third via hole 105b is provided in the multilayer dielectric film 104, and the third via hole 105b is filled with the ITO pixel electrode 105; a second via hole is provided in the reflective layer 103, and the second via hole is filled with the multilayer dielectric film 104; a first via hole 101b is provided in the insulating layer 102 and the substrate 100, and the transistor 101a is provided in the first via hole 101b, and the aperture of the second via hole is respectively larger than the aperture of the third via hole 105b and the aperture of the first via hole 101b.

[0049] The multilayer dielectric film 104 and the ITO pixel electrode 105 extend into the reflective layer 103, a first via hole 101b is opened in the reflective layer 103 and the insulating layer 102 to the substrate 100, the hole area of ​​the first via hole 101b located in the reflective layer 103 is enlarged to form a second via hole in the reflective layer 103, so that a transistor 101a is set in the first via hole 101b, the second via hole in the reflective layer 103 is filled with the upper multilayer dielectric film 104, and a third via hole 105b is opened in the multilayer dielectric film 104 to fill the ITO pixel electrode 105, so as to form Figure 2 The reflective layer 103 is filled with a multilayer dielectric film 104, and the multilayer dielectric film 104 is filled with an ITO pixel electrode 105, so that the reflective layer 103 is arranged without a pixel gap.

[0050] In some embodiments, the multilayer dielectric film 104 includes at least two film layers, and the at least two film layers have different refractive indices.

[0051] In some embodiments, in the multilayer dielectric film 104, there is at least one film layer whose optical thickness is not equal to an integer multiple of one quarter of the wavelength, so that the optical path difference of the light after reflection through the multilayer dielectric film 104 is an integer multiple of the wavelength or presents a phase difference of 2nπ with the wavelength, where n is a positive integer.

[0052] The LCoS display panel provided in the embodiment of the present application is manufactured by manufacturing a whole-surface reflective layer 103, a multilayer dielectric film 104 and an ITO pixel electrode 105. The multilayer dielectric film 104 is located below the ITO pixel electrode 105. Compared with the existing structure, the multilayer dielectric film 104 can use more combined layers without causing the device switching performance to degrade due to the voltage division of the multilayer dielectric film 104. The whole-surface reflective layer 103 structure is adopted. The reflective layer 103 structure has no pixel gaps and is only opened in the corresponding pixel voltage connection area (the third via hole 105b and the second via hole), which greatly increases the reflective area of ​​the LCoS display panel, and the reflectivity of the LCoS display panel is further increased. Since the reflective layer 103 structure has no pixel gaps, the reflective layer 103 structure has no pixel gaps and is only opened in the corresponding pixel voltage connection area (the third via hole 105b and the second via hole). The pixel gap is small, and external light will not enter the driving circuit 101, causing the performance and life of the MOSFET device to decay due to the photoelectric effect, so the stability of the device is increased; a highly transparent ITO film is used as the ITO pixel electrode 105, and a thicker metal is used as the entire reflective layer 103. Compared with the existing structure, the problem of reduced light utilization caused by the disordered arrangement of liquid crystals due to the gap difference of the thicker reflective layer 103 can be avoided; the reflectivity of the LCoS display panel structure can be further improved without being limited by the number of combinations of the multilayer dielectric film 104, and is compatible with the existing process; an additional layer of ITO pixel electrode 105 needs to be made, which makes the various layers of the structure of the present application significantly different from the traditional structure.

[0053] In addition, a thinner ITO layer may be used as an alternative to the reflective layer 103 as an electrode, so as to avoid problems such as the disorder of liquid crystal arrangement caused by the gap difference, which affects the display and light modulation.

[0054] The LCoS display panel has the same structure and benefits as the method for preparing the LCoS display panel in the aforementioned embodiment. The structure and benefits of the method for preparing the LCoS display panel have been described in detail in the aforementioned embodiment and will not be repeated here.

[0055] The above description is only an embodiment of the present application and is not intended to limit the protection scope of the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. An LCoS display panel, characterized in that: include: A substrate, a driving circuit, an insulating layer, a reflective layer, a multilayer dielectric film, an ITO pixel electrode, a first orientation layer, a liquid crystal layer, a second orientation layer, an ITO electrode and a glass substrate are stacked in sequence. The driving circuit includes a transistor, and the ITO pixel electrode is connected to the transistor.

2. The LCoS display panel according to claim 1, characterized in that: The transistor is located in the substrate and extends to the surface of the insulating layer. The ITO pixel electrode passes through the multi-layer dielectric film and the reflective layer and is connected to the transistor.

3. The LCoS display panel according to claim 2, characterized in that: The multilayer dielectric film and the ITO pixel electrode extend into the reflective layer.

4. The LCoS display panel according to claim 3, characterized in that: A third via hole is provided in the multilayer dielectric film, and the ITO pixel electrode is filled in the third via hole; a second via hole is provided in the reflective layer, and the multilayer dielectric film is filled in the second via hole; A first via hole is disposed in the insulating layer and the substrate, the transistor is disposed in the first via hole, and the aperture of the second via hole is larger than the aperture of the third via hole and the aperture of the first via hole.

5. The LCoS display panel according to any one of claims 1 to 4, characterized in that: The thickness of the reflective layer along the stacking direction is 1000 angstroms to 10000 angstroms.

6. The LCoS display panel according to claim 1, characterized in that: The multilayer dielectric film includes at least two film layers, and the refractive indexes of the at least two film layers are different.

7. The LCoS display panel according to claim 6, characterized in that: In the multilayer dielectric film, there is at least one film layer whose optical thickness is not equal to an integer multiple of one quarter of the wavelength, so that the optical path difference of the light after reflection through the multilayer dielectric film is an integer multiple of the wavelength or presents a phase difference of 2nπ with the wavelength, where n is a positive integer.

8. The LCoS display panel according to claim 1, characterized in that: The material of the liquid crystal layer includes positive liquid crystal material or negative liquid crystal material.

9. A method for preparing an LCoS display panel, used for preparing the LCoS display panel according to any one of claims 1 to 8, characterized in that: The method comprises: A driving circuit, an insulating layer, a reflective layer, a multilayer dielectric film, an ITO pixel electrode, and a first alignment layer are sequentially formed on the substrate; An ITO electrode and a second alignment layer are sequentially formed on a glass substrate; The glass substrate and the substrate are aligned and bonded to form a liquid crystal layer between the first alignment layer and the second alignment layer.

10. The method for preparing an LCoS display panel according to claim 9, characterized in that: The method sequentially forms a driving circuit, an insulating layer, a reflective layer, a multilayer dielectric film, an ITO pixel electrode, and a first alignment layer on a substrate, including: The driving circuit, the insulating layer, and the reflective layer are sequentially formed on the substrate; A first via hole is opened from the reflective layer toward the substrate, wherein the first via hole extends from the reflective layer into the substrate; Enlarging a hole region of the first via hole located in the reflective layer to form a second via hole in the reflective layer; Disposing a transistor in the first via hole in the insulating layer and the substrate; forming a multi-layer dielectric film on the reflective layer, wherein the multi-layer dielectric film is also filled in the second via hole; The multilayer dielectric film has a third via hole at a position corresponding to the first via hole; forming an ITO pixel electrode on the multilayer dielectric film, wherein the ITO pixel electrode is also filled in the third via hole; The first alignment layer is formed on the surface of the ITO pixel electrode.

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