Synchronization exception verification method, verification platform and electronic equipment

By inserting the test binary file to be verified directly into the program file to be run by the processor and generating and executing the verification binary file, the problem of repeated writing programs in the verification of synchronous exception handling mechanism is solved, improving efficiency and ensuring the correctness of processor exception handling.

CN119718323APending Publication Date: 2025-03-28SMARTER SILICON (SHANGHAI) TECH CO LTD
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Patent Information

Application Number
CN202311269266.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-09-27
Publication Date
2025-03-28

AI Technical Summary

Technical Problem

In the verification process of the synchronous exception handling mechanism, it is necessary to write the verification program repeatedly, resulting in a decrease in work efficiency.

Method used

By obtaining and parsing the program file to be run by the processor, inserting the test binary file to be verified into the initial binary file, generating the verification binary file, and performing the test binary file in the verification binary file to determine whether the processor performs synchronous exception processing in accordance with the preset requirements.

Benefits of technology

It implements the insertion of binary files directly without repeated writing of program code, which improves work efficiency and ensures the correctness of exception code processing.

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Abstract

The invention discloses a synchronization exception verification method, a verification platform and electronic equipment, and the method comprises the steps: obtaining and analyzing a to-be-operated program file of a processor, and obtaining a to-be-executed initial binary file; a to-be-verified test binary file is inserted into the initial binary file, a verification binary file inserted into the test binary file is generated, and the test binary file is a binary file for a processor to execute synchronization exception processing; and executing the test binary file in the verification binary file, and determining whether the synchronization exception processing executed by the processor meets a preset requirement or not.
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Description

Technical Field

[0001] The present application relates to the field of verification, and in particular to a synchronization anomaly verification method, a verification platform and an electronic device. Background Art

[0002] The synchronous exception handling mechanism is an important part in the processor, so the verification of the synchronous exception handling mechanism is also crucial.

[0003] Currently, in the verification phase of the synchronization exception handling mechanism, verification programs for different types of synchronization exceptions need to be repeatedly written, which reduces work efficiency. Summary of the invention

[0004] In view of this, the present application provides a synchronization anomaly verification method, a verification platform and an electronic device, and the specific scheme is as follows:

[0005] A synchronous exception verification method, comprising:

[0006] Obtaining and parsing the program file to be run by the processor to obtain the initial binary file to be executed;

[0007] Inserting a test binary file to be verified into the initial binary file to generate a verification binary file inserted into the test binary file, wherein the test binary file is a binary file for the processor to perform synchronous exception processing;

[0008] The test binary file in the verification binary file is executed to determine whether the processor performs synchronization exception processing in accordance with preset requirements.

[0009] Furthermore, it also includes:

[0010] A plurality of test binary files corresponding to different types of processors for processing different types of synchronization exceptions are stored in advance.

[0011] Furthermore, inserting the test binary file to be verified into the initial binary file includes:

[0012] Determining the type of the processor that performs synchronization exception processing to be verified, and determining the type of synchronization exception to be verified;

[0013] Determining a test binary file to be verified based at least on the type of the processor and the type of synchronization exception to be verified;

[0014] The test binary file to be verified is inserted into the initial binary file.

[0015] Furthermore, it also includes:

[0016] Before or at the same time as the test binary file to be verified is inserted into the initial binary file, recording initial state information of the initial binary file;

[0017] After the test binary file is executed in the verification binary file, the initial state information of the initial binary file is restored.

[0018] Furthermore, before or at the same time as the test binary file to be verified is inserted into the initial binary file, recording the initial state information of the initial binary file includes:

[0019] Determine a first position in the initial binary file to insert the test binary file to be verified;

[0020] An information recording file is inserted at the first position, and when the test binary file to be verified is inserted into the initial binary file, initial values ​​of registers in the processor are recorded based on the information recording file.

[0021] Further, the determining whether the processor performs synchronization exception processing in accordance with preset requirements includes:

[0022] Determine that the test binary file to be verified is inserted into a second position in the initial binary file, where the second position is a position in the verification binary file adjacent to a position where the test binary file is inserted;

[0023] Obtaining a third location of a file to be executed after the processor executes the synchronization exception processing;

[0024] Determine whether the third position matches the second position, and determine whether the processor's execution of synchronization exception processing meets preset requirements based on the matching result.

[0025] A verification platform, comprising:

[0026] An acquisition module is used to obtain and parse the program file to be run by the processor to obtain the initial binary file to be executed;

[0027] A file generation module, used for inserting a test binary file to be verified into the initial binary file, and generating a verification binary file inserted into the test binary file, wherein the test binary file is a binary file for the processor to perform synchronous exception processing;

[0028] The execution module is used to execute the test binary file in the verification binary file to determine whether the processor performs synchronization exception processing in accordance with preset requirements.

[0029] Furthermore, it also includes:

[0030] The storage module is used to pre-store a plurality of test binary files corresponding to different types of processors for processing a plurality of different types of synchronization exceptions.

[0031] Furthermore, the file generation module is used to:

[0032] Determine the type of the processor that performs synchronization exception processing, and determine the type of synchronization exception to be verified; determine a test binary file to be verified based at least on the type of the processor and the type of synchronization exception to be verified; and insert the test binary file to be verified into the initial binary file.

[0033] An electronic device, comprising:

[0034] A controller is used to obtain and parse a program file to be run by a processor to obtain an initial binary file to be executed; insert a test binary file to be verified into the initial binary file to generate a verification binary file inserted into the test binary file, wherein the test binary file is a binary file for the processor to perform synchronous exception processing; and execute the test binary file in the verification binary file to determine whether the processor performs synchronous exception processing in accordance with preset requirements;

[0035] The memory is used to store the program for the controller to execute the above processing process.

[0036] It can be seen from the above technical scheme that the synchronization exception verification method, verification platform and electronic device disclosed in the present application obtain and parse the program file to be run by the processor to obtain the initial binary file to be executed; insert the test binary file to be verified into the initial binary file, and generate a verification binary file inserted into the test binary file, where the test binary file is a binary file for the processor to execute synchronization exception processing; execute the test binary file in the verification binary file to determine whether the processor's execution of synchronization exception processing meets the preset requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0038] Figure 1 A flowchart of a synchronization exception verification method disclosed in an embodiment of the present application;

[0039] Figure 2A flowchart of a synchronization exception verification method disclosed in an embodiment of the present application;

[0040] Figure 3 A flowchart of a synchronization exception verification method disclosed in an embodiment of the present application;

[0041] Figure 4 A flowchart of a synchronization exception verification method disclosed in an embodiment of the present application;

[0042] Figure 5 A schematic diagram of the structure of a verification platform disclosed in an embodiment of the present application;

[0043] Figure 6 A schematic diagram of the structure of an electronic device disclosed in an embodiment of the present application. DETAILED DESCRIPTION

[0044] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0045] The present application discloses a synchronization anomaly verification method, and its flow chart is as follows: Figure 1 As shown, including:

[0046] Step S11, obtaining and parsing the program file to be run by the processor to obtain an initial binary file to be executed;

[0047] Step S12: insert the test binary file to be verified into the initial binary file to generate a verification binary file inserted into the test binary file, where the test binary file is a binary file for the processor to perform synchronous exception processing;

[0048] Step S13: execute the test binary file in the verification binary file to determine whether the processor executes the synchronous exception processing in accordance with the preset requirements.

[0049] During the execution of the processor program, there may be exception codes. At this time, in order to ensure the normal operation of the processor, the exception code needs to be processed by the exception handler. When the processing is completed, the exception handler is exited and the processor returns to the previously running program to continue running.

[0050] Whether the exception handler handles the exception code correctly needs to be verified. The verification is mainly to determine whether the corresponding registers correctly reflect the exception information after the processor enters the exception handler, and whether the processor can run normally after exiting the exception handler and execute the next instruction to be executed.

[0051] At present, when verifying the processing of exception codes, the exception codes are usually inserted manually and then checked in the exception handler. When verifying whether the "address of the next instruction to be executed" to be saved by the processor after entering the exception handler is correct, it is necessary to first obtain the "address of the next instruction to be executed" based on the compiled disassembly, and then modify the exception handler to compile again; in addition, for different types of synchronous exceptions, the values ​​of the required registers are also different, and in the traditional method, for different types of synchronous exceptions, the corresponding programs need to be repeatedly written. Therefore, in the traditional verification process, the program code needs to be repeatedly written, assembled, and other operations, resulting in reduced work efficiency.

[0052] Based on this, in this solution, the test binary file to be verified is directly inserted into the initial binary file of the program to be run by the processor, and is executed to realize the verification of synchronous exception handling based on the test binary file. The binary file is directly inserted to realize the automatic generation of the test program, avoiding the process of manual repetitive writing and assembly during the test process, ensuring the verification efficiency of whether the handling of the exception code is correct, and improving the user experience.

[0053] In this embodiment, when verifying the synchronous exception processing executed by the processor, it is necessary to first obtain the normal program file to be executed during the operation of the processor, and parse the normal program file to be executed to obtain the initial binary file of the normal program file to be executed. The initial binary file can specifically be the binary code of the normal program file to be executed.

[0054] It is also necessary to obtain a test binary file to be verified, where the test binary file is a binary file corresponding to a program for executing synchronous exception processing on a processor.

[0055] The test binary file is inserted into the initial binary file to generate a verification binary file, that is, the verification binary file is the initial binary file after the test binary file is inserted. The test binary file is completely inserted into the initial binary file, and this process does not require operations such as writing program code.

[0056] After generating the verification binary file, the verification platform on which the synchronous verification method disclosed in this embodiment is based executes the verification binary file. During its execution, when the test binary file is executed, the data when the verification platform executes the test binary file can be determined, and these data are determined as the data of the processor when the exception handler performs synchronous exception processing. Based on these data, it is determined whether the process of the processor processing the synchronous exception meets the preset requirements, thereby realizing the verification of the synchronous exception processing process in the processor.

[0057] Among them, determining whether the process of the processor handling the synchronous exception meets the preset requirements can be: whether the process of the processor handling the synchronous exception is correct, that is, whether the corresponding registers after the processor enters the exception handling program correctly reflect the exception information, whether the processor can operate normally and execute the next instruction to be executed after exiting the exception program, etc. If it is determined that the corresponding registers after the processor enters the exception handling program can correctly reflect the exception information, and that the processor can operate normally and execute the next instruction to be executed after exiting the exception program, then it can be determined that the process of the processor handling the synchronous exception meets the preset requirements, otherwise, it can be determined that the process of the processor handling the synchronous exception does not meet the preset requirements.

[0058] When the processor executes the program file, if an exception code is detected, it jumps to the exception handler to process the exception code. Since the test binary file is a binary file for the processor to perform synchronous exception processing, the data when the test binary file in the test verification binary file is executed on the verification platform can reflect the data in the processor when the exception handler in the processor performs synchronous exception processing. By analyzing these data, it can be determined whether the synchronous exception processing process executed in the processor is correct, thereby realizing the verification of the synchronous exception processing process.

[0059] The present embodiment discloses a synchronization exception verification method, which obtains and parses the program file to be run by the processor to obtain the initial binary file to be executed; inserts the test binary file to be verified into the initial binary file to generate a verification binary file inserted into the test binary file, and the test binary file is a binary file for the processor to perform synchronization exception processing; executes the test binary file in the verification binary file to determine whether the processor performs synchronization exception processing in accordance with preset requirements. This solution generates a verification binary file by directly inserting the test binary file to be verified into the test binary file. As long as the verification binary file is executed, it can be determined whether the synchronization exception processing performed by the processor meets the preset requirements. In this process, the binary file is directly inserted, and there is no need to repeatedly write program code, thereby improving work efficiency.

[0060] This embodiment discloses a synchronization exception verification method, and its flow chart is as follows: Figure 2 As shown, including:

[0061] Step S21, pre-storing a plurality of test binary files corresponding to different types of processors for processing a plurality of different types of synchronization exceptions;

[0062] Step S22: obtaining and parsing the program file to be run by the processor to obtain an initial binary file to be executed;

[0063] Step S23: obtaining a test binary file to be verified from the multiple test binary files;

[0064] Step S24, inserting the test binary file to be verified into the initial binary file, generating a verification binary file inserted into the test binary file, the test binary file being a binary file for the processor to perform synchronous exception processing;

[0065] Step S25: execute the test binary file in the verification binary file to determine whether the processor's execution of synchronous exception processing meets preset requirements.

[0066] In the verification platform on which the synchronization exception verification method disclosed in this embodiment is based, a plurality of test binary files are encapsulated and stored. These test binary files are test binary files corresponding to different types of synchronization exception processing in different types of processors.

[0067] That is, there are multiple types of synchronization exception handling in each type of processor, and different types of synchronization exception handling in the same type of processor will correspond to different test binary files; and for different types of processors, even the same type of synchronization exception handling will correspond to different test binary files. Since there are many different types of processors, there are also many different types of synchronization exceptions. Therefore, there are also multiple test binary files pre-packaged and stored in the verification platform, and each test binary file corresponds to a specific type of synchronization exception in a certain type of processor.

[0068] During the operation of the processor to be verified, a matching test binary file is selected from multiple pre-packaged and stored test binary files according to the type of the processor to be verified and the type of exception to be verified. The selected matching test binary file is determined as the binary file to be verified, and the called test binary file to be verified is inserted into the initial binary file and executed, so as to verify the synchronous exception processing performed by the processor and determine whether it meets the preset requirements.

[0069] Specifically, it can be:

[0070] Determine the type of processor that performs synchronization exception processing to be verified, and determine the type of synchronization exception to be verified; determine the test binary file to be verified based at least on the type of processor and the type of synchronization exception to be verified; insert the test binary file to be verified into the initial binary file.

[0071] Since the multiple test files stored in the verification platform are test files for different types of synchronization exceptions corresponding to different types of processors, when it is necessary to perform verification of synchronization exception handling, it is necessary to first determine the test binary file to be verified that needs to be called. To determine the test binary file to be verified, it is necessary to determine it based on the type of processor and the type of synchronization exception.

[0072] First, the type of the processor that executes the synchronization exception processing to be verified can be determined, and multiple test binary files corresponding to the type of the processor stored in the verification platform can be determined. Then, the type of the synchronization exception to be verified for the processor can be determined. Based on the type of the synchronization exception to be verified for the processor, a test binary file corresponding to the type of the synchronization exception can be selected from the multiple test binary files corresponding to the type of the processor, and the test binary file can be used as the test binary file to be verified.

[0073] Alternatively, the method may be as follows: firstly, determining the type of synchronization exception of the processor to be verified, determining multiple test binary files corresponding to the type of synchronization exception stored in the verification platform, then determining the type of the processor that executes synchronization exception processing to be verified, and based on the type of the processor, selecting a test binary file corresponding to the type of the processor from the multiple test binary files corresponding to the type of synchronization exception, and using the test binary file as the test binary file to be verified;

[0074] Alternatively, it is also possible to: directly determine the type of processor that executes synchronous exception processing to be verified, and the type of synchronous exception that the processor currently needs to verify, and based on the type of processor and the type of synchronous exception, directly extract the test binary file to be verified corresponding to the type of processor and the type of synchronous exception from a plurality of pre-stored test binary files.

[0075] After determining the test binary file to be verified corresponding to the type of processor and the type of synchronization exception, the test binary file to be verified is inserted into the initial binary file to generate a verification binary file. When the verification binary file is executed, if the test binary file in the verification binary file is executed, the data when the verification platform executes the test binary file to be verified is determined, and the determined data is determined as the data when the processor executes synchronization exception processing. Based on the determined data analysis, it is determined whether the synchronization exception processing executed by the processor meets the preset requirements, that is, whether it is correct.

[0076] In this complete process, multiple test binary files for different processor types and different synchronization exception types have been generated and stored in advance. When it is necessary to verify the handling process of a synchronization exception in a certain processor, the corresponding test binary file to be verified is directly extracted from the multiple pre-stored test binary files and inserted into the initial binary file. In this process, whether it is the process of determining the test binary file or inserting the test binary file into the initial binary file, the process of automatically generating the verification binary file is realized, and manual writing is not required, thereby improving work efficiency.

[0077] The present embodiment discloses a synchronization exception verification method, which pre-stores a plurality of test binary files corresponding to different types of processors for processing a plurality of different types of synchronization exceptions; obtains and parses the program file to be run by the processor to obtain the initial binary file to be executed; obtains the test binary file to be verified from the multiple test binary files; inserts the test binary file to be verified into the initial binary file to generate a verification binary file for inserting the test binary file, the test binary file is a binary file for the processor to perform synchronization exception processing; executes the test binary file in the verification binary file to determine whether the processor performs synchronization exception processing in accordance with preset requirements. This scheme generates a verification binary file by directly inserting the test binary file to be verified into the test binary file. As long as the verification binary file is executed, it can be determined whether the synchronization exception processing performed by the processor meets the preset requirements. In this process, the binary file is directly inserted, and there is no need to repeatedly write program code, thereby improving work efficiency; in addition, the test binary file to be verified is obtained from a plurality of pre-stored test binary files, and can be directly selected from the plurality of pre-stored test binary files, without the need to write a program, thereby improving work efficiency.

[0078] This embodiment discloses a synchronization exception verification method, and its flow chart is as follows: Figure 3 As shown, including:

[0079] Step S31, obtaining and parsing the program file iteratively run by the processor to obtain an initial binary file to be executed;

[0080] Step S32, recording the initial state information of the initial binary file;

[0081] Step S33, inserting the test binary file to be verified into the initial binary file, generating a verification binary file inserted into the test binary file, the test binary file being a binary file for the processor to perform synchronous exception processing;

[0082] Step S34, executing the test binary file in the verification binary file to determine whether the processor performs synchronization exception processing in accordance with preset requirements;

[0083] Step S35: Restore the initial status information of the initial binary file.

[0084] During the normal execution of the program file by the processor, the program file inside the processor will have an initial state, namely the initial state information, which is reflected in the current state value of the register in the processor. If the test binary file to be verified is inserted into the initial binary file corresponding to the program file, the initial state information of the program file (namely the value of the register) will change during the execution of the test binary file to be verified. When the exception handling program is exited, the program file will not be able to continue to run normally due to the change in the initial state information.

[0085] Therefore, when verifying the synchronous exception handling process, it is necessary to determine and save the initial state information, and after the test binary file is executed, restore the initial state information of the initial binary file to ensure that the program file corresponding to the initial binary file can be executed normally.

[0086] Specifically, when it is determined that verification of the synchronous exception process needs to be performed, an initial binary file corresponding to the program file to be run by the processor is obtained, and then a test binary file to be verified is determined, and the test binary file to be verified is inserted into the initial binary file to generate a verification binary file. Before the test binary file to be verified is inserted into the initial binary file, initial state information of the initial binary file is obtained and recorded.

[0087] Among them, before inserting the test binary file to be verified into the initial binary file, obtaining and recording the initial state information of the initial binary file can be specifically: after obtaining the initial binary file corresponding to the program file to be run by the processor, obtaining and recording the initial state information of the initial binary file; or, it can also be: after obtaining the initial binary file corresponding to the program file to be run by the processor, and after determining the test binary file to be verified, obtaining and recording the initial state information of the initial binary file. That is, as long as the initial state information of the initial binary file can be obtained and recorded in any time period before inserting the test binary file to be verified into the initial binary and after obtaining the initial binary file corresponding to the program file to be run by the processor.

[0088] In addition, it is also possible to: while inserting the test binary file to be verified into the initial binary file, record the initial state information of the initial binary file.

[0089] After obtaining the initial state information of the initial binary file, it is also necessary to store and record it so that after the test binary file in the verification binary file is executed, the changed state information can be restored to the initial state information to ensure that the program file corresponding to the initial binary file can run normally.

[0090] Furthermore, before or at the same time as the test binary file to be verified is inserted into the initial binary file, the initial state information of the initial binary file is recorded, which may be:

[0091] Determine a first position in the initial binary file where the test binary file to be verified is inserted; insert an information recording file at the first position, and when the test binary file to be verified is inserted into the initial binary file, record an initial value of a register in the processor based on the information recording file.

[0092] The initial state information of the initial binary file can be specifically the initial values ​​of the registers, that is, the values ​​of the registers of the initial binary file in the processor will change due to the execution of the test binary file. Therefore, before inserting the test binary file into the initial binary file, it is necessary to obtain the initial values ​​of the registers in the initial binary file, and after the execution of the test binary file in the verification binary file is completed, the values ​​of the registers in the initial binary file must be restored to their initial values ​​to avoid the impact of the test binary file on the initial binary file.

[0093] The initial values ​​of the registers in the initial binary file are stored in an information recording file, and the information recording file is inserted into the first position of the initial binary file, wherein the first position is the position in the initial binary file where the test binary file to be verified needs to be inserted.

[0094] That is, when it is determined that the synchronous exception handling process in the processor needs to be verified, it is necessary to determine the position in the initial binary file where the test binary file to be verified is inserted, and the position is determined as the first position. Afterwards, the first position in the initial binary file not only needs to insert the test binary file to be verified, but also needs to insert an information recording file for recording the initial values ​​of the registers in the initial binary file.

[0095] When the test binary file in the verification binary file is executed, the information recording file is obtained from the first position, and the initial value of the register in the initial binary file is extracted from the information recording file. Thereafter, the current value of the register is replaced with the initial value so that the value of the register can be restored to the value before the test binary file to be verified is inserted, thereby ensuring that after the verification is completed, the program file corresponding to the initial binary file can be executed smoothly.

[0096] The determination of the first position may be related to the type of synchronization exception, for example: if the synchronization exception is an instruction exception, the corresponding first position may be an arbitrary position; if the synchronization exception is a data exception, the corresponding first position may be a position in a program for writing or reading data. When the first position is not the last in the initial binary file, a jump instruction may be set at the beginning position of the test binary file to be verified when the test binary file to be verified is inserted into the initial binary file, and a jump instruction may also be set at its end position, so that only when an abnormal code exists will the test binary file be jumped to for execution, and after the test binary file is executed, it is also necessary to jump back to the next instruction arranged in the order of the abnormal code based on the jump instruction set at the end position.

[0097] It should be noted that the test binary file to be verified may include: an exception code to be verified and an exception handler to be verified.

[0098] When inserting the test binary file to be verified into the initial binary file, the exception handler to be verified can be inserted into the code segment in the initial binary file to ensure that the exception handler to be verified can be executed normally. In order to avoid the normal execution of the instructions in the initial binary file by the exception handler to be verified, a specific position can be determined and the exception handler to be verified can be inserted into the specific position of the initial binary file, and the specific position can be specifically the last position of the code segment of the initial binary file. Then, an information recording file can be inserted at the specific position to record the initial value of the register in the initial binary file.

[0099] The position of the exception code to be verified may be different from the position of the exception handling program to be verified, that is, the position of the exception code to be verified may be the same as the position of the exception code detected by the processor in actual operation, and an information recording file may be inserted at the position to record the initial value of the register in the initial binary file;

[0100] In addition, the location of the exception code to be verified may also be the same as the location of the test binary file to be verified.

[0101] The present embodiment discloses a synchronization exception verification method, which obtains and parses the program file to be run by the processor to obtain the initial binary file to be executed; records the initial state information of the initial binary file; inserts the test binary file to be verified into the initial binary file, generates a verification binary file inserted into the test binary file, and the test binary file is a binary file for the processor to perform synchronization exception processing; executes the test binary file in the verification binary file to determine whether the processor performs synchronization exception processing in accordance with preset requirements; and restores the initial state information of the initial binary file. This scheme generates a verification binary file by directly inserting the test binary file to be verified into the test binary file. As long as the verification binary file is executed, it can be determined whether the synchronization exception processing performed by the processor meets the preset requirements. In this process, the binary file is directly inserted without repeatedly writing program code, thereby improving work efficiency; in addition, before inserting the test binary file to be verified into the initial binary file, it is necessary to record the initial state information of the initial binary file, and after the test binary file is executed, the initial state information of the initial binary file is restored to ensure that the program file in the processor can run normally.

[0102] This embodiment discloses a synchronization exception verification method, and its flow chart is as follows: Figure 4 As shown, including:

[0103] Step S41, obtaining and parsing the program file to be run by the processor to obtain an initial binary file to be executed;

[0104] Step S42: insert the test binary file to be verified into the initial binary file to generate a verification binary file inserted into the test binary file, where the test binary file is a binary file for the processor to perform synchronous exception processing;

[0105] Step S43, executing the test binary file in the verification binary file, and determining that the test binary file to be verified is inserted into a second position in the initial binary file, the second position being a position in the verification binary file adjacent to a position where the test binary file is inserted;

[0106] Step S44, obtaining a third location where the file to be executed after the processor performs synchronization exception processing is located;

[0107] Step S45: determine whether the third position matches the second position, and determine whether the processor's execution of synchronization exception processing meets preset requirements based on the matching result.

[0108] When there is an exception code in the processor, the exception code is processed by the exception handler and the processing of the exception code is verified. The test binary file to be verified can be inserted into the initial binary file.

[0109] Among them, it is necessary to determine the second position, determine the position where the test binary file to be verified is inserted into the initial binary file, and after determining the position, the position of the next instruction to be jumped to is the second position, and the second position is used as reference data.

[0110] In addition, a third position needs to be determined, which is the position of the instruction to be executed after the processor executes the synchronous exception processing. That is, after the synchronous exception program is inserted and the synchronous exception processing is executed, the position of the next instruction is the third position.

[0111] The third position is the position of the next instruction after the synchronous exception processing is executed, and the second position is the position of the next instruction before the test binary file is inserted.

[0112] Determine whether the third position is matched with the second position as reference data, determine whether the two match, and determine whether the synchronous exception handling process executed by the processor meets the preset requirements based on the matching result. Specifically, if the third position matches the second position, it indicates that the position of the next instruction executed by the processor after the processor completes the processing of the exception code is correct, and it can be determined that the synchronous exception handling executed by the processor meets the preset requirements; if it is determined that the third position does not match the second position, it indicates that the position of the next instruction executed by the processor after the processor completes the processing of the exception code is wrong, and it can be determined that the synchronous exception handling executed by the processor does not meet the preset requirements.

[0113] In addition, it is also possible to: not judge by the address where the instruction is located, but directly judge by whether the instructions to be executed are consistent. Specifically: determine the instruction that needs to be jumped to execute before inserting the test binary file, and determine it as the first instruction; it is also necessary to determine the instruction that needs to be jumped to execute after inserting the exception handler, and determine it as the second instruction; compare the first instruction and the second instruction to determine whether the two are consistent. If they are consistent, it indicates that the synchronous exception handling executed by the processor meets the preset requirements; if they are inconsistent, it indicates that the synchronous exception handling executed by the processor does not meet the preset requirements.

[0114] The present embodiment discloses a synchronous exception verification method, which obtains and parses the program file to be run by the processor to obtain the initial binary file to be executed; inserts the test binary file to be verified into the initial binary file to generate a verification binary file inserted into the test binary file, and the test binary file is a binary file for the processor to perform synchronous exception processing; executes the test binary file in the verification binary file, determines that the test binary file to be verified is inserted into the second position of the initial binary file, and the second position is a position in the verification binary file adjacent to the position where the test binary file is inserted; obtains the third position where the file to be executed after the processor performs synchronous exception processing; determines whether the third position matches the second position, and determines whether the processor performs synchronous exception processing based on the matching result. This scheme directly inserts the test binary file to be verified into the test binary file to generate a verification binary file. As long as the verification binary file is executed, it can be realized to determine whether the synchronous exception processing executed by the processor meets the preset requirements. In this process, the binary file is directly inserted, and there is no need to repeatedly write program code, which improves work efficiency; in addition, based on the insertion of the test binary file to be verified into the second position of the initial binary file and the third position after the processor performs synchronous exception processing, it is determined whether the synchronous exception processing meets the preset requirements, and the verification of the synchronous exception processing executed by the processor based on the position is realized.

[0115] This embodiment discloses a verification platform, and its structural diagram is as follows: Figure 5 As shown, including:

[0116] An acquisition module 51 , a file generation module 52 and an execution module 53 .

[0117] The acquisition module 51 is used to obtain and parse the program file to be run by the processor to obtain the initial binary file to be executed;

[0118] The file generation module 52 is used to insert the test binary file to be verified into the initial binary file, and generate a verification binary file inserted into the test binary file, where the test binary file is a binary file for the processor to perform synchronous exception processing;

[0119] The execution module 53 is used to execute the test binary file in the verification binary file to determine whether the processor's execution of synchronous exception processing meets preset requirements.

[0120] Furthermore, the verification platform disclosed in this embodiment may also include:

[0121] The storage module is used to pre-store a plurality of test binary files corresponding to different types of processors for processing a plurality of different types of synchronization exceptions.

[0122] Furthermore, the file generation module is used to:

[0123] Determine the type of the processor that performs synchronization exception processing, and determine the type of synchronization exception to be verified; determine the test binary file to be verified based on at least the type of processor and the type of synchronization exception to be verified; insert the test binary file to be verified into the initial binary file.

[0124] Furthermore, the verification platform disclosed in this embodiment may also include:

[0125] The state management module is used to record the initial state information of the initial binary file before or at the same time as the test binary file to be verified is inserted into the initial binary file; after the test binary file is executed in the verification binary file, the initial state information of the initial binary file is restored.

[0126] Furthermore, the state management module is used to:

[0127] Determine a first position in the initial binary file for inserting the test binary file to be verified;

[0128] An information recording file is inserted at a first position, and when a test binary file to be verified is inserted into the initial binary file, an initial value of a register in the processor is recorded based on the information recording file.

[0129] Furthermore, the execution module is used to:

[0130] Determine that the test binary file to be verified is inserted into the second position of the initial binary file, the second position being a position in the verification binary file adjacent to the position where the test binary file is inserted; obtain a third position where the file to be executed after the processor executes synchronous exception processing; determine whether the third position matches the second position, and determine whether the processor's execution of synchronous exception processing meets preset requirements based on the matching result.

[0131] The verification platform disclosed in this embodiment is implemented based on the synchronization exception verification method disclosed in the above embodiment, which will not be described in detail here.

[0132] The present embodiment discloses a verification platform, which obtains and parses the program file to be run by the processor to obtain the initial binary file to be executed; inserts the test binary file to be verified into the initial binary file to generate a verification binary file inserted into the test binary file, and the test binary file is a binary file for the processor to perform synchronous exception processing; executes the test binary file in the verification binary file to determine whether the processor performs synchronous exception processing in accordance with preset requirements. This solution generates a verification binary file by directly inserting the test binary file to be verified into the test binary file. As long as the verification binary file is executed, it can be determined whether the synchronous exception processing performed by the processor meets the preset requirements. In this process, the binary file is directly inserted, and there is no need to repeatedly write program code, thereby improving work efficiency.

[0133] This embodiment discloses an electronic device, and its structural diagram is as follows: Figure 6 As shown, including:

[0134] Controller 61 and memory 62.

[0135] The controller 61 is used to obtain and parse the program file to be run by the processor to obtain the initial binary file to be executed; insert the test binary file to be verified into the initial binary file to generate a verification binary file inserted into the test binary file, where the test binary file is a binary file for the processor to perform synchronous exception processing; execute the test binary file in the verification binary file to determine whether the processor performs synchronous exception processing in accordance with preset requirements;

[0136] The memory 62 is used to store the program for the controller to execute the above-mentioned processing.

[0137] The electronic device disclosed in this embodiment is implemented based on the synchronization anomaly verification method disclosed in the above embodiment, which will not be described in detail here.

[0138] The present embodiment discloses an electronic device, which obtains and parses a program file to be run by a processor to obtain an initial binary file to be executed; inserts a test binary file to be verified into the initial binary file to generate a verification binary file inserted into the test binary file, the test binary file is a binary file for the processor to perform synchronous exception processing; executes the test binary file in the verification binary file to determine whether the processor performs synchronous exception processing in accordance with preset requirements. This solution generates a verification binary file by directly inserting the test binary file to be verified into the test binary file. As long as the verification binary file is executed, it can be determined whether the synchronous exception processing performed by the processor meets the preset requirements. In this process, the binary file is directly inserted, and there is no need to repeatedly write program code, thereby improving work efficiency.

[0139] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0140] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0141] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0142] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A synchronization exception verification method, comprising: Obtaining and parsing the program file to be run by the processor to obtain the initial binary file to be executed; Inserting a test binary file to be verified into the initial binary file to generate a verification binary file inserted into the test binary file, wherein the test binary file is a binary file for the processor to perform synchronous exception processing; The test binary file in the verification binary file is executed to determine whether the processor performs synchronization exception processing in accordance with preset requirements.

2. The method according to claim 1, wherein: Also includes: A plurality of test binary files corresponding to different types of processors for processing different types of synchronization exceptions are stored in advance.

3. The method according to claim 2, wherein: The inserting of the test binary file to be verified into the initial binary file comprises: Determining the type of the processor that performs synchronization exception processing to be verified, and determining the type of synchronization exception to be verified; Determining a test binary file to be verified based at least on the type of the processor and the type of synchronization exception to be verified; The test binary file to be verified is inserted into the initial binary file.

4. The method according to claim 1, wherein: Also includes: Before or at the same time as the test binary file to be verified is inserted into the initial binary file, recording initial state information of the initial binary file; After the test binary file is executed in the verification binary file, the initial state information of the initial binary file is restored.

5. The method according to claim 4, wherein: The step of recording the initial state information of the initial binary file before or at the same time as the test binary file to be verified is inserted into the initial binary file comprises: Determine a first position in the initial binary file to insert the test binary file to be verified; An information recording file is inserted at the first position, and when the test binary file to be verified is inserted into the initial binary file, initial values ​​of registers in the processor are recorded based on the information recording file.

6. The method according to claim 1, wherein: The determining whether the processor performs synchronization exception processing in accordance with preset requirements includes: Determine that the test binary file to be verified is inserted into a second position in the initial binary file, where the second position is a position in the verification binary file adjacent to a position where the test binary file is inserted; Obtaining a third location of a file to be executed after the processor executes the synchronization exception processing; Determine whether the third position matches the second position, and determine whether the processor's execution of synchronization exception processing meets preset requirements based on the matching result.

7. A verification platform, comprising: An acquisition module is used to obtain and parse the program file to be run by the processor to obtain the initial binary file to be executed; A file generation module, used for inserting a test binary file to be verified into the initial binary file, and generating a verification binary file inserted into the test binary file, wherein the test binary file is a binary file for the processor to perform synchronous exception processing; The execution module is used to execute the test binary file in the verification binary file to determine whether the processor performs synchronization exception processing in accordance with preset requirements.

8. The verification platform according to claim 7, wherein: Also includes: The storage module is used to pre-store a plurality of test binary files corresponding to different types of processors for processing a plurality of different types of synchronization exceptions.

9. The verification platform according to claim 7, wherein: The file generation module is used for: Determining the type of the processor that performs synchronization exception processing, and determining the type of synchronization exception to be verified; determining a test binary file to be verified based at least on the type of the processor and the type of synchronization exception to be verified; The test binary file to be verified is inserted into the initial binary file.

10. An electronic device comprising: The controller is used to obtain and parse the program file to be run by the processor to obtain the initial binary file to be executed; Inserting a test binary file to be verified into the initial binary file, generating a verification binary file inserted into the test binary file, wherein the test binary file is a binary file for the processor to perform synchronous exception processing; executing the test binary file in the verification binary file to determine whether the processor performs synchronous exception processing in accordance with preset requirements; The memory is used to store the program for the controller to execute the above processing process.