Hardware verification method and device, electronic equipment and storage medium

Abstract

The embodiment of the invention provides a hardware verification method and device, electronic equipment and a storage medium, and relates to the technical field of hardware verification. The method comprises the following steps: dividing a time slice into an execution time slice of a software test tool and an execution time slice of a hardware simulator; writing simulation input data into the hardware simulator through a data interface of the hardware simulator after all events which can be executed at the current moment in the software test tool are executed in the execution time slice of the software test tool; converting the time slice into an execution time slice of a hardware simulator, calling a control interface of the hardware simulator in a software environment, and controlling the hardware simulator to operate so as to perform hardware verification; and converting the time slice into an execution time slice of a software test tool, and obtaining a hardware verification result through a data interface of the hardware simulator. Event manager data of software and hardware are synchronized through the data interface, and hardware verification in a software environment by using a software test tool is supported.

Description

Technical Field

[0001] The present invention relates to the technical field of hardware verification, and in particular to a hardware verification method, a hardware verification device, an electronic device and a storage medium. Background Art

[0002] Hardware verification refers to the method of verifying that a hardware design works as expected. In this process, hardware simulators help engineers discover and debug design problems by simulating the behavior of hardware under different conditions.

[0003] During the hardware verification process, the hardware emulator usually needs to have its own event manager to handle the events generated during the hardware emulation process.

[0004] However, the event manager of the hardware emulator is usually implemented as an internal private module, which makes it impossible for the software testing tool to access the event manager of the hardware emulator and process events based on the event manager of the hardware emulator. At the same time, since the event manager of the software testing tool is not interoperable with the event manager of the hardware emulator, the events of both parties cannot be processed synchronously, making it impossible to use existing software testing tools for hardware verification. Summary of the invention

[0005] In view of the above problems, embodiments of the present invention are proposed to provide a hardware verification method that overcomes the above problems or at least partially solves the above problems, so as to support hardware verification using existing software testing tools.

[0006] In a first aspect, the present invention provides a hardware verification method, comprising: Dividing the time slice into an execution time slice of the software testing tool and an execution time slice of the hardware simulator; In the execution time slice of the software testing tool, after all events that can be executed at the current moment in the software testing tool are executed, writing simulation input data into the hardware emulator through the data interface of the hardware emulator; Convert the time slice into an execution time slice of the hardware emulator, and in a software environment, call a control interface of the hardware emulator to control the operation of the hardware emulator to perform hardware verification; The time slice is converted into an execution time slice of the software testing tool, and the result of the hardware verification is obtained through the data interface of the hardware simulator.

[0007] In a second aspect, the present invention provides a hardware verification device, comprising: A division module, used for dividing the time slice into an execution time slice of the software testing tool and an execution time slice of the hardware simulator; A writing module, used for writing simulation input data into the hardware emulator through the data interface of the hardware emulator in the execution time slice of the software testing tool after all events executable at the current moment in the software testing tool have been executed; A hardware verification module, used for converting the time slice into the execution time slice of the hardware emulator, and in a software environment, calling the control interface of the hardware emulator to control the operation of the hardware emulator to perform hardware verification; The result acquisition module is used to convert the time slice into the execution time slice of the software testing tool, and obtain the result of the hardware verification through the data interface of the hardware simulator.

[0008] In a third aspect, the present invention provides an electronic device, comprising: a processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the processor implements the above-mentioned hardware verification method when executing the program.

[0009] In a fourth aspect, the present invention provides a readable storage medium, which, when instructions in the storage medium are executed by a processor of an electronic device, enables the electronic device to execute the above-mentioned hardware verification method.

[0010] In a fifth aspect, the present invention provides a computer program product, comprising instructions, which, when executed by a processor in an electronic device, enable the electronic device to execute any one of the aforementioned hardware verification methods.

[0011] The present invention includes at least the following advantages: In the present invention, firstly, the data interface and control interface of the hardware emulator are encapsulated, and the time slice is divided into the execution time slice of the software testing tool and the execution time slice of the hardware emulator. Then, the simulation input data is written into the hardware emulator through the data interface of the hardware emulator, and the hardware verification result in the hardware emulator is obtained. The hardware verification result in the hardware emulator is mainly the execution result data of the event manager of the hardware emulator, that is, the event manager data of the software and hardware is synchronized through the data interface, so that the present application supports the use of software testing tools to perform hardware verification in a software environment, and expands the method of hardware verification. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0013] Figure 1A flowchart showing a hardware verification method embodiment of the present invention is shown; Figure 2 A schematic diagram showing a flow chart of a hardware verification method embodiment of the present invention; Figure 3 A flowchart showing another embodiment of a hardware verification method of the present invention is shown; Figure 4 A structural block diagram of an embodiment of a hardware verification device of the present invention is shown; Figure 5 It is a structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0014] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0015] This application provides a hardware verification method, referring to Figure 1 , the hardware verification method may specifically include the following steps.

[0016] Step 101: Divide the time slice into the execution time slice of the software testing tool and the execution time slice of the hardware simulator.

[0017] During the hardware verification process, software testing tools are mainly used to test the software related to the hardware to ensure that the software can interact with the hardware correctly and meet the design requirements. Software testing tools usually control the input of the software and observe the output results to judge the correctness and accuracy of the software.

[0018] Here, the processor time slice is mainly divided into the execution time slice of the software testing tool and the execution time slice of the hardware emulator. Figure 2 This is a flowchart of a hardware verification method provided by this application. Figure 2 , Figure 2 The part enclosed by the dotted box is the part executed in the execution time slice of the hardware emulator. Figure 2 The portion outside the dotted box is the portion executed in the execution time slice of the software testing tool or software testing framework. The relative length of the execution time slice of the software testing tool and the execution time slice of the hardware emulator is not limited and can be equal or unequal.

[0019] Optionally, the software testing tools herein include: software testing tools that support code-driven and object-oriented. Specifically, these software testing tools that support code-driven and object-oriented run in a high-level language environment and have an event manager developed based on a high-level language; the object-oriented programming herein can divide the hardware design into multiple modules, each module represents a part or function of the hardware, and this modular design enables the testing tool to independently verify each module, reducing the complexity of testing and verification; in an object-oriented environment, classes and objects can be called and reused multiple times, improving testing efficiency and reducing costs; the encapsulation mechanism in object-oriented programming hides the internal details of the hardware design and only exposes the necessary interfaces to the testing tool, which helps to reduce interference factors in the testing process and enables the test to focus more on verifying the functions and performance of the hardware; in summary, the code-driven and object-oriented software testing tools enable the software testing tools to more efficiently and accurately verify the correctness and reliability of the hardware design in hardware verification.

[0020] There is no specific limitation on the specific types of software testing tools that support code-driven and object-oriented testing. For example, the software testing tools here can be Gtest (Google C++ testing framework), JUNIT (JUNIT software testing tool), Pytest (Pie test), Go Test (Go testing tool), etc.

[0021] It should be noted that there is no specific limitation on hardware simulators. For example, the hardware simulator here can fully implement the IEEE (Institute of Electrical and Electronics Engineers) 1800-2023 standard of Verilog (a hardware description language) and System Verilog (system-level Verilog hardware description language). For example, it can be Verilator (Verilog hardware simulator) and Iverilog (Iverilog hardware simulator) that support open source, as well as some commercial hardware simulators, such as Synopsys VCS (Synopsys VCS hardware simulator).

[0022] Step 102: In the execution time slice of the software testing tool, after all events that can be executed in the software testing tool at the current moment have been executed, write simulation input data into the hardware emulator through the data interface of the hardware emulator.

[0023] Figure 2 In FIG. 1 , the solid arrows indicate the control flow, and the dotted arrows indicate the data flow. Step 102 here may correspond to Figure 2 Execute events in the software test tool and write data to the hardware emulator. Here, write data to the hardware emulator. Figure 2As shown by the upper dotted arrow among the two dotted arrows. Figure 2 In the software testing tool, each event that can be executed at the current moment can refer to: R (referring to the event that can be executed at the current moment in the software testing tool), R... the event queue in the software testing tool, Figure 2 The cb in this case refers to a callback task.

[0024] The simulation input data refers to the input data required for the event operation of the hardware simulator in the subsequent step 103. The simulation input data here is specifically determined according to the actual hardware verification.

[0025] Optionally, the data interface here includes: a direct programming interface (System Verilog (SV) Direct Programming Interface (DPI)) based on the system-level Verilog hardware description language. Specifically, the simulation input data is written before executing the Step() function, and the latest execution result is read after the Step() function is completed. The advantage of using the SV (System-level Verilog Hardware Description Language) standard is its wide compatibility, because most modern hardware description languages ​​​​(HDL) support compilation into Verilog (Verilog Hardware Description Language). In addition, most modern tools support the aforementioned DPI standard. Compared with the virtual programming interface (VPI) that accesses and controls specific ports through string operations, directly accessing pins through DPI tasks can achieve a speed increase of about 50 times, significantly reducing execution time and improving hardware verification efficiency. In addition, DPI supports calling custom tasks from C to HDL, making data transmission more flexible and not limited to integer or character types.

[0026] Step 103: convert the time slice into the execution time slice of the hardware emulator, and call the control interface of the hardware emulator in the software environment to control the operation of the hardware emulator to perform hardware verification.

[0027] Here, step 103 corresponds to Figure 2 The Step function in the hardware emulation tool (executing the event in the hardware emulation tool) is a step function or a ladder function. Specifically, the control interface of the hardware emulator can correspond to the Step function here. In step 103, it is necessary to execute Figure 2 In arrive The hardware simulator's control interface is used to call the hardware simulator's commands. For example, the execution time and waveform recording of the hardware simulator are encapsulated in the Step() function, and during initialization, a constructor for setting coverage collection, debugging level, simulation parameters, and other options is added to the hardware class encapsulated by the software.

[0028] Here, the time slice is converted into the execution time slice of the hardware emulator. In other words, calling the Step function means that the software hands over the control right or the time slice to the hardware, and it's the turn of the hardware emulator to execute. Calling the Step function allows the hardware emulator to run for a specified time slice and update its state.

[0029] It should be noted that for software developers, in the software environment, calling the control interface of the hardware emulator to control the operation of the hardware emulator for hardware verification is hidden or invisible. The process of the hardware emulator running here can be as follows: When the Step() function is executed, the control flow permission transfers to the hardware emulator, instructing it to run from the current time T0 until T1 = T0 + t. If all events at the current time have been processed, but T0 < T1, then T0 = T0 + 1, and the events at the new T0 are processed. Once T0 = T1, the hardware emulator exits, and the control flow permission returns to the software environment.

[0030] Step 104: Convert the time slice into the execution time slice of the software test tool, and obtain the result of the hardware verification through the data interface of the hardware emulator.

[0031] Converting the time slice into the execution time slice of the software test tool here means that the hardware hands over the control right or the time slice to the software, and it's the turn of the software test framework to execute. Obtaining the result of the hardware verification through the data interface of the hardware emulator here can correspond to Figure 2 reading data from the hardware emulator, and reading data from the hardware emulator here is mainly for Figure 2 the lower dotted arrow among the two dotted arrows in.

[0032] The result of the hardware verification here is used to trigger a callback according to a preset condition, mark the corresponding event as executable, and prepare for subsequent event execution.

[0033] Combined with Figure 2 , the control path of this application is mainly divided into three categories, and the label of each category is identified by different fonts in Figure 2 . The first category, from ① to ⑤ on the left, represents the verification control flow visible to software developers; the second category, from to , consists of the hidden hardware environment control flow; the third category, from to , covers the process of handling events and callbacks of the software test tool. The above steps 101 to 104 mainly describe ① to ④ in the first category of control paths.

[0034] In the present invention, firstly, the data interface and control interface of the hardware emulator are encapsulated, and the time slice is divided into the execution time slice of the software testing tool and the execution time slice of the hardware emulator. Then, the simulation input data is written into the hardware emulator through the data interface of the hardware emulator, and the hardware verification result in the hardware emulator is obtained. The hardware verification result in the hardware emulator is mainly the execution result data of the event manager of the hardware emulator, that is, the event manager data of the software and hardware is synchronized through the data interface, so that the present application supports the use of software testing tools to perform hardware verification in a software environment, and expands the method of hardware verification.

[0035] Figure 3 FIG. 1 is a flowchart showing another embodiment of a hardware verification method of the present invention. Figure 3 , the hardware verification method may specifically include the following steps.

[0036] Step 201: Divide the time slice into the execution time slice of the software testing tool and the execution time slice of the hardware simulator.

[0037] Step 201 may refer to the aforementioned step 101, and will not be described again here to avoid repetition.

[0038] Step 202: Use an automatic code generator to provide the data interface and the control interface for the hardware emulator.

[0039] Through the automatic code generator, the hardware emulator is provided with two packages: data path interface and control interface. The code of the hardware module can be input into the automatic code generator, which will parse the design code and provide a data interface for inputting data in the software testing tool and reading out the hardware verification results, as well as the above-mentioned control interface. The above-mentioned automatic code generator can conveniently provide a data interface and a control interface for the hardware emulator.

[0040] More specifically, the automatic code generator processes the hardware code through technical means such as code parsing and code generation; then generates a part of the interface for the hardware code, as well as the outer software package; then compiles these interfaces and software packages together to form a software dynamic library. The outer layer of this software dynamic library is the data interface / control interface of the software, and the inner layer is the hardware emulator and hardware logic. This control interface is the Step() function. These code packaging methods abstractly define the interface, and combine and compile to turn the operation of the entire hardware event manager into a software event.

[0041] Step 203: In the execution time slice of the software testing tool, after all events that can be executed in the software testing tool at the current moment have been executed, write the simulation input data into the hardware emulator through the data interface of the hardware emulator.

[0042] Step 203 may refer to the aforementioned step 102, and will not be described again here to avoid repetition.

[0043] Step 204: convert the time slice into the execution time slice of the hardware emulator, and call the control interface of the hardware emulator in the software environment to control the hardware emulator to run the executable event at the current moment in the hardware emulator to perform hardware verification.

[0044] The main difference between step 204 and the aforementioned step 103 is that the executable event at the current moment in the hardware emulator is the executable event at the current moment in the event manager of the hardware emulator. It should be noted that the executable event at the current moment in the hardware emulator is mainly determined by the event triggering condition at the moment before the current moment.

[0045] Step 205: Convert the time slice into the execution time slice of the software testing tool, and obtain the execution result of the executable event at the current moment in the hardware emulator through the data interface of the hardware emulator.

[0046] The main difference between step 205 and the aforementioned step 104 is that the content of the execution result is refined.

[0047] Step 206: Based on the result of the hardware verification, determine various events to be executed in the software testing tool.

[0048] The results of hardware verification can be used as trigger conditions for events in software testing tools. Therefore, callbacks are triggered according to preset conditions and corresponding events are marked as executable.

[0049] Step 207: Execute at least part of the events to be executed in the software testing tool.

[0050] Step 207 may be to enter Figure 2 ① of the next loop of the first type control pathway in the middle, etc.

[0051] Based on the above, the control paths of this application are mainly divided into three categories. The first category, from ① to ⑤, represents the verification control flow visible to software developers; the second category, from arrive , which consists of hidden hardware environment control flow; the third category, from arrive , covering the handling of events and callbacks. Figure 2, the first type of control path can generally be as follows: ① When there are no more executable software environment events or events in the software test tool at the current moment, all software events or events in the software test tool will be processed. ② Through the data interface of the hardware emulator, write simulation input data into the hardware emulator, that is, the input signal is provided to the hardware design or the hardware emulator. ③ Call the Step() function to allow the hardware emulator to run for a specified time slice and update its state. ④ Through the data interface of the hardware emulator, read the output port data of the hardware design or the hardware emulator or the hardware verification result. ⑤ Trigger a callback according to the preset conditions and mark the corresponding event as executable. The second type of hidden hardware environment control flow or control path can generally be as follows: When the Step() function is executed, the control flow privilege transfers to the hardware emulator, instructing it to run from the current time T0 until T1 = T0 + t. If all executable events at the current moment have been processed, but T0 < T1, then T0 = T0 + 1, and process the events of the new T0. Once T0 = T1, the emulator exits, and the control flow privilege returns to the software environment. The third type of control path can generally be as follows: The event queues of hardware and software operate independently. During the execution phase , the software test framework processes the event queue in the software or the software test tool, which includes executing the software events executable at the current moment, such as obtaining the latest results from the reference model, and adding new events to the event queue as needed. In addition, new callback tasks can be registered in the event queue, such as the task of triggering an alarm when sum < 0. At the same time, the hardware emulator independently processes hardware events. Then, in , the software test framework checks the callback tasks in the software event queue and marks the corresponding events as executable when the conditions are met.

[0052] It should be noted that for the method embodiments, for the sake of simple description, they are all expressed as a series of action combinations. However, those skilled in the art should know that the embodiments of the present invention are not limited by the described action sequences, because according to the embodiments of the present invention, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily essential to the embodiments of the present invention.

[0053] The following further explains and illustrates the present application with specific embodiments.

[0054] The function of the hardware module or hardware emulator is to recognize numbers in an image. The following interfaces are provided for the hardware emulator: a data input interface (INPUT), which may specifically include: an Image interface and a Clock interface; a data output interface (OUTPUT), which may specifically include: a first output interface and a second output interface. When the hardware emulator is running, it will read the input image data from the Image interface, and after the Clock changes a certain number of times, it will output the number recognition result from the first output interface, and output from the second output interface how many times the hardware emulator corresponding to the hardware module has output the result after running.

[0055] Input the code of the hardware simulator into the automatic code generator, which will parse the design code and provide set_image (set image interface) and set_clock (set clock interface) for writing simulation input data in the software test tool, as well as get_number (get the output result of the first output interface) and get_cnt (get the output result of the second output interface) for reading the results of the hardware test environment. A Step() function is also provided to support the hardware simulator to run the specified time in the Step() process, perform the digital recognition task, and end after the recognition is completed.

[0056] The software testing tool records the simulation of the hardware emulator through the following process: the software testing tool generates an image, inputs the image to the hardware emulator through set_image, runs the Step() function, and registers the callback of the software event manager. After Step() ends, the callback is triggered, and the verification result is read based on get_number. If the recognition is correct, the software testing tool records the result, continues to run, and returns to the step where the software testing tool generates the image. If the recognition is wrong, the software testing tool records the result, pauses and waits for inspection; if the inspection considers it acceptable, it returns to the step where the software testing tool generates the image; if the inspection considers it unacceptable, it ends.

[0057] In this application, by providing a set of data interfaces for data transmission, the hardware emulator details are encapsulated to avoid mutual interference with the software event manager, and it is non-invasive, which is an external encapsulation of the hardware simulation process; at the same time, the compatibility and versatility are better; and this application minimizes the interference of hardware verification on software testing. In summary, this application allocates execution time slices to the hardware emulator through the software testing tool in the software testing framework, turning the operation of the entire hardware event manager into a software event, thereby shielding the internal details, so as to synchronize the event manager of the software testing tool and the event manager of the hardware emulator to ensure correctness, and synchronize data through the data interface to ensure data consistency in the hardware and software environments, thereby providing the ability of the hardware verification emulator driven by the software testing tool, and finally achieving the ability of any software testing tool to directly use the hardware verification emulator.

[0058] Reference Figure 4 , Figure 4 The following is a structural block diagram of a hardware verification device embodiment of the present invention. The device may specifically include the following modules: A division module 301 is used to divide the time slice into an execution time slice of the software testing tool and an execution time slice of the hardware simulator; A writing module 302 is used to write simulation input data into the hardware emulator through the data interface of the hardware emulator in the execution time slice of the software testing tool after all events that can be executed at the current moment in the software testing tool have been executed; The hardware verification module 303 is used to convert the time slice into the execution time slice of the hardware emulator, and in the software environment, call the control interface of the hardware emulator to control the operation of the hardware emulator to perform hardware verification; The result acquisition module 304 is used to convert the time slice into the execution time slice of the software testing tool, and obtain the result of the hardware verification through the data interface of the hardware simulator.

[0059] Optionally, the hardware verification module 303 includes: A hardware verification submodule, used for converting the time slice into the execution time slice of the hardware emulator, and in a software environment, calling the control interface of the hardware emulator to control the hardware emulator to run the executable event at the current moment in the hardware emulator to perform hardware verification; The result acquisition module 304 includes: The result acquisition submodule is used to convert the time slice into the execution time slice of the software testing tool, and obtain the execution result of the executable event at the current moment in the hardware emulator through the data interface of the hardware emulator.

[0060] Optionally, the device further comprises: A module for determining a time to be executed, used to determine various events to be executed in the software testing tool based on the result of the hardware verification; An execution module is used to execute at least part of the events to be executed in the software testing tool.

[0061] Optionally, the device further comprises: The interface providing module is used to provide the data interface and the control interface for the hardware emulator by using an automatic code generator.

[0062] Optionally, the data interface includes: a direct programming interface based on the system-level Vlog hardware description language.

[0063] Optionally, the software testing tool includes: supporting code-driven and object-oriented software testing tools.

[0064] It should be noted that the hardware verification device can refer to the related aspects of the aforementioned hardware verification method, and both have the same or similar beneficial effects. In order to avoid repetition, they will not be described here.

[0065] Figure 5 is a structural diagram of an electronic device provided by an embodiment of the present invention. Figure 5 The present invention also provides an electronic device, see Figure 5 , including: a processor 501, a memory 502, and a computer program 5021 stored in the memory and executable on the processor, wherein the processor implements the steps of the above-mentioned hardware verification embodiments when executing the program.

[0066] The present invention also provides a readable storage medium. When the instructions in the storage medium are executed by a processor of an electronic device, the electronic device can execute the steps of each embodiment of the above-mentioned hardware verification method.

[0067] The present invention also provides a computer program product, comprising instructions, which, when executed by a processor in an electronic device, enable the electronic device to execute any step of the aforementioned hardware verification method embodiments.

[0068] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0069] It will be appreciated by those skilled in the art that the embodiments of the present invention may be provided as methods, devices, or computer program products. Therefore, the embodiments of the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0070] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data transmission terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data transmission terminal device generate instructions for implementing the process in the flowchart. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0071] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data transmission terminal device to operate in a predictable manner, so that the instructions stored in the computer readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0072] These computer program instructions can also be loaded onto a computer or other programmable data transmission terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0073] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0074] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0075] The above is a detailed introduction to a hardware verification method and device, an electronic device and a storage medium provided by the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for general technical personnel in this field, according to the idea of ​​the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A hardware verification method, characterized in that: include: Dividing the time slice into an execution time slice of the software testing tool and an execution time slice of the hardware simulator; In the execution time slice of the software testing tool, after all events that can be executed at the current moment in the software testing tool are executed, writing simulation input data into the hardware emulator through the data interface of the hardware emulator; Convert the time slice into an execution time slice of the hardware emulator, and in a software environment, call a control interface of the hardware emulator to control the operation of the hardware emulator to perform hardware verification; The time slice is converted into an execution time slice of the software testing tool, and the result of the hardware verification is obtained through the data interface of the hardware simulator.

2. The hardware verification method according to claim 1, characterized in that: The step of converting the time slice into the execution time slice of the hardware emulator and calling the control interface of the hardware emulator in the software environment to control the operation of the hardware emulator to perform hardware verification includes: Convert the time slice into an execution time slice of the hardware emulator, and in a software environment, call a control interface of the hardware emulator to control the hardware emulator to run the executable event at the current moment in the hardware emulator to perform hardware verification; The converting the time slice into the execution time slice of the software testing tool and obtaining the result of the hardware verification through the data interface of the hardware simulator includes: The time slice is converted into the execution time slice of the software testing tool, and the execution result of the executable event at the current moment in the hardware emulator is obtained through the data interface of the hardware emulator.

3. The hardware verification method according to claim 1, characterized in that: The method further comprises: Based on the result of the hardware verification, determining various events to be executed in the software testing tool; At least part of the events to be performed are executed in the software testing tool.

4. The hardware verification method according to any one of claims 1 to 3, characterized in that: The method further comprises: An automatic code generator is used to provide the data interface and the control interface for the hardware emulator.

5. The hardware verification method according to any one of claims 1 to 3, characterized in that: The data interface includes: a direct programming interface based on the system-level Vlog hardware description language.

6. The hardware verification method according to any one of claims 1 to 3, characterized in that: The software testing tool includes: a software testing tool that supports code-driven and object-oriented testing.

7. A hardware verification device, characterized in that: include: A division module, used for dividing the time slice into an execution time slice of the software testing tool and an execution time slice of the hardware simulator; A writing module, used for writing simulation input data into the hardware emulator through the data interface of the hardware emulator in the execution time slice of the software testing tool after all events executable at the current moment in the software testing tool have been executed; A hardware verification module, used for converting the time slice into the execution time slice of the hardware emulator, and in a software environment, calling the control interface of the hardware emulator to control the operation of the hardware emulator to perform hardware verification; The result acquisition module is used to convert the time slice into the execution time slice of the software testing tool, and obtain the result of the hardware verification through the data interface of the hardware simulator.

8. An electronic device, characterized in that: include: A processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the processor implements the hardware verification method according to any one of claims 1 to 6 when executing the program.

9. A readable storage medium, characterized in that: When the instructions in the storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the hardware verification method according to any one of claims 1 to 6.

10. A computer program product, characterized in that The method comprises instructions, which, when executed by a processor in an electronic device, enable the electronic device to execute the hardware verification method according to any one of claims 1 to 6.

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