Process chamber cleaning method and semiconductor process equipment

Abstract

The invention discloses a cleaning method of a process chamber and semiconductor process equipment, and the cleaning method comprises the steps: cleaning a first silicon-containing byproduct and a silicon-metal-containing mixed byproduct: introducing a mixed cleaning gas of a first fluorine-containing gas and a first chlorine-containing gas into the process chamber, the first fluorine-containing gas and the first chlorine-containing gas are mixed to remove the first silicon-containing by-product and the silicon-metal-containing mixed by-product, and the molar ratio of fluorine atoms in the first fluorine-containing gas to chlorine atoms in the first chlorine-containing gas is (1.8-5): 1. According to the method, the mixed cleaning gas of the first fluorine-containing gas and the first chlorine-containing gas is firstly used for cleaning, and the molar ratio of fluorine atoms in the first fluorine-containing gas to chlorine atoms in the first chlorine-containing gas is (1.8-5): 1, so that the first silicon-containing by-product generated by over-etching of the metal hard mask layer can be cleaned; in addition, silicon-metal mixed by-products can be thoroughly cleaned, and the blocking of the by-products in the layer is avoided, so that the process chamber can be cleaned, and the first sheet effect is eliminated.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method for cleaning a process chamber and semiconductor process equipment. Background Art

[0002] With the development of modern semiconductor technology, the process size is getting smaller and smaller, and the yield control is becoming more and more difficult. In the back-end etching process, such as the metal hard mask (MHM, metal hard mask, generally a high-K dielectric layer) etching process of the metal interconnect layer below the 28nm node, a waferless autoclean (WAC, waferless autoclean) will be performed after each wafer is etched. Even if the etching environment is strictly controlled, the first wafer effect may still occur, that is, the critical dimension (CD, critical dimension) of the first wafer is different from that of other wafers, and the etching effect of subsequent wafers gradually deteriorates, and the quality stability is poor. Summary of the invention

[0003] In view of the above technical problems, the present application provides a method for cleaning a process chamber and a semiconductor process equipment, which can improve the problem of poor etching effect stability and prone to first-wafer effect in the existing MHM etching process.

[0004] To solve the above technical problems, in a first aspect, an embodiment of the present application provides a method for cleaning a process chamber, wherein the process chamber is used to etch a semiconductor device, wherein the semiconductor device comprises, from bottom to top, a first silicon-containing oxide layer, a metal hard mask layer, and a second silicon-containing oxide layer, and the etching step comprises etching the metal hard mask layer using the second silicon-containing oxide layer as a mask, and the cleaning method comprises:

[0005] The first silicon-containing by-product and the silicon-metal mixed by-product cleaning step is as follows: a mixed cleaning gas of a first fluorine-containing gas and a first chlorine-containing gas is introduced into the process chamber to remove the first silicon-containing by-product and the silicon-metal mixed by-product, wherein the molar ratio between the fluorine atoms in the first fluorine-containing gas and the chlorine atoms in the first chlorine-containing gas is (1.8-5):1.

[0006] Optionally, a molar ratio of fluorine atoms in the first fluorine-containing gas to chlorine atoms in the first chlorine-containing gas is (3-4.5):1.

[0007] Optionally, the first fluorine-containing gas includes NF3 and / or SF6, and the first chlorine-containing gas includes BCl3 and / or Cl2.

[0008] Optionally, the first fluorine-containing gas is NF3, and the flow rate is 400-800 sccm;

[0009] The first chlorine-containing gas is Cl2, and the flow rate is 120-400 sccm.

[0010] Optionally, in the step of cleaning the first silicon-containing by-product and the silicon-metal mixed by-product, the pressure of the process chamber is 10 to 30 mT, the upper electrode power is 1200 to 1800 W, and the cleaning time is 20 to 40 s.

[0011] Optionally, after the first step of cleaning the silicon-containing byproduct and the silicon-metal mixed byproduct, the method further comprises:

[0012] Metal-containing byproduct cleaning step: introducing a second chlorine-containing gas into the process chamber to remove the metal-containing byproduct.

[0013] Optionally, the second chlorine-containing gas includes BCl3 and Cl2.

[0014] Optionally, the semiconductor device further comprises a spin-on carbon layer disposed on the second silicon-containing oxide layer, a silicon-containing anti-reflection layer disposed on the spin-on carbon layer, and a photoresist layer disposed on the silicon-containing anti-reflection layer, and the etching step further comprises etching the spin-on carbon layer using the photoresist layer as a mask, and etching the second silicon-containing oxide layer using the spin-on carbon layer as a mask;

[0015] After the metal-containing byproduct cleaning step, the method further comprises:

[0016] A second silicon-containing byproduct cleaning step: introducing a second fluorine-containing gas into the process chamber to remove the second silicon-containing byproduct;

[0017] A first carbon-containing byproduct cleaning step: introducing a first oxygen-containing gas into the process chamber to remove the first carbon-containing byproduct;

[0018] A third silicon-containing byproduct cleaning step: introducing a third fluorine-containing gas into the process chamber to remove the third silicon-containing byproduct;

[0019] The second carbon-containing byproduct cleaning step is: introducing a second oxygen-containing gas into the process chamber to remove the second carbon-containing byproduct.

[0020] Optionally, the first fluorine-containing gas is NF3, with a flow rate of 500 sccm, and the first chlorine-containing gas is Cl2, with a flow rate of 200 sccm;

[0021] The second chlorine-containing gas is BCl3 and Cl2, wherein the flow rate of BCl3 is 100-300 sccm, and the flow rate of Cl2 is 100-300 sccm;

[0022] The second fluorine-containing gas is NF3, and the flow rate is 200-600 sccm;

[0023] The first oxygen-containing gas is O2, and the flow rate is 200-500 sccm;

[0024] The third fluorine-containing gas is NF3, and the flow rate is 200-600 sccm;

[0025] The second oxygen-containing gas is O2, and the flow rate is 200-500 sccm.

[0026] Optionally, after the second carbon-containing byproduct cleaning step, the method further comprises:

[0027] Residual reactant cleaning step: introducing an inert gas into the process chamber to remove the residual reactant.

[0028] Optionally, the metal hard mask layer includes at least one of a titanium nitride layer, a tantalum oxide layer and a hafnium oxide layer.

[0029] Optionally, the process chamber includes an air intake structure, wherein the air intake structure includes a central air intake area, an intermediate air intake area arranged around the central air intake area, and an edge air intake area arranged around the intermediate air intake area;

[0030] The flow percentages of the gas introduced in each cleaning step in the central air inlet zone, the middle air inlet zone and the edge air inlet zone are 10-33%, 10-33% and 34-80% respectively.

[0031] In a third aspect, an embodiment of the present application further provides a semiconductor process equipment, comprising a process chamber, an intake structure for introducing gas into the process chamber, and a controller, wherein the controller comprises at least one processor and at least one memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the cleaning method described in the above embodiments is implemented.

[0032] As described above, the cleaning method of the present application first uses a mixed cleaning gas of a first fluorine-containing gas and a first chlorine-containing gas for cleaning, and the molar ratio between the fluorine (F) atoms in the first fluorine-containing gas and the chlorine (Cl) atoms in the first chlorine-containing gas is (1.8-5):1, that is, the F in the mixed cleaning gas is in excess relative to Cl, which is 1.8-5 times that of Cl, so that the first silicon-containing by-products generated by over-etching the metal hard mask layer can be fully cleaned, and because of the simultaneous presence of F and Cl, the silicon-metal mixed by-products can also be thoroughly cleaned. Since the present embodiment can completely remove the silicon-metal mixed by-products, it avoids the obstruction of the by-products of this layer, resulting in the inability to completely remove the silicon-containing by-products and carbon-containing by-products underneath, so that the process chamber can be cleaned, ensuring that the etching environment of each wafer is basically the same, eliminating the first wafer effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application. In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments are briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative labor.

[0034] Figure 1 It is a schematic diagram of the etching process of a metal hard mask;

[0035] Figure 2 This is a method proposed in the embodiment of the present application for Figure 1 A model diagram of the stacked structure of byproducts produced during the etching process;

[0036] Figure 3 It is a kind of related technology for Figure 1 Schematic diagram of cleaning byproducts during the etching process;

[0037] Figure 4 It is a schematic flow chart of a cleaning method provided in an embodiment of the present application;

[0038] Figure 5 It is a structural schematic diagram of a semiconductor process equipment provided in an embodiment of the present application.

[0039] The realization of the purpose, functional features and advantages of this application will be further described in conjunction with the embodiments and with reference to the accompanying drawings. The above-mentioned drawings have shown clear embodiments of this application, which will be described in more detail later. These drawings and textual descriptions are not intended to limit the scope of the concept of this application in any way, but to illustrate the concept of this application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0040] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0041] It should be noted that, in this article, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element. In addition, components, features, and elements with the same name in different embodiments of the present application may have the same meaning or different meanings, and their specific meanings need to be determined by their explanation in the specific embodiment or further combined with the context of the specific embodiment.

[0042] It should be further understood that the terms "comprising" and "including" indicate the presence of the described features, steps, operations, elements, components, items, kinds, and / or groups, but do not exclude the presence, occurrence or addition of one or more other features, steps, operations, elements, components, items, kinds, and / or groups. The terms "or", "and / or", "including at least one of the following", etc. used in this application may be interpreted as inclusive, or mean any one or any combination. For example, "including at least one of the following: A, B, C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C", and for another example, "A, B or C" or "A, B and / or C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C". Exceptions to this definition will only occur when the combination of elements, functions, steps or operations is inherently mutually exclusive in some way.

[0043] It should be understood that although the terms first, second, third, etc. may be used herein to describe various information, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from each other. For example, without departing from the scope of this document, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, as used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless otherwise indicated in the context.

[0044] It should be understood that the orientations or positional relationships indicated by terms such as "top", "bottom", "up", "down", "vertical", and "horizontal" are based on the orientations or positional relationships shown in the accompanying drawings and are only for the convenience of describing the present application and simplifying the description. They do not indicate or imply that the device referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0045] For ease of description, in the following embodiments, orthogonal spaces determined by horizontal planes and vertical directions are used as examples for explanation, and this premise should not be construed as a limitation to the present application.

[0046] As mentioned above, the existing MHM etching process may cause the first-piece effect and poor quality stability. Figure 1 The above problems were studied by taking the membrane structure as an example.

[0047] See also Figure 1 , Figure 1 The present invention is a schematic diagram of the etching process of a metal hard mask, wherein a metal hard mask layer 20 is formed on a first silicon-containing oxide layer (SiOC) 10, and a second silicon-containing oxide layer (SiOC) 30, a spin carbon layer (SOC) 40, a silicon-containing anti-reflective layer (SiARC) 50, and a photoresist layer (PR) 60 are sequentially deposited on the metal hard mask layer 20. The first silicon-containing oxide layer 10 and the second silicon-containing oxide layer 30 may be silicon oxide or silicon oxynitride, and the metal hard mask layer 20 may be a compound with a relatively high etching selectivity for the first silicon-containing oxide layer 10, such as a metal nitride layer and / or a high-k dielectric layer. For example, the metal nitride layer may be a titanium nitride layer, a tantalum nitride layer, an aluminum nitride layer, etc.; the material of the high-k dielectric layer is generally a dielectric material having a dielectric constant greater than that of silicon dioxide. For example, the high-k dielectric layer may be an aluminum oxide layer, a tantalum oxide layer, a hafnium oxide layer, etc. The following uses titanium nitride (TiN) as an example. When the metal hard mask layer 20 is made of other materials, the principle is the same and will not be described in detail in this application. The entire etching process of the metal hard mask layer 20 includes:

[0048] Step 110: etching the photoresist (PR) layer 60, see Figure 1 In (a), a hard mask may be used for exposure and then developed to form a pattern of the photoresist layer 60 .

[0049] Step 120, etching the silicon-containing anti-reflection layer 50, see Figure 1 In step (b), the silicon-containing anti-reflection layer 50 is etched using the photoresist layer 60 as a mask.

[0050] Step 130, etching of the spin-on carbon layer 40, see Figure 1 In step (c), the spin-on carbon layer 40 is etched using the silicon-containing anti-reflection layer 50 as a mask, and the photoresist layer 60 on the surface can be removed during the etching process.

[0051] Step 140: etching the second silicon-containing oxide layer 30. Figure 1 In step (d), the second silicon-containing oxide layer 30 is etched using the spin-on carbon layer 40 as a mask, and the silicon-containing anti-reflection layer 50 on the surface can be removed during the etching process.

[0052] Step 150: Remove the spin-on carbon layer 40 on the surface by etching (stripping), see Figure 1 (e) in .

[0053] Step 160, TiN layer 20 is etched, see Figure 1 In step (f), the TiN layer 20 is etched using the second silicon-containing oxide layer 30 as a mask.

[0054] Regarding the above etching process, it is generally believed that the deposition of the attachments generated by each etching step is deposited layer by layer on the inner wall of the process chamber, so the cleaning of the process chamber after the etching is completed is always carried out in the order of etching the film layer from bottom to top, and the main elements of the corresponding film layer are cleaned separately. However, the applicant has found that, please refer to Figure 2 , Figure 2 This is a method proposed in the embodiment of the present application for Figure 1 The stacked structure model diagram of the byproducts produced during the etching process of the process chamber, the entire etching process will sequentially form the second carbon-containing byproduct 61 (produced in step 110), the third silicon-containing byproduct 51 (produced in step 120), the first carbon-containing byproduct 41 (produced in step 130), the second silicon-containing byproduct 31 (produced in step 140), and the titanium-containing byproduct 23, the silicon-titanium mixed byproduct 22 and the first silicon-containing byproduct 21 (as shown in the dotted box in the figure) produced by step 160. That is, when step 160 etches the TiN layer 20, please refer to Figure 1 In (e) to (f), the second silicon-containing oxide layer 30 is etched at the same time, thereby generating titanium-containing byproducts 23 and silicon-titanium mixed byproducts 22. Moreover, since the TiN layer 20 is overetched to a certain extent after etching, the first silicon-containing byproduct 21 is generated on the surface. The silicon-titanium mixed byproduct 22 and the first silicon-containing byproduct 21 can also be regarded as a whole as a silicon-titanium mixed byproduct.

[0055] The first related art (related art 1) waferless automatic cleaning process is as follows: Figure 3 , Figure 3 It is a kind of related technology for Figure 1 Schematic diagram of the by-products cleaned during the etching process, first, a fluorine-containing gas is introduced to allow the dissociated fluorine (F) to react with silicon (Si) to remove silicon (Si)-based attachments, i.e., silicon-containing by-product 21a, then a chlorine-containing gas is introduced to remove the titanium (Ti) layer, i.e., titanium-containing by-product 23a, then a fluorine-containing gas is introduced to clean the silicon-containing by-product 31a, and finally an oxygen-containing gas is introduced to clean the carbon-containing by-product 41a.

[0056] This cleaning method uses a single gas to clean the process chamber in each step, and can only clean the corresponding element film layer separately, such as fluorine-containing gas cleaning Si-containing byproducts, chlorine-containing gas cleaning Ti-containing byproducts, without considering Figure 2 The silicon-titanium mixed by-product 22 cannot be cleaned up, and the silicon-titanium mixed by-product 22 will eventually be blocked by the silicon-titanium mixed by-product 22, and the silicon-containing by-products and carbon-containing by-products underneath cannot be completely removed, resulting in the presence of attachments in the process chamber after WAC, resulting in a different environment for each etching (run), that is, there is a first-piece effect, and the product quality stability is poor.

[0057] Another related art (related art 2) waferless automatic cleaning process is as follows: first, chlorine-containing gas is used to clean Ti-based polymer, then NF3 is used to clean Si-based polymer, and then NF3 gas is introduced to enrich the chamber with F ions. Finally, Arpurge is used to remove other reactants in the chamber. Similarly, the use of chlorine-containing gas first is also unable to completely remove the silicon-containing byproducts underneath due to the obstruction of the silicon-titanium mixed byproduct 22.

[0058] Based on this, the present application provides a method for cleaning a process chamber and semiconductor process equipment.

[0059] The present application provides a method for cleaning a process chamber, the cleaning method is for a process chamber for etching a semiconductor device, and the etched semiconductor device includes, from bottom to top, a first silicon-containing oxide layer 10, a titanium nitride layer 20, and a second silicon-containing oxide layer 30, the etching step includes etching the titanium nitride layer 20 using the second silicon-containing oxide layer 30 as a mask, and for cleaning all process chambers including the etching step, the cleaning method provided by the present application includes:

[0060] The first silicon-containing by-product and the silicon-titanium mixed by-product 22 cleaning step: a mixed cleaning gas of a first fluorine-containing gas and a first chlorine-containing gas is introduced into the process chamber to remove the first silicon-containing by-product 21 and the silicon-titanium mixed by-product 22, wherein the molar ratio between the fluorine (F) atoms in the first fluorine-containing gas and the chlorine (Cl) atoms in the first chlorine-containing gas is (1.8-5):1.

[0061] In this embodiment, a mixed cleaning gas of a first fluorine-containing gas and a first chlorine-containing gas is first used for cleaning, and the molar ratio of fluorine (F) atoms in the first fluorine-containing gas to chlorine (Cl) atoms in the first chlorine-containing gas is (1.8-5):1, that is, F in the mixed cleaning gas is in excess relative to Cl, which is 1.8-5 times that of Cl, so that the first silicon-containing by-product 21 produced by over-etching the titanium nitride layer 20 can be fully cleaned, and because of the simultaneous presence of F and Cl, the silicon-titanium mixed by-product 22 can also be thoroughly cleaned. In this embodiment, since the silicon-titanium mixed by-product 22 can be completely removed, the obstruction of the by-products of this layer, which makes it impossible to completely remove the silicon-containing by-products and carbon-containing by-products underneath, can be avoided, so that the process chamber can be cleaned, ensuring that the etching environment of each wafer is basically the same, eliminating the first wafer effect. It should be noted that if the amount of F cannot be ensured to be excessive, Si in the silicon-titanium mixed byproduct 22 cannot be completely removed, and Ti cannot be removed in the subsequent Ti cleaning step due to the presence of Si, thereby failing to clean the process chamber.

[0062] It should be noted that the mixed cleaning gas may also include a diluent gas, such as an inert gas such as Ne or Ar, and the rate of the cleaning reaction may be adjusted by adding the diluent gas. In all embodiments of the present application, the etching gas that reacts is mainly described, and the diluent gas may be added according to actual process requirements, which will not be described in detail below.

[0063] Preferably, the molar ratio of fluorine atoms in the first fluorine-containing gas to chlorine atoms in the first chlorine-containing gas is (3-4.5): 1. Under this formula, it can ensure that the cleaning is done at a faster rate, and the gas can improve the gas utilization rate and reduce the waste caused by the gas being drawn away without reaction.

[0064] In one embodiment, the first fluorine-containing gas may include NF3 and / or SF6, and the first chlorine-containing gas may include BCl3 and / or Cl2. NF3 and SF6 may be ionized to form F ions, which react with the silicon-containing byproducts, and BCl3 and Cl2 may be ionized to form Cl ions, which react with the Ti-containing byproducts, and the reaction formulas are as follows:

[0065] Ti+Cl2→TiCl4↑(1),

[0066] SiO2+NF3→SiF4↑+NO2↑(2),

[0067] The volatile gases generated by the reaction are eventually extracted and sent into the plant management system for treatment.

[0068] Taking the first fluorine-containing gas as NF3 and the first chlorine-containing gas as Cl2 as an example, the flow rate of NF3 can be 400-800 sccm, and the flow rate of Cl2 can be 120-400 sccm. At this flow rate, F can be ensured to be excessive, and the first silicon-containing byproduct 21 and the silicon-titanium mixed byproduct 22 can be quickly and thoroughly removed. It should be noted that when SF6 is used to partially or completely replace NF3, an equal amount of replacement can be made according to the F content. For example, 1 volume of SF6 can replace 2 volumes of NF3. Similarly, BCl3 can also replace Cl2 in equal amounts.

[0069] For example, in the step of cleaning the silicon-titanium mixed byproduct 22 , the pressure of the process chamber may be 10 to 30 mT, the upper electrode power may be 1200 to 1800 W, and the cleaning time may be 20 to 40 s.

[0070] In one embodiment, after the first silicon-containing byproduct 21 and the silicon-titanium mixed byproduct 22 cleaning step, the following may be further included: a titanium-containing byproduct 23 cleaning step: a second chlorine-containing gas is introduced into the process chamber to remove the titanium-containing byproduct. The reaction principle can refer to the aforementioned reaction formula (1). In this embodiment, the second chlorine-containing gas may be the same as the first chlorine-containing gas or may be different. Preferably, the second chlorine-containing gas is a mixed gas comprising BCl3 and Cl2.

[0071] Below Figure 1 Taking the semiconductor device hard mask etching as an example, the cleaning method of the present application is further described in detail.

[0072] The semiconductor device includes a first silicon-containing oxide layer 10 , and a titanium nitride layer 20 , a second silicon-containing oxide layer 30 , a spin-on carbon layer 40 , a silicon-containing anti-reflection layer 50 and a photoresist layer 60 sequentially deposited on the surface of the first silicon-containing oxide layer 10 .

[0073] In the entire etching step, step 110 (photoresist layer 60 etching) corresponds to Figure 1 (a) will produce carbon-containing organic particles in the process chamber. In order to distinguish them, they are named as the second carbon-containing byproduct (C) 61. Please refer to Figure 2 Step 120 (etching of the silicon-containing anti-reflective layer 50) corresponds to Figure 1 In (b), silicon-containing particles are generated in the process chamber, which are named as the third silicon-containing byproduct 51 for the purpose of distinction; step 130 (etching of the spin-on carbon layer 40), corresponding to Figure 1 In (c), this step will produce carbon-containing particles in the process chamber, which are named as the first carbon-containing byproduct 41 for distinction; step 140 (etching the second silicon-containing oxide layer 30), corresponding to Figure 1(d) in the process chamber, this step will produce silicon-containing particles in the process chamber, in order to distinguish, named as the second silicon-containing byproduct 31; step 160 (TiN layer 20 etching) corresponds to Figure 1 In (f), this step will form a silicon-titanium mixed byproduct 22 and a first silicon-containing byproduct 21. That is, the entire etching process will generally form a layer such as Figure 2 The byproduct film layer is shown.

[0074] For the above byproduct films, please refer to Figure 4 , Figure 4 : is a schematic diagram of a cleaning method provided in an embodiment of the present application, and the cleaning method may include the following steps:

[0075] Step 210, cleaning step of the first silicon-containing byproduct 21 and the silicon-titanium mixed byproduct 22. A combination gas of NF3 / Cl2 / Ar can be introduced into the process chamber, and the main cleaning components are TiN and SiO2 mixtures. The specific cleaning mechanism is described above and will not be described in detail in this embodiment.

[0076] Step 220, cleaning step of titanium-containing byproduct 23. A combination gas of Cl2 / BCl3 can be introduced into the process chamber, and the main cleaning component is TiN. After the mixed attachments of Si / Ti are cleaned in step 210, it can be considered that the main attachments on the surface are titanium-containing byproducts 23, and the introduction of Cl2 / BCl3 can ensure that the attachments of Ti are completely cleaned. The flow rates of BCl3 and Cl2 can both be 100-300sccm. The chamber pressure can be maintained at 5-10mT, and the upper electrode power can be maintained at 1300-1800W.

[0077] Step 230, cleaning step of the second silicon-containing byproduct 31: introduce a second fluorine-containing gas into the process chamber to remove the second silicon-containing byproduct 31. The second fluorine-containing gas may be the same as or different from the first fluorine-containing gas. A combination gas of NF3 / Ar may be introduced into the process chamber. After the cleaning of the titanium-containing byproduct 23 is completed, the SiO2 layer needs to be cleaned. Its main byproduct is Si-based polymer, and 200-600sccm of NF3 may be introduced. Exemplarily, a mixed gas of 100-200sccmAr and 200-600sccm NF3 may be introduced, wherein NF3 is the main reaction gas and Ar is used to assist in ignition. The pressure of the process chamber may be maintained at 400mT, and the upper electrode power may be maintained at 1500-2000W.

[0078] Step 240, first carbon-containing byproduct 41 cleaning step: introduce a first oxygen-containing gas into the process chamber to remove the first carbon-containing byproduct 41. The first oxygen-containing gas can be an oxygen-containing gas such as NO, O2, etc. After the SiOC layer (the main element is SiO2) is cleaned, it is necessary to clean the first carbon-containing byproduct (SOC layer) 41, and its main byproduct is C-based polymer. Exemplarily, 200-500sccm O2 gas can be introduced into the process chamber, and the dissociated O reacts with C to form a volatile gas that is pumped away. Among them, the pressure of the process chamber can be maintained at 50-100mT, the upper electrode power can be maintained at 1000-1500W, and the time can be 30-50s to ensure that the C-based polymer can be completely cleaned. The main reactions of this step are:

[0079] C+O2→CO2↑(3);

[0080] Step 250, cleaning step of the third silicon-containing byproduct 51: introducing a third fluorine-containing gas into the process chamber to remove the third silicon-containing byproduct 51. The third fluorine-containing gas may be the same as or different from the first fluorine-containing gas. For example, a combination of NF3 / Ar gas may be introduced into the process chamber to clean the SiARC layer (main element is SiO2). The main byproduct in SiARC is Si-based polymer, so the same process parameters as step 230 may be used.

[0081] Step 260, cleaning step of the second carbon-containing byproduct 61: introduce a second oxygen-containing gas into the process chamber to remove the second carbon-containing byproduct 61. This step is mainly to clean the byproducts of PR layer etching, the main component of which is C-based polymer, which is consistent with the cleaning principle of the SOC layer, so the same process parameters as step 240 can be used. The cleaning time can be 10-30s, ensuring that the second carbon-containing byproduct 61 is cleaned.

[0082] Preferably, step 260 may further include:

[0083] Step 270, residual reactant cleaning step: Inert gas is introduced into the process chamber to remove residual reactants. This step is mainly to remove the residual reactants by gas flow. Exemplarily, Ar gas with a flow rate of 500 sccm can be used for 10-20 seconds to remove the residual reactants in the process chamber.

[0084] It should be noted that the process gas generally enters the process chamber through the air intake structure of the process chamber, and the air intake structure can improve the uniformity of the gas. As an example of an air intake structure, the air intake structure may include a central air intake area (center), an intermediate air intake area (middle) arranged around the central air intake area, and an edge air intake area (edge) arranged around the middle air intake area in the radial direction. Based on the air intake structure of this structure, preferably, in each of the above-mentioned cleaning steps, the flow percentages of the gas introduced in the central air intake area, the middle air intake area and the edge air intake area are respectively: 10-33%, 10-33% and 34-80%. That is, the gas flow rates of the central air intake area and the middle air intake area can be basically equal, while the gas flow rate of the edge air intake area is relatively larger to ensure that the edge can be thoroughly cleaned. Please refer to Table 1, which is an example of the cleaning recipe used in the first cleaning of Related Technology 1, Related Technology 2, Examples 1-3 of the present invention and the comparative example, as well as the line width data of each measured 3pcs sample (1#, 2#, 3#) after completing all the cleaning steps, wherein the pressure of the process chamber in the first cleaning step is controlled at 20mT, and the upper electrode power is 1500W. Except for the first cleaning, the subsequent cleaning steps are the same (all including S220-S270).

[0085] Table 1 Cleaning recipes and line width measurement results for each example

[0086]

[0087] It can be seen from Table 1 that in the first cleaning step, both Related Technology 1 and Related Technology 2 use a separate gas for cleaning, the ratio of F atoms in NF3 to Cl atoms in Cl2 in the comparative example is only 1.5:1, and F is not sufficiently excessive, and the corresponding ratios of Example 1, Example 2 and Example 3 are 5:1, 3.75:1 and 1.8:1, respectively.

[0088] Five cleaning formulas, namely, related technology 1, related technology 2, embodiment 1 of the present application, embodiment 2, embodiment 3 and comparative example, were used to run three wafers in a row (i.e., WAC cleaning was performed once per etching of one wafer), and the inlines of 3 pcs of samples under the five processes were compared (a CD SEM machine was used to measure specific positions of the wafer, such as the line width formed after etching). The results showed that after WAC of related technology 1, the Si-Ti mixture could not be cleaned up, resulting in a different environment for subsequent wafers from that for the first wafer, which ultimately resulted in a larger inline than the first wafer; after WAC of related technology 2, the Si-Ti mixture still could not be removed, and NF3 cleaning was finally used, resulting in a rich F ion content in the chamber, which affected the first-step etching rate during the subsequent runs, resulting in the CD of the first wafer being larger than the CD of the last two wafers;

[0089] After using the comparative WAC, due to the use of NF3 / Cl2 mixed cleaning, it has a basic cleaning ability for Si, which can reduce the first-piece effect problem to a certain extent. However, due to the small flow rate of NF3 and the lack of sufficient excess, in some cases, after cleaning for 30 seconds, the Si in Si-Ti still cannot be completely cleaned, resulting in residues; while using the inline results of Examples 1, 2 and 3 of the present application, by completely cleaning the Si-Ti mixture, it can ensure that the environment of the process chamber is stable during each run, and the CD values ​​of the three wafers are stable in the end, there is no first-piece effect phenomenon, and the run results are more stable, which can prove that the WAC provided by the present invention can effectively solve the first-piece effect problem.

[0090] The present application also provides a semiconductor process equipment. Figure 5 The semiconductor process equipment may include a process chamber 310, an intake structure 320 for introducing gas into the process chamber 310, and a controller, wherein the controller includes at least one processor and at least one memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the cleaning method described in any of the above embodiments is implemented. Furthermore, the semiconductor process equipment may also include an upper electrode assembly 330 and a lower electrode assembly 340.

[0091] Exemplarily, the controller can be a host computer or a slave computer. The controller can control the valve of the air intake structure 320 to open so as to introduce the corresponding process gas / cleaning gas into the process chamber 310; the controller can also control the opening and closing degree of the valve of the air intake structure 320 to control the flow rate of the gas. The controller can also control the exhaust component to exhaust the inside of the process chamber 310 to control the pressure inside the process chamber 310, discharge reaction byproducts, etc.

[0092] The upper electrode assembly 330 may include an RF coil 331, an upper RF power source 332, and an upper matcher 333. The controller is also used to control the upper RF power source 332 to provide upper electrode power to the RF coil 331 through the upper matcher 333, so that the RF coil 331 excites the process gas inside the process chamber 310 to generate plasma.

[0093] The lower electrode assembly 340 may include a wafer carrier 341, a lower RF power supply 342, and a lower matcher 343. The controller is also used to control the lower RF power supply 342 to provide lower electrode power to the lower electrode of the wafer carrier 341 through the lower matcher 343, so that the lower electrode of the wafer carrier 341 provides RF bias to absorb the plasma above the object to be etched 400 to bombard the object to be etched 400, so as to perform an etching process.

[0094] The semiconductor process equipment of the embodiment of the present application may be an inductively coupled plasma (ICP) etching equipment.

[0095] For other working principles and processes of the semiconductor process equipment of this embodiment, please refer to the description of the cleaning method of the process chamber in the aforementioned embodiment of the present invention, which will not be repeated here.

[0096] The above is a detailed introduction to a process chamber cleaning method and semiconductor process equipment provided by the present application. This article uses specific examples to illustrate the principles and implementation methods of the present application. It should be noted that in the present application, the descriptions of each embodiment have their own emphasis. For parts that are not described or recorded in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0097] The above are only preferred embodiments of the present application, and the patent scope of the present application is not limited thereto. The various technical features of the technical solution of the present application can be arbitrarily combined. In order to make the description concise, not all possible combinations of the various technical features in the above embodiments are described. Any equivalent structure or equivalent process transformation made using the contents of the specification and drawings of this application, or directly or indirectly used in other related technical fields, as long as there is no contradiction in the combination of these technical features, are equally included in the patent protection scope of the present application.

Claims

1. A method for cleaning a process chamber, wherein the process chamber is used for etching a semiconductor device, wherein: The semiconductor device comprises, from bottom to top, a first silicon-containing oxide layer, a metal hard mask layer and a second silicon-containing oxide layer, the etching step comprises etching the metal hard mask layer using the second silicon-containing oxide layer as a mask, and the cleaning method comprises: The first silicon-containing by-product and the silicon-metal mixed by-product cleaning step is as follows: a mixed cleaning gas of a first fluorine-containing gas and a first chlorine-containing gas is introduced into the process chamber to remove the first silicon-containing by-product and the silicon-metal mixed by-product, wherein the molar ratio between the fluorine atoms in the first fluorine-containing gas and the chlorine atoms in the first chlorine-containing gas is (1.8-5):

1.

2. The cleaning method according to claim 1, characterized in that: The molar ratio between the fluorine atoms in the first fluorine-containing gas and the chlorine atoms in the first chlorine-containing gas is (3-4.5):

1.

3. The cleaning method according to claim 1, characterized in that: The first fluorine-containing gas includes NF3 and / or SF6, and the first chlorine-containing gas includes BCl3 and / or Cl2.

4. The cleaning method according to claim 2, characterized in that: The first fluorine-containing gas is NF3, and the flow rate is 400-800 sccm; The first chlorine-containing gas is Cl2, and the flow rate is 120-400 sccm.

5. The cleaning method according to claim 1, characterized in that: In the step of cleaning the first silicon-containing byproduct and the silicon-metal mixed byproduct, the pressure of the process chamber is 10-30 mT, the upper electrode power is 1200-1800 W, and the cleaning time is 20-40 s.

6. The cleaning method according to claim 1, characterized in that: After the first silicon-containing byproduct and the silicon-metal mixed byproduct cleaning step, the method further comprises: Metal-containing byproduct cleaning step: introducing a second chlorine-containing gas into the process chamber to remove the metal-containing byproduct.

7. The cleaning method according to claim 6, characterized in that: The second chlorine-containing gas includes BCl3 and Cl2.

8. The cleaning method according to claim 6, characterized in that: The semiconductor device further comprises a spin-on carbon layer disposed on the second silicon-containing oxide layer, a silicon-containing anti-reflection layer disposed on the spin-on carbon layer, and a photoresist layer disposed on the silicon-containing anti-reflection layer, and the etching step further comprises etching the spin-on carbon layer using the photoresist layer as a mask, and etching the second silicon-containing oxide layer using the spin-on carbon layer as a mask; After the metal-containing byproduct cleaning step, the method further comprises: A second silicon-containing byproduct cleaning step: introducing a second fluorine-containing gas into the process chamber to remove the second silicon-containing byproduct; A first carbon-containing byproduct cleaning step: introducing a first oxygen-containing gas into the process chamber to remove the first carbon-containing byproduct; A third silicon-containing byproduct cleaning step: introducing a third fluorine-containing gas into the process chamber to remove the third silicon-containing byproduct; The second carbon-containing byproduct cleaning step is: introducing a second oxygen-containing gas into the process chamber to remove the second carbon-containing byproduct.

9. The cleaning method according to claim 8, characterized in that: The first fluorine-containing gas is NF3 with a flow rate of 500 sccm, and the first chlorine-containing gas is Cl2 with a flow rate of 200 sccm; The second chlorine-containing gas is BCl3 and Cl2, wherein the flow rate of BCl3 is 100-300 sccm, and the flow rate of Cl2 is 100-300 sccm; The second fluorine-containing gas is NF3, and the flow rate is 200-600 sccm; The first oxygen-containing gas is O2, and the flow rate is 200-500 sccm; The third fluorine-containing gas is NF3, and the flow rate is 200-600 sccm; The second oxygen-containing gas is O2, and the flow rate is 200-500 sccm.

10. The cleaning method according to claim 8, characterized in that: After the second carbon-containing byproduct cleaning step, the method further comprises: Residual reactant cleaning step: introducing an inert gas into the process chamber to remove the residual reactant.

11. The cleaning method according to claim 1, characterized in that: The metal hard mask layer includes a metal nitride layer and / or a high-k dielectric layer.

12. The cleaning method according to any one of claims 1 to 11, characterized in that: The process chamber comprises an air intake structure, wherein the air intake structure comprises a central air intake area, an intermediate air intake area arranged around the central air intake area, and an edge air intake area arranged around the intermediate air intake area; The flow percentages of the gas introduced in each cleaning step in the central air inlet zone, the middle air inlet zone and the edge air inlet zone are 10-33%, 10-33% and 34-80% respectively.

13. A semiconductor process equipment, characterized in that: The invention comprises a process chamber, an air intake structure for introducing gas into the process chamber, and a controller, wherein the controller comprises at least one processor and at least one memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, a cleaning method as described in any one of claims 1 to 12 is implemented.

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