Chip packaging structure and method

Abstract

The invention belongs to the technical field of chip manufacturing, and discloses a chip packaging structure and method. According to the invention, through optimizing the packaging technology, the heat dissipation module and the power chip module are respectively embedded in the core board layer or the core board layer and the rewiring layer in different working procedures, so that the area of a milling groove in one working procedure is reduced, and the rigidity and supporting performance of the PCB are effectively improved; holes caused by the fact that the gaps cannot be fully filled with the resin are reduced, and the yield of finished PCBs is improved; the heat dissipation copper block and the power chip module are separately embedded in the core board layer and the rewiring layer, so that the processing difficulty when the heat dissipation copper block and the power chip module are embedded in the same layer is reduced, and the damage of the PCB in the processing process is reduced; the heat dissipation module and the power chip module are embedded in different layers, so that the selection of the thickness size of the heat dissipation module and the power chip module is enriched, and the design and function diversity of the product is enriched.

Description

Technical Field

[0001] The present application relates to the field of chip manufacturing technology, and in particular to a chip packaging structure and method. Background Art

[0002] As the automotive electronics industry develops rapidly towards high power, miniaturization, and high-density component concentration, the power density on PCB boards continues to increase, while the size becomes smaller and smaller. When high-power chips are working, they generate a lot of heat, which needs to be transferred to the outside in time, otherwise the accumulated heat will cause the junction temperature to be too high, which can easily burn the chip and the PCB board. In order to solve the heat dissipation problem, a common practice is to embed heat dissipation copper blocks around the automotive-grade power chip module to transfer the heat generated by the module through the surrounding heat dissipation copper blocks in time. The existing PCB board with embedded heat dissipation copper block and power chip module adopts the same-layer embedding manufacturing process. The applicant found that the product structure formed by the existing process has the following disadvantages: 1. Since the heat dissipation copper block and the power chip module must be embedded in the same layer, the area for processing the milling grooves used to embed the heat dissipation copper block and the power chip module accounts for more than 80% of the PCB board. Too high a proportion of milling grooves will reduce the support of the PCB board and easily break during operation, thus causing the PCB board to be scrapped; 2. When the heat dissipation copper block and the power chip module are embedded in the same layer, a large amount of glue is used to fill the blind groove next to the embedded heat dissipation copper block and the power chip module. This has extremely high requirements on the thickness of the bonding sheet and the fluidity of the resin, which is easy to produce press-fitting voids, and ultimately leads to product scrapping; 3. Embedding the heat dissipation copper block and the power chip module in the same layer limits the flexibility in design and layout. Therefore, seeking and optimizing the best heat dissipation method and its structural design has become a major challenge facing the current embedded PCB. Summary of the invention

[0003] To this end, the embodiments of the present application provide a chip packaging structure and method, which optimizes the production process and embeds the heat dissipation module and the power chip module in different layers in different processes, thereby reducing damage to the core board during processing, reducing the generation of core board pressing voids, and effectively improving the product yield.

[0004] In a first aspect, the present application provides a chip packaging method.

[0005] This application is achieved through the following technical solutions:

[0006] S1: Performing pattern transfer processing on the upper and lower surfaces of the core board;

[0007] S2: performing a first milling process on the core board after the pattern transfer process to form a first embedded area, wherein the first embedded area is a through groove penetrating the core board;

[0008] S3: Pasting a first module in the first embedded area, where the first module is a heat dissipation module or a power chip module;

[0009] S4: forming a first redistribution structure by laminating on the upper surface of the core board, wherein the bonding sheet of the first redistribution structure melts and fills the gap between the first embedded area and the first module during the laminating process;

[0010] S5: Pressing and forming a second rewiring structure on the lower surface of the core board;

[0011] S6: drilling holes in the first rewiring structure and the second rewiring structure, and filling the holes with first metal connectors;

[0012] S7: performing pattern transfer processing on the surface of the first rewiring structure and the surface of the second rewiring structure;

[0013] S8: performing a second milling process to form a second embedded area, wherein the second embedded area is a through groove that penetrates the first rewiring structure, the core board, and the second rewiring structure;

[0014] S9: Pasting a second module in the second embedded area, where the second module is a heat dissipation module or a power chip module, and the second module has a different structure from the first module;

[0015] S10: forming a third redistribution structure by laminating on the surface of the first redistribution structure, wherein the bonding sheet of the third redistribution structure melts and fills the gap between the second embedded area and the second module during the laminating process;

[0016] S11: forming a fourth redistribution structure by pressing on the surface of the second redistribution structure;

[0017] S12: Drilling holes in the third rewiring structure and filling the holes with second metal connectors.

[0018] In a preferred example of the present application, it can be further configured that the first module is pasted in the first embedded area, including: when the thickness of the power chip module in the chip processing requirements is less than or equal to the thickness of the heat dissipation module, the power chip module is pasted in the first embedded area.

[0019] In a preferred example of the present application, it can be further configured that the first module is pasted in the first embedded area, including: when the thickness of the power chip module in the chip processing requirements is greater than the thickness of the heat dissipation module, the heat dissipation module is pasted in the first embedded area.

[0020] In a preferred example of the present application, it can be further configured that the thickness of the first module is 15 μm to 20 μm smaller than the thickness of the inner core plate.

[0021] In a preferred example of the present application, it can be further configured that, based on the area of ​​the core board, the ratio of the area of ​​the first embedded region to the area of ​​the core board is less than 50%.

[0022] In a preferred example of the present application, it can be further configured that, based on the area of ​​the first redistribution structure, the ratio of the area of ​​the second embedded region to the area of ​​the first redistribution structure is less than 50%.

[0023] In a preferred example of the present application, it can be further configured that a first redistribution structure is formed by pressing on the upper surface of the core board, including:

[0024] A plurality of adhesive sheets and a metal layer are sequentially attached to the upper surface of the core board;

[0025] The chip, the bonding sheet and the metal layer are pressurized at a preset temperature and a preset pressure, so that the bonding sheet melts during the pressurization process and flows into the gap between the first embedded area and the first module to solidify.

[0026] In a preferred example of the present application, it can be further configured that the bonding sheet is a Prepreg epoxy resin sheet or an ABF semi-cured bonding sheet.

[0027] In a preferred example of the present application, it can be further configured that the metal layer is a copper foil, and the thickness of the copper foil satisfies 3 μm to 35 μm.

[0028] In a preferred example of the present application, it can be further configured that the groove milling processing method is one or more of: steel die punching, mechanical milling, CO2 laser drilling and UV cutting.

[0029] In a second aspect, the present application provides a chip packaging structure.

[0030] This application is achieved through the following technical solutions:

[0031] A chip packaging structure comprises: a core board, wherein a first embedded area penetrating through the upper and lower surfaces of the core board is provided;

[0032] A first module is fixed in the first embedded area, the first module is a heat dissipation module or a power chip module, and the gap between the first module and the core board is connected after the adhesive sheet is hot-melted and cured;

[0033] A first rewiring structure is formed on the upper surface of the core board, and the first rewiring structure is provided with a first metal connector, and the first metal connector is used to establish an electrical connection between the first rewiring structure and the core board and the first module;

[0034] A second rewiring structure is formed on the lower surface of the core board, and the second rewiring structure is provided with a first metal connector, and the first metal connector is used for electrical connection between the second rewiring structure and the core board and the first module;

[0035] A second embedded area is provided through the core board, the first rewiring structure and the second rewiring structure, a second module is fixed in the second embedded area, and the second module is a heat dissipation module or a power chip module;

[0036] A third rewiring structure is formed on the surface of the first rewiring structure, and the third rewiring structure is provided with a second metal connector, and the second metal connector is used to establish an electrical connection between the third rewiring structure and the first rewiring structure;

[0037] A fourth redistribution structure is formed on the surface of the second redistribution structure.

[0038] In summary, compared with the prior art, the technical solution provided in the embodiment of the present application has at least the following beneficial effects:

[0039] By optimizing the packaging process, the present application separates the heat dissipation module and the power chip module and embeds them in the core board layer or the core board and the redistribution layer in different processes. This separation reduces the area of ​​the milling groove in one process. Since the area of ​​the milling groove is reduced, the rigidity and support of the PCB board are improved. In addition, the number of gaps that need to be filled in one process is reduced, which also reduces the voids caused by the inability of the resin to fully fill the gaps, thereby improving the yield rate of the finished PCB board. By embedding the heat dissipation copper block and the power chip module separately in the core board layer and the redistribution layer, the processing difficulty of embedding the heat dissipation module and the power chip module in the same layer is reduced, and damage to the PCB board during the processing process is avoided. The heat dissipation module and the power chip module are embedded in different layers, which enriches the selection of thickness sizes of the heat dissipation module and the power chip module, and enriches the design and functional diversity of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 A schematic diagram of a chip packaging method according to an embodiment of the present application;

[0041] Figure 2 A schematic diagram of products of different processes in a chip packaging process provided by an embodiment of the present application;

[0042] Figure 3 A schematic diagram of products of different processes in a chip packaging process provided by an embodiment of the present application;

[0043] Figure 4 A schematic diagram of products of different processes in a chip packaging process provided by an embodiment of the present application;

[0044] Figure 5A schematic diagram of products of different processes in a chip packaging process provided by another embodiment of the present application;

[0045] Figure 6 A schematic diagram of products of different processes in a chip packaging process provided by another embodiment of the present application;

[0046] Figure 7 A schematic structural diagram of a chip packaging structure provided by another embodiment of the present application;

[0047] Description of reference numerals:

[0048] Core board -10, core board upper surface -101, core board lower surface -102, first embedded area -10a, first module -20, first rewiring structure -30, second rewiring structure -40, first metal connector -50, second embedded area -10b, second module -60, third rewiring structure -70, fourth rewiring structure -80, second metal connector -90. DETAILED DESCRIPTION

[0049] This specific embodiment is merely an explanation of the present application and is not a limitation of the present application. After reading this specification, those skilled in the art may make modifications to the present embodiment without any creative contribution as needed, but such modifications are protected by the patent law as long as they are within the scope of the claims of the present application.

[0050] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0051] In addition, the term "and / or" in this application is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this application, unless otherwise specified, generally indicates that the associated objects before and after are in an "or" relationship.

[0052] In this application, the terms "first", "second", etc. are used to distinguish identical or similar items with basically the same effects and functions. It should be understood that there is no logical or temporal dependency between "first", "second", and "nth", nor is there any limitation on quantity and execution order.

[0053] In the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0054] The embodiments of the present application are further described in detail below in conjunction with the drawings in the specification. Figure 1 The chip packaging method provided by the present application comprises the following steps:

[0055] S1: Perform pattern transfer processing on the upper and lower surfaces of the core board.

[0056] The core board is a double-sided copper-clad board, including an inner core board in the middle and copper boards on the two surfaces of the inner core board. Graphic transfer processing is performed on the upper surface (copper foil) and the lower surface (copper foil) of the core board. Specifically, before making the circuit, the core board is first subjected to pre-treatment such as grinding and cleaning, and a photosensitive material is attached to the copper foil using a laminator. The photosensitive material is exposed under the irradiation of an automatic exposure machine to complete the graphic transfer processing; further, through development, etching, and film stripping, unnecessary dry films and copper foils are removed to produce the required graphic circuits. It should be noted that other types of substrates can also be used for the core board. The specific type can be selected according to actual processing requirements, and this application does not impose specific restrictions.

[0057] S2: Performing a first groove milling process on the core board that has completed the pattern transfer process to form a first embedded area.

[0058] According to the design size, the core board to which the pattern transfer is completed in step S1 is milled to form a first embedded area. The first embedded area is used to install a heat dissipation module or a power chip module. The first embedded area is a through groove that runs through the core board. Among them, the milling groove processing method can be one or more of steel die punching, mechanical milling, CO2 laser drilling and UV cutting. Each processing method has its unique advantages, and which method to choose depends on the specific application requirements, cost budget and production efficiency requirements.

[0059] Preferably, based on the area of ​​the core board, the area of ​​the first embedded area accounts for less than 50% of the area of ​​the core board. The area of ​​the core board is the area of ​​the upper surface of the core board, and the area of ​​the first embedded area is the area of ​​the plane parallel to the upper surface of the core board. When the core board is milled for the first time, only the first embedded area for accommodating the first module is milled off, and the area of ​​the milled area will be less than 50%. Compared with the existing technical process in which the area of ​​the core board needs to be milled in one process to reach at least 80%, this design significantly reduces the milling area, thereby enhancing the rigidity of the core board, and correspondingly reduces the risk of damage during the production process, thereby improving the production yield.

[0060] S3: Paste a first module in the first embedded area, where the first module is a heat dissipation module or a power chip module.

[0061] Preferably, before pasting the first module, a high temperature resistant tape is pasted on the lower surface of the core board processed in step S2 by a glue pasting machine, and the glue pasting machine can ensure that the tape is evenly and accurately pasted on the core board.

[0062] The adhesive tape is a composite tape of a 25 μm thick polyimide layer and a 25 μm thick acrylic adhesive layer. The first module is placed in the first embedding area, and the first module is fixed by the adhesive tape at the bottom to prevent movement during subsequent processing. The thickness of the first module is less than the thickness of the inner core board of the core board.

[0063] Preferably, the thickness of the first module is 15 μm to 20 μm smaller than the thickness of the inner core plate.

[0064] S4: The first redistribution structure is formed by laminating on the upper surface of the core board, and the adhesive sheet of the first redistribution structure melts and fills the gap between the first embedded area and the first module during the laminating process.

[0065] The first rewiring structure is used to realize electrical connection and signal transmission, and includes a dielectric layer and a metal layer. The dielectric layer is connected to the upper surface of the core board, and the metal layer is stacked on the upper surface of the dielectric layer.

[0066] Specifically, the manufacturing process of the first rewiring structure is as follows: a number of adhesive sheets and a metal layer are sequentially attached to the upper surface of the core board; the core board, adhesive sheets and metal layers stacked from bottom to top are subjected to pressure transfer under preset temperature and preset pressure conditions, so that the adhesive sheet melts during the pressure transfer process and flows into the gap between the first embedded area and the first module to solidify. In the actual implementation process, a layer of adhesive sheet and a layer of copper foil are attached to the upper surface of the core board, and the settings of the pressure transfer pressure and temperature need to be determined according to the specific adhesive sheet material and equipment capabilities. For example, the temperature can be increased to 100°C to 120°C, and the pressure can be increased to 5kgf / cm 2, maintain at 100-120℃ for 30min, raise the temperature to 190℃-200℃ again, and maintain at 190℃-200℃ for 1h-2h.

[0067] The setting of these parameters requires comprehensive consideration of the material properties of the bonding sheet, equipment conditions, and production efficiency to ensure that the bonding sheet can be effectively melted and solidified during the pressure transfer process to form a good first redistribution structure.

[0068] Preferably, the bonding sheet can be a Prepreg epoxy resin sheet or an ABF semi-cured bonding sheet. The Prepreg epoxy resin sheet has good bonding properties and excellent electrical insulation properties, and can provide good electrical properties for the chip when used in the chip packaging process. The ABF semi-cured bonding sheet has a small dielectric constant and a small dissipation factor, which helps to improve the electrical properties of the chip and facilitates high-speed and high-frequency transmission.

[0069] Preferably, the metal sheet is a copper foil, and the thickness of the copper foil satisfies 3 μm to 35 μm. For example, the thickness of the copper foil may be 3 μm, 12 μm, 18 μm, or 35 μm.

[0070] Since only the first embedded area is formed by milling in step S2, the area requiring the bonding sheet to be filled with resin in step S4 also decreases as the milling area in the previous step S2 decreases. The bonding sheet in the first rewiring structure only needs to fill the gap between the first embedded area and the first module, thereby reducing the difficulty of resin flow and distribution during the lamination process and reducing the risk of lamination voids.

[0071] S5: Pressing and forming a second rewiring structure on the lower surface of the core board.

[0072] Specifically, the tape on the lower surface of the core board is torn off, and several adhesive sheets and a metal layer are sequentially attached to the lower surface of the core board; the stacked core board, adhesive sheets and metal layer are pressure-transferred at a preset temperature and a preset pressure, so that the adhesive sheet melts during the pressure transfer process and flows into the gap between the first embedded area and the first module to solidify.

[0073] S6: Drill holes in the first rewiring structure and the second rewiring structure, and fill the holes with metal connectors.

[0074] Laser drilling is performed on the first rewiring structure and the second rewiring structure respectively, and the laser drilling holes are filled with conductive metal to form metal connectors. The metal connectors in the first rewiring structure are used to establish electrical connections between the metal layer in the first rewiring structure and the core board and the first module; the metal connectors in the second rewiring structure are used to establish electrical connections between the metal layer in the second rewiring structure and the core board and the first module. The metal connectors are copper pillars.

[0075] S7: Performing pattern transfer processing on the surface of the first redistribution structure and the surface of the second redistribution structure.

[0076] The pattern transfer process of the surface of the first rewiring structure and the second rewiring structure can be performed in batches or simultaneously, which is not limited here. Specifically, the core board is first subjected to pre-processing such as grinding and cleaning, and a photosensitive material is attached to the copper foil using a laminator, and the photosensitive material is exposed under the irradiation of an automatic exposure machine to complete the pattern transfer; further, the unnecessary dry film and copper foil are removed through development, etching, and film stripping to produce the required pattern circuit.

[0077] S8: Perform a second milling process to form a second embedded area, where the second embedded area is a through groove that penetrates the first rewiring structure, the core board, and the second rewiring structure.

[0078] According to the design size, the core plate obtained in step S7 is milled to form a second embedded area. The second embedded area is a through groove that runs through the first rewiring structure, the core plate, and the second rewiring structure from top to bottom. The milling groove processing method can be one or more of steel die punching, mechanical milling, CO2 laser drilling, and UV cutting.

[0079] S9: Paste a second module in the second embedded area, where the second module is a heat dissipation module or a power chip module, and the second module has a different structure from the first module.

[0080] The lower surface of the second rewiring structure formed in step S8 is affixed with tape using a glue sticking machine. The tape is a combination of a 25 μm thick polyimide layer and a 25 μm thick acrylic adhesive layer. The second module is placed in the second embedded area, and the second module is fixed by the tape at the bottom. It should be noted that the second module is a different structure from the first module. That is, when the first module is a heat dissipation module, the second module is a power chip module; and when the first module is a power chip module, the second module is a heat dissipation module.

[0081] S10: A third redistribution structure is formed by laminating on the surface of the first redistribution structure, and the bonding sheet of the third redistribution structure melts and fills the gap between the second embedded area and the second module during the laminating process.

[0082] Specifically, several adhesive sheets and a metal layer are sequentially attached to the surface of the first redistribution structure; pressure is transferred at a preset temperature and a preset pressure so that the adhesive sheet melts during the pressure transfer process and flows into the gap between the second embedded area and the second module to solidify.

[0083] S11: forming a fourth redistribution structure by pressing on the surface of the second redistribution structure.

[0084] Specifically, a plurality of adhesive sheets and a metal layer are sequentially attached to the surface of the second rewiring structure; pressure is transferred at a preset temperature and a preset pressure; and a pattern transfer process is performed on the metal layer to form a fourth rewiring structure.

[0085] S12: Drilling holes in the third rewiring structure and filling the holes with second metal connectors.

[0086] Specifically, laser drilling and hole-filling electroplating are performed to fill the laser-drilled blind holes.

[0087] Finally, the outer layer pattern transfer is completed through the processes of film pasting, exposure, development, etching, and film stripping; the core board is completed after solder mask processing, surface treatment and cutting.

[0088] Compared with the existing process of embedding both the heat dissipation module and the power chip module in the core layer, the present application embeds the heat dissipation module and the power chip module separately in the core layer and the rewiring layer on the core layer, thereby reducing the area of ​​the milling groove of the current layer of the PCB board, improving the rigidity and support of the PCB board, and reducing the damage of the PCB board during processing; in addition, the area of ​​the milling groove of the current layer of the PCB board is reduced, avoiding the occurrence of voids due to the inability to fill the resin, and improving the finished product yield of the PCB board; by embedding the heat dissipation module and the power chip module separately in the core layer and the rewiring layer, the processing difficulty when embedding in the same layer is reduced, and the thickness size selection of the heat dissipation module and the power chip module is increased, enriching the design and functional diversity of the product. In addition, the heat dissipation area of ​​the product can be indirectly increased.

[0089] like Figures 2 to 4 As shown, it is a schematic diagram of the structure of the products of different processes in the chip packaging process provided by the first exemplary embodiment of the present application. In this embodiment, the power chip module is first embedded in step S3. The following is a detailed description in conjunction with the diagram:

[0090] Step S1: Figure 2 As shown in a, a pattern transfer process is performed on the core board upper surface 101 of the core board 10 to form a pattern circuit, and a pattern transfer process is performed on the core board lower surface 102 of the core board 10 to form a pattern circuit.

[0091] Step S2: Figure 2 As shown in b, the core board 10 processed in step S1 is subjected to the first milling groove processing by CO2 laser drilling to form a first embedded area 10a; the first embedded area 10a corresponds to the position where the first module needs to be embedded, and the number is the same as the number of first modules that need to be embedded. In this embodiment, the first module is a power chip module.

[0092] Step S3: Figure 2As shown in FIG. 3 , the first module 20 (power chip module) is pasted in the first embedded area 10a. When pasting the first module 20, the first module 20 can be fixed by pasting a high temperature resistant tape on the lower surface 102 of the core board 10.

[0093] Step S4: Figure 2 As shown in FIG. d, a first rewiring structure 30 is formed by pressing on the upper surface 101 of the core board 10. The first rewiring structure 30 includes a dielectric layer (bonding sheet) close to the core board 10 and a metal layer located above the dielectric layer. During the manufacturing process of the first rewiring structure 30, the bonding sheet of the first rewiring structure 30 will melt and flow into the gap between the first embedded area 10a and the first module 20 and solidify in the gap.

[0094] Step S5: Figure 3 As shown in a, the lower surface 102 of the core board 10 is pressed to form a second rewiring structure 40, and the second rewiring structure 40 includes a dielectric layer (bonding sheet) close to the core board 10 and a metal layer located on the surface of the dielectric layer and tightly connected to the dielectric layer;

[0095] Step S6: Figure 3 As shown in b, holes are drilled in the first rewiring structure 30 and the second rewiring structure 40, and copper pillars are filled in the holes to form the first metal connector 50.

[0096] Step S7: Figure 3 As shown in c, a pattern transfer process is performed on the first rewiring structure 30 and the second rewiring structure 40 to form a pattern circuit.

[0097] Step S8: Figure 3 As shown in FIG. 4 , the intermediate product formed in step S7 is subjected to a second milling process by CO2 laser drilling to form a second embedded area 10b, which runs through the first rewiring structure 30, the core board 10 and the second rewiring structure 40.

[0098] Step S9: Figure 4 As shown in FIG. 1 , a second module 60 is pasted in the second embedding area 10b, and the second module 60 is a heat dissipation copper block; the second embedding area 10b corresponds to the position where the second module 60 needs to be embedded, and the number is the same as the number of the second modules 60 that need to be embedded. The second module 60 surrounds the first module 20 and plays the role of transferring heat and conducting current for the first module 20.

[0099] Step S10: Figure 4 As shown in b, a third rewiring structure 70 is formed by pressing on the surface of the first rewiring structure 30. The third rewiring structure 70 includes a dielectric layer and a metal layer tightly connected to the dielectric layer. The metal layer of the third rewiring structure 70 is used for pattern transfer processing to produce a graphic circuit.

[0100] Step S11: Figure 4 As shown in c, a fourth rewiring structure 80 is formed by laminating on the surface of the second rewiring structure 40. The fourth rewiring structure 80 includes a dielectric layer and a metal layer closely connected to the dielectric layer. The metal layer is used for pattern transfer processing to form a pattern circuit.

[0101] Step S12: Figure 4 As shown in FIG. d, a hole is drilled in the third rewiring structure 70 and a second metal connector 90 is filled in the hole.

[0102] Figure 5 and 6 A schematic diagram of the structure of products of different processes in a chip packaging process provided by another exemplary embodiment of the present application. The difference between this embodiment and the first embodiment is that in step S3 of this embodiment, a heat dissipation module is first embedded. Specifically:

[0103] In step S2, if Figure 5 As shown in a, the core board 10 processed in step S1 is subjected to a first milling process by CO2 laser drilling to form a first embedded area 10a; the first embedded area 10a corresponds to a position where the first module needs to be embedded.

[0104] In step S3, if Figure 5 As shown in FIG. 2 b , a first module 20 is pasted in the first embedding area 10 a , and the first module 20 is a heat dissipation module.

[0105] In step S8, Figure 6 As shown in a, the intermediate product formed in step S7 is subjected to a second milling process by CO2 laser drilling to form a second embedded area 10b, and the second embedded area 10b runs through the first rewiring structure 30, the core board 10 and the second rewiring structure 40.

[0106] In step S9: Figure 6 As shown in FIG. 1b, a second module 60 is pasted in the second embedded area 10b, and the second module 60 is a power chip module.

[0107] The third exemplary embodiment of the present application provides a chip packaging structure, such as Figure 7 As shown, the chip packaging structure includes:

[0108] A core plate 10, wherein a first embedded area is formed on the core plate 10 and passes through the upper and lower surfaces;

[0109] A first module 20 is fixed in the first embedded area. The first module 20 is a heat dissipation module or a power chip module. The gap between the first module 20 and the core board 10 is connected by hot-melting and curing the bonding sheet.

[0110] A first rewiring structure 30 is formed on the upper surface of the core board 10. The first rewiring structure 30 is provided with a first metal connector 50. The first metal connector 50 is used to establish an electrical connection between the first rewiring structure 30 and the core board 10 and the first module 20.

[0111] A second rewiring structure 40 is formed on the lower surface of the core plate 10, and the second rewiring structure 40 is provided with a first metal connector 50, and the first metal connector 50 is used for electrical connection between the second rewiring structure 40 and the core plate 10 and the first module 20;

[0112] A second embedded area is provided through the core board 10, the first rewiring structure 30 and the second rewiring structure 40, and a second module 60 is fixed in the second embedded area. The second module 60 is a heat dissipation module or a power chip module.

[0113] A third rewiring structure 70 is formed on the surface of the first rewiring structure 30. The third rewiring structure 70 is provided with a second metal connector 90. The second metal connector 90 is used to establish an electrical connection between the third rewiring structure 70 and the first rewiring structure 30.

[0114] A fourth redistribution structure 80 is formed on the surface of the second redistribution structure 40 .

[0115] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0116] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be distributed and completed by different functional units and modules as needed, that is, the internal structure of the system described in the present application is divided into different functional units or modules to complete all or part of the functions described above.

Claims

1. A chip packaging method, characterized in that: include: S1: Performing pattern transfer processing on the upper and lower surfaces of the core board; S2: performing a first milling process on the core board after the pattern transfer process to form a first embedded area, wherein the first embedded area is a through groove penetrating the core board; S3: Pasting a first module in the first embedded area, where the first module is a heat dissipation module or a power chip module; S4: forming a first redistribution structure by laminating on the upper surface of the core board, wherein the bonding sheet of the first redistribution structure melts and fills the gap between the first embedded area and the first module during the laminating process; S5: Pressing and forming a second rewiring structure on the lower surface of the core board; S6: drilling holes in the first rewiring structure and the second rewiring structure, and filling the holes with first metal connectors; S7: performing pattern transfer processing on the surface of the first rewiring structure and the surface of the second rewiring structure; S8: performing a second milling process to form a second embedded area, wherein the second embedded area is a through groove that penetrates the first rewiring structure, the core board, and the second rewiring structure; S9: Pasting a second module in the second embedded area, where the second module is a heat dissipation module or a power chip module, and the second module has a different structure from the first module; S10: forming a third redistribution structure by laminating on the surface of the first redistribution structure, wherein the bonding sheet of the third redistribution structure melts and fills the gap between the second embedded area and the second module during the laminating process; S11: forming a fourth redistribution structure by pressing on the surface of the second redistribution structure; S12: Drilling holes in the third rewiring structure and filling the holes with second metal connectors.

2. The chip packaging method according to claim 1, characterized in that: Pasting the first module in the first embedded area includes: When the thickness of the power chip module is less than or equal to the thickness of the heat dissipation module in the chip processing requirement, the power chip module is pasted in the first embedding area.

3. The chip packaging method according to claim 1, characterized in that: Pasting the first module in the first embedded area includes: When the chip processing requires that the thickness of the medium-power chip module is greater than the thickness of the heat dissipation module, the heat dissipation module is pasted in the first embedded area.

4. The chip packaging method according to claim 1, characterized in that: The thickness of the first module is 15 μm to 20 μm smaller than the thickness of the inner core plate.

5. The chip packaging method according to claim 1, characterized in that: Based on the area of ​​the core board, a ratio of the area of ​​the first embedded region to the area of ​​the core board is less than 50%.

6. The chip packaging method according to claim 5, characterized in that: Based on the area of ​​the first redistribution structure, the ratio of the area of ​​the second embedded region to the area of ​​the first redistribution structure is less than 50%.

7. The chip packaging method according to claim 1, characterized in that: The first redistribution structure is formed by pressing on the upper surface of the core board, including: A plurality of adhesive sheets and a metal layer are sequentially attached to the upper surface of the core board; The chip, the bonding sheet and the metal layer are pressurized at a preset temperature and a preset pressure, so that the bonding sheet melts during the pressurization process and flows into the gap between the first embedded area and the first module to solidify.

8. The chip packaging method according to claim 7, characterized in that: The bonding sheet is a Prepreg epoxy resin sheet or an ABF semi-cured bonding sheet.

9. The chip packaging method according to claim 7, characterized in that: The metal layer is a copper foil, and the thickness of the copper foil satisfies 3 μm to 35 μm.

10. The chip packaging method according to any one of claims 1 to 9, characterized in that: The groove milling process is as follows: One or more of steel die punching, mechanical milling, CO2 laser drilling and UV cutting.

11. A chip packaging structure, characterized in that: include: A core plate, wherein the core plate is provided with a first embedded area penetrating through the upper and lower surfaces; A first module is fixed in the first embedded area, the first module is a heat dissipation module or a power chip module, and the gap between the first module and the core board is connected after the adhesive sheet is hot-melted and cured; A first rewiring structure is formed on the upper surface of the core board, and the first rewiring structure is provided with a first metal connector, and the first metal connector is used to establish an electrical connection between the first rewiring structure and the core board and the first module; A second rewiring structure is formed on the lower surface of the core board, and the second rewiring structure is provided with a first metal connector, and the first metal connector is used for electrical connection between the second rewiring structure and the core board and the first module; A second embedded area is provided through the core board, the first rewiring structure and the second rewiring structure, a second module is fixed in the second embedded area, and the second module is a heat dissipation module or a power chip module; A third rewiring structure is formed on the surface of the first rewiring structure, and the third rewiring structure is provided with a second metal connector, and the second metal connector is used to establish an electrical connection between the third rewiring structure and the first rewiring structure; A fourth redistribution structure is formed on the surface of the second redistribution structure.

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