Solar power generation system

Abstract

The invention provides a solar power generation system. The solar power generation system comprises a first solar photovoltaic panel and a first direct current optimizer. The first solar photovoltaic panel converts light energy into electric energy to generate a first solar voltage. The first DC optimizer receives the first solar voltage, and performs a first step-down conversion operation on the first solar voltage according to a first pulse width modulation signal to generate a first conversion voltage. The first DC optimizer adjusts a first duty cycle of the first pulse width modulation signal according to the first conversion voltage.

Description

Technical Field

[0001] The invention relates to a solar power generation system, in particular to a solar power generation system with an improved direct current optimizer. Background Art

[0002] In recent years, the solar energy industry has flourished due to the rise of environmental awareness. In a solar power generation system, multiple solar modules are connected in series to generate a higher DC voltage, and the DC voltage is converted into an AC voltage by the back-end inverter for user use. For multiple solar modules, each solar module generates different power due to its environment (for example, whether it is shaded), degree of dirtiness, model, age, installation angle, etc. In order to obtain the maximum power output of each solar module, a DC optimizer is set in the solar power generation system. However, the existing DC optimizer uses a voltage converter (buck-boost DC converter) with a complex circuit and adopts a maximum power tracking method with complex calculations, which increases the area, cost, and calculation time of the DC optimizer. Summary of the invention

[0003] In view of the above, the present invention proposes a solar power generation system. The solar power generation system includes a first solar photovoltaic panel and a first DC optimizer. The first solar photovoltaic panel converts light energy into electrical energy to generate a first solar voltage. The first DC optimizer receives the first solar voltage and performs a first step-down conversion operation on the first solar voltage according to a first pulse width modulation signal to generate a first conversion voltage. The first DC optimizer adjusts a first working period of the first pulse width modulation signal according to the first conversion voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Figure 1 FIG. 4 shows a solar power supply system according to an embodiment of the present invention.

[0005] Figure 2 FIG. 4 shows a solar power supply system according to another embodiment of the present invention.

[0006] Figure 3 Schematic diagram of a solar photovoltaic panel and a DC optimizer according to an embodiment of the present invention.

[0007] Figure 4 FIG. 4 is a diagram showing a microcontroller according to an embodiment of the present invention.

[0008] Figure 5 is a flow chart showing maximum voltage tracking according to an embodiment of the present invention.

[0009] Figure 6 FIG. 2 shows a solar photovoltaic panel and a DC optimizer according to another embodiment of the present invention.

[0010] Figure 7 Schematic diagram of a solar photovoltaic panel, a DC optimizer, and a voltage stabilizing circuit according to an embodiment of the present invention.

[0011]

Explanation of symbols

[0012] 1:Solar power supply system

[0013] 7: Voltage stabilization circuit

[0014] 10_1~10_14: Solar photovoltaic panels

[0015] 11_1~11_14: DC optimizer

[0016] 20_1~20_14: Solar modules

[0017] 30: Driving circuit

[0018] 31: Microcontroller

[0019] 32: Communication module

[0020] 33~34: Switching transistor

[0021] 35: Inductor

[0022] 36: Input capacitor

[0023] 37: Output capacitor

[0024] 38: Buck Converter

[0025] 40: Analog to digital converter (A / D)

[0026] 41: Tracking Circuit

[0027] 42: Pulse Width Modulation (PWM) Signal Generator

[0028] 39: Sub-DC Optimizer

[0029] 60~62: Sub-DC optimizer

[0030] 300: Solar cell

[0031] 120: DC / AC inverter

[0032] D30~D32: Protection diode

[0033] G30~G32: Solar cell group

[0034] N30~N32: Node

[0035] S30A, S30B: driving signal

[0036] S31: Pulse width modulation signal

[0037] S32: Control signal

[0038] S50~S57: Steps

[0039] T30: Positive output terminal

[0040] T31: Negative output terminal

[0041] T32: positive input terminal

[0042] T33: Negative input terminal

[0043] T34: Positive output terminal (+)

[0044] T35: Negative output terminal (-)

[0045] V10_1~V10_14: Solar voltage

[0046] V11_1~V11_14: conversion voltage

[0047] V31: Voltage

[0048] V60~V62: Solar voltage

[0049] V63~V65: conversion voltage

[0050] V120: Series DC input voltage

[0051] VAC: AC output voltage DETAILED DESCRIPTION

[0052] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, a preferred embodiment is given below and described in detail with reference to the accompanying drawings.

[0053] Figure 1 FIG. 2 is a diagram showing a solar power supply system according to an embodiment of the present invention. Figure 1 The solar power supply system 1 includes a plurality of solar photovoltaic panels, a plurality of DC optimizers, and a DC / AC inverter 120. Figure 1In the embodiment, one solar photovoltaic panel corresponds to one DC optimizer. For example, the solar power supply system 1 includes 14 solar photovoltaic panels 10_1-10_14 and 14 DC optimizers 11_1-11_14. Each solar photovoltaic panel includes a plurality of solar cells connected in series, and each solar cell can convert light energy into electrical energy. The solar photovoltaic panels 10_1-10_14 convert the received light energy into electrical energy, and generate solar voltages V10_1-V10_14 respectively. The DC optimizers 11_1-11_14 receive the solar voltages V10_1-V10_14 respectively.

[0054] The DC optimizers 11_1 to 11_14 are connected in series. Figure 1 As shown, each DC optimizer has a positive output terminal (+) and a negative output terminal (-). The negative output terminal of the DC optimizer 11_1 is coupled to the positive output terminal of the DC optimizer 11_2, and the negative output terminal of the DC optimizer 11_2 is coupled to the positive output terminal of the DC optimizer 11_3. Similarly, the negative output terminal of the DC optimizer 11_13 is coupled to the positive output terminal of the DC optimizer 11_14. The positive output terminal of the DC optimizer 11_1 and the negative output terminal of the DC optimizer 11_14 are coupled to two input terminals of the DC / AC inverter 120. Each DC optimizer performs a step-down operation on the solar voltage it receives based on a pulse width modulation signal to generate a corresponding conversion voltage. For example, the DC optimizer 11_1 performs a step-down operation on the solar voltage V10_1 it receives to generate a corresponding conversion voltage V11_1, the DC optimizer 11_2 performs a step-down operation on the solar voltage V10_2 it receives to generate a corresponding conversion voltage V11_2, and the DC optimizer 11_14 performs a step-down operation on the solar voltage V10_14 it receives to generate a corresponding conversion voltage V11_14. For each DC optimizer, when performing the step-down operation, the DC optimizer simultaneously changes the conversion voltage it generates by adjusting the duty cycle of the corresponding pulse width modulation signal, so that the corresponding solar photovoltaic panel can operate at its maximum output power point.

[0055] Based on the series architecture of the DC optimizers 11_1 to 11_14, the DC optimizers 11_1 to 11_14 output conversion voltages V11_1 to V11_14 in series to become a series DC input voltage V120. In detail, the series DC input voltage V120 is equal to the sum of the conversion voltages V11_1 to V11_14. The DC / AC inverter 120 receives the series DC input voltage V120 and performs a DC-AC conversion operation on the series DC input voltage V120 to convert the series DC input voltage V120 into an AC output voltage VAC.

[0056] For example, the amount of sunshine, environmental conditions, device conditions (e.g., degree of dirtiness), device parameters (e.g., model, installation angle), etc., at the locations where the solar photovoltaic panels 10_1 to 10_14 are located are all the same, and the power generation is all 32 volts (V) / 6.25 amperes (A) (i.e., the power is 32V*6.25A=200 watts (W)). In addition, the duty cycle of the pulse width modulation signal performing the step-down operation in the DC optimizers 11_1 to 11_14 is all 100%. In this case, the output generated by each of the DC optimizers 11_1 to 11_14 is 32V / 6.25A. In other words, the conversion voltages V11_1 to V11_14 are all 32V. The input voltage of the DC / AC inverter 120 (ie, the series DC input voltage V120) is 448V (32V*14=448V), and the input current of the DC / AC inverter 120 is 6.25A, so the input power is 2800W (448V*6.25=2800W).

[0057] For example, when one of the solar photovoltaic panels 10_1 to 1_14 (e.g., solar photovoltaic panel 10_1) is blocked by clouds, its maximum output power is approximately 40W (28V*1.43A=40.04W). At this time, the DC optimizer 11_1 performs a maximum voltage tracking operation to change the conversion voltage V11_1 generated by the DC optimizer 11_1 by adjusting the duty cycle of the pulse width modulation signal used in the step-down operation so that it has a maximum voltage value (6.4V). Therefore, the output power of the DC optimizer 11_1 is 40W (6.4V*6.25A=40W), which is approximately equal to the maximum output power of the solar photovoltaic panel 10. According to the above, the DC optimizer 11_1 tracks the maximum voltage value of the conversion voltage V11_1 by changing the duty cycle of the pulse width modulation signal, so that the solar photovoltaic panel 10 can operate at the maximum output power point.

[0058] In one embodiment, each solar photovoltaic panel is configured in a solar module, and the DC optimizer is not disposed in the solar module where the corresponding solar photovoltaic panel is located, that is, a group (corresponding) of solar photovoltaic panels and the DC optimizer are not disposed on the same solar module. In other embodiments, a group (corresponding) of solar photovoltaic panels and the corresponding DC optimizer are disposed on the same solar module. Figure 2As shown, the solar photovoltaic panel 10_1 and the corresponding DC optimizer 11_1 are arranged on the same solar module 20_1, the solar photovoltaic panel 10_2 and the corresponding DC optimizer 11_2 are arranged on the same solar module 20_2, and the solar photovoltaic panel 10_14 and the corresponding DC optimizer 11_14 are arranged on the same solar module 20_14. Compared with the case where a group (corresponding) of solar photovoltaic panels and DC optimizers are not arranged on the same solar module, when a group (corresponding) of solar photovoltaic panels and DC optimizers are arranged on the same solar module, the wires and connectors required for the connection between the solar photovoltaic panels and the corresponding DC optimizers can be reduced, thereby reducing costs. In addition, a group of solar photovoltaic panels and DC optimizers are arranged on the same solar module, which can also reduce the complexity of assembly and reduce the assembly time.

[0059] The following will take the solar photovoltaic panel 10_1 and the corresponding DC optimizer setting 11_1 as an example to illustrate how the DC optimizer setting of the present application changes the generated conversion voltage, that is, how to track the maximum voltage value of the conversion voltage.

[0060] Figure 3 1 shows a solar photovoltaic panel 10_1 and a DC optimizer 11_1 according to an embodiment of the present invention. Figure 3 The solar photovoltaic panel 10_1 includes a plurality of solar cells 300, which are connected in series between the positive output terminal T30 and the negative output terminal T31 of the solar photovoltaic panel 10_1. The plurality of solar cells 300 of the present application can be divided into three solar cell groups G30-G32, and the solar cell groups G30-G32 are connected in series with each other. In detail, the solar cells 300 of the solar cell group G30 are connected in series between the positive output terminal T30 and the node N30, the solar cells 300 of the solar cell group G31 are connected in series between the nodes N30 and N31, and the solar cells 300 of the solar cell group G32 are connected in series between the node N31 and the negative output terminal T31.

[0061] The DC optimizer device 11_1 includes a driving circuit 30, a microcontroller 31, a communication module 32, switching transistors 33 and 34, an inductor 35, an input capacitor 36, an output capacitor 37, and protection diodes D30-D32, wherein the driving circuit 30, the switching transistors 33 and 34, the inductor 35, the input capacitor 36, and the output capacitor 37 form a buck converter 38. In this embodiment, the driving circuit 30, the microcontroller 31, the communication module 32, the switching transistors 33 and 34, the inductor 35, the input capacitor 36, and the output capacitor 37 form a sub-DC optimizer 39, that is, the DC optimizer device 11_1 includes a single sub-DC optimizer device 39. The DC optimizer device 11_1 has a positive input terminal T32 and a negative input terminal T33, which are respectively coupled to the positive output terminal T30 and the negative output terminal T31 of the solar photovoltaic panel 10_1. The cathode of the protection diode D30 is coupled to the positive input terminal T32 of the DC optimizer device 11_1 (i.e., the positive output terminal T30 of the solar photovoltaic panel 10_1), and the anode thereof is coupled to the node N30. The cathode of the protection diode D31 is coupled to the node N30, and the anode thereof is coupled to the node N31. The cathode of the protection diode D32 is coupled to the node N31, and the anode thereof is coupled to the negative input terminal T33 of the DC optimizer device 11_1 (i.e., the negative output terminal T31 of the solar photovoltaic panel 10_1).

[0062] The input capacitor 36 is coupled between the positive input terminal T32 and the negative input terminal T33 of the DC optimizer device 11_1. In this embodiment, the switching transistors 33 and 34 are implemented with N-type metal-oxide-semiconductor (NMOS) transistors. Hereinafter, the switching transistors 33 and 34 are referred to as NMOS transistors. The NMOS transistors 33 and 34 each have a gate, a drain, and a source. The drain of the NMOS transistor 33 is coupled to the positive input terminal T32, the gate thereof is coupled to the driving circuit 30 to receive the driving signal S30A, and the source thereof is coupled to the node N32. The drain of the NMOS transistor 34 is coupled to the node N32, the gate thereof is coupled to the driving circuit 30 to receive the driving signal S30B, and the source thereof is coupled to the negative input terminal T33. The on / off states of the NMOS transistors 33 and 34 are controlled by the driving signals S30A and S30B, respectively. It should be noted that the NMOS transistors 33 and 34 are not in the on state at the same time.

[0063] The DC optimizer 11_1 has a positive output terminal (+) T34 and a negative output terminal (-) T35. The negative input terminal T33 of the DC optimizer 11_1 is directly connected to the negative output terminal T35. The inductor 35 is coupled between the node N32 and the positive output terminal (+) T34 of the DC optimizer 11_1. The output capacitor 37 is coupled between the positive output terminal (+) T34 and the negative output terminal (-) T35.

[0064] The DC optimizer 11_1 receives the solar voltage V10_1 generated by the solar photovoltaic panel 10_1 through the positive input terminal T32 and the negative input terminal T33. The driving circuit 30 receives the pulse width modulation signal S31 generated by the microcontroller 31 to generate the driving signals S30A and S30B. The driving circuit 30 controls the on / off state of the NMOS transistors 33 and 34 through the driving signals S30A and S30B, so that the inductor 35 is charged or discharged to generate the conversion voltage V11_1 between the positive output terminal (+) T34 and the negative output terminal (-) T35. The output capacitor 37 stores the conversion voltage V11_1. According to the above, the step-down operation of the DC optimizer 11_1 is completed according to the working cycle of the pulse width modulation signal S31 through the driving circuit 30, the NMOS transistors 33 and 34, the inductor 35, the input capacitor 36, and the output capacitor 37.

[0065] The microcontroller 31 is coupled to the positive output terminal (+) T34 to receive the conversion voltage V11_1, and adjusts the duty cycle of the pulse width modulation signal S31 according to the conversion voltage V11_1, thereby changing the conversion voltage V11_1. Figure 4 The microcontroller 31 includes an analog-to-digital converter (A / D) 40 and a pulse width modulation (PWM) signal adjustment circuit 43. The PWM signal adjustment circuit 43 includes a tracking circuit 41 and a pulse width modulation (PWM) signal generator 42. The analog-to-digital (A / D) converter 40 is coupled to the positive output terminal T34 of the DC optimizer 11_1 to receive the conversion voltage V11_1, and performs an analog-to-digital conversion operation on the conversion voltage V11_1 to generate a voltage value V40. The tracking circuit 41 receives the voltage value V40, and performs a maximum voltage tracking operation on the voltage value V40 to generate an adjustment signal S41. The PWM signal generator 42 is used to generate a pulse width modulation signal S31. The PWM signal generator 42 receives the adjustment signal S41, and adjusts the duty cycle of the pulse width modulation signal S31 according to the adjustment signal S41.

[0066] See also Figure 3 , the microcontroller 31 can receive a control signal S32 transmitted by a host (not shown) through the communication module 32. Through the control signal S32, the microcontroller 31 can be controlled to adjust the duty cycle of the pulse width modulation signal S31. Through the communication performed by the communication module 32, a host can urgently shut down the output voltage (i.e., the solar voltage V10_1) of the solar photovoltaic panel 10_1 based on safety regulations. For example, the microcontroller 31 adjusts the duty cycle of the pulse width modulation signal S31 to 0% or close to 0% according to the control signal S32, thereby realizing the shutdown of the output voltage of the solar photovoltaic panel 10_1.

[0067] In addition, the microcontroller 31 can transmit the status information of the solar photovoltaic panel 10_1 (e.g., solar voltage V10_1) to a host through the communication module 32. In one embodiment, after receiving the status information of the solar photovoltaic panel 10_1, the host can further determine whether the solar photovoltaic panel 10_1 needs to be cleaned or repaired.

[0068] Figure 5 FIG. 1 is a flow chart showing a maximum voltage tracking method according to an embodiment of the present invention. Figures 3 to 5 Hereinafter, the maximum voltage tracking operation of the present application is described by taking the maximum duty cycle of the pulse width modulation signal S31 as 100% as an example to describe the maximum voltage tracking operation.

[0069] See also Figure 5 , when the microcontroller 31 starts to operate, in step S50, the tracking circuit 41 sets the initial duty cycle X of the pulse width modulation signal S31 to 50%, and sets the initial adjustment amplitude Y for adjusting the duty cycle to 1%. It can be seen that the adjustment amplitude Y is initially set to a positive value, that is, the adjustment direction of the duty cycle is initially set to increase upward. The present invention does not limit the initial duty cycle X and the initial adjustment amplitude Y. In other embodiments, the initial duty cycle X and the initial adjustment amplitude Y can be determined according to system requirements. After step S50, the buck converter 38 performs a buck operation according to the pulse width modulation signal S31 with a duty cycle of 50% to generate a conversion voltage V11_1, and the analog-to-digital converter 40 performs an analog-to-digital conversion operation on the conversion voltage V11_1 to generate a voltage value V40 as the voltage value Vn (step S51). Next, the PWM signal generator 42 adds 1% (Y) to the duty cycle of 50% (X) to obtain a new duty cycle X, i.e., X=X+Y=50%+1%=51% (step S52). During a delay period (step S53), the buck converter 38 performs a buck operation according to the pulse width modulation signal S31 with a duty cycle of 51% to generate a new conversion voltage V11_1. After the delay period, the analog-to-digital converter 40 performs an analog-to-digital conversion operation on the new conversion voltage V11_1 to generate a voltage value V40 as the voltage value Vn+1 (step S54).

[0070] After obtaining the voltage value Vn+1, the tracking circuit 41 determines whether the voltage value Vn+1 is less than the voltage value Vn (Vn+1 < Vn?)(step S56). In step S56, the tracking circuit 41 also determines whether the duty cycle X is equal to 0% (X = 0%?), and determines whether the duty cycle X is equal to 100% (X = 100%?), and generates an adjustment signal S41 according to the determination result. When the tracking circuit 41 determines that the voltage value Vn+1 is not less than the voltage value Vn, the duty cycle X is not equal to 0%, and the duty cycle X is not equal to 100% (step S55 - No), the method proceeds to step S56. In step S56, the tracking circuit 41 makes the voltage value Vn+1 at this time equal to the new voltage value Vn (Vn = Vn+1). At this time, the adjustment amplitude Y is maintained at 1% (positive value). This situation indicates that the PWM signal generator 42 continues to increase the duty cycle. The tracking circuit 41 determines whether the voltage value V40 reaches the maximum voltage (i.e., tracks the maximum voltage) when increasing the duty cycle.

[0071] When the tracking circuit 41 determines that the voltage value Vn+1 is less than the voltage value Vn, the duty cycle X is equal to 0%, or the duty cycle X is equal to 100% (step S55 - Yes), the method proceeds to step S57. In step S57, the tracking circuit 41 reverses the adjustment direction of the duty cycle (i.e., the adjustment direction of the duty cycle is changed to decrease downward). In other words, the tracking circuit 41 changes the polarity of the adjustment amplitude Y (makes Y = -Y = -1%), that is, the adjustment amplitude Y changes from a positive value to a negative value. This situation indicates that the PWM signal generator 42 changes to decrease the duty cycle. The tracking circuit 41 determines whether the voltage value V40 reaches the maximum voltage (i.e., tracks the maximum voltage) when decreasing the duty cycle. After step S57, the tracking circuit 41 makes the voltage value Vn+1 at this time equal to the new voltage value Vn (Vn = Vn+1)(step S56).

[0072] In an embodiment of the present invention, the adjustment signal S41 indicates whether the adjustment amplitude Y is a positive value or a negative value, that is, it indicates the adjustment direction of the duty cycle. After step S56, the method returns to step S52, and the PWM signal generator 42 adds 1% to the 51% duty cycle as the new duty cycle X according to the adjustment signal S41, that is, X = X + Y = 51% + 1% = 52%, or the PWM signal generator 42 subtracts 1% from the 51% duty cycle as the new duty cycle X according to the adjustment signal S41, that is, X = X + Y = 51% + (-1%) = 50%. The method continues to steps S53 - S54 and makes a determination in step S55. After that, the process of tracking the maximum voltage in this application is to execute steps S52 - S57.

[0073] It should be noted that in step S55, once it is determined that the duty cycle X is equal to 0% or the duty cycle X is equal to 100% (step S55-Yes), it means that the duty cycle X has reached the minimum value 0% when the adjustment direction is downward decrease or the duty cycle X has reached the maximum value 100% when the adjustment direction is upward increase. At this time, the tracking circuit 41 reverses the adjustment direction of the duty cycle to continue tracking the maximum voltage.

[0074] according to Figure 5 As can be seen from the flowchart of tracking the maximum voltage, the microcontroller 31 tracks the maximum voltage value of the conversion voltage V11_1 , so that the solar photovoltaic panel 10 can operate at the maximum output power point.

[0075] According to the above embodiments, each of the DC optimizers 11_1 to 11_14 of the present application includes only a buck converter but no boost converter, which reduces the circuit complexity of the DC optimizer and reduces the area and cost of the DC optimizer.

[0076] Furthermore, according to the above embodiment, each of the DC optimizers 11_1 to 11_14 only tracks the maximum voltage without setting a detection resistor to detect the current, so that the corresponding solar photovoltaic panel can work at the maximum output power point. In this way, each of the DC optimizers 11_1 to 11_14 does not need to perform complex calculations and can operate independently without communicating with other DC optimizers, and can adjust their respective conversion voltages in real time.

[0077] In the above embodiment, all solar cell groups G30-G32 of the solar photovoltaic panel 10_1 correspond to a single sub-DC optimizer 39. Figure 6 , the DC optimizer 11_1 includes sub-DC optimizers 60-62, which correspond to the solar cell groups G30-G32 respectively. Figure 6 In the embodiment of the invention, the DC optimizer 11_1 does not include the protection diodes D30-D32. The solar cell group G30 converts light energy into electrical energy to generate a solar voltage V60, the solar cell group G31 converts light energy into electrical energy to generate a solar voltage V61, and the solar cell group G32 converts light energy into electrical energy to generate a solar voltage V62. The sum of the solar voltages V60-V62 is used as the solar voltage V10_1 generated by the solar photovoltaic panel 10_1.

[0078] The sub-DC optimizers 60-62 are connected in series. Figure 6As shown, each sub-DC optimizer has a positive output terminal (+) and a negative output terminal (-). The negative output terminal of the sub-DC optimizer 60 is coupled to the positive output terminal of the sub-DC optimizer 61, and the negative output terminal of the sub-DC optimizer 61 is coupled to the positive output terminal of the sub-DC optimizer 62. The positive output terminal of the sub-DC optimizer 60 and the negative output terminal of the sub-DC optimizer 62 are respectively coupled to the positive output terminal and the negative output terminal of the sub-DC optimizer 11_1. Each sub-DC optimizer performs a step-down operation on the solar voltage it receives based on a pulse width modulation signal to generate a corresponding conversion voltage. For example, the sub-DC optimizer 60 performs a step-down operation on the solar voltage V60 it receives to generate a corresponding conversion voltage V63, the sub-DC optimizer 61 performs a step-down operation on the solar voltage V61 it receives to generate a corresponding conversion voltage V64, and the sub-DC optimizer 62 performs a step-down operation on the solar voltage V62 it receives to generate a corresponding conversion voltage V65. For each sub-DC optimizer, when performing a step-down operation, the sub-DC optimizer simultaneously changes the conversion voltage generated by it by adjusting the duty cycle of the corresponding pulse width modulation signal, so that the corresponding solar photovoltaic panel can operate at its maximum output power point. In this embodiment, the sum of the conversion voltages V63-V65 is used as the conversion voltage V11_1 generated by the DC optimizer 11_1.

[0079] exist Figure 6 In the embodiment, each of the sub-DC optimizers 60-62 includes Figure 3 The microcontroller 31, the communication module 32, and the buck converter 38 of the neutron DC optimizer 39. The operation of the sub-DC optimizers 60-62 can be found in Figure 3 The description is omitted here.

[0080] exist Figure 6 In the embodiment, the conversion voltage V11_1 is equal to the sum of the conversion voltages V63 to V65. Since the sub-DC optimizers 60 to 62 respectively change the conversion voltages V63 to V65, the DC optimizer 11_1 can change the conversion voltage V11_1 more finely, that is, the DC optimizer 11_1 can track the maximum voltage value of the conversion voltage V11_1 more accurately.

[0081] In one embodiment, for each set of solar photovoltaic panels and DC optimizers, a voltage stabilizing circuit may be provided, which generates an operating voltage according to a voltage provided by the solar photovoltaic panels to power the DC optimizers. Figure 7For a set of solar photovoltaic panels 10_1 and DC optimizer 11_1, a voltage regulator circuit 7 is provided. In this embodiment, the voltage regulator circuit 7 is coupled to a node between any two solar cells in a plurality of solar cells connected in series, such as node N31, to receive a voltage V31 on node N31. The voltage regulator circuit 7 generates an operating voltage VDD according to the voltage V31. The operating voltage VDD is provided to the DC optimizer 11_1 to power at least one of the driving circuit 30, the microcontroller 31, and the communication module 32.

[0082] Although the present invention has been disclosed as above in terms of preferred embodiments, it is not intended to limit the present invention. Those skilled in the art may make changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope defined in the attached claims.

Claims

1. A solar power generation system, comprising: A first solar photovoltaic panel, for converting light energy into electrical energy to generate a first solar voltage; as well as A first DC optimizer receives the first solar voltage and performs a first step-down conversion operation on the first solar voltage according to a first pulse width modulation signal to generate a first conversion voltage; The first DC optimizer adjusts the first working period of the first pulse width modulation signal according to the first conversion voltage.

2. The solar power generation system according to claim 1, wherein: The first solar photovoltaic panel comprises: A plurality of solar cells connected in series; The solar cell converts light energy into electrical energy to generate the first solar voltage.

3. The solar power generation system according to claim 1, wherein: The first solar photovoltaic panel and the first DC optimizer are arranged on a single solar module.

4. The solar power generation system of claim 1, further comprising: A power inverter coupled to the first DC optimizer; The power inverter receives the first conversion voltage and generates an AC output voltage according to the first conversion voltage.

5. The solar power generation system of claim 1, further comprising: a second solar photovoltaic panel for converting light energy into electrical energy to generate a second solar voltage; as well as The second DC optimizer receives the second solar voltage and performs a second step-down conversion operation on the second solar voltage according to a second pulse width modulation signal to generate a second conversion voltage, wherein the second DC optimizer adjusts the second working cycle of the second pulse width modulation signal according to the second conversion voltage.

6. The solar power generation system of claim 5, further comprising: A power inverter coupled to the first DC optimizer and the second DC optimizer; The first DC optimizer and the second DC optimizer are connected in series to output the first conversion voltage and the second conversion voltage to form a series DC input voltage; and The power inverter receives the series DC input voltage and converts the series DC input voltage into an AC output voltage.

7. The solar power generation system of claim 1, wherein: The first solar photovoltaic panel comprises: A first solar cell group, comprising a plurality of first solar cells connected in series, wherein the first solar cell group converts light energy into electrical energy to generate the first solar voltage; and a second solar cell group electrically connected to the first solar cell group and comprising a plurality of second solar cells connected in series, wherein the second solar cell group converts light energy into electrical energy to generate a second solar voltage; and The first DC optimizer comprises: A first sub-DC optimizer receives the first solar voltage and performs the first step-down conversion operation on the first solar voltage according to the first pulse width modulation signal to generate the first conversion voltage; and A second sub-DC optimizer receives the second solar voltage and performs a second step-down conversion operation on the second solar voltage according to a second pulse width modulation signal to generate a second conversion voltage; The first sub-DC optimizer adjusts the first duty cycle of the first pulse width modulation signal according to the first conversion voltage, and the second DC optimizer adjusts the second duty cycle of the second pulse width modulation signal according to the second conversion voltage.

8. The solar power generation system according to claim 7, wherein: The first solar cell group, the second solar cell group, the first sub-DC optimizer, and the second sub-DC optimizer are arranged on the same solar cell module.

9. The solar power generation system of claim 7, further comprising: A power inverter coupled to the first sub-DC optimizer and the second sub-DC optimizer; The first sub-DC optimizer and the second sub-DC optimizer are connected in series to output the first conversion voltage and the second conversion voltage to form a series DC input voltage; and The power inverter receives the series DC input voltage and converts the series DC input voltage into an AC output voltage.

10. The solar power generation system according to claim 1, wherein: The first DC optimizer comprises: A buck converter receives the first solar voltage and performs the first buck conversion operation on the first solar voltage according to the first pulse width modulation signal to generate the first conversion voltage; an analog-to-digital converter, receiving the first conversion voltage and performing an analog-to-digital conversion operation on the first conversion voltage to generate a voltage signal; and The microcontroller receives the voltage signal and adjusts the first working period of the first pulse width modulation signal according to the voltage signal so as to track the maximum output voltage of the first DC optimizer.

11. The solar power generation system of claim 10, wherein the first DC optimizer further comprises: A communication module coupled to the microcontroller; The microcontroller is configured to perform at least one of the following: receiving a control signal through the communication module, and adjusting the first duty cycle of the first pulse width modulation signal according to the control signal; and The status information of the solar photovoltaic panel is transmitted to the outside through the communication module.

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