Gate drive circuit and GaN drive circuit

Abstract

According to the gate drive circuit and the GaN drive circuit provided by the invention, the GaN power tube is driven successively through the two different drive units, so that the GaN power tube is driven by the first current signal with a relatively small current value, and then is driven by the second current signal with a relatively large current value after the preset duration, and therefore, through a two-stage drive mode, the GaN power tube can be driven by the first current signal with a relatively small current value, and the GaN power tube can be driven by the second current signal with a relatively large current value. The turn-on rate of the GaN power tube can be reduced, so that the swing rate of the GaN power tube is adjusted, and generation of EMI and VDS voltage spikes is reduced; in addition, the current value of the second current signal is large, so that the GaN power tube can enter a normal working state quickly subsequently, and the working efficiency of the system is improved.

Description

Technical Field

[0001] The present application relates to the technical field of drive circuits, and in particular to a gate drive circuit and a GaN drive circuit. Background Art

[0002] The gate drive circuit of integrated GaN is divided into two parts: GaN power tube and gate drive circuit. As the switching tube and control part of the switching power supply, the gate drive circuit of integrated GaN is widely used in the design of switching power supply circuit.

[0003] However, when GaN power tubes are used as switches, there is a noise risk when they are turned on quickly due to their low conduction threshold. Summary of the invention

[0004] The present application provides a gate drive circuit capable of reducing the risk of noise generated by a GaN power tube.

[0005] A gate drive circuit is applied to a GaN power tube, and the gate drive circuit comprises: A driving circuit, comprising a first driving unit and a second driving unit, wherein the first driving unit and the second driving unit are respectively connected to the gate of the GaN power tube; A PWM logic control circuit is connected to the drive circuit and is used to control the first drive unit to output a first current signal according to a PWM periodic signal in a working state, and to control the second drive unit to output a second current signal after an interval of a preset time; wherein the current value of the first current signal is less than the current value of the second current signal.

[0006] In one embodiment, the first driving unit includes a transistor NM1 and a load R1, the second driving unit includes a transistor NM2, and the driving circuit further includes a transistor PM1; the gate of the transistor NM1, the gate of the transistor NM2, and the gate of the transistor PM1 are respectively connected to the PWM logic control circuit, the first end of the load R1 and the first connection end of the transistor NM2 are commonly connected and used to receive a power supply voltage; the second end of the load R1 is connected to the first connection end of the transistor NM1; the second connection end of the transistor NM1, the second connection end of the transistor NM2, the gate of the GaN power tube, and the first connection end of the transistor PM1 are commonly connected; the second connection end of the transistor PM1 is connected to the ground.

[0007] In one embodiment, the gate drive circuit further includes: The current detection circuit is connected to the source of the GaN power tube and is used to detect the branch current of the GaN power tube in a working state.

[0008] In one embodiment, the current detection circuit includes a transistor PM2, a transistor PM3, an operational amplifier and a load R2; the gate of the transistor PM2 and the gate of the transistor PM3 are used to receive a detection control signal, the first connection end of the transistor PM2 is connected to the source of the GaN power tube and to the same direction end of the operational amplifier; the first connection end of the transistor PM3 is connected to the reverse end of the operational amplifier; the second connection end of the transistor PM2 and the second connection end of the transistor PM3 are connected in common and connected to the first end of the load R2; the output end of the operational amplifier is connected to the second end of the load R2.

[0009] In one embodiment, the gate drive circuit further includes: The overcurrent protection circuit is connected to the current detection circuit and the PWM logic control circuit respectively, and is used to control the PWM logic control circuit to stop output control of the drive circuit in the current cycle if the branch current exceeds the current threshold in the working state.

[0010] In one embodiment, the gate drive circuit further includes: A linear voltage stabilizing circuit, connected to the driving circuit and the PWM logic control circuit respectively; A reference circuit is connected to the linear voltage regulator circuit, and is used to establish a reference voltage. After the reference voltage is established, the linear voltage regulator circuit is started, and the reference voltage is output to the linear voltage regulator circuit, so that the linear voltage regulator circuit generates a power supply voltage according to the reference voltage to supply power to the drive circuit and the PWM logic control circuit.

[0011] In one embodiment, the gate drive circuit further includes: The undervoltage protection circuit is respectively connected to the reference circuit, the linear voltage stabilization circuit, the PWM logic control circuit, the drive circuit, the current detection circuit and the overcurrent protection circuit, and is used to compare the supply voltage with the reference voltage. If the comparison result is characterized as a non-undervoltage state, the PWM logic control circuit, the current detection circuit and the overcurrent protection circuit are controlled to enter a working state.

[0012] In one of the embodiments, the undervoltage protection circuit is further configured to control the PWM logic control circuit, the drive circuit, the current detection circuit and the overcurrent protection circuit to exit a working state if the comparison result indicates an undervoltage state.

[0013] In one embodiment, the gate drive circuit further includes: The over-temperature protection circuit is connected to the PWM logic control circuit and is used to control the PWM logic control circuit to exit the working state if the temperature of the GaN power tube exceeds a temperature threshold in the working state.

[0014] A GaN driving circuit, comprising: GaN power tube; And the gate driving circuit mentioned above.

[0015] In the above, the GaN power tube is driven successively by two different driving units, so that the GaN power tube is first driven by a first current signal with a smaller current value, and then driven by a second current signal with a larger current value after a preset time interval. In this way, through the two-stage driving method, the turn-on rate of the GaN power tube can be reduced, and then the slew rate of the GaN power tube can be adjusted, and the generation of EMI and VDS voltage spikes can be reduced; in addition, since the current value of the second current signal is large, the GaN power tube can be quickly put into a normal working state subsequently, thereby improving the system working efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a structural block diagram of a gate driving circuit according to an embodiment of the present application; Figure 2 is a circuit structure diagram of a driving circuit according to an embodiment of the present application; Figure 3 This is a structural block diagram of a gate driving circuit according to another embodiment of the present application; Figure 4 FIG. 4 is a circuit structure diagram of a current detection circuit according to an embodiment of the present application. DETAILED DESCRIPTION

[0017] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0018] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0019] It should be noted that all directional indications in the embodiments of the present application (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly. The connection can be a direct connection or an indirect connection.

[0020] In addition, in this application, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in this field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by this application.

[0021] Figure 1 FIG. 1 is a block diagram of a gate driving circuit according to an embodiment of the present invention. Figure 1 As shown, a gate driving circuit is applied to a GaN power tube, and the gate driving circuit includes a driving circuit 120 and a PWM logic control circuit 110. The driving circuit 120 includes a first driving unit 121 and a second driving unit 122, and the first driving unit 121 and the second driving unit 122 are respectively connected to the gate of the GaN power tube; the PWM logic control circuit 110 is connected to the driving circuit 120, and is used to control the first driving unit 121 to output a first current signal according to a PWM period signal in a working state, and control the second driving unit 122 to output a second current signal after an interval of a preset time length; wherein the current value of the first current signal is less than the current value of the second current signal.

[0022] It can be understood that the PWM periodic signal is used to drive the PWM logic control circuit 110, so that the PWM logic control circuit 110 converts it into a signal capable of controlling the drive circuit 120. The PWM periodic signal can be provided by an external circuit or generated by the gate drive circuit itself.

[0023] The PWM logic control circuit 110 controls the first drive unit 121 and the second drive unit 122 to output current signals successively only in the working state, wherein the PWM logic control circuit 110 first controls the first drive unit 121 to output a first current signal with a smaller current value to slowly turn on the GaN power tube and control the slew rate of the GaN power tube, and then after a preset time interval, the PWM logic control circuit 110 controls the second drive unit 122 to output a second current signal, and the first current signal and the second current signal together provide a normal working voltage for the GaN power tube, so that the GaN power tube enters a normal working state. In one embodiment, the preset time length can be the minimum time length required for the GaN power tube to reach stability after receiving the first current signal.

[0024] The PWM logic control circuit 110 can generate a drive control signal according to the PWM periodic signal to control the first drive unit 121 and the second drive unit 122 to output corresponding current signals, wherein a delay unit can be provided in the PWM logic control circuit 110. After the drive control signal is generated, on the one hand, the drive control signal is directly output to the first drive unit 121 to generate a first current signal, and on the other hand, the drive control signal is delayed for a preset time length and then output to the second drive unit 122 to generate a second current signal.

[0025] In the above, the GaN power tube is driven successively by two different driving units, so that the GaN power tube is first driven by a first current signal with a smaller current value, and then driven by a second current signal with a larger current value after a preset time interval. In this way, through the two-stage driving method, the turn-on rate of the GaN power tube can be reduced, and then the slew rate of the GaN power tube can be adjusted, and the generation of EMI and VDS voltage spikes can be reduced; in addition, since the current value of the second current signal is large, the GaN power tube can be quickly put into a normal working state subsequently, thereby improving the system working efficiency.

[0026] In one embodiment, Figure 2 As shown, the first driving unit 121 includes a transistor NM1 and a load R1, the second driving unit 122 includes a transistor NM2, and the driving circuit 120 further includes a transistor PM1; the gate of the transistor NM1, the gate of the transistor NM2 and the gate of the transistor PM1 are respectively connected to the PWM logic control circuit 110, the first end of the load R1 and the first connection end of the transistor NM2 are commonly connected and used to receive the power supply voltage; the second end of the load R1 is connected to the first connection end of the transistor NM1; the second connection end of the transistor NM1, the second connection end of the transistor NM2, the gate of the GaN power tube and the first connection end of the transistor PM1 are commonly connected; the second connection end of the transistor PM1 is connected to the ground.

[0027] It can be understood that the power supply voltage received by the first driving unit 121 and the second driving unit 122 can be the same (refer to VDD in the figure), and the structures of the transistors NM1 and NM2 can also be the same. In this way, since the transistor NM1 is also connected in series with the load R1, the current flowing through the transistor NM1 will be less than the current flowing through the transistor NM2 when the power supply voltage is the same. The PWM logic control circuit 110 can generate a driving control signal for controlling the two driving units according to the PWM period signal. The driving control signal is represented by PWM and can directly drive the first driving unit. The driving control signal PWM is delayed and used to drive the second driving unit 122. The driving control signal is represented by PWM_DLY; and the control signal for controlling the conduction of the transistor PM1 is represented by PWM' in the figure, and PWM' can be the inverse signal of PWM.

[0028] The first driving unit 121 and the second driving unit 122 are simple in structure. By adjusting the resistance of the load R1, the current on the transistor NM1 branch can be adjusted, thereby controlling the slew rate of the GaN power tube; and the second-stage enhanced driving circuit 120 with a delayed start function plays a complementary role in the start of the GaN power tube; the combination of the two-stage driving circuit 120 can effectively suppress EMI spikes by delaying for a certain period of time before starting. In some embodiments, the load R1 can be a resistor.

[0029] In one embodiment, Figure 3 As shown, the gate driving circuit further includes a current detection circuit 130, which is connected to the source of the GaN power tube and is used to detect the branch current of the GaN power tube in a working state.

[0030] It can be understood that in order to monitor the state of the GaN power tube and ensure that it is in a normal working state, a current detection circuit 130 can be set to detect the current flowing through the GaN power tube, and the detection result can be used for subsequent control of the GaN power tube. In one embodiment, the working state of the current detection circuit 130 can be controlled by the PWM logic control circuit 110.

[0031] In one embodiment, Figure 4 As shown, the current detection circuit 130 includes a transistor PM2, a transistor PM3, an operational amplifier 131 and a load R2; the gate of the transistor PM2 and the gate of the transistor PM3 are used to receive a detection control signal, the first connection end of the transistor PM2 is connected to the source of the GaN power tube, and is connected to the same direction end of the operational amplifier 131; the first connection end of the transistor PM3 is connected to the reverse end of the operational amplifier 131; the second connection end of the transistor PM2 and the second connection end of the transistor PM3 are connected in common, and are connected to the first end of the load R2; the output end of the operational amplifier 131 is connected to the second end of the load R2.

[0032] It can be understood that the transistor PM2 and the transistor PM3 form a pair of current mirrors, and the current on the GaN power tube branch is proportionally scaled by the current mirror. The operational amplifier 131 and the internal negative feedback circuit are used to collect the voltages on the GaN power tube branch and the current mirror branch, respectively, so as to convert the corresponding input voltage into an output voltage for current detection, and the branch current of the GaN power tube can be known through the output voltage. Among them, the detection control signal can be the same signal as the drive control signal PWM output by the PWM logic control circuit 110 to the first drive unit 121.

[0033] In general current detection circuit 130 applications, current detection is performed by connecting a detection resistor R in series, and the resistance of the detection resistor R is between a few Ω and tens of Ω. When the current on the GaN power tube branch is larger, the power consumption on the detection resistor R is calculated by P=IR 2 It can be seen that it will increase linearly, and this circuit introduces a current detection method that eliminates the external current detection resistor. By detecting the voltage drop of the power tube on the GaN branch, compared with the traditional circuit that uses a series resistor on a large current branch for current detection, this circuit can reduce the power loss caused by resistor heating and improve the overall working efficiency of the system.

[0034] In one embodiment, the gate drive circuit further includes an overcurrent protection circuit 140, such as Figure 3 As shown, the overcurrent protection circuit 140 is connected to the current detection circuit 130 and the PWM logic control circuit 110 respectively, and is used to control the PWM logic control circuit 110 to stop controlling the drive circuit 120 in the current cycle if the branch current exceeds the current threshold in the working state.

[0035] It can be understood that the PWM periodic signal can be a periodic signal, and its level in a single cycle is high or low. When it is at a high level, the driving circuit 120 outputs a current signal; after the current detection circuit 130 detects the branch current, it will be transmitted to the overcurrent protection circuit 140, and then the overcurrent protection circuit 140 determines whether the GaN power tube has an overcurrent condition according to the branch current. If it is determined to be overcurrent, the PWM logic control circuit 110 is controlled to stop the output control of the driving circuit 120 in the current cycle, so as to ensure the safety of the circuit. In some embodiments, when the current detection circuit 130 includes an operational amplifier 131, the overcurrent protection circuit 140 is connected to the output end of the operational amplifier 131.

[0036] In one embodiment, the gate driving circuit further includes a linear voltage regulator circuit 150 and a reference circuit 160. Figure 3 As shown, the linear voltage regulator circuit 150 is respectively connected to the driving circuit 120 and the PWM logic control circuit 110; the reference circuit 160 is connected to the linear voltage regulator circuit 150, and is used to establish a reference voltage, and start the linear voltage regulator circuit 150 after the reference voltage is established, and output the reference voltage to the linear voltage regulator circuit 150, so that the linear voltage regulator circuit 150 generates a power supply voltage according to the reference voltage to supply power to the driving circuit 120 and the PWM logic control circuit 110.

[0037] It can be understood that after the circuit is powered on, the reference circuit 160 enters the working state, thereby establishing the reference voltage. After the reference voltage is established, a BANDGAPOK signal, i.e., a bandgap reference voltage establishment completion flag signal, can be generated, thereby enabling the linear voltage regulator circuit 150, so that the linear voltage regulator circuit 150 generates a supply voltage based on the reference voltage. In some embodiments, when the driving circuit 120 includes a load R1 and a transistor NM2, the linear voltage regulator circuit 150 is respectively connected to the first terminal of the load R1 and the first connection terminal of the transistor NM2 to provide a supply voltage.

[0038] The linear voltage regulator circuit 150 can obtain a stable power supply voltage based on the reference voltage. The power supply voltage may include a 5V voltage and a 6V voltage, wherein the 5V voltage is used to power the PWM logic control circuit 110 , and the 6V voltage is used to power the drive circuit 120 .

[0039] By using the reference circuit 160 to first establish a reference voltage, and then driving the linear voltage regulator circuit 150 after the establishment, the power supply voltage required by the subsequent circuit can be obtained, which can not only reduce power consumption but also achieve ideal power supply for the subsequent circuit.

[0040] In one embodiment, the gate drive circuit further includes an undervoltage protection circuit 170, such as Figure 3 As shown, the undervoltage protection circuit 170 is respectively connected to the reference circuit 160, the linear voltage regulator circuit 150, the PWM logic control circuit 110, the drive circuit 120, the current detection circuit 130 and the overcurrent protection circuit 140, and is used to compare the supply voltage with the reference voltage. If the comparison result is characterized as a non-undervoltage state, the PWM logic control circuit 110, the drive circuit 120, the current detection circuit 130 and the overcurrent protection circuit 140 are controlled to enter a working state.

[0041] Among them, the first driving unit and the second driving unit of the driving circuit 120 can output current signals only when they are in working state. It can be understood that the undervoltage protection circuit 170 can collect the reference voltage and the power supply voltage, and the reference voltage is used to provide a reference. Under normal working conditions, the difference between the power supply voltage and the reference voltage is within a normal range. When the undervoltage protection circuit 170 obtains that the power supply voltage belongs to the normal range based on the reference voltage through comparison, it indicates that it is in a non-undervoltage state. At this time, the undervoltage protection circuit 170 can control the PWM logic control circuit 110, the driving circuit 120, the current detection circuit 130 and the overcurrent protection circuit 140 to enter the working state.

[0042] In one embodiment, the undervoltage protection circuit 170 is further configured to control the PWM logic control circuit 110 , the drive circuit 120 , the current detection circuit 130 and the overcurrent protection circuit 140 to exit the working state if the comparison result indicates an undervoltage state.

[0043] It can be understood that when the undervoltage protection circuit 170 obtains through comparison that the power supply voltage deviates too much or too little from the reference voltage, it indicates an undervoltage state. At this time, the linear voltage regulator circuit 150 may fail. To ensure the safety of the circuit, the undervoltage protection circuit 170 can control the PWM logic control circuit 110, the drive circuit 120, the current detection circuit 130 and the overcurrent protection circuit 140 to exit the working state, thereby stopping driving the GaN power tube and reducing the power consumption of related circuits.

[0044] In one embodiment, the gate drive circuit further includes an over-temperature protection circuit 180, such as Figure 3 As shown, the over-temperature protection circuit 180 is connected to the PWM logic control circuit 110 and is used to control the PWM logic control circuit 110 to exit the working state if the temperature of the GaN power tube exceeds the temperature threshold in the working state.

[0045] It can be understood that the over-temperature protection circuit 180 can be set at a position close to the GaN power tube to monitor the temperature of the GaN power tube. If the temperature exceeds the temperature threshold, it indicates that the GaN power tube may have an abnormal operation. At this time, the PWM logic control circuit 110 is turned off, so that the first current signal and the second current signal stop outputting, and the GaN power tube is disconnected, so that the circuit safety can be guaranteed. In one embodiment, when the gate drive circuit includes an undervoltage protection circuit 170, the over-temperature protection circuit 180 is also connected to the undervoltage protection circuit 170. The undervoltage protection circuit 170 is also used to control the over-temperature protection circuit 180 to enter the working state if the comparison result between the supply voltage and the reference voltage is characterized as a non-undervoltage state, and to control the over-temperature protection circuit 180 to exit the working state if the comparison result is characterized as an undervoltage state.

[0046] The embodiment of the present invention further provides a gate drive circuit, such as Figure 3 As shown, it includes a driving circuit 120, a PWM logic control circuit 110, a current detection circuit 130, an overcurrent protection circuit 140, an overtemperature protection circuit 180, a linear voltage regulator circuit 150, a reference circuit 160 and an undervoltage protection circuit 170; wherein the driving circuit 120 includes a first driving unit 121 and a second driving unit 122 and a transistor PM1, the first driving unit 121 includes a transistor NM1 and a load R1, the second driving unit 122 includes a transistor NM2, and the current detection circuit 130 includes a transistor PM2, a transistor PM3, an operational amplifier 131 and a load R2; the specific connection relationship and specific working principle of each component can refer to the above embodiment, and will not be repeated here.

[0047] The working process of the gate drive circuit is briefly described below.

[0048] After the circuit is powered on, the reference circuit 160 and the undervoltage protection circuit 170 start working. When the reference voltage reaches the threshold, the reference circuit 160 generates a BANDGAPOK signal to control the start of the linear voltage regulator circuit 150, and the linear voltage regulator circuit 150 outputs 5V and 6V supply voltages; at the same time, the undervoltage protection circuit 170 compares the supply voltage with the reference voltage. If the result is not an undervoltage state, it generates a POK signal to control the start of the PWM logic control circuit 110, the drive circuit 120, the current detection circuit 130, the overcurrent protection circuit 140, and the overtemperature protection circuit 180. At this time, all circuits enter the working state. During this period, if the undervoltage protection circuit 170 detects an undervoltage state, it flips the level of the POK signal to control the stop of the PWM logic control circuit 110, the drive circuit 120, the current detection circuit 130, the overcurrent protection circuit 140, and the overtemperature protection circuit 180.

[0049] When all circuit modules enter the working state, the external input PWM cycle signal enters the PWM logic control circuit 110; in the T1 time period, when the PWM cycle signal is high, the control driving circuit 120 drives the GaN power tube by the first driving unit 121 according to the slew rate adjusted by the resistor R1, and after a delay of the T2 time period, the second driving unit 122 is turned on to drive the GaN power tube together; after the GaN power tube is turned on, the current detection circuit 130 starts to detect the current size on the branch, and when the branch current exceeds the set threshold, the overcurrent protection signal is triggered, and the GaN power tube enters the forced shutdown state within the PWM cycle, waiting for the next cycle PWM high level signal to turn on the GaN power tube; in the T3 time period, when the PWM cycle signal is low, the driving circuit 120 turns off the GaN power tube, and at this time the current detection circuit 130 is also turned off, and the GaN power tube branch is completely in the closed state.

[0050] The embodiment of the present invention further provides a GaN driving circuit 120, comprising a GaN power tube; and the gate driving circuit of any of the above embodiments.

[0051] The gate driving circuit in the GaN driving circuit 120 of the present embodiment reduces the turn-on rate of the GaN power tube through a two-stage driving method, thereby adjusting the slew rate of the GaN power tube and reducing the generation of EMI and VDS voltage spikes; in addition, since a larger current signal is used in the secondary driving, the GaN power tube can quickly enter a normal working state, thereby improving the system working efficiency.

[0052] The above description is only a preferred embodiment of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A gate drive circuit, characterized in that: Applied to GaN power tube, the gate drive circuit includes: A driving circuit, comprising a first driving unit and a second driving unit, wherein the first driving unit and the second driving unit are respectively connected to the gate of the GaN power tube; A PWM logic control circuit is connected to the drive circuit and is used to control the first drive unit to output a first current signal according to a PWM periodic signal in a working state, and to control the second drive unit to output a second current signal after an interval of a preset time; wherein the current value of the first current signal is less than the current value of the second current signal.

2. The gate driving circuit according to claim 1, characterized in that: The first driving unit includes a transistor NM1 and a load R1, the second driving unit includes a transistor NM2, and the driving circuit further includes a transistor PM1; the gate of the transistor NM1, the gate of the transistor NM2, and the gate of the transistor PM1 are respectively connected to the PWM logic control circuit, the first end of the load R1 and the first connection end of the transistor NM2 are commonly connected and used to receive a power supply voltage; the second end of the load R1 is connected to the first connection end of the transistor NM1; the second connection end of the transistor NM1, the second connection end of the transistor NM2, the gate of the GaN power tube, and the first connection end of the transistor PM1 are commonly connected; the second connection end of the transistor PM1 is connected to the ground.

3. The gate driving circuit according to claim 1, characterized in that: The gate drive circuit further includes: The current detection circuit is connected to the source of the GaN power tube and is used to detect the branch current of the GaN power tube in a working state.

4. The gate driving circuit according to claim 3, characterized in that: The current detection circuit includes a transistor PM2, a transistor PM3, an operational amplifier and a load R2; the gate of the transistor PM2 and the gate of the transistor PM3 are used to receive a detection control signal, the first connection end of the transistor PM2 is connected to the source of the GaN power tube and to the same direction end of the operational amplifier; the first connection end of the transistor PM3 is connected to the reverse end of the operational amplifier; the second connection end of the transistor PM2 and the second connection end of the transistor PM3 are connected in common and connected to the first end of the load R2; the output end of the operational amplifier is connected to the second end of the load R2.

5. The gate drive circuit according to claim 3 or 4, characterized in that: The gate drive circuit further includes: The overcurrent protection circuit is connected to the current detection circuit and the PWM logic control circuit respectively, and is used to control the PWM logic control circuit to stop output control of the drive circuit in the current cycle if the branch current exceeds the current threshold in the working state.

6. The gate driving circuit according to claim 5, characterized in that: The gate drive circuit further includes: A linear voltage stabilizing circuit, connected to the driving circuit and the PWM logic control circuit respectively; A reference circuit is connected to the linear voltage regulator circuit, and is used to establish a reference voltage. After the reference voltage is established, the linear voltage regulator circuit is started, and the reference voltage is output to the linear voltage regulator circuit, so that the linear voltage regulator circuit generates a power supply voltage according to the reference voltage to supply power to the drive circuit and the PWM logic control circuit.

7. The gate driving circuit according to claim 6, characterized in that: The gate drive circuit further includes: The undervoltage protection circuit is respectively connected to the reference circuit, the linear voltage stabilization circuit, the PWM logic control circuit, the drive circuit, the current detection circuit and the overcurrent protection circuit, and is used to compare the supply voltage with the reference voltage. If the comparison result is characterized as a non-undervoltage state, the PWM logic control circuit, the drive circuit, the current detection circuit and the overcurrent protection circuit are controlled to enter a working state.

8. The gate driving circuit according to claim 7, characterized in that: The undervoltage protection circuit is also used to control the PWM logic control circuit, the drive circuit, the current detection circuit and the overcurrent protection circuit to exit the working state if the comparison result is characterized by an undervoltage state.

9. The gate driving circuit according to claim 1, characterized in that: The gate drive circuit further includes: The over-temperature protection circuit is connected to the PWM logic control circuit and is used to control the PWM logic control circuit to exit the working state if the temperature of the GaN power tube exceeds a temperature threshold in the working state.

10. A GaN driving circuit, characterized in that: include: GaN power tube; And the gate drive circuit according to any one of claims 1 to 9.

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