Control method of inverter circuit, controller, inverter circuit and storage medium

Abstract

The invention discloses a control method of an inverter circuit, a controller, the inverter circuit and a storage medium. The inverter circuit is used for converting a direct-current power supply into an alternating-current power supply. The inverter circuit comprises a first capacitor, a second capacitor, a first switching tube, a second switching tube, a third switching tube, a fourth switching tube, a fifth switching tube, a sixth switching tube, a seventh switching tube and an eighth switching tube, and the method comprises the following steps: acquiring a first voltage at two ends of the first capacitor and a second voltage at two ends of the second capacitor, calculating a difference value between the first voltage and the second voltage; according to the difference value and the alternating current power supply, the time for controlling the first switching tube to be switched off is different from the time for controlling the third switching tube to be switched off in the same work period, or the time for controlling the second switching tube to be switched off is different from the time for controlling the fourth switching tube to be switched off in the same work period. By means of the mode, the inverter circuit can keep high working efficiency and performance, and the risk that devices in the inverter circuit are damaged is reduced.

Description

Technical Field

[0001] Embodiments of the present application relate to the field of switch tube control technology, and in particular to a control method, a controller, an inverter circuit, and a storage medium for an inverter circuit. Background Art

[0002] The inverter circuit is a basic circuit type in power electronics technology. Its main function is to convert direct current into alternating current. The specific circuit structure of an inverter circuit is as follows: Figure 1 As shown. Figure 1 In the inverter circuit shown, when it works normally, usually the first switch tube and the third switch tube are turned on and turned off at the same time, and the second switch tube and the fourth switch tube are turned on and turned off at the same time.

[0003] However, due to possible differences in the switching tubes or asynchronous signals output by the software to the switching tubes, the conduction of the first switching tube and the third switching tube may be asynchronous, and / or the conduction of the second switching tube and the fourth switching tube may be asynchronous. This may cause the voltage across the first capacitor to be different from the voltage across the second capacitor, which may not only affect the working efficiency and performance of the inverter circuit, but may also cause damage to the devices in the inverter circuit. Summary of the invention

[0004] The embodiments of the present application provide a control method, a controller, an inverter circuit and a storage medium for an inverter circuit, which can enable the inverter circuit to maintain high working efficiency and performance and reduce the risk of damage to devices in the inverter circuit.

[0005] In a first aspect, an embodiment of the present application provides a control method for an inverter circuit, wherein the inverter circuit is used to convert a DC power supply into an AC power supply, and the inverter circuit includes first to second capacitors and first to eighth switch tubes, wherein the first capacitor and the second capacitor, the first switch tube and the fourth switch tube, and the second switch tube and the third switch tube are all connected in series between the positive electrode of the DC power supply and the negative electrode of the DC power supply, the fifth switch tube and the sixth switch tube are connected in series between the first node and the second node, and the seventh switch tube and the eighth switch tube are connected in series between the second node and the third node, wherein the first switch tube and the fourth switch tube, the second switch tube and the third switch tube are all connected in series in the same direction, the fifth switch tube and the sixth switch tube, the seventh switch tube and the eighth switch tube are all connected in series in the opposite direction, the first node is the connection point between the first switch tube and the fourth switch tube, the second node is the connection point between the first capacitor and the second capacitor, and the third node is the connection point between the second switch tube and the third switch tube, and the method includes: Obtaining a first voltage and a second voltage across the first capacitor and the second capacitor respectively, and calculating a difference between the two; According to the difference and the AC power supply, the time when the first switch tube is turned off is different from the time when the third switch tube is turned off in the same working cycle, or the time when the second switch tube is turned off is different from the time when the fourth switch tube is turned off in the same working cycle.

[0006] Further, the moment when the first switch tube is controlled to be turned off is different from the moment when the third switch tube is turned off, or the moment when the second switch tube is controlled to be turned off is different from the moment when the fourth switch tube is turned off, in the same working cycle according to the difference and the AC power supply, including: when the difference is greater than zero, according to the AC power supply, the moment when the first switch tube is controlled to be turned off is later than the moment when the third switch tube is turned off, or the moment when the second switch tube is controlled to be turned off is later than the moment when the fourth switch tube is turned off in the same working cycle; when the difference is less than zero, according to the AC power supply, the moment when the third switch tube is controlled to be turned off is later than the moment when the first switch tube is turned off, or the moment when the fourth switch tube is controlled to be turned off is later than the moment when the second switch tube is turned off in the same working cycle.

[0007] Further, when the difference is greater than zero, according to the AC power supply, the moment when the first switch tube is controlled to be turned off is later than the moment when the third switch tube is turned off in the same working cycle, or the moment when the second switch tube is controlled to be turned off is later than the moment when the fourth switch tube is turned off in the same working cycle, including: when the difference is greater than zero, if the AC power supply is in the positive half cycle, then the moment when the first switch tube is controlled to be turned off is later than the moment when the third switch tube is turned off in the same working cycle.

[0008] Further, when the difference is greater than zero, according to the AC power supply, the moment when the first switch tube is controlled to be turned off is later than the moment when the third switch tube is turned off in the same working cycle, or the moment when the second switch tube is controlled to be turned off is later than the moment when the fourth switch tube is turned off in the same working cycle, including: when the difference is greater than zero, if the AC power supply is in the negative half cycle, then the moment when the second switch tube is controlled to be turned off is later than the moment when the fourth switch tube is turned off in the same working cycle.

[0009] Further, when the difference is less than zero, according to the AC power supply, the timing of controlling the third switch tube to be turned off is later than the timing of controlling the first switch tube to be turned off in the same working cycle, or, the timing of controlling the fourth switch tube to be turned off is later than the timing of controlling the second switch tube to be turned off in the same working cycle, including: when the difference is less than zero, if the AC power supply is in the positive half cycle, then the timing of controlling the third switch tube to be turned off is later than the timing of controlling the first switch tube to be turned off in the same working cycle.

[0010] Further, when the difference is less than zero, according to the AC power supply, the timing of controlling the third switch tube to be turned off is later than the timing of controlling the first switch tube to be turned off in the same working cycle, or, the timing of controlling the fourth switch tube to be turned off is later than the timing of controlling the second switch tube to be turned off in the same working cycle, including: when the difference is less than zero, if the AC power supply is in the negative half cycle, then the timing of controlling the fourth switch tube to be turned off is later than the timing of controlling the second switch tube to be turned off in the same working cycle.

[0011] Furthermore, the method also includes: applying a proportional-integral algorithm to the difference to obtain a compensation time; setting the compensation time to the time between the moment when the first switch tube is turned off and the moment when the third switch tube is turned off, or setting the compensation time to the time between the moment when the second switch tube is turned off and the moment when the fourth switch tube is turned off.

[0012] In a second aspect, an embodiment of the present application provides a controller comprising: at least one processor and a memory; the memory is coupled to the processor, and the memory is used to store instructions or programs. When the instructions or programs are executed by the at least one processor, the at least one processor executes the control method as described above.

[0013] In a third aspect, an embodiment of the present application provides an inverter circuit, including a first capacitor, a second capacitor, a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a fifth switch tube, a sixth switch tube, a seventh switch tube, an eighth switch tube and the controller; the first capacitor and the second capacitor, the first switch tube and the fourth switch tube, the second switch tube and the third switch tube are all connected in series between the positive electrode of the DC power supply and the negative electrode of the DC power supply, the fifth switch tube and the sixth switch tube are connected in series between the first node and the second node, the seventh switch tube and the eighth switch tube are connected in series between the second node and the third node, wherein the The first switch tube and the fourth switch tube, the second switch tube and the third switch tube are all connected in series in the same direction, the fifth switch tube and the sixth switch tube, the seventh switch tube and the eighth switch tube are all connected in series in the opposite direction, the first node is the connection point of the first switch tube and the fourth switch tube, the second node is the connection point of the first capacitor and the second capacitor, and the third node is the connection point of the second switch tube and the third switch tube; the controller is connected to the first switch tube, the second switch tube, the third switch tube, the fourth switch tube, the fifth switch tube, the sixth switch tube, the seventh switch tube and the eighth switch tube respectively.

[0014] In a fourth aspect, an embodiment of the present application provides a computer storage medium, which stores instructions or programs. When the instructions or programs are executed by at least one processor, the at least one processor executes the control method as described above.

[0015] The beneficial effect of the present application is that the inverter circuit in the control method of the inverter circuit in the embodiment of the present application is used to convert a DC power supply into an AC power supply, and the inverter circuit includes a first capacitor, a second capacitor, a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a fifth switch tube, a sixth switch tube, a seventh switch tube and an eighth switch tube, the first capacitor and the second capacitor, the first switch tube and the fourth switch tube, the second switch tube and the third switch tube are all connected in series between the positive electrode of the DC power supply and the negative electrode of the DC power supply, the fifth switch tube and the sixth switch tube are connected in series between the first node and the second node, and the seventh switch tube and the eighth switch tube are connected in series between the second node and the third node, wherein the first switch tube and the fourth switch tube, the second switch tube and the third switch tube are all connected in series in the same direction, the fifth switch tube and the sixth switch tube, the seventh switch tube and the eighth switch tube are all connected in series in the opposite direction, the first node is the connection point of the first switch tube and the fourth switch tube, the second node is the connection point of the first capacitor and the second capacitor, and the third node is the connection point of the second switch tube and the third switch tube. The control method first obtains a first voltage across the first capacitor and a second voltage across the second capacitor, and calculates the difference between the first voltage and the second voltage. According to the difference, it can be determined whether it is necessary to adjust the moment when the first switch tube to the fourth switch tube are turned off. According to the AC power supply, the switch tube whose turn-off moment needs to be adjusted can be determined. It can be seen that, in combination with the difference and the AC power supply, the switch tube whose turn-off moment needs to be adjusted can be accurately found when the first voltage and the second voltage are unbalanced. Then, by adjusting the switch tube whose turn-off moment needs to be adjusted, it can be achieved that the moment when the first switch tube is turned off is different from the moment when the third switch tube is turned off in the same working cycle, or the moment when the second switch tube is turned off is different from the moment when the fourth switch tube is turned off in the same working cycle, so as to reduce the difference between the first voltage and the second voltage, thereby making the first voltage and the second voltage tend to be balanced, which is beneficial to maintaining a high working efficiency and performance of the inverter circuit and reducing the risk of damage to devices in the inverter circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] One or more embodiments are exemplarily described by the figures in the corresponding drawings, and these exemplary descriptions are not intended to limit the embodiments. Elements with the same reference numerals in the drawings represent similar elements.

[0017] Figure 1 is a circuit structure diagram of an inverter circuit provided in an embodiment of the present application; Figure 2 yes Figure 1The control method 1 of the inverter circuit shown; Figure 3 yes Figure 1 The control method 2 of the inverter circuit shown; Figure 4 The control method of the inverter circuit provided in the embodiment of the present application is as follows: Figure 1 ; Figure 5 The embodiment of this application provides Figure 4 A schematic diagram of an implementation of step 402 is shown in FIG. Figure 6 The embodiment of this application provides Figure 5 A schematic diagram of an implementation of step 501 shown in FIG. Figure 7 yes Figure 1 The control method three of the inverter circuit shown; Figure 8 The embodiment of this application provides Figure 5 A schematic diagram of another embodiment of step 501 shown in FIG. Fig. 9 yes Figure 1 The control method 4 of the inverter circuit shown; Fig.10 The embodiment of this application provides Figure 5 A schematic diagram of an implementation of step 502 is shown in FIG. Fig.11 yes Figure 1 The control method five of the inverter circuit shown; Fig.12 The embodiment of this application provides Figure 5 A schematic diagram of another embodiment of step 502 is shown in FIG. Fig.13 yes Figure 1 The control method six of the inverter circuit shown; Fig.14 The control method of the inverter circuit provided in the embodiment of the present application is as follows: Figure 2 ; Fig.15 The control method of the inverter circuit provided in the embodiment of the present application is as follows: Figure 3 ; Fig.16 It is a schematic diagram of the structure of the controller provided in the embodiment of the present application. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be described clearly and in detail in combination with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0019] It should be noted that, when an element is described as being “connected to” another element, it may be directly connected to the other element, or one or more intervening elements may exist therebetween.

[0020] In addition, the technical features involved in the various embodiments of the present application described below can be combined with each other as long as there is no structural conflict between them.

[0021] Please refer to Figure 1 , Figure 1 Schematic diagram of the circuit structure of the inverter circuit provided in the embodiment of the present application. Figure 1 As shown, the inverter circuit 10 is used to convert a DC power supply 20 into an AC power supply 30. The inverter circuit 10 includes a first capacitor C1, a second capacitor C2, a first switch tube Q1, a second switch tube Q2, a third switch tube Q3, a fourth switch tube Q4, a fifth switch tube Q5, a sixth switch tube Q6, a seventh switch tube Q7 and an eighth switch tube Q8.

[0022] Among them, the first capacitor C1 and the second capacitor C2 are connected in series between the positive electrode of the DC power supply 20 and the negative electrode of the DC power supply, the first switch tube Q1 and the fourth switch tube Q4 are connected in series between the positive electrode of the DC power supply 20 and the negative electrode of the DC power supply, the second switch tube Q2 and the third switch tube Q3 are connected in series between the positive electrode of the DC power supply 20 and the negative electrode of the DC power supply, the fifth switch tube Q5 and the sixth switch tube Q6 are connected in series between the first node P1 and the second node P2, and the seventh switch tube Q7 and the eighth switch tube Q8 are connected in series between the second node P2 and the third node P3. The first switch tube Q1 and the fourth switch tube Q4 are connected in series in the same direction, that is, the upper ends of the first switch tube Q1 and the fourth switch tube Q4 are both the third end, and the lower ends are both the second end. The second switch tube Q2 and the third switch tube Q3 are connected in series in the same direction. The fifth switch tube Q5 and the sixth switch tube Q6 are connected in reverse series, that is, the upper end of the fifth switch tube Q5 is the second end, and the upper end of the sixth switch tube Q6 is the third end; the lower end of the fifth switch tube Q5 is the third end, and the lower end of the sixth switch tube Q6 is the second end. The seventh switch tube Q7 and the eighth switch tube Q8 are connected in reverse series. The first node P1 is the connection point of the first switch tube Q1 and the fourth switch tube Q4, the second node P2 is the connection point of the first capacitor C1 and the second capacitor C2, and the third node P3 is the connection point of the second switch tube Q2 and the third switch tube Q3.

[0023] In this embodiment, taking the case where each switch tube (including the first switch tube Q1 to the eighth switch tube Q8) is an IGBT switch tube as an example, the gate of the IGBT switch tube is the first end of each switch tube, the emitter of the IGBT switch tube is the second end of each switch tube, and the collector of the IGBT switch tube is the third end of each switch tube.

[0024] In addition, each switch tube can be any controllable switch, such as an integrated gate-commutated thyristor (IGCT) device, a gate-turn-off thyristor (GTO) device, a silicon-controlled rectifier (SCR) device, a junction-gate field-effect transistor (JFET) device, a MOS-controlled thyristor (MCT) device, etc.

[0025] In some embodiments, the inverter circuit 10 further includes a first inductor L1 , a second inductor L2 , a third capacitor C3 , a fourth capacitor C4 , a first switch K1 , and a second switch K2 .

[0026] Among them, the first end of the first inductor L1 is connected to the first node P1, the second end of the first inductor L1 is respectively connected to the first end of the third capacitor C3 and the first end of the first switch K1, the second end of the third capacitor C3 and the first end of the fourth capacitor C4 are both connected to the second node P2, the second end of the fourth capacitor C4 is respectively connected to the second end of the second inductor L2 and the first end of the second switch K2, the first end of the second inductor L2 is connected to the third node P3, and the AC power supply 30 is between the second end of the first switch K1 and the second end of the second switch K2.

[0027] Please refer to Figure 1-Figure 3 ,in, Figure 2 An example is shown Figure 1 A control method of each switch tube (including the first switch tube Q1 to the eighth switch tube Q8) when the inverter circuit 10 shown is working normally and the AC power source 30 is in the positive half cycle (that is, the working stage of the inverter circuit 10 is the positive half cycle excitation stage of the AC power source 30); Figure 3 An example is shown Figure 1 Another control mode of each switch tube when the inverter circuit 10 shown is working normally and the AC power source 30 is in the negative half cycle (that is, the working stage of the inverter circuit 10 is the negative half cycle excitation stage of the AC power source 30). Figure 2 and Figure 3 In the figure, the horizontal axis is time, the vertical axis is voltage, and the eight curves from top to bottom are control signals of the first switch tube Q1 to the eighth switch tube Q8. When the control signal is at a high level, the corresponding switch tube is turned on, and when the control signal is at a low level, the corresponding switch tube is turned off. Among them, the normal operation of the inverter circuit 10 means that all devices in the inverter circuit 10 are working normally, and the control signals of each switch tube are normal.

[0028] like Figure 2As shown, the duration between moment T1 and moment T3 is a working cycle TA. Take the working cycle TA as an example, and only the first switch tube Q1 to the fourth switch tube Q4 are explained. At moment T1, the first switch tube Q1 and the third switch tube Q3 are both controlled to be turned on. The current loop is: the positive electrode of the DC power supply 20, the first switch tube Q1, the first inductor L1, the first switch K1, the AC power supply 30, the second switch K2, the second inductor L2, the third switch tube Q3, and the negative electrode of the DC power supply 20. At this time, the first voltage (denoted as VC1) across the first capacitor C1 is equal to the second voltage (denoted as VC2) across the second capacitor C2, that is, the first voltage VC1 is balanced with the second voltage VC2.

[0029] like Figure 3 As shown, the time between time T4 and time T6 is a working cycle TA. Take the working cycle TA as an example, and only the first switch tube Q1 to the fourth switch tube Q4 are described. At time T4, the second switch tube Q2 and the fourth switch tube Q4 are both controlled to be turned on. The current loop is: the negative electrode of the DC power supply 20, the fourth switch tube Q4, the first inductor L1, the first switch K1, the AC power supply 30, the second switch K2, the second inductor L2, the second switch tube Q2, and the positive electrode of the DC power supply 20. At this time, the first voltage VC1 is equal to the second voltage VC2, that is, the first voltage VC1 is balanced with the second voltage VC2.

[0030] It can be understood that the duty cycle TA is the duty cycle of the inverter circuit 10, and its value is the inverse of the switching frequency of the inverter circuit 10. For example, in one embodiment, the switching frequency of the inverter circuit 10 ranges from 10kHz to 100kHz, and other values ​​can also be selected as needed.

[0031] However, for Figure 1 As for the circuit structure shown, in actual applications, due to possible differences in the switch tubes or asynchronous signals output by the software to the switch tubes, the conduction of the first switch tube Q1 and the third switch tube Q3 is asynchronous, and / or the conduction of the second switch tube Q2 and the fourth switch tube Q4 is asynchronous, then, the voltage across the first capacitor is different from the voltage across the second capacitor.

[0032] For example, Figure 2For example, assuming that there is a difference between the first switch tube Q1 and the third switch tube Q3, it may cause that although the first switch tube Q1 receives the signal controlling its conduction at time T1, the first switch tube Q1 is turned on at time T2, and the time when the first switch tube Q1 is turned on is later than the time when the third switch tube Q3 is turned on. Then, when the third switch tube Q3 is turned on, the first switch tube Q1 is not turned on yet, and the current loop is: the second node P2, the body diode of the sixth switch tube Q6, the fifth switch tube Q5, the first inductor L1, the first switch K1, the AC power supply 30, the second switch K2, the second inductor L2, the third switch tube Q3, and the negative electrode of the DC power supply 20. At this time, the first capacitor C1 is charged, the second capacitor C2 is discharged, and the first voltage VC1 and the second voltage VC2 are unbalanced, specifically, the first voltage VC1 is greater than the second voltage VC2.

[0033] Again Figure 2 For example, assuming that there is an abnormality in the software and the high level is output to the third switch tube Q3 at time T2, then the third switch tube Q3 is turned on at time T2, and the first switch tube Q1 is turned on at time T1, then the time when the third switch tube Q3 is turned on is later than the time when the first switch tube Q1 is turned on. Then, when the first switch tube Q1 is turned on, the third switch tube Q3 is not turned on yet, and the current loop is: the positive electrode of the DC power supply 20, the first switch tube Q1, the first inductor L1, the first switch K1, the AC power supply 30, the second switch K2, the second inductor L2, the body diode of the eighth switch tube Q8, the seventh switch tube Q7, and the second node P2. At this time, the first capacitor C1 is discharged, the second capacitor C2 is charged, and the first voltage VC1 and the second voltage VC2 are unbalanced, specifically, the first voltage VC1 is less than the second voltage VC2.

[0034] For example, Figure 3 For example, assuming that there is an abnormality in the software and a high level is output to the second switch tube Q2 at time T5, then the second switch tube Q2 is turned on at time T5, and the time when the second switch tube Q2 is turned on is later than the time when the fourth switch tube Q4 is turned on. Then, when the fourth switch tube Q4 is turned on, the second switch tube Q2 is not turned on yet, and the current loop is: the second node P2, the body diode of the seventh switch tube Q7, the eighth switch tube Q8, the second inductor L2, the second switch K2, the AC power supply 30, the first switch K1, the first inductor L1, the fourth switch tube Q4, and the negative electrode of the DC power supply 20. At this time, the first capacitor C1 is charged, the second capacitor C2 is discharged, and the first voltage VC1 is unbalanced with the second voltage VC2, specifically, the first voltage VC1 is greater than the second voltage VC2.

[0035] Again Figure 3For example, assuming that there is a difference between the second switch tube Q2 and the fourth switch tube Q4, it may cause that although the fourth switch tube Q4 receives the signal controlling its conduction at time T4, the fourth switch tube Q4 is only turned on at time T5, and the time when the fourth switch tube Q4 is turned on is later than the time when the second switch tube Q2 is turned on. Then, when the second switch tube Q2 is turned on, the fourth switch tube Q4 is not turned on yet, and the current loop is: the positive electrode of the DC power supply 20, the second switch tube Q2, the second inductor L2, the second switch K2, the AC power supply 30, the first switch K1, the first inductor L1, the body diode of the fifth switch tube Q5, the sixth switch tube Q6, and the second node P2. At this time, the first capacitor C1 is discharged, the second capacitor C2 is charged, and the first voltage VC1 is unbalanced with the second voltage VC2, specifically, the first voltage VC1 is less than the second voltage VC2.

[0036] In summary, due to the asynchronous conduction of the first switch tube Q1 and the third switch tube Q3, and / or the asynchronous conduction of the second switch tube Q2 and the fourth switch tube Q4, the first voltage VC1 and the second voltage VC2 will be unbalanced, which will not only affect the working efficiency and performance of the inverter circuit 10, but may also cause damage to the devices in the inverter circuit 10.

[0037] Based on the above reasons, an embodiment of the present application provides a control method for an inverter circuit, which can adjust the turn-off moment of at least one switch tube from the first switch tube Q1 to the fourth switch tube Q4 to make the first voltage VC1 and the second voltage VC2 tend to balance, or even reach a balance, when the first voltage VC1 and the second voltage VC2 are unbalanced. Therefore, the inverter circuit 10 can maintain a high working efficiency and performance and reduce the risk of damage to devices in the inverter circuit 10.

[0038] It should be noted that the above embodiment takes the case where the first switch tube Q1 and the third switch tube Q3 are turned on asynchronously, and / or the second switch tube Q2 and the fourth switch tube Q4 are turned on asynchronously due to differences in the switch tubes or the signals output by the software to the switch tubes are not synchronized as an example. In other embodiments, if the first switch tube Q1 and the third switch tube Q3 are turned on asynchronously, and / or the second switch tube Q2 and the fourth switch tube Q4 are turned on asynchronously due to other reasons, the method provided in the embodiment of the present application can also be used to make the first voltage VC1 and the second voltage VC2 tend to balance, or even be balanced.

[0039] Please refer to Figure 4 , Figure 4A flow chart of a control method for an inverter circuit provided in an embodiment of the present application. Wherein, the inverter circuit is used to convert a DC power supply into an AC power supply, and the inverter circuit includes a first capacitor, a second capacitor, a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a fifth switch tube, a sixth switch tube, a seventh switch tube and an eighth switch tube, the first capacitor and the second capacitor, the first switch tube and the fourth switch tube, the second switch tube and the third switch tube are all connected in series between the positive electrode of the DC power supply and the negative electrode of the DC power supply, the fifth switch tube and the sixth switch tube are connected in series between the first node and the second node, and the seventh switch tube and the eighth switch tube are connected in series between the second node and the third node, wherein the first switch tube and the fourth switch tube, the second switch tube and the third switch tube are all connected in series in the same direction, the fifth switch tube and the sixth switch tube, the seventh switch tube and the eighth switch tube are all connected in series in the opposite direction, the first node is the connection point between the first switch tube and the fourth switch tube, the second node is the connection point between the first capacitor and the second capacitor, and the third node is the connection point between the second switch tube and the third switch tube. In some specific embodiments, the inverter circuit here can be connected by Figure 1 The circuit structure shown in the figure is implemented, and the specific implementation process has been described in detail in the above embodiment, which will not be repeated here. Figure 4 As shown, the control method of the inverter circuit includes the following method steps: Step 401: Obtain a first voltage across a first capacitor and a second voltage across a second capacitor, and calculate a difference between the first voltage and the second voltage.

[0040] Step 402: According to the difference and the AC power supply, the first switch tube is controlled to be turned off at a different time than the third switch tube in the same working cycle, or the second switch tube is controlled to be turned off at a different time than the fourth switch tube in the same working cycle.

[0041] by Figure 1The circuit structure shown is used as an example for explanation. By calculating the difference between the first voltage VC1 and the second voltage VC2, it is possible to determine whether the first voltage VC1 and the second voltage VC2 are balanced, so as to determine whether there is a conduction asynchronism between the first switch tube Q1 and the third switch tube Q3, and / or a conduction asynchronism between the second switch tube Q2 and the fourth switch tube Q4, and then determine whether it is necessary to adjust the time when the first switch tube Q1 to the fourth switch tube Q4 are turned off. For example, as described in the above embodiment, the difference is greater than zero, that is, the first voltage VC1 is greater than the second voltage VC2, which may be that the time when the first switch tube Q1 is turned on is later than the time when the third switch tube Q3 is turned on, or the time when the second switch tube Q2 is turned on is later than the time when the fourth switch tube Q4 is turned on, then the time when the first switch tube Q1 or the second switch tube Q2 is turned off can be adjusted in a targeted manner to compensate for the difference, so that the difference tends to zero, and the first voltage VC1 and the second voltage VC2 tend to be balanced. Secondly, according to whether the AC power source 30 is in the positive half cycle or the negative half cycle, the switch tube currently turned on can be determined, so the switch tube whose turn-off time needs to be adjusted can be determined. Figure 2 In the embodiment, according to the AC power source 30 being in the positive half cycle, it can be determined that the switch tubes currently turned on should be the first switch tube Q1 and the third switch tube Q3, and then it can be determined that the switch tube that needs to adjust the shutdown time is the first switch tube Q1 or the third switch tube Q3.

[0042] In summary, it can be seen that, by combining the difference between the first voltage VC1 and the second voltage VC2 and the AC power supply 30, the switch tube that needs to be adjusted to turn off can be accurately found when the first voltage VC1 and the second voltage VC2 are unbalanced. Then, by adjusting the switch tube that needs to be adjusted to turn off, it can be achieved that the moment when the first switch tube Q1 is turned off is different from the moment when the third switch tube Q3 is turned off in the same working cycle, or the moment when the second switch tube Q2 is turned off is different from the moment when the fourth switch tube Q4 is turned off in the same working cycle, so as to reduce the difference between the first voltage VC1 and the second voltage VC2, thereby making the first voltage VC1 and the second voltage VC2 tend to balance, which is beneficial to maintaining a high working efficiency and performance of the inverter circuit 10 and reducing the risk of damage to devices in the inverter circuit 10.

[0043] In some embodiments, Figure 5 As shown, the specific implementation process of step 402 includes the following method steps: Step 501: When the difference is greater than zero, according to the AC power supply, the first switch tube is controlled to be turned off later than the third switch tube in the same working cycle, or the second switch tube is controlled to be turned off later than the fourth switch tube in the same working cycle.

[0044] According to the description of the above embodiment, when the first voltage VC1 is greater than the second voltage VC2 (the corresponding difference is greater than zero), there may be two situations in which the first switch tube Q1 is turned on later than the third switch tube Q3, or the second switch tube Q2 is turned on later than the fourth switch tube Q4. In this case, the adjustment difference can be reduced or even zero by controlling the first switch tube Q1 to be turned off later than the third switch tube Q3 in the same working cycle, or controlling the second switch tube Q2 to be turned off later than the fourth switch tube Q4 in the same working cycle.

[0045] In some embodiments, Figure 6 As shown, the specific implementation process of step 501 includes the following method steps: Step 601: When the difference is greater than zero, if the AC power source is in the positive half cycle, then in the same working cycle, the time when the first switch tube is turned off is later than the time when the third switch tube is turned off.

[0046] As the above embodiment for Figure 2 As explained above, when the AC power source 30 is in the positive half cycle, if the first switch tube Q1 is turned on later than the third switch tube Q3, the first voltage VC1 will be greater than the second voltage VC2, that is, the difference will be greater than zero. In this case, in the same working cycle, the first switch tube Q1 is turned off later than the third switch tube Q3, so that the adjustment difference can be reduced or even zero. The specific control method can be as follows: Figure 7 As shown, Figure 7 An example is shown in Figure 2 The control method shown controls Figure 1 When the inverter circuit 10 shown in FIG. 1 is switched on, a high level is output to the first switch tube Q1 at time T2 due to software anomalies (when the inverter circuit 10 is operating normally, the high level should be output to the first switch tube Q1 at time T2). Figure 2 As shown, a high level is output to the first switch tube Q1 at time T1, thereby causing the first voltage VC1 and the second voltage VC2 to be unbalanced.

[0047] Please follow Figure 1 and Figure 7As described in the above embodiment, since the first switch tube Q1 is turned on later than the third switch tube Q3, the first voltage VC1 will be greater than the second voltage VC2. Then, at time T7, the third switch tube Q3 is controlled to be turned off first, while the first switch tube Q1 is not turned off (at time T8, the first switch tube Q1 is turned off). At this time, the current loop is: the positive electrode of the DC power supply 20, the first switch tube Q1, the first inductor L1, the first switch K1, the AC power supply 30, the second switch K2, the second inductor L2, the body diode of the eighth switch tube Q8, the seventh switch tube Q7, and the second node P2. Then, the first capacitor C1 is discharging and the second capacitor C2 is charging. The difference between the first voltage VC1 and the second voltage VC2 will gradually decrease. By reasonably configuring the time between the time when the first switch tube Q1 is turned off and the time when the third switch tube Q3 is turned off, the difference between the first voltage VC1 and the second voltage VC2 can be reduced to zero, and the first voltage VC1 and the second voltage VC2 are balanced.

[0048] In some embodiments, Figure 8 As shown, the specific implementation process of step 501 includes the following method steps: Step 801: When the difference is greater than zero, if the AC power source is in the negative half cycle, then in the same working cycle, the second switch tube is controlled to be turned off later than the fourth switch tube.

[0049] As the above embodiment for Figure 3 As explained above, when the AC power source 30 is in the negative half cycle, if the second switch tube Q2 is turned on later than the fourth switch tube Q4, the first voltage VC1 will be greater than the second voltage VC2, that is, the difference is greater than zero. In this case, in the same working cycle, the second switch tube Q2 is turned off later than the fourth switch tube Q4, so that the adjustment difference can be reduced or even zero. The specific control method can be as follows: Fig. 9 As shown, Fig. 9 An example is shown in Figure 3 The control method shown controls Figure 1 When the inverter circuit 10 shown in FIG. 1 is switched on, the software is abnormal, which results in the output of a high level to the second switch tube Q2 at time T5 (when the inverter circuit 10 is operating normally, the high level should be Figure 3 As shown, a high level is output to the second switch tube Q2 at time T4, thereby causing the first voltage VC1 and the second voltage VC2 to be unbalanced.

[0050] Please follow Figure 1 and Fig. 9As described in the above embodiment, since the moment when the second switch tube Q2 is turned on is later than the moment when the fourth switch tube Q4 is turned on, the first voltage VC1 will be greater than the second voltage VC2. Then, at time T9, the fourth switch tube Q4 is controlled to be turned off first, while the second switch tube Q2 is not turned off (at time T10, the second switch tube Q2 is turned off). At this time, the current loop is: the positive electrode of the DC power supply 20, the second switch tube Q2, the second inductor L2, the second switch K2, the AC power supply 30, the first switch K1, the first inductor L1, the body diode of the fifth switch tube Q5, the sixth switch tube Q6, and the second node P2. Then, the first capacitor C1 is discharging and the second capacitor C2 is charging. The difference between the first voltage VC1 and the second voltage VC2 will gradually decrease. By reasonably configuring the time between the moment when the second switch tube Q2 is turned off and the moment when the fourth switch tube Q4 is turned off, the difference between the first voltage VC1 and the second voltage VC2 can be reduced to zero, and the first voltage VC1 and the second voltage VC2 are balanced.

[0051] Step 502: When the difference is less than zero, according to the AC power supply, the third switch tube is controlled to be turned off later than the first switch tube in the same working cycle, or the fourth switch tube is controlled to be turned off later than the second switch tube in the same working cycle.

[0052] According to the description of the above embodiment, when the first voltage VC1 is less than the second voltage VC2 (the corresponding difference is less than zero), there may be two situations in which the third switch tube Q3 is turned on later than the first switch tube Q1, or the fourth switch tube Q4 is turned on later than the second switch tube Q2. In this case, the adjustment difference can be reduced or even zero by controlling the third switch tube Q3 to be turned off later than the first switch tube Q1 in the same working cycle, or controlling the fourth switch tube Q4 to be turned off later than the second switch tube Q2 in the same working cycle.

[0053] In some embodiments, Fig.10 As shown, the specific implementation process of step 502 includes the following method steps: Step 1001: When the difference is less than zero, if the AC power source is in the positive half cycle, then in the same working cycle, the time when the third switch tube is turned off is later than the time when the first switch tube is turned off.

[0054] As the above embodiment for Figure 2As explained above, when the AC power source 30 is in the positive half cycle, if the third switch tube Q3 is turned on later than the first switch tube Q1, the first voltage VC1 will be less than the second voltage VC2, that is, the difference is less than zero. In this case, in the same working cycle, the third switch tube Q3 is turned off later than the first switch tube Q1, so that the adjustment difference can be reduced or even zero. The specific control method can be as follows: Fig.11 As shown, Fig.11 An example is shown in Figure 2 The control method shown controls Figure 1 When the inverter circuit 10 shown in FIG. 1 is switched on, the software is abnormal, which results in the output of a high level to the third switch tube Q3 at time T2 (when the inverter circuit 10 is operating normally, the high level should be Figure 2 As shown, a high level is output to the third switch tube Q3 at time T1, thereby causing the first voltage VC1 and the second voltage VC2 to be unbalanced.

[0055] Please follow Figure 1 and Fig.11 As described in the above embodiment, since the moment when the third switch tube Q3 is turned on is later than the moment when the first switch tube Q1 is turned on, the first voltage VC1 will be less than the second voltage VC2. Then, at time T11, the first switch tube Q1 is controlled to be turned off first, while the third switch tube Q3 is not turned off yet (at time T12, the third switch tube Q3 is turned off). At this time, the current loop is: the second node P2, the body diode of the sixth switch tube Q6, the fifth switch tube Q5, the first inductor L1, the first switch K1, the AC power supply 30, the second switch K2, the second inductor L2, the third switch tube Q3, and the negative electrode of the DC power supply 20. Then, the first capacitor C1 is charging and the second capacitor C2 is discharging. The difference between the first voltage VC1 and the second voltage VC2 will gradually decrease. By reasonably configuring the time between the moment when the first switch tube Q1 is turned off and the moment when the third switch tube Q3 is turned off, the difference between the first voltage VC1 and the second voltage VC2 can be reduced to zero, and the first voltage VC1 and the second voltage VC2 are balanced.

[0056] In some embodiments, Fig.12 As shown, the specific implementation process of step 502 includes the following method steps: Step 1201: When the difference is less than zero, if the AC power source is in the negative half cycle, then in the same working cycle, the fourth switch tube is controlled to be turned off later than the second switch tube.

[0057] As the above embodiment for Figure 3As explained above, when the AC power source 30 is in the negative half cycle, if the fourth switch tube Q4 is turned on later than the second switch tube Q2, the first voltage VC1 will be less than the second voltage VC2, that is, the difference is less than zero. In this case, in the same working cycle, the fourth switch tube Q4 is turned off later than the second switch tube Q2, so that the adjustment difference can be reduced or even zero. The specific control method can be as follows: Fig.13 As shown, Fig.13 An example is shown in Figure 3 The control method shown controls Figure 1 When the inverter circuit 10 shown in FIG. 1 is switched on, the software is abnormal, which results in the output of a high level to the fourth switch tube Q4 at time T5 (when the inverter circuit 10 is operating normally, the high level should be Figure 3 The control method shown is when a high level is output to the fourth switch tube Q4 at time T4, thereby causing an imbalance between the first voltage VC1 and the second voltage VC2.

[0058] Please follow Figure 1 and Fig.13 As described in the above embodiment, since the moment when the fourth switch tube Q4 is turned on is later than the moment when the second switch tube Q2 is turned on, the first voltage VC1 will be less than the second voltage VC2. Then, at time T13, the second switch tube Q2 is controlled to be turned off first, while the fourth switch tube Q4 is not turned off (at time T14, the fourth switch tube Q4 is turned off). At this time, the current loop is: the second node P2, the body diode of the seventh switch tube Q7, the eighth switch tube Q8, the second inductor L2, the second switch K2, the AC power supply 30, the first switch K1, the first inductor L1, the fourth switch tube Q4, and the negative electrode of the DC power supply 20. Then, the first capacitor C1 is charging and the second capacitor C2 is discharging. The difference between the first voltage VC1 and the second voltage VC2 will gradually decrease. By reasonably configuring the time between the moment when the second switch tube Q2 is turned off and the moment when the fourth switch tube Q4 is turned off, the difference between the first voltage VC1 and the second voltage VC2 can be reduced to zero, and the first voltage VC1 and the second voltage VC2 are balanced.

[0059] It should be noted that when the difference between the first voltage VC1 and the second voltage VC2 is zero, the first voltage VC1 and the second voltage VC2 are balanced, and there is no need to adjust the time when any switch is turned off.

[0060] In some embodiments, Fig.14 As shown, the control method of the inverter circuit also includes the following method steps: Step 1401: The difference is subjected to a proportional integral algorithm to obtain a compensation duration.

[0061] Step 1402: Set the compensation time to the time between when the first switch is turned off and when the third switch is turned off, or set the compensation time to the time between when the second switch is turned off and when the fourth switch is turned off.

[0062] Specifically, the proportional-integral algorithm includes a proportional control part and an integral control part. The proportional control part adjusts the output by multiplying the error (the difference between the set value and the actual value, where the set value is zero and the actual value is the difference) by a proportional constant Kp. The integral control part integrates the error and then multiplies it by an integral constant Ki, which can eliminate the steady-state error of the system, that is, gradually correct the error until it is zero over time. The proportional-integral algorithm combines the proportional control part with the integral control part, and its output consists of two parts: one part is proportional to the current error, and the other part is proportional to the accumulation of past errors; this enables the proportional-integral algorithm to respond quickly to changes in input and ultimately eliminate errors.

[0063] Next, the compensation time obtained by the proportional-integral algorithm of the difference is set as the time between the moment when the first switch tube Q1 is turned off and the moment when the third switch tube Q3 is turned off, or as the time between the moment when the second switch tube Q2 is turned off and the moment when the fourth switch tube Q4 is turned off. For example, the compensation time is set as Figure 7 The duration between time T7 and time T8 shown, or the compensation duration is set to Fig. 9 The duration between time T9 and time T10 shown, or the compensation duration is set to Fig.11 The duration between time T11 and time T12 shown, or the compensation duration is set to Fig.13 The time length between the time T13 and the time T14 is shown. Then, the difference between the first voltage VC1 and the second voltage VC2 can be made zero eventually, so that the first voltage VC1 and the second voltage VC2 are balanced.

[0064] Please refer to Fig.15 , Fig.15 This is a flow chart of a control method for an inverter circuit provided by another embodiment of the present application. Fig.15 As shown, first, determine whether the inverter circuit 10 is running. If the inverter circuit 10 is not running, the process ends. If the inverter circuit 10 is running, calculate the difference between the first voltage VC1 and the second voltage VC2. Then, the difference is subjected to a proportional integral algorithm to obtain a compensation time length TS.

[0065] If the compensation time TS>0, it can be determined that the moment when the first switch tube Q1 is turned on is earlier than the moment when the third switch tube Q3 is turned on, or the moment when the second switch tube Q2 is turned on is earlier than the moment when the fourth switch tube Q4 is turned on. Next, it is determined whether the AC power supply 30 is in the positive half cycle. If the AC power supply 30 is in the positive half cycle, the moment when the first switch tube Q1 is turned off is controlled to be later than the moment when the third switch tube Q3 is turned off, and the time between the moment when the first switch tube Q1 is turned off and the moment when the third switch tube Q3 is turned off is the compensation time TS, then the difference between the first voltage VC1 and the second voltage VC2 can be eliminated to zero, and the first voltage VC1 and the second voltage VC2 are balanced. If the AC power supply 30 is in the negative half cycle, the moment when the second switch tube Q2 is turned off is controlled to be later than the moment when the fourth switch tube Q4 is turned off, and the time between the moment when the second switch tube Q2 is turned off and the moment when the fourth switch tube Q4 is turned off is the compensation time TS, then the difference between the first voltage VC1 and the second voltage VC2 can be eliminated to zero, and the first voltage VC1 and the second voltage VC2 are balanced.

[0066] If the compensation time TS is less than 0, it can be determined that the time when the third switch tube Q3 is turned on is earlier than the time when the first switch tube Q1 is turned on, or the time when the fourth switch tube Q4 is turned on is earlier than the time when the second switch tube Q2 is turned on. Next, it is determined whether the AC power supply 30 is in the positive half cycle. If the AC power supply 30 is in the positive half cycle, the time when the third switch tube Q3 is turned off is controlled to be later than the time when the first switch tube Q1 is turned off, and the time between the time when the first switch tube Q1 is turned off and the time when the third switch tube Q3 is turned off is the compensation time TS, then the difference between the first voltage VC1 and the second voltage VC2 can be eliminated to zero, and the first voltage VC1 is balanced with the second voltage VC2. If the AC power supply 30 is in the negative half cycle, the time when the fourth switch tube Q4 is turned off is controlled to be later than the time when the second switch tube Q2 is turned off, and the time between the time when the second switch tube Q2 is turned off and the time when the fourth switch tube Q4 is turned off is the compensation time TS, then the difference between the first voltage VC1 and the second voltage VC2 can be eliminated to zero, and the first voltage VC1 is balanced with the second voltage VC2.

[0067] Please refer to Fig.16 , Fig.16 This is a schematic diagram of the structure of the controller provided in the embodiment of the present application. Fig.16 As shown, Fig.16 As shown, the controller 1600 includes one or more processors 1601 and a memory 1602. Fig.16 A processor 1601 is taken as an example.

[0068] The processor 1601 and the memory 1602 may be connected via a bus or other means. Fig.16In the example, the bus connection is used. The memory 1602, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer executable programs and modules, such as program instructions / modules corresponding to the control method of the inverter circuit in the embodiment of the present application. The processor 1601 executes various functional applications and data processing of the terminal interaction device by running the non-volatile software programs, instructions and modules stored in the memory 1602, that is, implements the control method of the inverter circuit in the above method embodiment.

[0069] The memory 1602 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory 1602 may optionally include a memory remotely arranged relative to the processor 1601, and these remote memories may be connected to the processor 1601 via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0070] The program instructions / modules are stored in the memory 1602, and when executed by the one or more processors 1601, the control method of the inverter circuit in any of the above method embodiments is executed, for example, the control method described above is executed. Figure 4-Figure 6 , Figure 8 , Fig.10 , Fig.12 , Fig.14 and Fig.15 The steps shown.

[0071] An embodiment of the present application also provides an inverter circuit, which includes a first capacitor, a second capacitor, a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a fifth switch tube, a sixth switch tube, a seventh switch tube, an eighth switch tube and a controller 1600 in any embodiment of the present application.

[0072] Among them, the first capacitor and the second capacitor, the first switch tube and the fourth switch tube, the second switch tube and the third switch tube are all connected in series between the positive electrode of the DC power supply and the negative electrode of the DC power supply, the fifth switch tube and the sixth switch tube are connected in series between the first node and the second node, and the seventh switch tube and the eighth switch tube are connected in series between the second node and the third node, wherein the first switch tube and the fourth switch tube, the second switch tube and the third switch tube are all connected in series in the same direction, the fifth switch tube and the sixth switch tube, the seventh switch tube and the eighth switch tube are all connected in series in the opposite direction, the first node is the connection point of the first switch tube and the fourth switch tube, the second node is the connection point of the first capacitor and the second capacitor, and the third node is the connection point of the second switch tube and the third switch tube. The controller is connected to the first switch tube, the second switch tube, the third switch tube, the fourth switch tube, the fifth switch tube, the sixth switch tube, the seventh switch tube and the eighth switch tube respectively. In some specific embodiments, the inverter circuit here (except the controller 1600) can be connected as follows Figure 1 The circuit structure shown is implemented, and the specific implementation process has been described in detail in the above embodiment, which will not be repeated here.

[0073] The present application also provides a non-volatile computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are executed by one or more processors, for example, to execute the above-described Figure 4-Figure 6 , Figure 8 , Fig.10 , Fig.12 , Fig.14 and Fig.15 method steps.

[0074] The present application also provides a computer program product, including a computer program stored on a non-volatile computer-readable storage medium, wherein the computer program includes program instructions. When the program instructions are executed by a computer, the computer executes the control method of the inverter circuit in any of the above method embodiments, for example, executing the above described Figure 4-Figure 6 , Figure 8 , Fig.10 , Fig.12 , Fig.14 and Fig.15 method steps.

[0075] The above descriptions are merely embodiments of the present application and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

[0076] The above embodiments are only used to illustrate the technical solutions of the present application, but not to limit them. Under the idea of ​​the present application, the technical features in the above embodiments or different embodiments can also be combined, and the steps can be implemented in any order. It should be understood by ordinary technicians in this field that they can still modify the technical solutions recorded in the above embodiments, or replace some of the technical features by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A control method for an inverter circuit, characterized in that: The inverter circuit is used to convert a DC power supply into an AC power supply. The inverter circuit includes first to second capacitors and first to eighth switch tubes. The first capacitor and the second capacitor, the first switch tube and the fourth switch tube, and the second switch tube and the third switch tube are all connected in series between the positive electrode of the DC power supply and the negative electrode of the DC power supply. The fifth switch tube and the sixth switch tube are connected in series between the first node and the second node, and the seventh switch tube and the eighth switch tube are connected in series between the second node and the third node. The first switch tube and the fourth switch tube, the second switch tube and the third switch tube are all connected in series in the same direction, the fifth switch tube and the sixth switch tube, the seventh switch tube and the eighth switch tube are all connected in series in the opposite direction, the first node is the connection point between the first switch tube and the fourth switch tube, the second node is the connection point between the first capacitor and the second capacitor, and the third node is the connection point between the second switch tube and the third switch tube. The method includes: Obtaining a first voltage and a second voltage across the first capacitor and the second capacitor respectively, and calculating a difference between the two; According to the difference and the AC power supply, the time when the first switch tube is turned off is different from the time when the third switch tube is turned off in the same working cycle, or the time when the second switch tube is turned off is different from the time when the fourth switch tube is turned off in the same working cycle.

2. The method according to claim 1, characterized in that The method of controlling the first switch tube to be turned off at a different time from the third switch tube to be turned off in the same working cycle according to the difference and the AC power supply, or controlling the second switch tube to be turned off at a different time from the fourth switch tube to be turned off in the same working cycle, comprises: When the difference is greater than zero, according to the AC power supply, the first switch tube is controlled to be turned off later than the third switch tube in the same working cycle, or the second switch tube is controlled to be turned off later than the fourth switch tube in the same working cycle; When the difference is less than zero, according to the AC power supply, the time when the third switch tube is controlled to be turned off is later than the time when the first switch tube is turned off in the same working cycle, or the time when the fourth switch tube is controlled to be turned off is later than the time when the second switch tube is turned off in the same working cycle.

3. The method according to claim 2, characterized in that When the difference is greater than zero, according to the AC power supply, in the same working cycle, the first switch tube is controlled to be turned off later than the third switch tube, or in the same working cycle, the second switch tube is controlled to be turned off later than the fourth switch tube, including: When the difference is greater than zero, if the AC power source is in a positive half cycle, then in the same working cycle, the time when the first switch tube is turned off is later than the time when the third switch tube is turned off.

4. The method according to claim 2, characterized in that: When the difference is greater than zero, according to the AC power supply, in the same working cycle, the first switch tube is controlled to be turned off later than the third switch tube, or in the same working cycle, the second switch tube is controlled to be turned off later than the fourth switch tube, including: When the difference is greater than zero, if the AC power source is in the negative half cycle, then in the same working cycle, the moment when the second switch tube is turned off is later than the moment when the fourth switch tube is turned off.

5. The method according to claim 2, characterized in that: When the difference is less than zero, according to the AC power supply, in the same working cycle, the timing of controlling the third switch tube to be turned off is later than the timing of controlling the first switch tube to be turned off, or in the same working cycle, the timing of controlling the fourth switch tube to be turned off is later than the timing of controlling the second switch tube to be turned off, including: When the difference is less than zero, if the AC power source is in a positive half cycle, then in the same working cycle, the time when the third switch tube is controlled to be turned off is later than the time when the first switch tube is turned off.

6. The method according to claim 2, characterized in that When the difference is less than zero, according to the AC power supply, in the same working cycle, the timing of controlling the third switch tube to be turned off is later than the timing of controlling the first switch tube to be turned off, or in the same working cycle, the timing of controlling the fourth switch tube to be turned off is later than the timing of controlling the second switch tube to be turned off, including: When the difference is less than zero, if the AC power source is in the negative half cycle, the time when the fourth switch tube is controlled to be turned off is later than the time when the second switch tube is controlled to be turned off in the same working cycle.

7. The method according to any one of claims 1 to 6, characterized in that: The method further comprises: The difference is subjected to a proportional integral algorithm to obtain a compensation duration; The compensation time is set to the time between the time when the first switch tube is turned off and the time when the third switch tube is turned off, or the compensation time is set to the time between the time when the second switch tube is turned off and the time when the fourth switch tube is turned off.

8. A controller, characterized in that: include: at least one processor and memory; The memory is coupled to the processor, and the memory is used to store instructions or programs. When the instructions or programs are executed by the at least one processor, the at least one processor executes the control method according to any one of claims 1 to 7.

9. An inverter circuit, characterized in that: comprising a first capacitor, a second capacitor, a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a fifth switch tube, a sixth switch tube, a seventh switch tube, an eighth switch tube and the controller as claimed in claim 8; The first capacitor and the second capacitor, the first switch tube and the fourth switch tube, the second switch tube and the third switch tube are all connected in series between the positive electrode of the DC power supply and the negative electrode of the DC power supply, the fifth switch tube and the sixth switch tube are connected in series between the first node and the second node, and the seventh switch tube and the eighth switch tube are connected in series between the second node and the third node, wherein the first switch tube and the fourth switch tube, the second switch tube and the third switch tube are all connected in series in the same direction, the fifth switch tube and the sixth switch tube, the seventh switch tube and the eighth switch tube are all connected in series in the opposite direction, the first node is the connection point of the first switch tube and the fourth switch tube, the second node is the connection point of the first capacitor and the second capacitor, and the third node is the connection point of the second switch tube and the third switch tube; The controller is connected to the first switch tube, the second switch tube, the third switch tube, the fourth switch tube, the fifth switch tube, the sixth switch tube, the seventh switch tube and the eighth switch tube respectively.

10. A computer storage medium, characterized in that: The computer storage medium stores instructions or programs, and when the instructions or programs are executed by at least one processor, the at least one processor executes the control method according to any one of claims 1 to 7.

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