Orthogonal signal generator for suppressing direct current bias and harmonic interference

Abstract

The invention provides an orthogonal signal generator for suppressing direct current bias and harmonic interference. The orthogonal signal generator comprises a resonance control module, an alternating current amplitude comparison module and an automatic frequency locking control module, the input end of the resonance control module is connected with the pre-stage module, and the resonance control module is used for receiving an input signal output by the pre-stage module and generating a first orthogonal signal and a second orthogonal signal; the input end of the alternating-current amplitude comparison module is connected with the output end of the resonance control module, and the alternating-current amplitude comparison module is used for extracting a first target signal and a second target signal from the input signal, filtering direct-current components of the first target signal and the second target signal and generating an error signal based on the first target signal and the second target signal; the input end of the automatic frequency locking control module is connected with the output end of the alternating-current amplitude comparison module, and the automatic frequency locking control module is used for adjusting the center frequency of the resonance control module according to the error signal so that the resonance control module can generate a second orthogonal signal. According to the invention, two paths of orthogonal signals can be generated, and DC bias and harmonic interference can be suppressed.

Description

Technical Field

[0001] The invention relates to the technical field of phase-locked loops, and in particular to an orthogonal signal generator capable of suppressing direct current offset and harmonic interference. Background Art

[0002] In single-phase power electronic systems, many power devices need to phase-lock the AC power supply, such as single-phase grid-connected inverters, UPS (uninterruptible power supply) and other power devices. The phase-locked loop based on the dq rotating coordinate system requires two input signals to lock the phase, and the two input signals need to be orthogonal signals. At the same time, there is usually only one single-phase AC signal in a single-phase power electronic system, so the phase-locked loop cannot phase-lock.

[0003] Currently, a commonly used method is to virtualize two orthogonal signals through hardware or software to meet the needs of the phase-locked loop. However, since the AC power supply may contain DC components and high-order harmonics, the two virtual orthogonal signals may contain DC shunts and harmonic components. Summary of the invention

[0004] The present invention provides an orthogonal signal generator capable of suppressing DC bias and harmonic interference, aiming to solve the problem that two-way orthogonal signals currently generated are prone to have DC components and harmonic components.

[0005] The present invention provides an orthogonal signal generator for suppressing DC bias and harmonic interference, which comprises a resonance control module, an AC amplitude comparison module and an automatic frequency locking control module; the input end of the resonance control module is connected to a front-stage module, used for receiving an input signal output by the front-stage module, and used for generating a first orthogonal signal and a second orthogonal signal; the input end of the AC amplitude comparison module is connected to an output end of the resonance control module, used for extracting a first target signal and a second target signal from the input signal, filtering out the DC components of the first target signal and the second target signal, and used for generating an error signal based on the first target signal and the second target signal; the input end of the automatic frequency locking control module is connected to an output end of the AC amplitude comparison module, used for generating a center frequency of the resonance control module according to the error signal so that the center frequency of the resonance control module is consistent with the fundamental frequency of the input signal.

[0006] Furthermore, the resonance control module includes an operation module and an integration module; the input end of the operation module is connected to the previous module for receiving the input signal, the output end of the operation module is also respectively connected to the input end of the integration module and the input end of the AC amplitude comparison module, and the output end of the integration module is also respectively connected to the input end of the operation module and the input end of the AC amplitude comparison module.

[0007] Furthermore, the operation module includes a first operator and a second operator; an input end of the first operator is connected to the previous module, another input end of the first operator is connected to the integration module, the output end of the first operator is connected to the input end of the second operator, and the output end of the second operator is respectively connected to the integration module and the AC amplitude comparison module; wherein the second operator is also used to generate the second orthogonal signal.

[0008] Furthermore, the integration module includes a first integrator and a second integrator; the input end of the first integrator is connected to the output end of the second operator, and the output end of the first integrator is respectively connected to the input end of the second integrator and the input end of the first operator, wherein the first integrator is also used to generate the first orthogonal signal; the output end of the second integrator is respectively connected to the second operator and the AC amplitude comparison module.

[0009] Furthermore, the AC amplitude comparison module includes a first filtering module, a second filtering module and a third operator; the input end of the first filtering module is connected to the output end of the second integrator, for extracting the first target signal from the input signal, and the output end of the first filtering module is connected to the input end of the third operator; the input end of the second filtering module is connected to the output end of the second operator, for extracting the second target signal from the input signal, and the output end of the second filtering module is connected to the input end of the third operator; the output end of the third operator is connected to the automatic frequency locking control module, for outputting the error signal according to the output signal of the first filtering module and the output signal of the second filtering module.

[0010] Furthermore, the first filtering module includes a first high-pass filter; the input end of the first high-pass filter is connected to the output end of the second integrator, which is used to extract the first target signal from the input signal, and the output end of the first high-pass filter is connected to the input end of the third operator.

[0011] Furthermore, the first filtering module also includes a first absolute value module; the input end of the first absolute value module is connected to the output end of the first high-pass filter, and the output end of the first absolute value module is connected to the input end of the third operator.

[0012] Furthermore, the second filtering module includes a second high-pass filter; the input end of the second high-pass filter is connected to the output end of the second operator, for extracting the second target signal from the input signal, and the output end of the second high-pass filter is connected to the input end of the third operator.

[0013] Furthermore, the second filtering module also includes a second absolute value module; the input end of the second absolute value module is connected to the output end of the second high filter, and the output end of the second absolute value module is connected to the input end of the third operator.

[0014] Furthermore, the automatic frequency locking control module includes a frequency locking controller and a fourth operator; the input end of the frequency locking controller is connected to the output end of the AC amplitude comparison module, the output end of the frequency locking controller is connected to the input end of the fourth operator, and the output end of the fourth operator is used to output the center frequency of the resonance control module.

[0015] The orthogonal signal generator for suppressing DC bias and harmonic interference disclosed in the present invention includes a resonance control module, an AC amplitude comparison module and an automatic frequency locking control module. The resonance control module is used to receive an input signal and generate a first orthogonal signal according to the input signal. The AC amplitude comparison module is used to extract a first target signal and a second target signal from the input signal, and filter out the DC components of the first target signal and the second target signal to suppress the DC bias. At the same time, an error signal can be generated according to the first target signal and the second target signal. The automatic frequency locking control module is used to output the center frequency of the resonance control module according to the error signal so that the center frequency of the resonance control module is consistent with the fundamental frequency of the input signal to reduce the harmonic component. At the same time, the harmonic control module is also used to generate a second orthogonal signal, so that the DC bias and filtering interference can be suppressed while generating two orthogonal signals. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying any creative work.

[0017] Figure 1 is a block diagram of an orthogonal signal generator for suppressing DC offset and harmonic interference provided by a first embodiment of the present invention;

[0018] Figure 2 is a block diagram of an orthogonal signal generator for suppressing DC offset and harmonic interference provided by a second embodiment of the present invention;

[0019] Figure 3 is a block diagram of an orthogonal signal generator for suppressing DC offset and harmonic interference provided by a third embodiment of the present invention;

[0020] Figure 4is a block diagram of an orthogonal signal generator for suppressing DC offset and harmonic interference provided by a fourth embodiment of the present invention;

[0021] Figure 5 The schematic diagram of an orthogonal signal generator for suppressing DC bias and harmonic interference provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0023] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, operations, elements, components and / or groups thereof.

[0024] It should also be understood that the terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, the singular forms of "a", "an" and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It should also be further understood that the term "and / or" used in the specification of the present invention and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.

[0025] In addition, the directional terms mentioned in the present invention, such as "upper", "lower", "front", "back", "left", "right", "inner", "outer", "side", etc., are only for reference to the directions of the attached drawings and the use status of the product. Therefore, the directional terms used are used to illustrate and understand the present invention, but not to limit the present invention. In addition, in the drawings, structures with similar or identical structures are represented by the same reference numerals.

[0026] See also Figures 1 to 5 , Figure 1 is a block diagram of an orthogonal signal generator 100 for suppressing DC offset and harmonic interference provided by a first embodiment of the present invention; Figure 2 is a block diagram of an orthogonal signal generator 100 for suppressing DC offset and harmonic interference provided by a second embodiment of the present invention; Figure 3 is a block diagram of an orthogonal signal generator 100 for suppressing DC offset and harmonic interference provided by a third embodiment of the present invention; Figure 4is a block diagram of an orthogonal signal generator 100 for suppressing DC offset and harmonic interference provided by a fourth embodiment of the present invention; Figure 5 FIG. 1 is a schematic diagram of an orthogonal signal generator 100 for suppressing DC bias and harmonic interference provided by an embodiment of the present invention. Figures 1 to 5 As shown, the orthogonal signal generator 100 for suppressing DC bias and harmonic interference includes a resonance control module 10, an AC amplitude comparison module 20 and an automatic frequency locking control module 30; the input end of the resonance control module 10 is connected to the front-stage module 200, for receiving the input signal output by the front-stage module 200, and for generating a first orthogonal signal and a second orthogonal signal; the input end of the AC amplitude comparison module 20 is connected to the output end of the resonance control module 10, for extracting a first target signal and a second target signal from the input signal, filtering out the DC component of the first target signal and the second target signal, and for generating an error signal based on the first target signal and the second target signal; the input end of the automatic frequency locking control module 30 is connected to the output end of the AC amplitude comparison module 20, for generating the center frequency of the resonance control module 10 according to the error signal so that the center frequency of the resonance control module 10 is consistent with the fundamental frequency of the input signal.

[0027] Specifically, the orthogonal signal generator 100 (hereinafter referred to as the orthogonal generator) for suppressing DC bias and harmonic interference may include a resonance control module 10, an AC amplitude comparison module 20, and an automatic frequency locking control module 30. The resonance control module 10 is connected to the front-stage module 200, and is used to receive the input signal output by the front-stage module 200, and generate a first orthogonal signal according to the input signal, that is, the resonance control module 10 is also connected to the rear-stage module 300, and the rear-stage module 300 can extract the first orthogonal signal and the second orthogonal signal generated subsequently from the resonance control module 10, wherein the rear-stage module 300 may be a phase-locked loop.

[0028] The input end of the AC amplitude comparison module 20 is connected to the resonance control module 10, and is used to extract the first target signal and the second target signal from the input signal, and then filter out the DC component of the first target signal and the second target signal to suppress the DC bias. In actual use, when there is a DC component in the AC power supply, the input signal input to the resonance control module 10 will also contain a DC component. The AC amplitude comparison module 20 can extract the first target signal and the second target signal from the input signal, and filter out the first target signal and the second target signal to filter out the DC component. After filtering out the DC component of the first target signal and the second target signal, the AC amplitude comparison module 20 can also compare the amplitude of the AC component of the first target signal and the second target signal, detect the magnitude relationship between the center frequency of the resonance control module 10 and the fundamental frequency of the input signal, and generate an error signal.

[0029] The automatic frequency locking control module 30 is connected to the AC amplitude comparison module 20, and is used to receive the error signal and dynamically adjust the center frequency of the resonance control module 10 through integral control, so that the center frequency of the resonance control module 10 is consistent with the fundamental frequency of the input signal, thereby reducing the harmonic component and suppressing the harmonic interference.

[0030] like Figure 1 As shown, the front-stage module 200 is connected to the resonance control module 10, and is used to output the input signal to the resonance control module 10. The resonance control module 10 generates a first orthogonal signal according to the input signal. At the same time, the AC amplitude comparison module 20 extracts the first target signal and the second target signal from the input signal, and filters out the DC components of the first target signal and the second target signal, and then generates an error signal based on the first target signal and the second target signal. The automatic frequency locking control module 30 adjusts the center frequency of the resonance control module 10 according to the error signal to reduce the harmonic component. At the same time, the resonance control module 10 also generates a second orthogonal signal, and the first orthogonal signal has the same frequency, amplitude and phase as the fundamental wave of the input signal; the second orthogonal signal has the same frequency, amplitude and phase as the fundamental wave of the input signal, and is 90° ahead in phase. In addition, it can be understood that Figure 1 The automatic frequency locking control module 30 is connected to the resonance control module 10 by a dotted line, which is mainly used to indicate that the automatic frequency locking control module 30 can output the center frequency of the resonance control module 10 to adjust the center frequency of the resonance control module 10 .

[0031] As a further embodiment, the resonance control module 10 includes an operation module 11 and an integration module 12; the input end of the operation module 11 is connected to the front-stage module 200 for receiving the input signal, the output end of the operation module 11 is also connected to the input end of the integration module 12 and the AC amplitude comparison module 20, and the output end of the integration module 12 is also connected to the input end of the operation module 11 and the input end of the AC amplitude comparison module 20. Further, the operation module 11 includes a first operator 111 and a second operator 112; one input end of the first operator 111 is connected to the front-stage module 200, the other input end of the first operator 111 is connected to the integration module 12, the output end of the first operator 111 is connected to the input end of the second operator 112, and the output end of the second operator 112 is respectively connected to the integration module 12 and the AC amplitude comparison module 20; wherein, the second operator 112 is also used to generate the second orthogonal signal. Furthermore, the integration module 12 includes a first integrator 121 and a second integrator 122; the input end of the first integrator 121 is connected to the output end of the second operator 112, and the output end of the first integrator 121 is respectively connected to the input end of the second integrator 122 and the input end of the first operator 111, wherein the first integrator 121 is also used to generate the first orthogonal signal; the output end of the second integrator 122 is respectively connected to the second operator 112 and the AC amplitude comparison module 20.

[0032] Among them, Figure 2 As shown, the resonance control module 10 includes an operation module 11 and an integration module 12, the operation module 11 includes a first operator 111 and a second operator 112, the integration module 12 includes a first integrator 121 and a second integrator 122, the first operator 111, the second operator 112 and the first integrator 121 are connected in sequence, the first integrator 121 is also respectively connected to the second integrator 122 and the subsequent module 300, the first integrator 121 is used to generate a first orthogonal signal, the second operator 112 is used to generate a second orthogonal signal, and the subsequent module 300 can extract the first orthogonal signal from the output end of the first integrator 121 and the second orthogonal signal from the output end of the second operator 112.

[0033] like Figure 5 As shown, Figure 5 is a schematic diagram of the orthogonal signal generator 100, Figure 5 middle is the input signal, which contains not only the fundamental wave but also the DC component and high-order harmonics. α is the first orthogonal signal, which is in steady state with the input signal The fundamental wave components of V β is the second orthogonal signal, which is in steady state with the input signal The fundamental wave component has the same frequency, amplitude and phase lead of 90 degrees. K1 is the gain of the resonance control module 10, and S1 and S2 both have gains of An integral controller, S1 is the first integrator 121, S2 is the second integrator 122, and a resonant controller with a frequency selection characteristic can be formed by the first integrator 121 and the second integrator 122. If it is necessary to realize that the first orthogonal signal and the fundamental component of the input signal have the same frequency, the same amplitude, and the same phase, and the second orthogonal signal and the fundamental component of the input signal have the same frequency, the same amplitude, and the phase leads by 90 degrees, then the gain ω of the first integrator 121 and the second integrator 122 is required to be o With input signal The frequency is the same, assuming that when ω o and The frequency when the same is ω i .

[0034] As a further embodiment, the AC amplitude comparison module 20 includes a first filter module 21, a second filter module 22 and a third operator 23; the input end of the first filter module 21 is connected to the output end of the second integrator 122, for extracting the first target signal from the input signal, and the output end of the first filter module 21 is connected to the input end of the third operator 23; the input end of the second filter module 22 is connected to the output end of the second operator 112, for extracting the second target signal from the input signal, and the output end of the second filter module 22 is connected to the input end of the third operator 23; the output end of the third operator 23 is connected to the automatic frequency locking control module 30, for outputting the error signal according to the output signal of the first filter module 21 and the output signal of the second filter module 22. Further, the first filter module 21 includes a first high-pass filter 211; the input end of the first high-pass filter 211 is connected to the output end of the second integrator 122, for extracting the first target signal from the input signal, and the output end of the first high-pass filter 211 is connected to the input end of the third operator 23. Further, the first filtering module 21 further includes a first absolute value module 212; the input end of the first absolute value module 212 is connected to the output end of the first high-pass filter 211, and the output end of the first absolute value module 212 is connected to the input end of the third operator 23. Further, the second filtering module 22 includes a second high-pass filter 221; the input end of the second high-pass filter is connected to the output end of the second operator 112, for extracting the second target signal from the input signal, and the output end of the second high-pass filter is connected to the input end of the third operator 23. Further, the second filtering module 22 further includes a second absolute value module 222; the input end of the second absolute value module 222 is connected to the output end of the second high-pass filter, and the output end of the second absolute value module 222 is connected to the input end of the third operator 23.

[0035] The AC amplitude comparison module 20 includes a first filter module 21, a second filter module 22 and a third operator 23. The first filter module 21 includes a first high-pass filter 211 and a first absolute value module 212. The second filter module 22 includes a second high-pass filter 221 and a second absolute value module 222. The input end of the first high-pass filter 211 is connected to the output end of the second integrator 122, and is used to extract the first target signal from the input signal and filter out the DC component of the first target signal. The output end of the first high-pass filter 211 is connected to the first absolute value module 212, and the first absolute value module 212 is used to take the absolute value of the signal output by the first high-pass filter 211. The output end of the first absolute value module 212 is connected to the third operator 23. Similarly, the input end of the second high-pass filter 221 is connected to the output end of the second operator 112, and is used to extract the second target signal from the input signal and filter out the DC component of the second target signal. The output end of the second high-pass filter 221 is connected to the second absolute value module 222, and the second absolute value module 222 is used to take the absolute value of the signal output by the second high-pass filter 221. The output end of the second absolute value module 222 is connected to the third operator 23. The third operator 23 is used to output an error signal according to the first target signal and the second target signal.

[0036] like Figure 5 As shown, Figure 5 Wherein HPF1 is the first high pass filter 211, HPF2 is the second high pass filter 221, ABS1 is the first absolute value module 212, ABS2 is the second absolute value module 222, V1 is the first target signal, V2 is the second target signal, and V3 is the error signal. Figure 5 It can be seen that V1 is The transfer function is:

[0037]

[0038] Its frequency characteristics are:

[0039]

[0040] V2 Pair The transfer function is:

[0041]

[0042] Its frequency characteristics are:

[0043]

[0044] From formula (2) and (4), we can get:

[0045]

[0046] As can be seen from Equation (5):

[0047] A. When ω i > ω o , the amplitude of the AC component of V1 > the amplitude of the AC component of V2, and the phase difference is 180°;

[0048] B. When ω i < ω o , the amplitude of the AC component of V1 < the amplitude of the AC component of V2, and the phase difference is 180°;

[0049] C. When ω i = ω o , the amplitude of the AC component of V1 = the amplitude of the AC component of V2, and the phase difference is 180°. In addition, from Equation (2), the DC gain of V1 with respect to (i.e., when ω = 0) is 0, that is, V1 does not contain a DC component. From Equation (4), the DC gain of V2 with respect to (i.e., when ω = 0) is K1, that is, when contains a DC component, V2 also contains a DC component.

[0050] Let the signal obtained by filtering the DC component of the first target signal through the first high-pass filter 211 be V1, and the signal obtained by filtering the DC component of the second target signal through the second high-pass filter 221 be V2. Then, from Equation (5), we can obtain:

[0051]

[0052] Let V1'(t) = A * Sin(ωt), where A is a positive real number. Then, from Equation (6), we can obtain:

[0053]

[0054] When 0 + 2kπ ≤ ωt ≤ π + 2kπ, Sin(ωt) ≥ 0. Then, we have:

[0055]

[0056] As can be seen from Equation (8):

[0057] A. When ω i > ω o , V3 > 0;

[0058] B. When ω i < ω o , V3 < 0;

[0059] C. When ω i = ω o , V3 = 0;

[0060] When π+2kπ≤ωt≤2π+2kπ, Sin(ωt)≤0, then:

[0061]

[0062] From formula (9), we can see that:

[0063] A. When i >ω o When V3>0;

[0064] B. When ω i <ω o When V3<0;

[0065] C. When ω i =ω o When V3=0;

[0066] In summary, at any time t, we have:

[0067] A. When i >ω o When V3>0;

[0068] B. When ω i <ω o When V3<0;

[0069] C. When ω i =ω o , V3=0.

[0070] As a further embodiment, the automatic frequency locking control module 30 includes a frequency locking controller 31 and a fourth operator 32; the input end of the frequency locking controller 31 is connected to the output end of the AC amplitude comparison module 20, the output end of the frequency locking controller 31 is connected to the input end of the fourth operator 32, and the output end of the fourth operator 32 is used to output the center frequency of the resonance control module 10.

[0071] Among them, the automatic frequency locking control module 30 includes a frequency locking controller 31 and a fourth operator 32. The frequency locking controller 31 is connected to the output end of the AC amplitude comparison module 20 and is used to integrate the error signal. The output end of the frequency locking controller 31 is connected to the fourth operator 32, and the fourth operator 32 is used to output the center frequency of the resonance control module 10.

[0072] like Figure 5 As shown, V3 is the error signal, S3 is the gain The frequency locking controller 31 is used to integrate V3, and the integration of S3 on V3 can be obtained:

[0073] A. When V3>0 (i.e. ω i >ωo ), the third integral controller increases the compensation amount, making ω o Increase

[0074] B. When V3<0 (i.e. ω i <ω o ), the third integral controller reduces the compensation amount, making ω o reduce

[0075] C. When V3 = 0 (ie ω i =ω o ), the compensation amount of the third integral controller remains unchanged and the system enters a fully locked state; wherein, the convergence speed of the third integral controller can be adjusted by adjusting the value of K2.

[0076] Depend on Figure 5 It can be seen that the first orthogonal signal can be extracted from the output end of S1, and the second orthogonal signal can be extracted from point P. From the foregoing, it can be seen that both the first orthogonal signal and the second orthogonal signal do not contain a DC component and have a strong suppression capability for high-order harmonics.

[0077] The orthogonal signal generator for suppressing DC bias and harmonic interference disclosed in the present invention can not only generate a first orthogonal signal and a second orthogonal signal, but also suppress DC components and harmonic interference.

[0078] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the present invention, and these modifications or replacements should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. An orthogonal signal generator for suppressing DC bias and harmonic interference, characterized in that: include: A resonance control module, the input end of which is connected to the previous module, for receiving an input signal output by the previous module, and for generating a first orthogonal signal and a second orthogonal signal; an AC amplitude comparison module, wherein an input terminal of the AC amplitude comparison module is connected to an output terminal of the resonance control module, and is used to extract a first target signal and a second target signal from the input signal, filter out DC components of the first target signal and the second target signal, and generate an error signal based on the first target signal and the second target signal; An automatic frequency locking control module, the input end of which is connected to the output end of the AC amplitude comparison module, and is used to generate the center frequency of the resonance control module according to the error signal so that the center frequency of the resonance control module is consistent with the fundamental frequency of the input signal.

2. The orthogonal signal generator for suppressing DC bias and harmonic interference as claimed in claim 1, characterized in that: The resonance control module includes an operation module and an integration module; The input end of the operation module is connected to the previous module for receiving the input signal. The output end of the operation module is also connected to the input end of the integration module and the input end of the AC amplitude comparison module respectively. The output end of the integration module is also connected to the input end of the operation module and the input end of the AC amplitude comparison module respectively.

3. The orthogonal signal generator for suppressing DC bias and harmonic interference as claimed in claim 2, characterized in that: The computing module includes a first computing unit and a second computing unit; An input end of the first operator is connected to the front-stage module, another input end of the first operator is connected to the integration module, an output end of the first operator is connected to an input end of the second operator, and an output end of the second operator is respectively connected to the integration module and the AC amplitude comparison module; The second operator is further configured to generate the second orthogonal signal.

4. The orthogonal signal generator for suppressing DC bias and harmonic interference as claimed in claim 3, characterized in that: The integration module includes a first integrator and a second integrator; The input end of the first integrator is connected to the output end of the second operator, and the output end of the first integrator is respectively connected to the input end of the second integrator and the input end of the first operator, wherein the first integrator is also used to generate the first orthogonal signal; The output end of the second integrator is connected to the second operator and the AC amplitude comparison module respectively.

5. The orthogonal signal generator for suppressing DC bias and harmonic interference as claimed in claim 4, characterized in that: The AC amplitude comparison module includes a first filtering module, a second filtering module and a third operator; The input end of the first filtering module is connected to the output end of the second integrator, and is used to extract the first target signal from the input signal, and the output end of the first filtering module is connected to the input end of the third operator; The input end of the second filtering module is connected to the output end of the second operator, and is used to extract the second target signal from the input signal, and the output end of the second filtering module is connected to the input end of the third operator; The output end of the third operator is connected to the automatic frequency locking control module, and is used to output the error signal according to the output signal of the first filtering module and the output signal of the second filtering module.

6. The orthogonal signal generator for suppressing DC bias and harmonic interference as claimed in claim 5, characterized in that: The first filtering module includes a first high-pass filter; The input end of the first high-pass filter is connected to the output end of the second integrator for extracting the first target signal from the input signal, and the output end of the first high-pass filter is connected to the input end of the third operator.

7. The orthogonal signal generator for suppressing DC bias and harmonic interference as claimed in claim 6, characterized in that: The first filtering module also includes a first absolute value module; An input end of the first absolute value module is connected to an output end of the first high-pass filter, and an output end of the first absolute value module is connected to an input end of the third operator.

8. The orthogonal signal generator for suppressing DC bias and harmonic interference as claimed in claim 5, characterized in that: The second filtering module includes a second high-pass filter; The input end of the second high frequency filter is connected to the output end of the second operator for extracting the second target signal from the input signal, and the output end of the second high frequency filter is connected to the input end of the third operator.

9. The orthogonal signal generator for suppressing DC bias and harmonic interference as claimed in claim 8, characterized in that: The second filtering module also includes a second absolute value module; An input end of the second absolute value module is connected to an output end of the second high filter, and an output end of the second absolute value module is connected to an input end of the third operator.

10. The orthogonal signal generator for suppressing DC bias and harmonic interference according to claim 1, characterized in that: The automatic frequency locking control module includes a frequency locking controller and a fourth operator; The input end of the frequency lock controller is connected to the output end of the AC amplitude comparison module, the output end of the frequency lock controller is connected to the input end of the fourth operator, and the output end of the fourth operator is used to output the center frequency of the resonance control module.

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