Instruction processing method, electronic equipment, chip system and computer readable storage medium

Abstract

The embodiment of the invention provides an instruction processing method, electronic equipment, a chip system and a computer readable storage medium, and relates to the technical field of communication. According to the method, the electronic equipment comprises a first execution unit and a second execution unit. After an MIPI instruction is received, the first execution unit judges which algorithm should be used to process the MIPI instruction according to the working mode information of the current electronic equipment. And then the first execution unit sends at least one first processing instruction of the corresponding algorithm to a second execution unit in the electronic equipment, and the second execution unit executes the first processing instruction to obtain at least one adjusted MIPI instruction. Wherein the first processing instruction is a self-defined RISC-V instruction, and the second execution unit can be researched and developed according to the self-defined RISC-V instruction. Therefore, the number of instructions can be effectively reduced, hardware is combined for acceleration, the processing time of an MIPI instruction algorithm is shortened, the communication efficiency is improved, and the use experience of a user is enhanced.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to an instruction processing method, an electronic device, a chip system and a computer-readable storage medium. Background Art

[0002] Nowadays, with the popularization of mobile phones and the development of communication technology, general manufacturers will preset a variety of wireless communication methods and modes for users, such as cellular networks, Bluetooth, WiFi, etc.

[0003] MIPI instructions are generally used in communication equipment to control related RF devices, and in order to meet various wireless communication methods and modes, corresponding algorithms can usually be used to perform various processing on MIPI instructions. Then, the new MIPI instructions obtained after processing are sent to the RF front-end module, which executes the MIPI instructions.

[0004] However, in some cases in the prior art, the processing of MIPI instructions may take a long time, which may increase communication delay and reduce communication quality. Summary of the invention

[0005] The embodiments of the present application provide an instruction processing method, an electronic device, a chip system, and a computer-readable storage medium, which are applied to the field of communication technology. By adding an additional execution unit based on a custom RISC-V instruction to the original architecture, and completing the adjustment process for the MIPI instruction by the execution unit. In this way, the time for adjusting the MIPI instruction can be effectively shortened, thereby improving communication efficiency and meeting some communication scenarios that require rapid response.

[0006] In a first aspect, an embodiment of the present application provides an instruction processing method, which is applied to an electronic device, wherein the electronic device includes a first execution unit and a second execution unit;

[0007] Methods include:

[0008] The first execution unit receives a first mobile industry processor interface MIPI instruction, and acquires at least one first processing instruction from a first instruction set according to the first MIPI instruction, wherein the first processing instruction is used to adjust the first MIPI instruction, and the first instruction set includes a plurality of custom processing instructions;

[0009] The first execution unit sends at least one first processing instruction to the second execution unit, so that the second execution unit executes the at least one first processing instruction to obtain a second MIPI instruction obtained after adjusting the first MIPI instruction;

[0010] The first execution unit receives the second MIPI instruction sent by the second execution unit, and sends the second MIPI instruction to the first RF control module.

[0011] In this implementation, the first execution unit includes two execution units, wherein the first execution unit is the main execution unit and the second execution unit is the cooperative execution unit. The first execution unit can send instructions to the second execution unit for execution by the second execution unit. The sending instructions here can also be understood as the first execution unit being executed by the second execution unit after generating the corresponding instructions. When the first execution unit receives the first MIPI instruction, it will determine what kind of adjustment should be made in combination with the content of the first MIPI instruction, that is, which first processing instructions are used for adjustment. The first instruction set here can be understood as a custom instruction set, which is an instruction set customized for the corresponding communication scenario and / or mode, and can achieve the same function with fewer instructions than the conventional standard instruction set. In addition, the second execution unit can be understood as an execution unit designed based on the first instruction set, which can achieve an acceleration effect at the hardware level. After the second execution unit executes at least one first processing instruction, a second MIPI instruction can be obtained, and the second MIPI instruction can be used to control related radio frequency communication devices. It is understandable that since the custom instruction set is customized for specific communication scenarios and / or modes, it can have higher execution efficiency. Coupled with the acceleration effect at the hardware level, it can effectively improve the adjustment speed of MIPI instructions, thereby shortening communication delays and meeting some communication scenarios that require quick response.

[0012] In a possible implementation manner, acquiring at least one first processing instruction from a first instruction set according to the first MIPI instruction includes:

[0013] The first execution unit obtains a processing instruction matching the first MIPI instruction from the first instruction set based on a preset matching rule to obtain at least one first processing instruction.

[0014] In a possible implementation, the method further includes:

[0015] The first execution unit obtains working information of the electronic device, where the working information includes at least one of the following: working scene information, working mode information, and device status information.

[0016] In a possible implementation manner, acquiring at least one first processing instruction from a first instruction set according to the first MIPI instruction includes:

[0017] The first execution unit obtains a processing instruction matching the first MIPI instruction and the work information from the first instruction set based on a preset matching rule, so as to obtain at least one first processing instruction.

[0018] In this implementation, the process of determining the first processing instruction by the first execution unit is described. In some implementations, at least one first processing instruction can be determined based on the first MIPI instruction. For example, in the preset matching rule, when the address in the first MIPI instruction is specified as a specific address, it is necessary to modify the information of its instruction, or to use a certain algorithm for processing, such as replacing the corresponding address. When the first MIPI instruction meets condition A of the preset matching rule, the corresponding algorithm 1 is used for adjustment. When the first MIPI instruction meets condition B of the preset matching rule, the corresponding algorithm 2 is used for adjustment, and so on.

[0019] In other implementations, the first processing instruction can also be determined in combination with the working information of the electronic device and the first MIPI instruction. In the working information, the working scene information included is scene information related to the communication of the current electronic device, for example, whether the current electronic device communication adopts a cellular network, WiFi, etc., or uses multiple wireless communication methods at the same time. The working mode information can refer to what kind of operating mode the current electronic device is in, for example, the electronic device can be in an energy-saving mode or a low-power mode, or in an airplane mode, or a do not disturb mode, etc. For the device status information, it can refer to the information of the current attributes or states of the electronic device, for example, the power of the current electronic device power supply, the load of the processor, the capacity of the storage space, etc. By combining the working information of the electronic device and the first MIPI instruction, the first MIPI instruction adjustment algorithm can be further subdivided. For example, in some cases, the same first MIPI instruction may correspond to different working scene information or different working mode information, so the first instruction set can be designed for a specific working scene or working mode. In this way, by fully customizing the first instruction set, using a specific first processing instruction under specific conditions can further improve the adjustment efficiency of the first MIPI instruction.

[0020] In a possible implementation, the method further includes:

[0021] A plurality of processing instructions are written into the first instruction set, and the plurality of processing instructions are instructions for executing MIPI instruction adjustment.

[0022] In a possible implementation, the method further includes:

[0023] The first execution unit receives the third instruction, and obtains at least one second processing instruction from the second instruction set according to the third instruction, the second processing instruction is used to adjust the third instruction, the third instruction is a non-MIPI type instruction, and the second instruction set includes multiple processing instructions initially included in the instruction set;

[0024] The first execution unit executes at least one second processing instruction to obtain a fourth instruction obtained by adjusting the third instruction;

[0025] The first execution unit sends a fourth instruction to the first radio frequency control module.

[0026] In this implementation, the second instruction set can be understood as a standard instruction set that can be run on the first execution unit, and the second processing instruction can be correspondingly understood as an instruction existing in the second instruction set. In this method, a judgment mechanism for event processing is added to the first execution unit. If the third instruction received by the first execution unit is a MIPI type instruction, it is processed according to the above method. If the third instruction received by the first execution unit is a non-MIPI type instruction, it is not processed with the help of the second execution unit, but the first execution unit executes the corresponding at least one second processing instruction and obtains the fourth instruction. By adding the judgment step in this implementation, both MIPI type instructions and non-MIPI type instructions can be processed, which can make the entire method more complete and flexible.

[0027] In a possible implementation, the method further includes:

[0028] The first execution unit receives the first MIPI instruction, and acquires at least one third processing instruction from the second instruction set according to the first MIPI instruction, wherein the third processing instruction is used to adjust the first MIPI instruction, and the second instruction set includes a plurality of processing instructions initially included in the instruction set; wherein the number of the first processing instructions is less than the number of the third processing instructions;

[0029] The first execution unit executes at least one third processing instruction to obtain a third MIPI instruction obtained after adjusting the first MIPI instruction;

[0030] The first execution unit sends a second instruction to the first radio frequency control module.

[0031] In one possible implementation, the first instruction set is RISC-V, and the second instruction set is ARM.

[0032] In this implementation, a method for adjusting the first MIPI instruction by using a third processing instruction based on a second instruction set is described. The second instruction set may be an ARM instruction set, etc. The first instruction set may be RISC-V. Due to the open source nature of RISC-V, it is more conducive to customization according to specific scenarios or modes, thereby obtaining a customized RISC-V instruction set. The customized custom RISC-V instruction set can use fewer instructions to complete tasks in corresponding scenarios or modes than the standard instruction set, and the corresponding execution time is also less. In this way, it can be seen that the custom RISC-V instruction set can be more efficient when processing MIPI instructions in the communication field.

[0033] In a possible implementation, the first execution unit and the second execution unit are both included in the first processing unit; or, the first execution unit is the first processing unit, and the second execution unit is the second processing unit.

[0034] The first processing unit is a main processing unit, which can also be understood as a main processor, and the second processing unit is a co-processing unit, which can also be understood as a co-processor.

[0035] In this implementation, one architecture is that both the first execution unit and the second execution unit are included in the first processing unit. This architecture is also called a tightly coupled architecture. Based on this tightly coupled architecture, the second execution unit can share other units or modules in the first processing unit like the first execution unit. For example, the communal units or modules include an instruction fetch unit, a decoding unit, a load / store unit, etc. In this way, hardware resources can be better utilized and unnecessary redundancy can be reduced. In addition, considering that some mobile devices or terminal devices have restrictions on the size of hardware, this method sets the newly added second execution unit within the first processing unit, which can also minimize the occupation of valuable device space and does not affect the normal operation of other modules in the electronic device.

[0036] In addition, another architecture is also included, in which the first execution unit and the second execution unit are two independent processing units, namely the first processing unit and the second processing unit. This architecture is also called a loosely coupled architecture. Under this architecture, the second processing unit has an independent set of CPU processing hardware and processes when it is running, and the computing power can be more abundant. And the update and iteration of the instruction processing method and the radio frequency control device will be more convenient. For example, when new communication scenarios and services are added, the processing algorithm and the custom RISC-V instruction set need to be updated accordingly, and only the second processing unit needs to be replaced. And when the electronic device cannot effectively dissipate heat, sometimes the performance of the hardware will be actively reduced. In this method, because the second processing unit and the first processing unit are separate and independent, the second processing unit can be cooled more easily and maintain better performance.

[0037] In a second aspect, an embodiment of the present application provides a radio frequency control device, including: a first processing unit, the first processing unit including a first execution unit and a second execution unit;

[0038] The first execution unit is used to execute the method described in the first aspect or any possible implementation manner of the first aspect;

[0039] The second execution unit is used to receive at least one first processing instruction sent by the first execution unit, and execute at least one first processing instruction to obtain a second MIPI instruction obtained after adjusting the first MIPI instruction.

[0040] In a third aspect, an embodiment of the present application provides an electronic device, including a processor and a memory, the memory being used to store code instructions, and the processor being used to run the code instructions to execute the method described in the first aspect or any possible implementation of the first aspect.

[0041] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which a computer program or instructions are stored. When the computer program or instructions are run on a computer, the computer executes the method described in the first aspect or any possible implementation of the first aspect.

[0042] In a fifth aspect, the present application provides a chip or a chip system, which includes at least one processor and a communication interface, the communication interface and the at least one processor are interconnected by a line, and the at least one processor is used to run a computer program or instruction to execute the method described in the first aspect or any possible implementation of the first aspect. The communication interface in the chip can be an input / output interface, a pin or a circuit, etc.

[0043] In a possible implementation, the chip or chip system described above in the present application further includes at least one memory, in which instructions are stored. The memory may be a storage unit inside the chip, such as a register, a cache, etc., or a storage unit of the chip (such as a read-only memory, a random access memory, etc.).

[0044] It should be understood that the second to fifth aspects of the present application correspond to the technical solutions of the first aspect of the present application, and the beneficial effects achieved by each aspect and the corresponding feasible implementation methods are similar and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 A schematic diagram of implementing terminal communication provided in an embodiment of the present application;

[0046] Figure 2 A schematic diagram of implementing the communication of the transmitting end provided in the embodiment of the present application;

[0047] Figure 3 A schematic diagram of an implementation of a radio frequency communication device provided in an embodiment of the present application;

[0048] Figure 4 A schematic diagram of the data structure of the MIPI instruction provided in the embodiment of the present application;

[0049] Figure 5 A schematic diagram of the implementation of the MIPI command communication architecture provided in the embodiment of the present application;

[0050] Figure 6 A schematic diagram of the MIPI instruction adjustment duration provided in an embodiment of the present application;

[0051] Figure 7 A schematic diagram of a functional interface of a terminal provided in an embodiment of the present application;

[0052] Figure 8 A schematic diagram of the antenna layout of a terminal provided in an embodiment of the present application;

[0053] Fig. 9 A schematic diagram of the hardware structure of a terminal device provided in an embodiment of the present application;

[0054] Fig.10 A schematic diagram of the software structure of a terminal device provided in an embodiment of the present application;

[0055] Fig.11 Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 1 ;

[0056] Fig.12 A schematic diagram of a process flow executed by a processing unit provided in an embodiment of the present application;

[0057] Fig.13 Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 2 ;

[0058] Fig.14 Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 3 ;

[0059] Fig.15 Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 4 ;

[0060] Fig.16 Schematic diagram of the instruction processing method provided in the embodiment of the present application Figure 1 ;

[0061] Fig.17 Scenario diagram of MIPI instruction processing provided in the embodiment of the present application Figure 1 ;

[0062] Fig.18 Scenario diagram of MIPI instruction processing provided in the embodiment of the present application Figure 2 ;

[0063] Fig.19 Schematic diagram of data processed by MIPI instructions provided in the embodiment of the present application Figure 1 ;

[0064] Fig. 20 Schematic diagram of the instruction processing method provided in the embodiment of the present application Figure 2 ;

[0065] Fig.21 A schematic diagram of implementing a custom RISC-V instruction provided in an embodiment of the present application;

[0066] Fig. 22 Schematic diagram of data processed by MIPI instructions provided in the embodiment of the present application Figure 2 ;

[0067] Fig.23 Schematic diagram of the comparison of processing instructions provided in the embodiments of the present application Figure 1 ;

[0068] Fig.24 Schematic diagram of the comparison of processing instructions provided in the embodiments of the present application Figure 2 ;

[0069] Fig.25 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0070] In order to clearly describe the technical solutions of the embodiments of the present application, some terms and technologies involved in the embodiments of the present application are briefly introduced below:

[0071] 1. Instruction Set

[0072] In the embodiments of the present application, the instruction set is also called a machine language instruction set or instruction set architecture (ISA), which is an interface between software and hardware. It defines all the basic operations that the CPU can recognize and execute. According to the complexity and design purpose of the instruction set, they are divided into two categories: Complex Instruction Set Computing (CISC) and Reduced Instruction Set Computing (RISC). CISC contains a large number of complex instructions, aiming to complete complex operations with fewer machine language instructions; while RISC simplifies the instruction set and emphasizes the use of simple instructions to build a more efficient processing flow.

[0073] For software developers, understanding the instruction set of the target platform can help optimize code performance. For hardware designers, the instruction set affects the design and implementation of the CPU. In addition, with the development of technology, some modern CPUs also support vector instruction sets, such as Advanced Vector Extensions (AVX), which are specifically used to accelerate large-scale data processing tasks in multimedia and scientific computing. This shows that the instruction set is also constantly evolving to meet the growing computing needs.

[0074] 2. RISC-V

[0075] RISC-V is an open source instruction set architecture based on the principle of reduced instruction set computing. Unlike most instruction sets owned by commercial companies, the design and use of RISC-V is open and free, which makes it an ideal choice for academic research, industrial applications, and personal interest projects. RISC-V aims to implement a modern, stable and scalable instruction set architecture. Its main feature is the modular design, which allows users to choose different instruction subsets as needed to meet specific application requirements. The basic integer instruction set provides the necessary operations, while other advanced functions such as floating-point operations and vector processing are implemented through optional extensions.

[0076] The openness of RISC-V brings many advantages, including reducing chip development costs, promoting innovation and education, and enhancing security. Since there are no licensing fees and restrictions, any organization or individual can freely adopt RISC-V for processor design. In addition, a large RISC-V community has been formed around the world, providing rich resources and support. With the advancement of technology, more and more companies are beginning to adopt RISC-V architecture in their products, covering various application scenarios from embedded systems to data centers. This trend shows that RISC-V is becoming an important force in the future computing field.

[0077] 3. Radio Frequency

[0078] Radio Frequency (RF) refers to the electromagnetic wave frequency band between 30kHz and 300GHz, which is widely used in wireless communication technology. Electromagnetic waves in this frequency band can be used to transmit information. For example, wireless connections such as television broadcasting, mobile phone communications, Wi-Fi and Bluetooth are all based on RF technology.

[0079] The importance of radio frequency technology lies in its ability to support long-distance information transmission without physical connection, making mobile communications possible in modern society. Whether it is making voice calls through radio waves or browsing the Internet using Wi-Fi networks, the support of radio frequency technology is indispensable. In addition, radio frequency technology also plays an indispensable role in the fields of medical care, military, aerospace, etc.

[0080] 4. MIPI

[0081] Mobile Industry Processor Interface (MIPI) is a general term for a series of standardized interface specifications that aim to provide efficient communication and connection standards between different components in mobile devices. MIPI's advantages lie in its low power consumption, high performance, and good adaptability to small-size devices, which makes it an important technical standard in smartphones and other portable electronic devices. By using the MIPI standard, manufacturers can ensure interoperability between components.

[0082] MIPI Radio Frequency Front End (RFFE) is also a standard defined by the MIPI Alliance, which is specifically used to control and manage RF front-end modules in mobile devices. RF front-end modules usually include power amplifiers (PA), low noise amplifiers (LNA), filters, switches and other components, which are critical to the quality of wireless communication. In the embodiments of this application, when MIPI instructions are mentioned, it can be understood that they specifically refer to MIPI RFFE instructions.

[0083] 5. MDM

[0084] Modem (MDM), short for Modulator-Demodulator, is a device or program that can convert digital signals into analog signals and convert analog signals back into digital signals. This conversion process allows data to be transmitted over traditional telephone lines, cables or other communication media.

[0085] Modems play a central role in modern wireless communications, handling data transmission from devices to base stations, including but not limited to 4G LTE, 5G and other network technologies. The functions of modems mainly include: modulation, converting binary data generated by computers or other digital devices into a form suitable for transmission through analog communication channels; demodulation, converting the received analog signal back to the original digital data format so that the receiving device can understand and process it.

[0086] 6. FEM

[0087] In the field of communication technology, the front-end module (FEM) is one of the key components responsible for processing radio frequency signals in wireless communication equipment. Its main function is to amplify the signal at the transmitting end and filter and amplify the received signal at the receiving end. FEM is widely used in various wireless communication devices, such as smartphones, tablets, Wi-Fi routers, and IoT devices. With the development of technology, the requirements for FEM performance are getting higher and higher, because higher data rates and more complex modulation schemes require more accurate and efficient RF front-end processing capabilities.

[0088] The main functions of FEM may include: power amplification (PA), which amplifies the signal on the transmission path so that it can be effectively transmitted through the antenna; switch, which is used to switch the transmission and reception modes to ensure that only transmission or reception operations can be performed at the same time; filtering, which removes unnecessary frequency components to ensure that only signals in the target frequency band are processed, which helps to reduce interference and improve communication quality.

[0089] 7. Other terms

[0090] In the embodiments of the present application, words such as "first" and "second" are used to distinguish the same or similar items with substantially the same functions and effects. For example, the first chip and the second chip are only used to distinguish different chips, and their order is not limited. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit them to be different.

[0091] It should be noted that in the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0092] In the embodiments of the present application, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: the existence of A alone, the existence of A and B at the same time, and the existence of B alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, a--c, bc, or abc, where a, b, and c can be single or multiple.

[0093] 8. Electronic devices

[0094] The electronic device of the embodiment of the present application may include a handheld device with communication function, a vehicle-mounted device, etc. For example, some electronic devices are: mobile phones, tablet computers, PDAs, laptop computers, mobile internet devices (MIDs), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, wireless terminals in self driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to wireless modems, vehicle-mounted devices, wearable devices, terminal devices in 5G networks or future evolved public land mobile communication networks (public landmobile networks). The embodiments of the present application do not limit this.

[0095] As an example but not limitation, in the embodiments of the present application, the electronic device may also be a wearable device. Wearable devices may also be referred to as wearable smart devices, which are a general term for wearable devices that are intelligently designed and developed using wearable technology for daily wear, such as glasses, gloves, watches, clothing, and shoes. A wearable device is a portable device that is worn directly on the body or integrated into the user's clothes or accessories. Wearable devices are not only hardware devices, but also powerful functions achieved through software support, data interaction, and cloud interaction. Broadly speaking, wearable smart devices include full-featured, large-sized, and fully or partially independent of smartphones, such as smart watches or smart glasses, as well as devices that only focus on a certain type of application function and need to be used in conjunction with other devices such as smartphones, such as various types of smart bracelets and smart jewelry for vital sign monitoring.

[0096] In addition, in the embodiments of the present application, the electronic device may also be a terminal device in the Internet of Things (IoT) system. IoT is an important part of the future development of information technology. Its main technical feature is to connect objects to the network through communication technology, thereby realizing an intelligent network that interconnects people and machines and things.

[0097] The electronic device in the embodiments of the present application may also be referred to as: terminal equipment, user equipment (UE), mobile station (MS), mobile terminal (MT), access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication equipment, user agent or user device, etc.

[0098] In an embodiment of the present application, the electronic device or each network device includes a hardware layer, an operating system layer running on the hardware layer, and an application layer running on the operating system layer. The hardware layer includes hardware such as a central processing unit (CPU), a memory management unit (MMU), and a memory (also called main memory). The operating system can be any one or more computer operating systems that implement business processing through processes, such as a Linux operating system, a Unix operating system, an Android operating system, an iOS operating system, or a Windows operating system. The application layer includes applications such as browsers, address books, word processing software, and instant messaging software.

[0099] Based on the above introduction, the relevant technologies involved in this application are further introduced in detail below.

[0100] Nowadays, people's normal life and work are inseparable from communication. A common communication method is Figure 1 As shown. Figure 1In the communication, there are the sending and receiving ends. In the sending end, information encoding, modulation, and transmission can be included. Information encoding refers to the need to encode the original information and convert it into a digital signal form suitable for transmission through the communication channel. For example, ASCII encoding is used to convert letters and symbols into binary numbers so that computers can understand and process the information. Once the information is encoded into a digital signal, it needs to be modulated. Modulation is the process of combining a digital signal with a carrier signal in order to enable the signal to be transmitted efficiently over a wireless or wired medium. Common modulation methods include amplitude modulation (AM), frequency modulation (FM), and phase modulation (PM). The modulation process enhances the signal's ability to resist interference and allows multiple signals to share the same communication channel. The modulated signal is then sent to the antenna and transmitted through a form such as radio waves. The role of the antenna is to convert the electrical signal into electromagnetic waves so that it can propagate in free space. Factors such as transmission power and antenna design will affect the transmission distance and quality of the signal.

[0101] After being transmitted, electromagnetic waves carry information through the air or other medium from one location to another. When the electromagnetic waves reach the receiving end, they are captured by the antenna and reconverted into electrical signals. The receiving device must accurately identify the target signal and minimize the influence of other interfering signals. This usually involves the application of filters to remove unnecessary frequency components. The received signal is then demodulated, which is to extract the original digital signal from the carrier signal. This is the inverse operation of the modulation process, which aims to recover the information representation sent by the sender. Effective demodulation is essential to ensure the reliability and accuracy of the communication system. Finally, the demodulated digital signal needs to be converted back to its original form, such as text, sound or image. This process is called message decoding, which reconstructs the information content that the sender intended to convey. The success of decoding is directly related to the effectiveness of communication.

[0102] Furthermore, the actual communication process is generally more complicated. Take the sending end as an example. Figure 2 As shown, more steps may be involved. For example, it may include source coding, channel coding, grouping and formatting, modulation mapping, carrier generation, modulation execution, up-conversion, power amplification, filtering and antenna transmission. Among them, steps such as power amplification and filtering can be performed by the RF front-end module FEM. Power amplification is one of the core functions of FEM. The power amplifier in FEM is used to enhance the strength of the RF signal after modulation and up-conversion, ensuring that the signal has enough energy to be sent out through the antenna and cover the required transmission distance. Some FEMs also include filters for selecting signals within a specific frequency range and removing unnecessary frequency components to avoid interference and improve signal quality, which is important in both the transmit path and the receive path. Figure 2 The remaining steps can be referred to Figure 1 The relevant contents or prior art in will not be repeated here.

[0103] In order to understand the relevant structure of FEM, you can refer to Figure 3 The content shown. Figure 3 In the baseband, there are modules for modulation and demodulation, corresponding to the modulation and demodulation functions. The main function of the frequency generator module is to generate the required frequency signals in the baseband processing stage. These frequency signals are usually used in data encoding, modulation and other processes. Specifically, in digital communication systems, frequency generators can be used to generate carrier signals, which will be modulated with the data to be transmitted. In addition, frequency generators may also be used to generate local oscillator signals for subsequent mixing operations. It ensures that the generated signal has high accuracy and stability, which is essential for maintaining the quality of the communication link. The basic function of the RF mixer is to achieve signal frequency conversion. At the transmitting end, the mixer combines the baseband signal or the modulated signal with a high-frequency carrier signal to generate a new higher frequency signal by frequency multiplication. This process is called up-conversion. This newly generated signal is then amplified and sent out. At the receiving end, the mixer performs the opposite operation, that is, down-conversion, converting the received high-frequency signal into a lower intermediate frequency signal or directly to the baseband signal for subsequent demodulation and information extraction.

[0104] After the baseband, there is usually at least one FEM. Figure 3 In the embodiment, the FEM includes a power amplifier PA, a filter module, a low noise amplifier (LNA), and a switch 301. The switch 301 is used to switch between the transmission and reception modes to ensure that only transmission or reception operations can be performed at the same time. The antenna 302 is connected to the switch 301 for sending and receiving signals. The functions of other modules or devices can be referred to the relevant content or prior art in the previous text, and will not be repeated here.

[0105] It is understandable that for a key communication device such as FEM, the state of the internal device or module needs to be changed according to the communication needs, and MIPI instructions can be used to control FEM to make changes. Figure 4 As shown, a standard format of a MIPI instruction may include a start bit, an address bit, a read / write bit, a register address, a data bit, and a stop bit. Figure 5The architecture of information interaction under MIPI instructions is shown in the figure. A master control module is required to control at least one slave control module, where the master control module can also be called a master device, such as a baseband processor or an application processor, and the slave control module can also be called a slave device, such as a FEM. The master control module and the slave control module can be connected through SCLK (Serial Clock) and SDATA (Serial Data). SCLK and SDATA are two key signal lines that together constitute the basic communication link of the MIPI RFFE interface. These two signal lines are used to transmit data and synchronization information between the master device and the slave device. SCLK stands for serial clock signal, which is a clock signal generated by the master device and provided to the slave device. It provides a timing reference for data transmission and ensures that data can be transmitted in the correct order and time interval. The frequency of SCLK determines the speed of data transmission. Different application scenarios may require different clock frequencies to optimize performance and power consumption. SDATA is a serial data signal used to transmit actual data or instructions between the master device and the slave device, which can be data written to the register, status information read from the register, or other control commands. Although the master primarily sends data to the slave, the slave also returns data to the master via the SDATA line during a read operation.

[0106] In a typical MIPI RFFE communication cycle, the master device first generates an SCLK signal and sends commands or data through the SDATA line based on this signal. The following is a simplified communication process: 1. Using the start bit, the master device indicates the start of a new communication cycle by pulling down the SDATA line for a period of time; 2. Subsequently, the master device sends the address of the target slave device, the read / write flag, and specific commands or data on the SDATA line in sequence according to the beat of the SCLK signal. 3. After receiving the command from the device, it may return a confirmation signal, or if it is a read operation, it will return the required data through the SDATA line. 4 Finally, using the end bit, the master device marks the end of the communication cycle in a specific way, such as pulling up the SDATA line.

[0107] With the development of communication technology and the increasing diversity of wireless communication methods, some electronic devices now make certain adjustments to MIPI instructions in some cases before transmitting them to the RF front-end device. One processing flow may be that first, when the processing unit in the electronic device receives a specific MIPI instruction, it enters the interrupt service program. The interrupt service program here can be understood as interrupting and caching other non-important programs that may be executing now, and giving priority to executing the algorithm processing program for the MIPI instruction. Then, it will determine what kind of algorithm the MIPI instruction needs to be processed. Next, the corresponding algorithm is used to adjust the MIPI instruction to obtain a new MIPI instruction. After execution, exit the interrupt service program. For example Figure 6 As shown, the approximate time spent in each stage of the above process is shown. Among them, starting processing corresponds to the processing unit entering the interrupt service program after reading the MIPI instruction, and judging the scenario corresponds to determining what algorithm to use to adjust the MIPI instruction. For the two stages from starting processing to executing the algorithm, the total time spent in the entire process is relatively small, while the time from executing the algorithm to completing the processing generally occupies most of the time. For example, in some cases, assuming that the total time is about 50 microseconds, the time required for the execution algorithm to process the MIPI instruction may take 30-40 microseconds.

[0108] Through the above explanation, some current wireless communication related technologies and the process of communication control based on MIPI instructions are introduced. However, the above-mentioned implementation methods of adjusting or processing MIPI instructions have some shortcomings. In order to better explain this problem, the following is an explanation based on some actual scenarios.

[0109] Scenario 1: Management of multiple wireless communication modes.

[0110] like Figure 7 As shown, a mobile phone shortcut function interface is displayed. For example, in some mobile phones, users can see a similar interface by pulling down or pulling up. This interface generally includes some commonly used functions, such as whether to enable the WLAN function, which corresponds to the WiFi communication method. It may also include flight mode, Bluetooth, personal hotspot, mobile data, screen rotation, screen recording, flashlight and other functions. Users can turn the function on or off by clicking the corresponding function control. For example, in Figure 7 In the example, the user clicks to enable the WLAN, Bluetooth, and mobile data functions. Figure 7The displayed function interface already includes a variety of commonly used wireless communication modes, including WiFi, flight mode, Bluetooth, personal hotspot, and mobile data. Among them, Internet data can be accessed through WiFi and mobile data. WiFi uses radio waves to transmit data and is usually served by a wireless router that converts wired network connections into wireless signals. Mobile data refers to Internet connections provided through cellular networks, which means that users can use the network services provided by operators to access the Internet anywhere there is signal coverage. Mobile data consumes the traffic in the user's package and may incur additional charges. Bluetooth is a short-range wireless communication technology that allows data to be exchanged between two compatible devices. Common uses include connecting peripherals such as headphones, speakers, keyboards, mice, and enabling file sharing and communication between short-range devices. Personal hotspot refers to connecting a device with a mobile data connection, such as Figure 7 The mobile phone shown in the figure turns into a WiFi router. Other devices can access the Internet through this temporarily created WiFi network, which is very useful when no WiFi is available. Airplane mode is a mobile phone setting or mobile phone mode that turns off all wireless communication functions when turned on, including mobile data, WiFi, Bluetooth, and GPS. This is designed to prevent mobile phone signals from interfering with aircraft navigation systems, but it can also be used to save power or avoid being disturbed in a quiet environment. In addition, some mobile phones may also contain Near Field Communication (NFC) modules, which can also be counted as a wireless communication method. NFC is a short-range high-frequency wireless communication technology that allows electronic devices to exchange data when they are close to each other. Its effective working distance is usually within 4 cm.

[0111] At the same time, different wireless communication methods in mobile phones and network technologies such as 4G / 5G need to work in specific frequency bands. Here, frequency band refers to the radio frequency range. Different wireless communication technologies and applications use different frequency bands to avoid interference and ensure effective data transmission. For some major wireless communication methods, for example, WiFi generally works in the 2.4 GHz and 5 GHz frequency bands. These two frequency bands have their own advantages and disadvantages. Among them, 2.4GHz has strong penetration but is susceptible to interference, and 5GHz has fast speed but small coverage. Bluetooth generally works mainly in the 2.4 GHz ISM frequency band and shares this frequency band with WiFi, so there may be interference problems in some cases. NFC usually works in the 13.56 MHz frequency band and is mainly used for close-range data exchange and payment functions. The frequency bands used by the global positioning system GPS are L1 (1575.42 MHz), L2 (1227.60 MHz) and L5 (1176.45 MHz) bands, which provide different accuracy and services respectively. For mobile communications in cellular networks, 4G LTE supports multiple frequency bands ranging from hundreds of MHz to thousands of MHz. For example, Band 7 (2600 MHz) is suitable for high-speed data services for high-density users in urban areas, and Band 12 / 17 (700 MHz) is suitable for wide coverage needs in rural or remote areas. 5G NR (NewRadio) is divided into low-frequency bands (Sub-1 GHz), mid-frequency bands (1 GHz to 6 GHz), and high-frequency bands (millimeter waves, above 24 GHz). Each frequency band has its specific application scenario. For low-frequency bands, such as 600 MHz, it is suitable for large-area coverage and indoor penetration; mid-frequency bands, such as 3.5 GHz, balance speed and coverage, and are the preferred frequency bands for most 5G deployments; and high-frequency bands, such as 28GHz, provide extremely high data rates, but limited coverage, and are mainly used in hotspots.

[0112] In short, lower frequency signals travel farther and can better penetrate buildings and other obstacles. Higher frequencies can carry more data, resulting in faster download and upload speeds. Different frequency bands have different anti-interference performance. Choosing the right frequency band can reduce signal interference and improve service quality. By properly selecting and allocating frequency bands, operators and technology developers can maximize the use of limited radio resources while meeting user needs. Therefore, modern smartphones need to support multiple frequency bands, as well as seamless switching and connection in many different wireless communication modes, so that users can get a better wireless network experience. Then, it is necessary for the relevant wireless communication devices or RF devices inside the mobile phone to be able to make corresponding changes as the wireless communication mode switches. In addition, in some cases, there may be multiple wireless communication modes coexisting. In order to deal with more complex and possibly more complex situations in the future, it is necessary to adjust the MIPI instructions based on the processing unit to control the wireless communication devices in the mobile phone.

[0113] Scenario 2: Control of multiple RF front-end modules and antennas.

[0114] Today's mobile phones generally have multiple RF front-end modules and corresponding antennas. Figure 8 As shown, multiple antennas in a mobile phone and the corresponding layout are shown, and the view on the back of the mobile phone is used as an example. The mobile phone includes 6 antennas, of which the first antenna 801, the second antenna 802, the third antenna 803, the fourth antenna 804 and the fifth antenna 805 are cellular antennas, and the sixth antenna 806 is a wireless communication antenna. The first antenna 801 and the second antenna 802 are arranged on the left side of the mobile phone, the third antenna 803 and the fourth antenna 804 are arranged on the right side of the mobile phone, the fifth antenna 805 is arranged at the bottom of the mobile phone, and the sixth antenna 806 is arranged at the top of the mobile phone.

[0115] In some cases, it is necessary to monitor the signal strength of each antenna. For example, when the user holds the phone in portrait mode, the signal of the fifth antenna 805 may be blocked, thereby reducing the communication quality. In this case, it is necessary to analyze the signal strength of each other antenna and promptly distribute the work of the fifth antenna 805 to other unblocked antennas. Similarly, when the user holds the phone in both hands in landscape mode, the signal strength of the first antenna 801 and the second antenna 802 may be reduced due to being blocked. At this time, the remaining third antenna 803, fourth antenna 804 and fifth antenna 805 are needed to take over the work of the first antenna 801 and the second antenna 802.

[0116] In other cases, it is also necessary to balance and adjust the loads of each antenna. For example, if it is detected that the load of the first antenna 801 is relatively high for a period of time, then it can be checked whether there is an antenna with a lower current load among the second antenna 802 to the fifth antenna 805. If there is an antenna with a lower current load, then part of the communication tasks originally performed by the first antenna 801 can be handled by the corresponding idle antenna.

[0117] It is understandable that the coordinated use of multiple antennas is generally performed by the corresponding multiple RF front-end modules, and the multiple RF front-end modules need to be controlled and managed by MIPI instructions, which also involves the process of the processing unit using various algorithms to adjust the MIPI instructions.

[0118] In addition, there are other scenarios related to wireless communication that may involve rapid response requirements. Please refer to relevant materials and we will not go into details here.

[0119] All of the above scenarios involve the need for electronic devices to respond quickly to the management and switching of various communication modes in wireless communication scenarios, and corresponding control is also required for multiple wireless communication hardware inside the electronic device. From the method technology introduced in the previous article, it can be known that in the process of the processing unit of the electronic device entering the interrupt service program and using various algorithms to adjust the MIPI instructions, the execution of the algorithm processing part occupies the main time-consuming time. When the amount of electronic device communication data is small and the wireless communication mode is single, the communication delay caused by the execution of the algorithm processing process may not cause a significant impact. However, when the amount of electronic device communication data is large, or multiple wireless communication modes coexist, and it is necessary to switch between different wireless communication modes, it may cause obvious communication delays and reduce the communication quality, thereby affecting the user experience.

[0120] Based on this, the embodiment of the present application proposes the following technical concept: for a variety of wireless communication scenarios under a specific working mode, a custom RISC-V instruction set is designed, and a corresponding execution unit is developed based on the custom RISC-V, which can be referred to as the second execution unit here. The execution unit that originally used an algorithm to adjust the MIPI instruction is referred to as the first execution unit here. After reading the MIPI instruction, the first execution unit will first determine what algorithm needs to be used to adjust the MIPI instruction, and thus determine which custom RISC-V instructions are needed. Among them, it can be understood that the custom RISC-V instruction can implement various algorithms for processing MIPI instructions. Then, the second execution unit can execute the above-determined custom RISC-V instruction for adjusting the MIPI instruction. After the execution is completed, a new MIPI instruction is obtained, and the first execution unit sends the new MIPI instruction to the device of the subsequent wireless communication to control the corresponding device to perform the operation according to the new MIPI instruction.

[0121] In this way, by using a customized RISC-V instruction set, the number of instructions can be reduced and the execution speed can be increased compared to adjusting the MIPI instructions using a first execution unit based on a standard instruction set. The standard instruction set may be an Advanced RISC Machine (ARM) instruction set. In addition, the customized second execution unit may also have an acceleration effect from a hardware level.

[0122] The technical solution provided in this application can be applied to terminal devices. The following first briefly introduces the terminal devices.

[0123] For example, Fig. 9 A schematic diagram of the hardware structure of a terminal device provided in an embodiment of the present application is shown.

[0124] Fig. 9 A schematic diagram of the structure of a terminal device provided in an embodiment of the present application. The terminal device may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, a radio frequency control device 196, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc.

[0125] It is to be understood that the structure illustrated in the embodiments of the present application does not constitute a specific limitation on the terminal device. In other embodiments of the present application, the terminal device may include more or fewer components than shown in the figure, or combine certain components, or split certain components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0126] The processor 110 may include one or more processing units, for example, the processor 110 may include an application processor (AP), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0127] The controller can generate operation control signals according to the instruction operation code and timing signal to complete the control of instruction fetching and execution.

[0128] The processor 110 may also be provided with a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0129] In some embodiments, the processor 110 may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuits sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0130] The MIPI interface can be used to connect the processor 110 with peripheral devices such as the display screen 194 and the camera 193. The MIPI interface includes a camera serial interface (CSI), a display serial interface (DSI), etc. In some embodiments, the processor 110 and the camera 193 communicate via the CSI interface to implement the shooting function of the terminal device. The processor 110 and the display screen 194 communicate via the DSI interface to implement the display function of the terminal device.

[0131] It is understandable that the interface connection relationship between the modules illustrated in the embodiment of the present application is a schematic illustration and does not constitute a structural limitation on the terminal device. In other embodiments of the present application, the terminal device may also adopt different interface connection methods in the above embodiments, or a combination of multiple interface connection methods.

[0132] The wireless communication function of the terminal device can be implemented through antenna 1, antenna 2, mobile communication module 150, wireless communication module 160, modem processor and baseband processor.

[0133] Antenna 1 and antenna 2 are used to transmit and receive electromagnetic wave signals. The antenna in the terminal device can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve the utilization of the antenna. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.

[0134] It can be understood that the example of antenna 1 and antenna 2 used here does not mean that the terminal device can only include two antennas. In some embodiments, more antennas can be included.

[0135] The mobile communication module 150 can provide solutions for wireless communications including 2G / 3G / 4G / 5G applied to terminal devices. The mobile communication module 150 may include at least one filter, a switch, a power amplifier, a low noise amplifier (LNA), etc. The mobile communication module 150 can receive electromagnetic waves from the antenna 1, and filter, amplify, and process the received electromagnetic waves, and transmit them to the modulation and demodulation processor for demodulation. The mobile communication module 150 can also amplify the signal modulated by the modulation and demodulation processor, and convert it into electromagnetic waves for radiation through the antenna 1. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the same device as at least some of the modules of the processor 110.

[0136] The modem processor may include a modulator and a demodulator. The modulator is used to modulate the low-frequency baseband signal to be sent into a medium-high frequency signal. The demodulator is used to demodulate the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low-frequency baseband signal to the baseband processor for processing. After the low-frequency baseband signal is processed by the baseband processor, it is passed to the application processor. The application processor outputs a sound signal through an audio device (not limited to a speaker 170A, a receiver 170B, etc.), or displays an image or video through a display screen 194. In some embodiments, the modem processor may be an independent device. In other embodiments, the modem processor may be independent of the processor 110 and may be set in the same device as the mobile communication module 150 or other functional modules.

[0137] The wireless communication module 160 can provide wireless communication solutions including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc., which are applied to terminal devices. The wireless communication module 160 can be one or more devices integrating at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, modulates the frequency of the electromagnetic wave signal and filters it, and sends the processed signal to the processor 110. The wireless communication module 160 can also receive the signal to be sent from the processor 110, modulate the frequency of it, amplify it, and convert it into electromagnetic waves for radiation through the antenna 2.

[0138] In some embodiments, the antenna 1 of the terminal device is coupled to the mobile communication module 150, and the antenna 2 is coupled to the wireless communication module 160, so that the terminal device can communicate with the network and other devices through wireless communication technology. The wireless communication technology may include global system for mobile communications (GSM), general packet radio service (GPRS), code division multiple access (CDMA), wideband code division multiple access (WCDMA), time-division code division multiple access (TD-SCDMA), long term evolution (LTE), BT, GNSS, WLAN, NFC, FM, and / or IR technology, etc. GNSS may include global positioning system (GPS), global navigation satellite system (GLONASS), Beidou navigation satellite system (BDS), quasi-zenith satellite system (QZSS) and / or satellite based augmentation system (SBAS).

[0139] The radio frequency control device 196 can be understood as being used to execute and read the MIPI instructions sent by the modem, and to adjust or process the MIPI instructions in combination with specific scene or mode information, thereby obtaining new MIPI instructions. The radio frequency control device 196 can obtain global information of the terminal device from the processor 110. The radio frequency control device 196 may include a processing unit, and in addition to a standard execution unit, the processing unit may also include a customized execution unit for executing a customized RISC-V instruction set.

[0140] The software system of the terminal device may adopt a layered architecture, an event-driven architecture, a micro-core architecture, a micro-service architecture, or a cloud architecture, etc. The embodiment of the present application takes the Android system of the layered architecture as an example to exemplify the software structure of the terminal device.

[0141] For example, Fig.10A software structure diagram of a terminal device provided in an embodiment of the present application. Fig.10 As shown, the layered architecture divides the software into several layers, each with a clear role and division of labor. The layers communicate with each other through interfaces. In some embodiments, the system may include an application layer, an application framework layer, an Android runtime (Android runtime) and a system library, a hardware abstraction layer (HAL) and a kernel layer. It should be noted that the embodiment of the present application is illustrated by taking the Android system as an example. In other operating systems (such as Hongmeng system, IOS system, etc.), as long as the functions implemented by each functional module are similar to those of the embodiment of the present application, the solution of the present application can also be implemented.

[0142] Among them, the application layer can include a series of application packages.

[0143] like Fig.10 As shown, the application layer may include applications such as camera, gallery, calendar, call, map, navigation, wireless local area network (WLAN), Bluetooth, music, video, short message, lock screen application, setting application, etc. Of course, the application layer may also include other application packages, such as payment application, shopping application, banking application, social application and other third-party applications, which are not limited in this application.

[0144] Among them, third-party applications can have functions such as face recognition, video calls, scanning, photo taking and video recording.

[0145] The application framework layer provides an application programming interface (API) and a programming framework for the application programs in the application layer. The application framework layer includes some predefined functions. For example, it may include an activity manager, a window manager, a content provider, a view system, a resource manager, a notification manager, etc., and the embodiments of the present application do not impose any restrictions on this.

[0146] The system library can include multiple functional modules, such as surface manager, media libraries, 3D graphics processing library (such as OpenGL ES), 2D graphics engine (such as SGL), etc.

[0147] Android runtime includes core libraries and virtual machines. Android runtime is responsible for scheduling and management of the Android system. The core library consists of two parts: one is the function that the Java language needs to call, and the other is the Android core library. The application layer and the application framework layer run in the virtual machine. The virtual machine executes the Java files of the application layer and the application framework layer as binary files. The virtual machine is used to perform object life cycle management, stack management, thread management, security and exception management, and garbage collection.

[0148] The HAL layer is an encapsulation of the Linux kernel driver, providing an interface to the upper layer and shielding the implementation details of the low-level hardware.

[0149] The HAL layer may include Wi Fi HAL, audio HAL, camera service (Camera HALServer) unit of the HAL layer, and software code library, etc.

[0150] The HAL layer may also include a radio frequency device control function, which is used to control radio frequency devices related to wireless communication in the terminal device, for example, generating MIPI instructions, transmitting MIPI instructions, transmitting MIPI instructions, etc.

[0151] It can be understood that, in some implementations, the RF device control function may also be set in the system library or framework layer, and the embodiments of the present application do not impose specific limitations thereto.

[0152] The kernel layer is the layer between hardware and software. The kernel layer includes at least display driver, camera driver, audio driver, sensor driver, charging driver, etc.

[0153] The following, in conjunction with the accompanying drawings, describes in detail the technical solutions of the embodiments of the present application and how the technical solutions of the embodiments of the present application solve the above-mentioned technical problems with specific embodiments. The following specific embodiments can be implemented independently or in combination with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0154] First combine Figures 11 to 13 A radio frequency control device provided in an embodiment of the present application is described. Fig.11 Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 1 , Fig.12 A schematic diagram of a process flow executed by a processing unit provided in an embodiment of the present application, Fig.13 Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 2 .

[0155] refer to Fig.11In the device, the first processing unit includes two execution units, namely the first execution unit and the second execution unit. The first processing unit also includes the CPU mainstream pipeline, IFU, IDU, LSU, ITCM and DTCM, etc. Among them, the first execution unit can be understood as a standard execution unit that can run instructions in the corresponding standard instruction set, such as ARM instructions. The second execution unit can be understood as a customized execution unit used to run customized instructions, such as customized RISC-V instructions. It should be noted that the customized RISC-V instructions in the embodiment of the present application are used to implement a variety of algorithms to process MIPI instructions in specific working scenarios or modes to accelerate processing. In addition, IFU refers to the instruction fetch unit (Instruction Fetch Unit, IFU), ID refers to the decoding unit (Instruction Decode Unit, IDU), and LSU refers to the load / store unit (Load / Store Unit, LSU). And ITCM refers to the instruction tightly coupled memory, and DTCM refers to the data tightly coupled memory. The above units or modules can interact with the CPU mainstream pipeline to control the order of program execution and data transmission. In addition to the above Fig.11 In addition to the units or modules appearing in the figure, there are some other related units or modules, which are not very related to the radio frequency control device proposed in the embodiment of the present application, so they will not be described in detail here.

[0156] for Fig.11 The RF control device shown in the figure can refer to the process followed when running the program. Fig.12 Steps in:

[0157] S1201, fetch instruction.

[0158] In each clock cycle, when the previous instruction is executed, the IFU calculates the address of the next instruction and fetches the instruction from the memory into the instruction register inside the CPU.

[0159] S1202, decoding. Determine the instruction type, if it is the first processing instruction, execute S1203, otherwise execute S1204.

[0160] Parse the instruction code obtained in the instruction fetch stage to determine the instruction type, operand location, and resources to be used. This step prepares the necessary control signals for subsequent execution. In an embodiment of the present application, the IDU can determine whether the instruction belongs to a first processing instruction or a non-first processing instruction. Among them, the first processing instruction can be understood as a custom instruction for adjusting the MIPI instruction, as distinguished from a standard instruction that can be executed on the first execution unit. When the IDU determines that the instruction is the first processing instruction, S1203 is executed, that is, the second execution unit executes the instruction. Conversely, when the IDU determines that the instruction is not the first processing instruction, S1204 is executed, that is, the first execution unit executes the instruction.

[0161] S1203: The second execution unit executes the instruction.

[0162] After the IDU determines that the instruction to be executed belongs to the first processing instruction, the second execution unit will complete the corresponding calculation or processing according to the operation code and operand of the instruction.

[0163] S1204: The first execution unit executes the instruction.

[0164] After the IDU determines that the instruction to be executed is not a first processing instruction, that is, the instruction is a regular standard instruction, the first execution unit will perform the actual operation according to the information provided in the decoding stage, such as addition, subtraction, logical operation, etc.

[0165] S1205: Memory access.

[0166] This step involves the LSU and MMU. In some cases, for instructions that need to exchange data with memory, the LSU is responsible for loading data from memory to registers or storing data in registers back to memory. The MMU handles the conversion of virtual addresses to physical addresses during this process.

[0167] S1206, write back.

[0168] If the instruction requires it, the register file unit writes the execution results or the data read from the memory back to the register file or other storage location for use by subsequent instructions.

[0169] Further, a more complete RF control device such as Fig.13 As shown. Fig.13 In the embodiment, the first processing unit includes a first execution unit and a second execution unit, and Fig.11It is consistent with the first processing unit in, and will not be repeated here. It also includes a modem MDM, a second RF control module, a first RF control module, a FEM and an antenna. Among them, MDM is connected to the second RF control module, the second RF control module is connected to the first processing unit, the first processing unit is connected to the first RF control module, the first RF control module is connected to the FEM, and the FEM antenna is connected. In one implementation method, the MIPI instruction can be transmitted to the second RF control module through MDM, and received by the first execution unit of the first processing unit, and after being adjusted by the second execution unit, the first execution unit sends the new MIPI instruction to the first RF control module. Then, the above-mentioned new MIPI instruction is further sent to the FEM, and the MIPI instruction is executed by the FEN. The following is about Fig.13 The various modules in the radio frequency control device shown are described as follows:

[0170] 1. MDM

[0171] In the embodiment of the present application, MDM acts as a modem, and the relevant functions can refer to the content in the previous text, which will not be repeated here. In addition, in addition to processing communication data messages, MDM can also send corresponding MIPI instructions according to relevant communication configurations to control subsequent FEM to make corresponding changes.

[0172] In some implementations, the MDM can also be replaced by a radio frequency integrated circuit (RFIC), which is an integrated circuit specially designed to process radio frequency signals. RFIC can convert received high-frequency signals into lower-frequency signals for further processing, or convert low-frequency signals into high-frequency signals for transmission. RFIC can also perform modulation and demodulation functions. Compared with discrete components, RFIC integrates multiple radio frequency functions on a single chip, thereby reducing size, cost and power consumption. In some scenarios, such as wireless communication modules in smartphones and tablets, RFIC is used extensively to support multiple wireless standards, such as 4G LTE, 5G, Wi-Fi and Bluetooth.

[0173] 2. Second RF control module

[0174] In the embodiment of the present application, the second RF control module can be understood as a module that controls the transmission and forwarding of MIPI instructions. The second RF control module is connected to the above-mentioned MDM, and the connection method can adopt the SCLK and SDATA introduced above, that is, the second RF control module can receive MIPI instructions transmitted from the MDM.

[0175] At the same time, the second RF control module is also connected to the first processing unit, and can forward MIPI instructions to the first processing unit. In some cases, the second RF control module can first store multiple MIPI instructions received from the MDM in order, for example, in a queue, and wait for the first processing unit to read them. The first processing unit can read one MIPI instruction from the second RF control module at a time. When reading, the second RF control module can also encapsulate pure MIPI instructions to meet the requirements of the program run by the first processing unit. The existence of the second RF control module can connect different devices in the RF control device, and can also optimize the transmission of MIPI instructions. In the embodiment of the present application, the second RF control module can also be referred to as a MIPI slave control module or a control receive (Control Receive, C-RX) module.

[0176] 3. First execution unit

[0177] As mentioned above, the first execution unit plays a role in managing execution logic and processes in the entire RF control device. The first execution unit will read the MIPI instruction from the second RF control module connected to it through the first processing unit, and then combine the information of the MIPI instruction or more other information to determine what algorithm should be used to adjust the MIPI instruction. After determining which algorithm to use, the corresponding instruction is transmitted to the second execution unit, and the second execution unit actually executes it. Among them, the instruction corresponding to the above algorithm is a custom RISC-V instruction, which is specifically used to process tasks in specific working scenarios and modes. The above-mentioned transmission of the instruction to the second execution unit can be understood as the first execution unit adding the instruction corresponding to the algorithm for processing the MIPI instruction to the instruction register, and then after fetching and decoding, the second execution unit executes the instruction.

[0178] After the second execution unit completes execution, a new MIPI instruction is obtained, and the first execution unit sends the new MIPI instruction to the first RF control module.

[0179] 4. Second execution unit

[0180] In the embodiment of the present application, the second execution unit may be a customized execution unit, which is different from the standard first execution unit, and the second execution unit may execute a customized RISC-V instruction. The second execution unit is used to adjust the MIPI instruction using a corresponding algorithm in a specific working scenario or mode. Compared with the first execution unit that does not use a customized RISC-V instruction but uses a standard instruction set, such as an ARM instruction set, the second execution unit can complete the algorithm processing flow for the MIPI instruction faster. This is because the customized RISC-V instruction generally requires only a smaller number of instructions to obtain the same result, that is, a new MIPI instruction, compared to the instructions in the standard instruction set to complete the algorithm. It can be understood that the execution time of the execution unit is generally proportional to the number of instructions. When the number of instructions is less, the total execution time is shorter and the execution efficiency is higher. On the other hand, from a hardware perspective, the second execution unit developed based on the customized RISC-V instruction set can accelerate the running instructions. For example, in some implementations, instructions that are partially executed in a loop can be customized as instructions that are executed in parallel. In this way, the second execution unit completes the actual algorithm processing of the MIPI instruction, which can significantly improve the efficiency compared to the first execution unit.

[0181] 5. The first radio frequency control module

[0182] In the embodiment of the present application, the first RF control module can be similar to the second RF control module, and also plays a role in transmitting and forwarding MIPI instructions. The first RF control module can be connected to the FEM through SCLK and SDATA to transmit MIPI instructions to the FEM. The first RF control module is also connected to the first processing unit to receive MIPI instructions from the first processing unit after algorithm adjustment.

[0183] In some implementations, the first RF control module may receive multiple MIPI instructions from the first processing unit at one time, and the multiple MIPI instructions may not be simple MIPI instructions, but may be encapsulated by the application program. After receiving the multiple MIPI instructions from the first processing unit, the first RF control module will also convert the encapsulated MIPI instructions to obtain the corresponding multiple simple MIPI instructions. Then the MIPI instructions are sent to the FEM one by one. In the embodiment of the present application, the second RF control module may also be referred to as a MIPI master control module or a control transmit (C-TX) module.

[0184] 6. FEM

[0185] exist Fig.13In the figure, only one FEM is drawn as an example. It can be understood that in the actual RF device control device, more FEMs can be included, and different FEMs can focus on different wireless communication modes. In the embodiment of the present application, one FEM is used as an example for illustration, but the specific number is not limited. For more information about FEM, please refer to the previous content, which will not be repeated here.

[0186] 7. Antenna

[0187] Here, the antenna is behind the FEM and is used to receive and send RF signals. For more information, please refer to the previous article and will not be repeated here.

[0188] The following is a summary based on the above description: A radio frequency control device is proposed in the embodiment of the present application, and the focus is on adding an additional second execution unit in addition to the original first execution unit of the first processing unit. In addition, unlike the first execution unit, the second execution unit is developed based on a customized RISC-V instruction set. The second execution unit optimizes the algorithm processing flow of MIPI instructions in various working scenarios and modes, so that the processing speed can be significantly improved. In this way, the time-consuming duration of the overall process can be shortened, thereby reducing communication delays and improving user experience.

[0189] In addition, a second execution unit is added to the original first execution unit of the first processing unit, and such a device can be called a tightly coupled device. Because the second execution unit and the first execution unit are jointly arranged inside the first processing unit, other units or modules in the first processing unit can also be shared. For example, the units or modules that can be shared include an instruction fetch unit, a decoding unit, a load / store unit, etc. In this way, when the first processing unit is running, in addition to distinguishing whether to use the first execution unit or the second execution unit according to the type of instruction, the remaining units or modules can still operate in the same way, and hardware resources can be better fully utilized. In addition, since some mobile devices or terminal devices have restrictions on the volume of hardware, it is hoped to reduce the volume of the hardware as much as possible. However, since the method sets the newly added second execution unit inside the first processing unit, it can also minimize the occupation of valuable device space and does not affect the normal operation of other units or modules other than the first processing unit in the electronic device.

[0190] In addition to the contents described in the above embodiments, Fig.14 and Fig.15 Another radio frequency control device provided in an embodiment of the present application is described. Fig.14 Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 3 , Fig.15Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 4 .

[0191] refer to Fig.14 The device in the embodiment includes two processing units, namely a first processing unit and a second processing unit. The first execution unit introduced above can be understood as the first processing unit here, and the second execution unit introduced above can be understood as the second processing unit here.

[0192] The following is an introduction based on the first processing unit and the second processing unit. For example, the first data unit and the second processing unit can be connected through a data path, and instructions can be transmitted in the data path. Among them, the first processing unit can be understood as a standard processing unit that can run instructions in the corresponding standard instruction set, such as ARM instructions. The second processing unit can be understood as a customized processing unit for running custom instructions, such as custom RISC-V instructions. It should be noted that the custom RISC-V instructions in the embodiment of the present application are used to implement a variety of algorithms to process MIPI instructions in specific working scenarios or modes to accelerate processing.

[0193] Further, a more complete RF control device such as Fig.15 As shown. Fig.15 In the embodiment, a first processing unit and a second processing unit are included, both of which are Fig.14 The processing units in are consistent and will not be repeated here. It also includes a modem MDM, a second RF control module, a first RF control module, a FEM and an antenna. Among them, the MDM is connected to the second RF control module, the second RF control module is connected to the first processing unit, the first processing unit is connected to the first RF control module, the first RF control module is connected to the FEM, and the FEM antenna is connected. In one implementation method, the MIPI instruction can be transmitted to the second RF control module through the MDM, and received by the first processing unit, and after adjustment by the second processing unit, the first processing unit sends the new MIPI instruction to the first RF control module. Then, the above-mentioned new MIPI instruction is further sent to the FEM, and the FEN executes the MIPI instruction. The following is about Fig.15 The various modules in the radio frequency control device shown are described as follows:

[0194] 1. MDM

[0195] Please refer to the relevant contents of the previous embodiments, which will not be repeated here.

[0196] 2. Second RF control module

[0197] Please refer to the relevant contents of the previous embodiments, which will not be repeated here.

[0198] 3. First processing unit

[0199] As mentioned above, the first processing unit plays a role in managing the execution logic and process in the entire RF control device. The first processing unit will read the MIPI instruction from the second RF control module connected to it, and then combine the information of the MIPI instruction or more other information to determine what algorithm should be used to adjust the MIPI instruction. After determining which algorithm to use, the corresponding instruction is transmitted to the second processing unit, which is actually executed by the second processing unit. Among them, the instructions corresponding to the above algorithm are custom RISC-V instructions, which are specifically used to process tasks in specific working scenarios and modes.

[0200] After the second processing unit completes the execution, a new MIPI instruction is obtained, and the first processing unit sends the new MIPI instruction to the first RF control module.

[0201] 4. Second processing unit

[0202] In the embodiment of the present application, the second processing unit may be a customized processing unit, which is different from the standard first processing unit, and the second processing unit may execute a customized RISC-V instruction. The second processing unit is used to adjust the MIPI instruction using a corresponding algorithm in a specific working scenario or mode. Compared with the first processing unit that does not use a customized RISC-V instruction but uses a standard instruction set, such as an ARM instruction set, the second processing unit can complete the algorithm processing flow for the MIPI instruction faster. This is because the customized RISC-V instruction generally requires only a smaller number of instructions to obtain the same result, that is, a new MIPI instruction, compared to the instruction in the standard instruction set to complete the algorithm. It can be understood that the execution time of the processing unit is generally proportional to the number of instructions. When the number of instructions is less, the total execution time is shorter and the execution efficiency is higher. On the other hand, from a hardware perspective, the second processing unit developed based on the customized RISC-V instruction set can accelerate the running instructions. For example, in some implementations, instructions that are partially executed in a loop can be customized as instructions that are executed in parallel. In this way, the second processing unit completes the actual algorithm processing of the MIPI instruction, which can significantly improve efficiency compared to the first processing unit.

[0203] 5. The first radio frequency control module

[0204] Please refer to the relevant contents of the previous embodiments, which will not be repeated here.

[0205] 6. FEM

[0206] Please refer to the relevant contents of the previous embodiments, which will not be repeated here.

[0207] 7. Antenna

[0208] Here, the antenna is behind the FEM and is used to receive and send RF signals. For more information, please refer to the previous article and will not be repeated here.

[0209] Here is a summary based on the above description: Another radio frequency control device is proposed in the embodiment of the present application, the focus of which is that in addition to the original first processing unit, an additional second processing unit is added. In addition, different from the first processing unit, the second processing unit is developed based on a custom RISC-V instruction set. The second processing unit optimizes the algorithm processing flow of MIPI instructions in various working scenarios and modes, so that the processing speed can be significantly improved.

[0210] In addition, connecting a relatively independent second processing unit outside the first processing unit can be regarded as a loosely coupled architecture. Under this architecture, on the one hand, the second processing unit can reduce the impact on the first processing unit when it is running, and the computing power is more abundant. On the other hand, under the loosely coupled architecture, it is also more conducive to the update and iteration of the radio frequency control device. For example, more communication scenarios or services are added, and the custom RISC-V instruction set of the second processing unit needs to be updated accordingly. Then in a case like this, only the second processing unit needs to be replaced without replacing other modules in the radio frequency control device. And, it can be understood that heat dissipation in electronic devices is usually a key factor restricting hardware performance. When the modules in the electronic devices cannot effectively dissipate heat, in some cases, in order to protect the hardware, they will choose to actively reduce performance. In the loosely coupled radio frequency control device proposed in the embodiment of the present application, because the second processing unit and the first processing unit are separated, in principle, the second processing unit can be set in an area in the electronic device that is easy to dissipate heat. In this way, the second processing unit can effectively cool down and maintain the best performance.

[0211] Based on the above embodiments, Figures 16 to 19 A method for processing instructions provided in an embodiment of the present application is described in detail. Fig.16 Schematic diagram of the instruction processing method provided in the embodiment of the present application Figure 1 , Fig.17 Scenario diagram of MIPI instruction processing provided in the embodiment of the present application Figure 1 , Fig.18 Scenario diagram of MIPI instruction processing provided in the embodiment of the present application Figure 2 , Fig.19Schematic diagram of data processed by MIPI instructions provided in the embodiment of the present application Figure 1 .

[0212] The instruction processing method proposed in the embodiment of the present application can be understood as running in the radio frequency control device introduced in the above embodiment, and can be specifically executed by the first execution unit in the radio frequency control device.

[0213] refer to Fig.16 The method flow in:

[0214] S1401. A first execution unit receives a first mobile industry processor interface MIPI instruction, and obtains at least one first processing instruction from a first instruction set according to the first MIPI instruction.

[0215] In order to more clearly illustrate the instruction processing method provided in the embodiment of the present application, Fig.17 to understand. Consistent with the RF control device described in the previous embodiment, the MDM is connected to the second RF control module, and the second RF control module is connected to the first processing unit. Therefore, the MIPI instruction received by the first execution unit is actually sent by the MDM and then forwarded by the second RF control module. The MIPI instruction is also referred to as the first MIPI instruction in the embodiment of the present application.

[0216] And referring to the two different architectures described above, it can be determined that either the first execution unit is a subunit in the first processing unit, or the first execution unit is the first processing unit. In the current step, the second RF control module sends the MIPI instruction to the first processing unit, so it can be understood that no matter which architecture is used, the first execution unit can receive the first MIPI instruction.

[0217] For example, after the first execution unit enters the interrupt service program and obtains the first MIPI instruction from the second radio frequency control module, at least one first processing instruction is determined according to the first MIPI instruction. The first processing instruction here belongs to the first instruction set, which is used to adjust the first MIPI instruction. The above-mentioned first instruction set can be understood as an instruction set obtained by custom modification and / or expansion based on the open source instruction set. Different from the general standard instruction set, the first instruction set is specially customized for the wireless communication or radio frequency field of electronic equipment. As mentioned above, with the increase of wireless communication methods and working modes of electronic devices, it is necessary to use a variety of adaptive algorithms to adjust the original MIPI instructions, and the first instruction set in the embodiment of the present application can be regarded as used to adjust the MIPI instructions.

[0218] For example, for the first MIPI instruction received by the first execution unit, it is determined that a certain algorithm needs to be used for processing through the address information and / or data information of the first MIPI instruction. Then, the algorithm can be implemented through at least one first processing instruction from the first instruction set to achieve the effect of the algorithm.

[0219] S1402: The first execution unit sends at least one first processing instruction to the second execution unit, so that the second execution unit executes the at least one first processing instruction to obtain a second MIPI instruction that is obtained after adjusting the first MIPI instruction.

[0220] After the first execution unit determines at least one first processing instruction, the first processing instruction will be transmitted to the second execution unit. For the understanding of the transmission instruction here, reference can be made to the relevant content in the previous text. It can be understood that the first execution unit adds the first processing instruction to the instruction register, and then the first processing instruction can be transmitted to the second execution unit through instruction fetching and decoding. The second execution unit in the embodiment of the present application can be understood as an execution unit developed according to the first instruction set, which can execute the instructions in the first instruction set, and can also have a hardware acceleration effect.

[0221] After receiving at least one first processing instruction, the second execution unit will execute the first processing instructions one by one, and in the process of executing at least one first processing instruction by the second execution unit, the adjustment of the first MIPI instruction is completed, thereby obtaining the second MIPI instruction.

[0222] like Fig.17 As shown, in Fig.17 Two FEMs are connected to the first RF control module, namely the first FEM and the second FEM. For example, in some implementations, the first FEM can be used for WiFi and Bluetooth, and the second FEM can be used for cellular networks and Bluetooth. In this case, the address information in the first MIPI instruction may point to the first FEM, but assuming that the first FEM is already occupied by WiFi, it is desired to use the second FEM instead. In this case, the address information in the original first MIPI instruction needs to be rewritten.

[0223] In another architecture, such as Fig.18 As shown, Fig.17 The content shown in is similar to that shown in , and the main difference is that the first execution unit is specifically the first processing unit, and the second execution unit is specifically the second processing unit, which are two relatively independent processing units. The first processing unit and the second processing unit can transmit the first processing instruction and the like through the data path, and the second processing unit actually executes the first processing instruction. Fig.18 The rest of the content can be found in Fig.17The contents in will not be repeated here.

[0224] like Fig.19 As shown, it is assumed here that the fourth MIPI instruction 1601 is a simplified MIPI instruction, which can be understood as the first MIPI instruction mentioned above. The address bit is address A, the read / write bit is write, the register address is address B, and the data bit is data C. As mentioned above, if the address information in the fourth MIPI instruction 1601 needs to be adjusted, then a new MIPI instruction will be obtained after the adjustment. That is, Fig.19 The fifth MIPI instruction 1602 in the embodiment can be understood as the second MIPI instruction mentioned above. In the fifth MIPI instruction 1602, by comparison, the read / write bit and the data bit are the same as the fourth MIPI instruction 1601, while the address bit is modified to address D, and the register address is modified to address E.

[0225] The above practical example shows a processing process, that is, after the second execution unit executes at least one first processing instruction, it completes the adjustment of the first MIPI instruction and obtains a new second MIPI instruction. In the above example, the address information of the second MIPI instruction has changed compared to the first MIPI instruction, and how the information changes needs to be determined according to a specific algorithm. More specific algorithms do not belong to the scope of the description of the embodiments of this application and will not be repeated here.

[0226] S1403: The first execution unit receives the second MIPI instruction sent by the second execution unit, and sends the second MIPI instruction to the first RF control module.

[0227] When the second execution unit completes the adjustment of the first MIPI instruction and obtains the second MIPI instruction, the second execution unit can send the second MIPI instruction to the first execution unit. For the second execution unit sending the second MIPI instruction to the first execution unit here, it can be understood that the second execution unit obtains the second MIPI instruction after executing the first processing instruction, and then the storage address of the second MIPI instruction can be informed to the first execution unit. For example, the second execution unit can implement the above process by generating an instruction containing the storage address of the second MIPI instruction and adding the instruction to the instruction register of the first processing unit. Next, the first execution unit sends the second MIPI instruction to the first RF control module, wherein the first RF module of the embodiment of the present application can be regarded as the first RF control module described above, or it can also be called a main control module.

[0228] After the first RF control module, that is, the first RF control module receives the second MIPI instruction, it will forward the instruction to the subsequently connected FEM according to the information in the MIPI instruction, and then the FEM will execute the MIPI instruction. For example, the MIPI instruction can be transmitted to the corresponding FEM according to the information of the address bit in the MIPI instruction.

[0229] In summary, in the instruction processing method proposed in the embodiment of the present application, the task of adjusting the MIPI instruction that could have been completed by the first execution unit is transferred to the second execution unit for completion. As the co-execution unit of the first execution unit, the second execution unit does not have the general processing capability of the first execution unit, but for the algorithm processing of MIPI instructions in the communication field, since it is developed based on a custom instruction set, it has significant advantages in processing speed and can effectively shorten the duration of algorithm processing. And because the duration of algorithm processing is the longest in the entire process, this can make the overall process more efficient, thereby reducing communication delays. Further, from a hardware perspective, in the instruction processing method proposed in the embodiment of the present application, only an additional second execution unit needs to be set in the first processing unit. On the one hand, this approach allows the second execution unit and the first execution unit to share other units or modules, so as to make full use of resources. On the other hand, it can also effectively avoid the space occupation of additional electronic devices, and other units or modules in the electronic device except the first processing unit hardly need to be adjusted and changed.

[0230] Moreover, in addition to using a tightly coupled architecture to execute the present method, a loosely coupled architecture-based approach can also be used. That is, a second processing unit is connected to the outside of the first processing unit. In this way, the second processing unit can avoid the impact on the first processing unit when it is running, and the computing power is more abundant, with an independent set of CPU processing hardware and processes. Moreover, it is also more conducive to the update and iteration of the instruction processing method and the radio frequency control device. For example, if communication scenarios and services are added, the processing algorithm and the custom RISC-V instruction set need to be updated or modified, then only the second processing unit needs to be replaced, and other units or modules are kept unchanged. And, it is understandable that heat dissipation is usually very important in electronic devices. When the electronic device cannot effectively dissipate heat, in order to protect the hardware from damage, in some cases, the hardware performance will be actively reduced. In the instruction processing method proposed in the embodiment of the present application, since the second processing unit and the first processing unit are separated, the second processing unit can be cooled more easily and maintain better performance.

[0231] Based on the above embodiments, Figure 20 to Figure 22Another instruction processing method provided in the embodiment of the present application is described. Fig. 20 Schematic diagram of the instruction processing method provided in the embodiment of the present application Figure 2 , Fig.21 A schematic diagram of implementing a custom RISC-V instruction provided in an embodiment of the present application, Fig. 22 Schematic diagram of data processed by MIPI instructions provided in the embodiment of the present application Figure 2 .

[0232] The embodiments of the present application can be regarded as an extension of the previous embodiments. The content below is applicable to both architectures introduced above. For example, the first execution unit and the second execution unit introduced below can both be sub-units included in the first processing unit (corresponding to the tightly coupled architecture introduced above), or it can also be understood that the first execution unit is the first processing unit, and the second execution unit is the second processing unit (corresponding to the loosely coupled architecture introduced above). Therefore, the architectural relationship corresponding to the first execution unit and the second execution unit will no longer be distinguished below, and only the first execution unit and the second execution unit will be introduced as the objects.

[0233] refer to Fig. 20 The steps in the process are explained in combination with the radio frequency control device mentioned above:

[0234] S1701. Receive instructions.

[0235] The first execution unit obtains the first MIPI instruction from the second RF control module. This step can refer to the above embodiment. Fig.16 S1401 in the description will not be described in detail here.

[0236] In addition, in some implementations, the first execution unit may also obtain non-MIPI instructions corresponding to the execution of other functions. In the embodiment of the present application, the instruction received by the first execution unit may be referred to as a third instruction, and the third instruction may be of a MIPI instruction type or a non-MIPI instruction type.

[0237] S1702: Determine whether it is a MIPI instruction. If yes, execute S1703; otherwise, execute S1704.

[0238] It is understandable that for the first execution unit, since the received third instruction may be a non-MIPI instruction, it is necessary to judge the type of instruction after receiving the third instruction. When judging, it can be determined whether it belongs to a MIPI instruction based on the format of the third instruction. As mentioned above, the MIPI instruction itself needs to comply with certain specifications and protocols, and the type of instruction can be judged from the format of the instruction. Or in some implementations, the type of instruction can be determined by the receiving upstream module. Or in other implementations, the instruction type of the third instruction can also be directly marked by the upstream module.

[0239] If the third instruction is determined to be a MIPI instruction type, S1703 is executed, that is, the second execution unit needs to participate in the processing flow. Otherwise, if the third instruction is determined to be a non-MIPI instruction type, S1704 is executed, that is, processing is performed in a conventional manner.

[0240] It should be noted that the determination of whether the third instruction belongs to the MIPI instruction type here is different from the determination of whether the instruction belongs to the first processing instruction by the IFU and IDU in the first execution unit as described in the previous embodiment. It can be understood that the determination of whether the third instruction belongs to the MIPI instruction type in this step is made by the first execution unit through at least one instruction.

[0241] S1703: The second execution unit assists in processing.

[0242] After the first execution unit determines that the third instruction belongs to the MIPI instruction type, this step is executed. The overall process of this step is consistent with the method process of the previous embodiment. After the first execution unit determines which algorithm to use to process the third instruction, it sends the first processing instruction corresponding to the algorithm to the second execution unit, and the second execution unit completes the execution. For more content, please refer to the previous embodiment, which will not be repeated here.

[0243] In some implementations, when the first execution unit determines which algorithm to use to adjust the third instruction, or the first MIPI instruction, in addition to determining it based on the MIPI instruction itself, it can also be combined with the working information of the electronic device. The working information may include working scene information, working mode information, and device status information. For example, the working scene information may contain the wireless communication method currently used by the electronic device, such as WiFi, cellular network, etc. The working mode information may include, for example, a preset mode of the electronic device, such as flight mode, do not disturb mode, etc. For more relevant content, please refer to the corresponding part of the previous text, which will not be repeated here.

[0244] It is understandable that in some cases, even the same first MIPI instruction may be in different working modes. Further refining the adjustment of the first MIPI instruction in combination with different working modes and adopting a more subdivided algorithm can be more in line with the increasingly rich communication scenarios. When the first execution unit determines the first processing instruction, it can be determined according to a preset matching rule. For example, a set of matching rules can be maintained in advance by R&D personnel based on actual business needs. In the matching rule, the relevant information of the MIPI instruction and the corresponding working mode information can be used as matching conditions or matching keys, and the corresponding processing algorithm can be used as the matching result or value. The matching rule can be updated or modified as the actual needs change, and the specific style of the matching rule is not limited in the embodiment of the present application.

[0245] After the algorithm for processing the first MIPI instruction is determined by the preset matching rule, the algorithm can be implemented by at least one first processing instruction from the first instruction set. Fig.21 As shown, in Fig.21 A definition and construction method of a first instruction set is shown in FIG. In the embodiment of the present application, the first instruction set may be RISC-V. Fig.21 (a) shows the structure of a custom RISC-V instruction. A custom RISC-V consists of 32 bits or 4 bytes, which are represented from right to left from low to high, namely, opcode, result register, instruction parameter 1, instruction parameter 2, instruction parameter 3, algorithm parameter 1, algorithm parameter 2 and function code. Among them, the opcode represents the main function of the instruction, and the instruction parameter can be combined with the opcode to characterize how the instruction is executed. The result register indicates where the result after the instruction is executed is stored. The function code can be understood as a further subdivision of the instruction function. For example, the opcodes of some custom instructions are consistent, but the function codes may be different. The algorithm parameters generally carry various data information for use by the algorithm corresponding to the instruction.

[0246] Here, we assume that multiple RISC-V instructions are customized according to the requirements of the working modes in various communication scenarios, so we can get the following Fig.21 (b) shows a custom instruction description table. In this table, the functions and parameter meanings of the custom instructions are described. When developing the corresponding execution unit, it can be manufactured according to this table. Fig.21In (b), two custom instructions are shown, namely custom instruction 1 and custom instruction 2. For example, the opcode of custom instruction 1 is 1111011, indicating that algorithm 1 is used. The value of its corresponding instruction parameter 1 is 1, indicating that the result needs to be written back to the result register. The value of the corresponding instruction parameter 2 is 1, indicating that algorithm parameter 1 needs to be read and used. The value of the corresponding instruction parameter 3 is also 1, indicating that algorithm parameter 2 needs to be read and used. The function code is 7, indicating that custom instruction 1 executes sub-algorithm A, which can be understood as a subdivision of algorithm 1. Similarly, the opcode of custom instruction 2 is also 1111011, and the difference from custom instruction 1 lies in the instruction parameters and function code. The instruction parameters 1 and 3 of custom instruction 2 are both 0, the former indicating that the result does not need to be written back to the result register, and the latter indicating that algorithm parameter 2 does not need to be read. The value of custom instruction 2 is 8, which means that this instruction executes sub-algorithm B, which can also be understood as a subdivision of algorithm 1.

[0247] That is to say, through Fig.21 In this way, a customized RISC-V instruction set can be designed in combination with algorithms for specific scenarios.

[0248] To further help understand the role of the custom RISC-V instruction set, you can refer to Fig. 22 . Assume that there is such a communication scenario. In order to save power consumption, the electronic device will enter a low power consumption mode when there is no communication or the communication traffic is low. In this mode, the various devices in some FEMs will be in an unactivated state, or it can be understood as being in a dormant state. At this time, if one of the FEMs in the dormant state needs to start and send a signal to the outside, then it is necessary to change the various devices in the FEM to an activated state, or a normal operating state. Among them, the devices in the above-mentioned FEM may include, for example, a power amplifier, a filter, and a switch.

[0249] In the above case, the first MIPI instruction received by the first execution unit can be used to instruct to turn the FEM to an activated state. At the same time, the first execution unit can also obtain the current working information of the electronic device from the application processing unit (AP) of the electronic device. From the working information, it can be known that the electronic device is in a low power consumption mode and the target FEM is in an inactive state. Then it is necessary to adjust the state of the FEM through the MIPI instruction, and further, to use the MIPI instruction to adjust the state of each device in the target FEM.

[0250] Fig. 22The sixth MIPI instruction 1901, the seventh MIPI instruction 1902, the eighth MIPI instruction 1903 and the ninth MIPI instruction 1904 can be regarded as a simplified MIPI instruction for ease of explanation and understanding. Among them, the sixth MIPI instruction 1901 can correspond to the first MIPI instruction mentioned above. Its address bit is address A, the read / write bit is write, the register address is address B, and the data bit is data C. It can be understood that the address bit corresponds to the target FEM, the register address bit corresponds to a functional device in the target FEM, and the data bit represents a parameter in the functional device. After the first execution unit determines the processing algorithm in combination with the first MIPI instruction and the current working information, the first processing instruction is transmitted to the second execution unit for execution. After the second execution unit completes the execution of the first processing instruction, it is assumed that 3 second MIPI instructions are obtained, which corresponds to Fig. 22 The seventh MIPI instruction 1902, the eighth MIPI instruction 1903 and the ninth MIPI instruction 1904 in the embodiment. For example, the seventh MIPI instruction 1902 is unchanged compared to the sixth MIPI instruction 1901. The register address bit in the eighth MIPI instruction 1903 is modified to address D, and the data bit is modified to data F compared to the sixth MIPI instruction 1901. The register address bit in the ninth MIPI instruction 1904 is modified to address E, and the data bit is modified to data G compared to the sixth MIPI instruction 1901. It can be understood that the above three second MIPI instructions can be used in this example to represent the state adjustment of three functional devices in the target FEM.

[0251] S1704: Process normally.

[0252] If the first execution unit determines that the received third instruction is a non-MIPI instruction, then the second execution unit will no longer be used to assist in processing. The instruction used by the first execution unit to process the third instruction at this time can be called a second processing instruction, and the corresponding result can be called a fourth instruction. Similarly, after obtaining the fourth instruction, the first execution unit can also send the fourth instruction to the first RF module.

[0253] The following is a summary based on the above description: In the embodiment of the present application, based on the above embodiment, it is explained that the first execution unit will determine the type of instruction received, and perform different subsequent processing procedures according to the instruction type. In addition, when determining the first processing instruction, the first execution unit will combine the current working information of the electronic device in addition to the first MIPI instruction, so as to achieve further refined processing. In this way, on the one hand, the integrity and flexibility of the method are enhanced, so that the method can be adapted to more usage scenarios. On the other hand, combining more information to determine the specific processing algorithm for MIPI instructions can make the algorithm more targeted and more efficient.

[0254] Next, based on the above-mentioned embodiments, Fig.23 and Fig.24 Another instruction processing method provided in the embodiment of the present application is described. Fig.23 Schematic diagram of the comparison of processing instructions provided in the embodiments of the present application Figure 1 , Fig.24 Schematic diagram of the comparison of processing instructions provided in the embodiments of the present application Figure 2 .

[0255] In the above-mentioned embodiments, the radio frequency control device and the corresponding instruction processing method are described. In order to better reflect the effectiveness of the above method, the embodiments of the present application will use some specific instruction codes for description.

[0256] In the embodiment of the present application, compared with the first instruction set in the previous embodiment, a standard instruction set is called the second instruction set, and correspondingly, the instruction belonging to the second instruction set for adjusting the MIPI instruction is called the third processing instruction. It is assumed here that the second instruction set is the ARM instruction set and the first instruction set is the custom RISC-V instruction set.

[0257] Suppose that you need to use the instructions in the instruction set to implement the basic functions of an algorithm, that is, read the data in the register or memory, modify the data, and then write the modified data to the result register or memory. In order to ensure that the data is modified accurately, atomic modification is adopted. For example, in a loop, the target data is modified and it is determined whether the modification is successful. If the modification fails, it is modified again.

[0258] like Fig.23As shown in the figure, the left side shows an ARM instruction code that implements the above functions. Among them, "loop_start" in line 1 indicates loop execution. "ldrex r4, [r0]" in line 2 can be understood as loading data from register r4, and register r0 is the exclusive access mark. "add r5, r4, #1" in line 3 means adding 1 to the value of register r4 and saving the result to register r5. "strex r3, r5, [r0]" in line 4 means trying to store a new value in register r3 and clear the exclusive access mark. "cmp r3, #0" in line 5 means judging whether the modification is successful by comparing whether the value of register r3 is 0. "bne loop_start" in line 6 means that if line 5 judges that the modification fails, it will return to line 1 and re-execute the loop.

[0259] Correspondingly, in Fig.23 The right side of the diagram shows a custom instruction based on RISC-V. In this implementation, lines 1 to 3 of the RISC-V custom instruction can be functionally similar to lines 1 to 3 of the ARM instruction on the left. Similarly, line 5 of the RISC-V custom instruction on the right is functionally similar to line 6 of the ARM instruction on the left, which will not be repeated here. The "sc.w t0, t2, (a0)" on line 4 of the RISC-V custom instruction on the right can be understood as including the write-back function of line 4 and the comparison function of line 5 in the ARM instruction on the left. In other words, two instructions in the ARM instruction can be merged into one instruction in the custom RISC-V instruction.

[0260] In the process of executing instructions by processing units such as CPU or MCU, the concept of clock cycle is involved. Clock cycle refers to the unit of time required for the processor to perform basic operations. It is one of the basic units of time measurement in computer systems and is usually associated with the processor's main frequency, that is, how many hertz per second. For example, if the main frequency of a processor is 3GHz (gigahertz), it will have 3 billion clock cycles per second. The execution time of an instruction usually consists of one or more clock cycles, depending on the complexity of the instruction and the architecture of the processor. For simple instructions, only one or a few clock cycles may be required, and for complex instructions, more clock cycles may be required to complete. In addition, in the custom RISC-V instructions, compared with ARM instructions, some consecutive ARM instructions are reasonably merged into one RISC-V instruction, which can be run using fewer clock cycles than the original multiple ARM instructions.

[0261] For example, in Fig.23As shown on the left side of the ARM instructions, assuming that each instruction in each row takes one clock cycle, then a complete execution requires 6 clock cycles. Fig.23 For the RISC-V custom instructions on the right, although the instruction on line 4 contains the functions of both the 4th and 5th instructions in the ARM instructions, the original two instructions are continuous and functionally related, and the functions themselves are simple instructions. Therefore, the 4th instruction in the RISC-V custom instructions can still be executed in one clock cycle on the second execution unit instead of two clock cycles. In this way, the clock cycles required for a complete execution of the RISC-V custom instructions on the right are 5, which is lower than the ARM instructions on the left.

[0262] In addition, after being optimized, the instructions in RISC-V can have better performance in certain scenarios. For example Fig.23 The "lr.w" and "sc.w" instructions of the RISC-V custom instructions on the right are both atomic read and write operations like the "ldrex" and "strex" instructions on the left of the ARM instructions, but the success rate of the "lr.w" and "sc.w" instructions can be higher. This can significantly reduce the number of repeated executions after failure, and further reduce the clock cycles required for actual execution.

[0263] Based on the above examples, Fig.24 Let's look at another example of a custom RISC-V instruction. Fig. 22 In the corresponding example, the second execution unit needs to obtain multiple second MIPI instructions based on the first MIPI instruction. In some implementations, a corresponding number of MIPI instructions may be initialized first, and then the data therein may be modified cyclically to obtain multiple second MIPI instructions. Fig.24The ARM instructions on the left implement this function, that is, modifying multiple values ​​in a loop. Here, it is assumed that 4 values ​​need to be modified. The "mov r4, #0" instruction on line 1 initializes the r4 counter to 0. The "loop_start" instruction on line 2 starts the loop. The "cmp r4, #4" instruction on line 3 and the "bge loop_end" instruction on line 4 compare whether the r4 counter has reached 4. If so, the loop is exited. The "ldr r5, [r0, r4, LSL #2]" instruction on line 5 loads the current value from memory, where LSL #2 indicates a left shift of 2 bits. The "add r5, r5, #1" instruction on line 6 adds 1 to the current value, which is used as a way to modify the original value in this example. The "str r5, [r0, r4, LSL #2]" instruction on line 7 stores the new value back to the original address. The "addr4, r4, #1" instruction on line 8 and the "b loop_start" instruction on line 9 indicate that the counter is incremented by 1 and returns to the start of the loop. The "loop_end" instruction on line 10 indicates the end of the loop.

[0264] Let's look at it again Fig.24 The RISC-V custom instructions on the right side of the figure are simplified by the special instruction "custom_modify_memory" in this example. A0 is the memory base address and a1 is the number of modifications. It can be understood that on the one hand, the complex tasks that were originally completed by multiple instructions are combined into one custom instruction. When completing the same task, it can have faster operation efficiency and consume fewer clock cycles. In addition, it can also be further optimized in combination with hardware. For example, in this example, Fig.24 The ARM instruction on the left side of the middle completes the modification of multiple values ​​in a loop, while the custom "custom_modify_memory" instruction can use a parallel approach to complete the modification of multiple values ​​at once. And such optimization is feasible in RISC-V, which can greatly improve the execution efficiency of instructions.

[0265] In summary, the embodiments of the present application show some relatively specific examples based on the previous embodiments. For the same task, how can the ARM instruction set and the customized RISC-V instruction set be implemented? And by comparing the implementation of the two, the clock cycle and operating efficiency required for executing instructions are analyzed. It can be known that various processing algorithms for adjusting MIPI instructions in the communication field under multiple working modes are implemented using customized RISC-V, which can reduce the number of instructions, and even the complex functions corresponding to multiple ARM instructions can be combined into a customized RISC-V instruction, effectively reducing the clock cycle required for operation. At the same time, it can also be optimized in combination with hardware. For example, for some tasks that require cyclic processing, parallel processing can be used to complete them, further significantly improving operating efficiency. It is also possible to reduce the delay of communication as a whole and enhance the user experience.

[0266] It should be noted that the module names involved in the embodiments of the present application can be defined as other names as long as the functions of each module can be achieved, and there is no specific restriction on the names of the modules.

[0267] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in the embodiments of the present application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0268] The image processing method of the embodiment of the present application has been described above, and the device for executing the above method is described below. Those skilled in the art can understand that the method and the device can be combined and referenced with each other, and the relevant device can execute the steps in the above image processing method.

[0269] The above image processing method can be applied to electronic devices with communication functions. The electronic devices include terminal devices, and the specific device form of the terminal device can refer to the above related descriptions, which will not be repeated here.

[0270] In one implementation, an embodiment of the present application provides an electronic device, Fig.25 Schematic diagram of the hardware structure of the electronic device.

[0271] like Fig.25 As shown, the electronic device 2200 includes: a processor 2201 and a memory 2202; the memory 2202 stores computer-executable instructions; the processor 2201 executes the computer-executable instructions stored in the memory 2202, so that the electronic device 2200 executes the above method.

[0272] When the memory 2202 is independently provided, the electronic device further includes a bus 2203 for connecting the memory 2202 and the processor 2201 .

[0273] The embodiment of the present application provides a chip. The chip includes a processor, and the processor is used to call a computer program in a memory to execute the technical solution in the above embodiment. Its implementation principle and technical effect are similar to those of the above related embodiments, and will not be repeated here.

[0274] The embodiments of the present application also provide a computer-readable storage medium. The computer-readable storage medium stores a computer program. The above method is implemented when the computer program is executed by the processor. The method described in the above embodiment can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. If implemented in software, the function can be stored as one or more instructions or codes on a computer-readable medium or transmitted on a computer-readable medium. Computer-readable media can include computer storage media and communication media, and can also include any medium that can transfer a computer program from one place to another. The storage medium can be any target medium that can be accessed by a computer.

[0275] In one possible implementation, a computer-readable medium may include RAM, ROM, compact disc read-only memory (CD-ROM) or other optical disk storage, magnetic disk storage or other magnetic storage device, or any other medium that is intended to carry or store the required program code in the form of instructions or data structures and can be accessed by a computer. Moreover, any connection is appropriately referred to as a computer-readable medium. For example, if a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) or wireless technology (such as infrared, radio and microwave) is used to transmit software from a website, server or other remote source, the coaxial cable, fiber optic cable, twisted pair, DSL or wireless technology such as infrared, radio and microwave are included in the definition of medium. Disks and optical disks as used herein include optical disks, laser disks, digital versatile discs (DVD), floppy disks and Blu-ray discs, where disks usually reproduce data magnetically, while optical disks reproduce data optically using lasers. Combinations of the above should also be included in the scope of computer-readable media.

[0276] The above specific implementation methods further illustrate the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above are only specific implementation methods of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made on the basis of the technical solutions of the present invention should be included in the scope of protection of the present invention.

Claims

1. A command processing method, characterized in that: Applied to an electronic device, the electronic device comprises a first execution unit and a second execution unit; The method comprises: The first execution unit receives a first MIPI instruction, and acquires at least one first processing instruction from a first instruction set according to the first MIPI instruction, wherein the first processing instruction is used to adjust the first MIPI instruction, and the first instruction set includes a plurality of customized processing instructions; The first execution unit sends the at least one first processing instruction to the second execution unit, so that the second execution unit executes the at least one first processing instruction to obtain a second MIPI instruction that is adjusted for the first MIPI instruction; The first execution unit receives the second MIPI instruction sent by the second execution unit, and sends the second MIPI instruction to the first RF control module.

2. The method according to claim 1, characterized in that The acquiring at least one first processing instruction from a first instruction set according to the first MIPI instruction comprises: The first execution unit acquires a processing instruction matching the first MIPI instruction from the first instruction set based on a preset matching rule to obtain the at least one first processing instruction.

3. The method according to claim 2, characterized in that The method further comprises: The first execution unit obtains working information of the electronic device, where the working information includes at least one of the following: working scene information, working mode information, and device status information.

4. The method according to claim 3, characterized in that The acquiring at least one first processing instruction from a first instruction set according to the first MIPI instruction comprises: The first execution unit obtains a processing instruction matching the first MIPI instruction and the work information from the first instruction set based on a preset matching rule, so as to obtain the at least one first processing instruction.

5. The method according to any one of claims 1 to 4, characterized in that: The method further comprises: A plurality of processing instructions are written into the first instruction set, and the plurality of processing instructions are instructions for executing MIPI instruction adjustment.

6. The method according to any one of claims 1 to 4, characterized in that: The method further comprises: The first execution unit receives a third instruction, and acquires at least one second processing instruction from a second instruction set according to the third instruction, wherein the second processing instruction is used to adjust the third instruction, the third instruction is a non-MIPI type instruction, and the second instruction set includes a plurality of processing instructions initially included in the instruction set; The first execution unit executes the at least one second processing instruction to obtain a fourth instruction obtained by adjusting the third instruction; The first execution unit sends the fourth instruction to the first radio frequency control module.

7. The method according to any one of claims 1 to 4, characterized in that: The method further comprises: The first execution unit receives the first MIPI instruction, and acquires at least one third processing instruction from a second instruction set according to the first MIPI instruction, wherein the third processing instruction is used to adjust the first MIPI instruction, and the second instruction set includes a plurality of processing instructions initially included in the instruction set; wherein the number of the first processing instructions is less than the number of the third processing instructions; The first execution unit executes the at least one third processing instruction to obtain a third MIPI instruction obtained after adjusting the first MIPI instruction; The first execution unit sends the second instruction to the first radio frequency control module.

8. The method according to claim 6, characterized in that The first instruction set is the Reduced Instruction Set V (RISC-V) instruction set, and the second instruction set is the Advanced Reduced Instruction Set Machine (ARM) instruction set.

9. The method according to any one of claims 1 to 4, characterized in that: The first execution unit and the second execution unit are both included in the first processing unit; or, The first execution unit is the first processing unit, and the second execution unit is the second processing unit; The first processing unit is a main processing unit, and the second processing unit is a co-processing unit.

10. A radio frequency control device, characterized in that: include: a first execution unit and a second execution unit; The first execution unit is used to execute the method according to any one of claims 1 to 9; The second execution unit is used to receive at least one first processing instruction sent by the first execution unit, and execute the at least one first processing instruction to obtain a second MIPI instruction that is obtained after adjusting the first MIPI instruction.

11. An electronic device, characterized in that: The electronic device comprises: one or more processors and a memory; The memory is coupled to the one or more processors, and the memory is used to store computer program codes, wherein the computer program codes include computer instructions, and the one or more processors call the computer instructions to enable the electronic device to perform the method as claimed in any one of claims 1 to 9.

12. A chip system, characterized in that: The chip system is applied to an electronic device, and the chip system includes one or more processors, and the one or more processors are used to call computer instructions so that the electronic device executes the method as described in any one of claims 1 to 9.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium comprises computer instructions, and when the computer instructions are executed on an electronic device, the electronic device is caused to perform the method as claimed in any one of claims 1 to 9.

Images