Low-power-consumption wake-up circuit and wake-up method in LIN bus

Abstract

The invention provides a low-power-consumption wake-up circuit and wake-up method in an LIN bus, and is applied to the technical field of integrated circuits. When the LIN bus does not have a wake-up action, the LIN bus voltage is pulled up to turn off a switching tube in an enable control circuit, so that a comparator circuit is in a dormant state; when the LIN bus is awakened, the voltage of the LIN bus is pulled down, so that a switching tube in the enable control circuit is switched on, and the comparator circuit is in a working state. According to the bus wake-up circuit, the power consumption is reduced in the sleep mode, so that the wake-up function is ensured, and the low power consumption requirement is met.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuits, and in particular to a low-power wake-up circuit and a wake-up method in a LIN bus. Background Art

[0002] Currently, the LIN (Local Interconnect Network) bus wake-up circuit is mostly in the form of a traditional comparator, which requires current consumption to keep the comparator in normal working state. Figure 1 As shown, the LIN bus is the positive input of the comparator, VBAT (power supply voltage)*0.5 is the negative input of the comparator, RXD is the output of the comparator, and I1 is the current source. This comparator is a classic comparator architecture. When the LIN bus voltage is higher than VBAT*0.5, the RXD (receive data terminal) outputs a high level; when the LIN bus voltage is lower than VBAT*0.5, the RXD output is a low level. However, this wake-up circuit needs to maintain a fixed static bias current to keep the comparator in a normal comparison state, and the power consumption is relatively high.

[0003] Based on this, a new technical solution is needed. Summary of the invention

[0004] In view of this, the present application provides a low-power wake-up circuit and a wake-up method in a LIN bus.

[0005] This application provides the following technical solutions:

[0006] According to the present application, a low-power wake-up circuit in a LIN bus includes a comparator circuit and an enable control circuit. The enable control circuit includes a switch tube, which is connected to the comparator circuit, and a LIN bus connects the comparator circuit and the enable control circuit. The circuit is configured such that when there is no wake-up action on the LIN bus, the LIN bus voltage is pulled up to turn off the switch tube in the enable control circuit so that the comparator circuit is in a sleep state; when there is a wake-up action on the LIN bus, the LIN bus voltage is pulled down to turn on the switch tube in the enable control circuit so that the comparator circuit is in a working state.

[0007] Preferably, the enabling control circuit further includes a first P-channel field effect transistor and a third resistor; the switch tube is a second N-channel field effect transistor;

[0008] The LIN bus is connected to the gate of the first P-channel field effect transistor;

[0009] The source of the first P-channel field effect transistor is connected to the VBAT terminal of the comparator circuit;

[0010] The drain of the first P-channel field effect transistor is respectively connected to the gate of the second N-channel field effect transistor and one end of the third resistor;

[0011] The source and drain of the second N-channel field effect transistor are connected to the comparator circuit;

[0012] The other end of the third resistor is connected to the GND end of the comparator circuit.

[0013] Preferably, the gate voltage of the second N-channel field effect transistor is the product of the current flowing through the third resistor and the resistance value of the third resistor;

[0014] The LIN bus voltage is pulled up, and when the gate voltage of the second N-channel field effect transistor is less than the threshold voltage of the second N-channel field effect transistor, the second N-channel field effect transistor is turned off;

[0015] The LIN bus voltage is pulled down, and when the gate voltage of the second N-channel field effect transistor is greater than or equal to the threshold voltage of the second N-channel field effect transistor, the second N-channel field effect transistor is turned on.

[0016] Preferably, the LIN bus voltage is pulled up to the VBAT voltage, the first P-channel field effect transistor is turned off, the current flowing through the third resistor is 0, the gate voltage of the second N-channel field effect transistor is 0, and the second N-channel field effect transistor is turned off;

[0017] The LIN bus voltage is pulled down, the first P-channel field effect transistor is turned on, and when the gate voltage of the second N-channel field effect transistor is greater than or equal to the threshold voltage of the second N-channel field effect transistor, the second N-channel field effect transistor is turned on.

[0018] Preferably, the comparator circuit includes a second P-channel field effect transistor, a third P-channel field effect transistor, a first N-channel field effect transistor, a fourth P-channel field effect transistor, a third N-channel field effect transistor, a fourth N-channel field effect transistor, a first resistor, a second resistor and an inverter;

[0019] The source of the second P-channel field effect transistor is the VBAT terminal of the comparator circuit, and the source of the second P-channel field effect transistor is connected to the source of the P-channel field effect transistor;

[0020] The drain of the second P-channel field effect transistor is respectively connected to the gate of the second P-channel field effect transistor, the drain of the first N-channel field effect transistor, the gate of the first N-channel field effect transistor and the gate of the third P-channel field effect transistor;

[0021] The source of the first N-channel field effect transistor is connected to one end of the first resistor;

[0022] The other end of the first resistor is connected to the LIN bus and one end of the second resistor;

[0023] The other end of the second resistor is connected to the drain of the second N-channel field effect transistor;

[0024] The source of the second N-channel field effect transistor is connected to the source of the fourth P-channel field effect transistor;

[0025] The drain of the fourth P-channel field effect transistor is connected to the gate of the fourth P-channel field effect transistor, the drain of the third N-channel field effect transistor, the gate of the third N-channel field effect transistor and the gate of the fourth N-channel field effect transistor;

[0026] The source of the third N-channel field effect transistor serves as the GND terminal of the comparator circuit, and the source of the third N-channel field effect transistor is connected to the source of the fourth N-channel field effect transistor;

[0027] The drain of the third P-channel field effect transistor is respectively connected to one end of the inverter and the drain of the fourth N-channel field effect transistor;

[0028] The other end of the inverter is connected to the RXD end.

[0029] Preferably, the second P-channel field effect transistor and the third P-channel field effect transistor are P-channel field effect transistor mirror current mirrors;

[0030] The third N-channel field effect transistor and the fourth N-channel field effect transistor are N-channel field effect transistor mirror current mirrors.

[0031] Preferably, the mirror ratios of the P-channel field effect transistor mirror current mirror and the N-channel field effect transistor mirror current mirror are both 1:1.

[0032] Preferably, when the comparator circuit is in working state, the current flowing from the VBAT end to the LIN bus path is I2, and the current flowing from the LIN bus to the GND end path is I3, then:

[0033] I2=(VBAT-V THP -v THN -LIN) / R1;

[0034] I3=(LIN-V THP -V THN ) / R2;

[0035] Among them, V THP Indicates the threshold voltage of the PMOS tube, V THN represents the threshold voltage of the NMOS tube, R1 represents the resistance value of the first resistor, and R2 represents the resistance value of the second resistor;

[0036] The relationship between the LIN bus voltage and half of the VBAT voltage is obtained according to the relationship between I2 and I3, so that when the LIN bus voltage is greater than half of the VBAT voltage, the RXD output of the comparator circuit is high level, and when the LIN bus voltage is less than half of the VBAT voltage, the RXD output is low level.

[0037] According to a wake-up method also provided by the present application, a method for applying any of the above-mentioned low-power wake-up circuits in the LIN bus includes: when there is no wake-up action on the LIN bus, the LIN bus voltage is pulled up to turn off the switch tube in the enable control circuit, so that the comparator circuit is in a sleep state; when there is a wake-up action on the LIN bus, the LIN bus voltage is pulled down to turn on the switch tube in the enable control circuit, so that the comparator circuit is in a working state.

[0038] Preferably, the wake-up method further comprises: enabling the control circuit to connect the VBAT terminal and the GND terminal of the comparator circuit, and when there is no wake-up action on the LIN bus, the LIN bus voltage is pulled up to the VBAT voltage.

[0039] Compared with the prior art, the beneficial effects that can be achieved by at least one of the above technical solutions adopted in the present application include at least:

[0040] In the present application, when there is no wake-up action on the LIN bus, the LIN bus voltage is pulled up to turn off the switch tube in the enable control circuit, so that the comparator circuit is in a sleep state; when there is a wake-up action on the LIN bus, the LIN bus voltage is pulled down to turn on the switch tube in the enable control circuit, so that the comparator circuit is in a working state. Therefore, the bus wake-up circuit of the present application reduces power consumption in sleep mode, thereby ensuring the wake-up function and meeting the low power consumption requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0042] Figure 1 This is a schematic diagram of a traditional LIN bus wake-up circuit;

[0043] Figure 2 This is a schematic diagram of the low-power LIN bus wake-up circuit of this patent. DETAILED DESCRIPTION

[0044] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0045] The following describes the implementation methods of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The present application can also be implemented or applied through other different specific implementation methods, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that, in the absence of conflict, the following embodiments and the features in the embodiments can be combined with each other. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work belong to the scope of protection of the present application.

[0046] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on the present application, it should be understood by those skilled in the art that an aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number and aspect described herein can be used to implement the device and / or practice the method. In addition, other structures and / or functionalities other than one or more of the aspects described herein can be used to implement this device and / or practice this method.

[0047] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present application. The drawings only show components related to the present application rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0048] Additionally, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, it will be understood by those skilled in the art that the examples can be practiced without these specific details.

[0049] The technical solutions provided by various embodiments of the present application are described below in conjunction with the accompanying drawings.

[0050] The embodiments of this specification propose a low power consumption wake-up circuit in a LIN bus, such as Figure 2As shown, it includes a comparator circuit and an enable control circuit, the enable control circuit includes a switch tube, the switch tube is connected to the comparator circuit, and the LIN bus connects the comparator circuit and the enable control circuit, and is configured such that when there is no wake-up action on the LIN bus, the LIN bus voltage is pulled up to turn off the switch tube in the enable control circuit, so that the comparator circuit is in a dormant state; when there is a wake-up action on the LIN bus, the LIN bus voltage is pulled down to turn on the switch tube in the enable control circuit, so that the comparator circuit is in a working state. The switch tube is, for example, a field effect tube.

[0051] In one embodiment, if Figure 2 As shown, the enabling control circuit also includes a first P-channel field effect transistor and a third resistor; the switch tube is a second N-channel field effect transistor; the LIN bus is connected to the gate of the first P-channel field effect transistor; the source of the first P-channel field effect transistor is connected to the VBAT end of the comparator circuit; the drain of the first P-channel field effect transistor is respectively connected to the gate of the second N-channel field effect transistor and one end of the third resistor; the source and drain of the second N-channel field effect transistor are connected to the comparator circuit; and the other end of the third resistor is connected to the GND end of the comparator circuit.

[0052] In one embodiment, if Figure 2 As shown, the gate voltage of the second N-channel field effect transistor is the product of the current flowing through the third resistor and the resistance value of the third resistor; the LIN bus voltage is pulled up, and when the gate voltage of the second N-channel field effect transistor is less than the threshold voltage of the second N-channel field effect transistor, the second N-channel field effect transistor is turned off; the LIN bus voltage is pulled down, and when the gate voltage of the second N-channel field effect transistor is greater than or equal to the threshold voltage of the second N-channel field effect transistor, the second N-channel field effect transistor is turned on.

[0053] In one embodiment, if Figure 2 As shown, the LIN bus voltage is pulled up to the VBAT voltage, the first P-channel field effect transistor is turned off, the current flowing through the third resistor is 0, the gate voltage of the second N-channel field effect transistor is 0, and the second N-channel field effect transistor is turned off; the LIN bus voltage is pulled down, the first P-channel field effect transistor is turned on, and when the gate voltage of the second N-channel field effect transistor is greater than or equal to the threshold voltage of the second N-channel field effect transistor, the second N-channel field effect transistor is turned on.

[0054] like Figure 2As shown in the figure, the PMOS tube PM1, the NMOS tube NM2 and the resistor R3 form the enable control circuit of the comparator. When the LIN bus has no wake-up action, the LIN bus voltage is pulled up to the VBAT voltage by the system, that is, the voltages of the two are equal. At this time, the PM1 tube is turned off, and no current flows through the resistor R3. Therefore, the voltage of the resistor R3 is 0V, the NM2 tube is turned off, the comparator does not work, and the circuit power consumption is 0; when the LIN bus voltage has a wake-up action, the LIN bus voltage is pulled down by the system. At this time, the PM1 tube is turned on, and current flows through the resistor R3. Assuming its value is I1, the gate voltage of the NM2 tube is I1*R3. When this voltage value is greater than or equal to the threshold turn-on voltage V of NM2, THN At this time, the NM2 tube is turned on and the comparator starts to compare normally.

[0055] In one embodiment, if Figure 2 As shown, the comparator circuit includes a second P-channel field effect transistor, a third P-channel field effect transistor, a first N-channel field effect transistor, a fourth P-channel field effect transistor, a third N-channel field effect transistor, a fourth N-channel field effect transistor, a first resistor, a second resistor and an inverter; the source of the second P-channel field effect transistor is the VBAT end of the comparator circuit, and the source of the second P-channel field effect transistor is connected to the source of the P-channel field effect transistor; the drain of the second P-channel field effect transistor is respectively connected to the gate of the second P-channel field effect transistor, the drain of the first N-channel field effect transistor, the gate of the first N-channel field effect transistor and the gate of the third P-channel field effect transistor; the source of the first N-channel field effect transistor is connected to one end of the first resistor; the other end of the first resistor is connected to L IN bus and one end of the second resistor; the other end of the second resistor is connected to the drain of the second N-channel field effect transistor; the source of the second N-channel field effect transistor is connected to the source of the fourth P-channel field effect transistor; the drain of the fourth P-channel field effect transistor is connected to the gate of the fourth P-channel field effect transistor, the drain of the third N-channel field effect transistor, the gate of the third N-channel field effect transistor and the gate of the fourth N-channel field effect transistor; the source of the third N-channel field effect transistor serves as the GND terminal (ground terminal) of the comparator circuit, and the source of the third N-channel field effect transistor is connected to the source of the fourth N-channel field effect transistor; the drain of the third P-channel field effect transistor is respectively connected to one end of the inverter and the drain of the fourth N-channel field effect transistor; the other end of the inverter is connected to the RXD terminal.

[0056] In one embodiment, if Figure 2 As shown, the second P-channel field effect transistor and the third P-channel field effect transistor are P-channel field effect transistor mirror current mirrors; the third N-channel field effect transistor and the fourth N-channel field effect transistor are N-channel field effect transistor mirror current mirrors.

[0057] In one embodiment, if Figure 2 As shown, the mirror ratios of the P-channel field effect transistor mirror current mirror and the N-channel field effect transistor mirror current mirror are both 1:1.

[0058] In one embodiment, when the comparator circuit is in working state, the current flowing from the VBAT terminal to the LIN bus path is I2, and the current flowing from the LIN bus to the GND terminal path is I3, then:

[0059] I2=(VBAT-V THP -V THN -LIN) / R1;

[0060] I3=(LIN-V THP -V THN ) / R2;

[0061] Among them, V THP Indicates the threshold voltage of the PMOS tube, V THN represents the threshold voltage of the NMOS tube, R1 represents the resistance value of the first resistor, and R2 represents the resistance value of the second resistor.

[0062] The relationship between the LIN bus voltage and half of the VBAT voltage is obtained according to the relationship between I2 and I3, so that when the LIN bus voltage is greater than half of the VBAT voltage, the RXD output of the comparator circuit is high level, and when the LIN bus voltage is less than half of the VBAT voltage, the RXD output is low level.

[0063] The PMOS tubes PM2, PM3 and PM4, the NMOS tubes NM1, NM3 and NM4, the resistors R1, R2 and the inverter INV form the core comparator circuit, wherein PM2 and PM3 form the PMOS tube mirror current mirror, NM3 and NM4 form the NMOS tube mirror current mirror, and the mirror ratio of the two current mirrors is 1:1.

[0064] The core comparator circuit is designed to achieve that when the LIN bus voltage is greater than VBAT*0.5, the RXD output is high level; when the LIN bus voltage is less than VBAT*0.5, the RXD output is low level. The specific implementation process is derived as follows:

[0065] Assume that the threshold voltage of all PMOS tubes is V THP , the threshold voltage of all NMOS tubes is V THN , and the resistance R1=R2, the current flowing from VBAT to LIN path is I2, and the current flowing from LIN to GND path is I3, then

[0066] I2=(VBAT-V THP -V THN -LIN) / R1

[0067] I3=(LIN-V THP -V THN ) / R2

[0068] Let I2 = I3, and get the center flip point of the comparator, that is:

[0069] (VBAT-V THP -V THN -LIN) / R1=(LIN-V THP -V THN ) / R2

[0070] Arranged:

[0071] LIN=VBAT*0.5

[0072] When I2>I3, that is, LIN is less than VBAT*0.5, RXD output is low level; when I2 is less than I3, that is, LIN is greater than VBAT*0.5, RXD output is high level. Among them, I2=I3, RXD output is uncertain, which should be avoided in system application.

[0073] The low-power LIN bus wake-up circuit of the present application has no power consumption when the LIN bus has no wake-up action and is normally biased at a high level. Once in sleep mode, when the LIN bus is pulled low and there is a wake-up action, the comparator turns on and can accurately achieve the flip threshold of VBAT*0.5. The low-power wake-up circuit of the LIN bus of the present application has low power consumption, high integration, simple circuit structure and high reliability. The static power consumption of the wake-up circuit is almost zero when the LIN bus has no wake-up action in sleep mode, and the function of monitoring the bus wake-up behavior is maintained.

[0074] The embodiment of this specification also provides a wake-up method, such as Figure 2 As shown, a method for a low-power wake-up circuit in a LIN bus using any of the above embodiments includes: when there is no wake-up action on the LIN bus, the LIN bus voltage is pulled up to turn off the switch tube in the enable control circuit, so that the comparator circuit is in a dormant state; when there is a wake-up action on the LIN bus, the LIN bus voltage is pulled down to turn on the switch tube in the enable control circuit, so that the comparator circuit is in a working state.

[0075] In one embodiment, the wake-up method further includes: enabling the control circuit to connect the VBAT terminal and the GND terminal of the comparator circuit, and when there is no wake-up action on the LIN bus, the LIN bus voltage is pulled up to the VBAT voltage.

[0076] The low-power wake-up circuit in the LIN bus of the present application has low overall power consumption when the LIN transceiver enters a sleep state, and the LIN nodes in the bus have a bus wake-up function; the bus wake-up circuit of the present application has almost no power consumption in the sleep mode, thereby ensuring the wake-up function and meeting the low power consumption requirements.

[0077] In this specification, the same or similar parts between the various embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the embodiments described later, the description is relatively simple, and the relevant parts can be referred to the partial description of the previous embodiments.

[0078] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A low power consumption wake-up circuit in LIN bus, characterized in that: It includes a comparator circuit and an enable control circuit, the enable control circuit includes a switch tube, the switch tube is connected to the comparator circuit, and a LIN bus connects the comparator circuit and the enable control circuit, and is configured such that when there is no wake-up action on the LIN bus, the LIN bus voltage is pulled up to turn off the switch tube in the enable control circuit so that the comparator circuit is in a dormant state; when there is a wake-up action on the LIN bus, the LIN bus voltage is pulled down to turn on the switch tube in the enable control circuit so that the comparator circuit is in a working state.

2. The low power consumption wake-up circuit in the LIN bus according to claim 1, characterized in that: The enabling control circuit further includes a first P-channel field effect transistor and a third resistor; the switch tube is a second N-channel field effect transistor; The LIN bus is connected to the gate of the first P-channel field effect transistor; The source of the first P-channel field effect transistor is connected to the VBAT terminal of the comparator circuit; The drain of the first P-channel field effect transistor is respectively connected to the gate of the second N-channel field effect transistor and one end of the third resistor; The source and drain of the second N-channel field effect transistor are connected to the comparator circuit; The other end of the third resistor is connected to the GND end of the comparator circuit.

3. The low power consumption wake-up circuit in the LIN bus according to claim 2, characterized in that: The gate voltage of the second N-channel field effect transistor is the product of the current flowing through the third resistor and the resistance value of the third resistor; The LIN bus voltage is pulled up, and when the gate voltage of the second N-channel field effect transistor is less than the threshold voltage of the second N-channel field effect transistor, the second N-channel field effect transistor is turned off; The LIN bus voltage is pulled down, and when the gate voltage of the second N-channel field effect transistor is greater than or equal to the threshold voltage of the second N-channel field effect transistor, the second N-channel field effect transistor is turned on.

4. The low power consumption wake-up circuit in the LIN bus according to claim 3, characterized in that: The LIN bus voltage is pulled up to the VBAT voltage, the first P-channel field effect transistor is turned off, the current flowing through the third resistor is 0, the gate voltage of the second N-channel field effect transistor is 0, and the second N-channel field effect transistor is turned off; The LIN bus voltage is pulled down, the first P-channel field effect transistor is turned on, and when the gate voltage of the second N-channel field effect transistor is greater than or equal to the threshold voltage of the second N-channel field effect transistor, the second N-channel field effect transistor is turned on.

5. The low power consumption wake-up circuit in the LIN bus according to any one of claims 2 to 4, characterized in that: The comparator circuit includes a second P-channel field effect transistor, a third P-channel field effect transistor, a first N-channel field effect transistor, a fourth P-channel field effect transistor, a third N-channel field effect transistor, a fourth N-channel field effect transistor, a first resistor, a second resistor and an inverter; The source of the second P-channel field effect transistor is the VBAT terminal of the comparator circuit, and the source of the second P-channel field effect transistor is connected to the source of the P-channel field effect transistor; The drain of the second P-channel field effect transistor is respectively connected to the gate of the second P-channel field effect transistor, the drain of the first N-channel field effect transistor, the gate of the first N-channel field effect transistor and the gate of the third P-channel field effect transistor; The source of the first N-channel field effect transistor is connected to one end of the first resistor; The other end of the first resistor is connected to the LIN bus and one end of the second resistor; The other end of the second resistor is connected to the drain of the second N-channel field effect transistor; The source of the second N-channel field effect transistor is connected to the source of the fourth P-channel field effect transistor; The drain of the fourth P-channel field effect transistor is connected to the gate of the fourth P-channel field effect transistor, the drain of the third N-channel field effect transistor, the gate of the third N-channel field effect transistor and the gate of the fourth N-channel field effect transistor; The source of the third N-channel field effect transistor serves as the GND terminal of the comparator circuit, and the source of the third N-channel field effect transistor is connected to the source of the fourth N-channel field effect transistor; The drain of the third P-channel field effect transistor is respectively connected to one end of the inverter and the drain of the fourth N-channel field effect transistor; The other end of the inverter is connected to the RXD end.

6. The low power consumption wake-up circuit in the LIN bus according to claim 5, characterized in that: The second P-channel field effect transistor and the third P-channel field effect transistor are P-channel field effect transistor mirror current mirrors; The third N-channel field effect transistor and the fourth N-channel field effect transistor are N-channel field effect transistor mirror current mirrors.

7. The low power consumption wake-up circuit in the LIN bus according to claim 6, characterized in that: The mirror ratios of the P-channel field effect transistor mirror current mirror and the N-channel field effect transistor mirror current mirror are both 1:

1.

8. The low power consumption wake-up circuit in the LIN bus according to claim 6, characterized in that: When the comparator circuit is in working state, the current flowing from the VBAT end to the LIN bus path is I2, and the current flowing from the LIN bus to the GND end path is I3, then: I2=(VBAT-V THP -V THN -LIN) / R1; I3=(LIN-V THP -V THN ) / R2; Among them, V THP Indicates the threshold voltage of the PMOS tube, V THN represents the threshold voltage of the NMOS tube, R1 represents the resistance value of the first resistor, and R2 represents the resistance value of the second resistor; The relationship between the LIN bus voltage and half of the VBAT voltage is obtained according to the relationship between I2 and I3, so that when the LIN bus voltage is greater than half of the VBAT voltage, the RXD output of the comparator circuit is high level, and when the LIN bus voltage is less than half of the VBAT voltage, the RXD output is low level.

9. A wake-up method, characterized in that: The method for applying the low-power wake-up circuit in the LIN bus as described in any one of claims 1 to 8 comprises: when there is no wake-up action on the LIN bus, the LIN bus voltage is pulled up to turn off the switch tube in the enable control circuit, so that the comparator circuit is in a dormant state; when there is a wake-up action on the LIN bus, the LIN bus voltage is pulled down to turn on the switch tube in the enable control circuit, so that the comparator circuit is in an operating state.

10. The wake-up method according to claim 9, characterized in that: The wake-up method further includes: enabling the control circuit to connect the VBAT terminal and the GND terminal of the comparator circuit, and when there is no wake-up action on the LIN bus, the LIN bus voltage is pulled up to the VBAT voltage.

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