Signal processing device and method based on AOV, and electronic equipment

Abstract

The invention provides a signal processing device and method based on AOV and electronic equipment, and relates to the technical field of AOV camera shooting, the AOV signal processing device comprises an MCU chip and an SOC chip, the MCU chip comprises a plurality of event detection interface groups and a first processing unit; the SOC chip comprises a non-normal electricity module, and the non-normal electricity module comprises a plurality of event response interface groups in one-to-one correspondence with a plurality of event detection interface groups, and a second processing unit; when detecting that an event occurs, the first processing unit sends the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group; the transmission of the event occurs during a period in which the non-common electric module is switched from a dormant state to a wake-up state in the AOV mode; the second processing unit detects a plurality of event response interface groups, and acquires an event when it is detected that the first event response interface group receives the event. According to the method and the device, the event loss condition in the AOV mode can be prevented.

Description

Technical Field

[0001] The present invention relates to the field of AOV camera technology, and in particular to an AOV-based signal processing device and method, and electronic equipment. Background Art

[0002] AOV (Always On-line Video) is a low-power full-time recording technology. After the camera enters AOV mode, it captures an image at a set time interval and analyzes whether there is a specific target (such as a person, a car, etc.) in the image. If there is a specific target, the camera switches to the awake state (i.e., normal working state). If there is no specific target, it continues to sleep (i.e., low-power standby). AOV mode can solve many problems existing in traditional passive infrared sensor (Passive Infra-Red, PIR) technology, such as the inability to record 7×24 hours, easy false alarms and missed alarms, and short detection distance. In addition, the application scenarios of AOV mode are very wide. It is suitable for places that require all-weather monitoring, such as scenic spots, rural areas, agriculture and animal husbandry, forestry, breeding, etc. These areas may not have power grid power supply or network connection. Based on AOV mode, low frame rate recording can be achieved.

[0003] In actual situations, in AOV mode, when switching from sleep state to wake-up state, the problem of lost events is prone to occur, which brings many inconveniences. Summary of the invention

[0004] The present invention provides a signal processing device and method based on AOV, and an electronic device, which are used to solve the problem in the prior art that lost events are prone to occur during the switching process from a sleep state to a wake-up state after entering the AOV mode, and can prevent the occurrence of lost events in the AOV mode.

[0005] The present invention provides a signal processing device based on AOV, comprising a microcontroller unit (MCU) chip and a system on chip (SOC) chip, wherein the MCU chip comprises a plurality of event detection interface groups and a first processing unit; the SOC chip comprises an extraordinary electrical module, the extraordinary electrical module comprises a plurality of event response interface groups corresponding to the plurality of event detection interface groups, and a second processing unit; when the first processing unit detects that an event occurs, the first processing unit sends the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through a first event detection interface group among the plurality of event detection interface groups; wherein the sending of the above-mentioned event occurs during a period when the extraordinary electrical module switches from a sleep state to a wake-up state in an AOV mode; the second processing unit detects the plurality of event response interface groups, and acquires the event when it is detected that the first event response interface group receives the event.

[0006] According to a signal processing device based on AOV provided by the present invention, it also includes: a switching circuit; the MCU chip also includes: a first interface for sending an interrupt signal; the SOC chip also includes a normal power module, the normal power module includes a second interface for receiving an interrupt signal, and the abnormal power module also includes a third interface for power-on control thereof; the first interface, the second interface and the third interface are all connected to the switching circuit; in the AOV mode, the abnormal power module switches from a sleep state to a wake-up state, and a first change occurs from a low level to a high level in the level on the third interface, and the switching circuit switches from an interrupt to a conduction after the first change occurs, and the communication between the first interface and the second interface is interrupted when the switching circuit is on; in the AOV mode, the abnormal power module switches from a wake-up state to a sleep state, and a second change occurs from a high level to a low level in the level on the third interface, and the switching circuit switches from a conduction to an interruption after the second change occurs, and the communication between the first interface and the second interface is normal when the switching circuit is interrupted.

[0007] According to the present invention, a signal processing device based on AOV further includes: an RC delay circuit, and the RC delay circuit is arranged between the first interface and the second interface.

[0008] According to a signal processing device based on AOV provided by the present invention, each event detection interface group in a plurality of event detection interface groups includes: an event notification interface and an event confirmation interface; each event response interface group in a plurality of event response interface groups includes: an event receiving interface and an event response interface; when the first processing unit detects that an event occurs, the first processing unit sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group in the plurality of event detection interface groups, including: when the first processing unit detects that an event occurs, the first processing unit sends an event signal of the event to the event receiving interface in the first event response interface group through the event notification interface in the first event detection interface group; and, when it is detected that the event confirmation interface in the first event detection interface group receives a confirmation signal within a set time interval, it is determined that the event is received successfully; when the second processing unit detects that the first event response interface group receives an event, the second processing unit obtains the event, including: when the second processing unit detects that the event receiving interface in the first event response interface group receives an event signal of the event, the second processing unit obtains the event; and, through the event response interface in the first event response interface group, the second processing unit sends a confirmation signal to the event confirmation interface in the first event detection interface group.

[0009] According to a signal processing device based on AOV provided by the present invention, when the first processing unit detects the occurrence of an event, the first processing unit sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among multiple event detection interface groups. The device also includes: when the first processing unit detects that the event confirmation interface in the first event detection interface group has not received a confirmation signal within a set time interval, the first processing unit determines a second event detection interface group among the multiple event detection interface groups; the first processing unit sends an event signal of the event to the event receiving interface in the second event response interface group through the event notification interface in the second event detection interface group; the second event response interface group corresponds to the second event detection interface group.

[0010] The present invention also provides an AOV-based signal processing method, which is applied to the SOC chip in any of the above-mentioned AOV signal processing devices, and the method includes: detecting multiple event response interface groups; obtaining an event when it is detected that the first event response interface group among the multiple event response interface groups has received an event; wherein the event comes from an MCU chip, and when the MCU chip detects that an event has occurred, the MCU chip sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the multiple event detection interface groups; wherein the sending of the above-mentioned event occurs during the period when the non-critical electrical module switches from a sleep state to a wake-up state in the AOV mode.

[0011] According to a signal processing method based on AOV provided by the present invention, each event detection interface group in multiple event detection interface groups includes: an event notification interface and an event confirmation interface; each event response interface group in multiple event response interface groups includes: an event receiving interface and an event response interface; in the case where it is detected that the first event response interface group in the multiple event response interface groups has received an event, the event is obtained, including: in the case where it is detected that the event receiving interface in the first event response interface group has received an event signal of the event, the event is obtained; and, through the event response interface in the first event response interface group, a confirmation signal is sent to the event confirmation interface in the first event detection interface group.

[0012] The present invention also provides an AOV-based signal processing method, which is applied to the MCU chip in any of the above-mentioned AOV signal processing devices, and the method includes: detecting whether an event occurs; when the occurrence of an event is detected, sending the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through a first event detection interface group among multiple event detection interface groups, so as to instruct the SOC chip to obtain the event when detecting that the first event response interface group receives the event; wherein the sending of the above-mentioned event occurs during the period when the non-electrical module switches from a sleep state to a wake-up state in the AOV mode.

[0013] According to a signal processing method based on AOV provided by the present invention, each event detection interface group in multiple event detection interface groups includes: an event notification interface and an event confirmation interface; each event response interface group in multiple event response interface groups includes: an event receiving interface and an event response interface; when an event is detected, the event is sent to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group in the multiple event detection interface groups, including: when an event is detected, an event signal of the event is sent through the event notification interface in the first event detection interface group; when it is detected that the event confirmation interface in the first event detection interface group receives the event signal of the event within a set time interval, it is determined that the event is received successfully.

[0014] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the AOV-based signal processing method described above is implemented.

[0015] The present invention also provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the signal processing method based on AOV as described above is implemented.

[0016] The present invention also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the computer program implements any one of the above-mentioned AOV-based signal processing methods.

[0017] The present invention provides a signal processing device and method based on AOV, and an electronic device. The signal processing device based on AOV includes an MCU chip and a SOC chip; the MCU chip includes multiple event detection interface groups and a first processing unit; the SOC chip includes an extraordinary electrical module, the extraordinary electrical module includes multiple event response interface groups corresponding to the multiple event detection interface groups, and a second processing unit; when the first processing unit detects the occurrence of an event, the first processing unit sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the multiple event detection interface groups; wherein the sending of the above-mentioned event occurs during the period when the extraordinary electrical module switches from a sleep state to a wake-up state in the AOV mode; the second processing unit detects the multiple event response interface groups, and obtains the event when it is detected that the first event response interface group receives the event. It can be seen that the present invention, for a device capable of entering the AOV mode, notifies and obtains the events that occur by setting multiple event detection interface groups and multiple event response interface groups. In this case, the notification and acquisition of events are no longer affected by the switching process between the wake-up state and the sleep state in the AOV mode. This can solve the problem in the prior art that after entering the AOV mode, events are easily lost when switching from the sleep state to the wake-up state, and can prevent the occurrence of event loss in the AOV mode. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0019] Figure 1 It is a schematic diagram of the interaction between the MCU chip and the SOC chip in the AOV mode in the related technology.

[0020] Figure 2 It is a schematic diagram of the level change on the power supply control pin of the SOC chip in the AOV mode in the related technology.

[0021] Figure 3 It is one of the structural schematic diagrams of the signal processing device based on AOV provided in an embodiment of the present invention.

[0022] Figure 4 This is the second structural schematic diagram of the signal processing device based on AOV provided in an embodiment of the present invention.

[0023] Figure 5 This is the third structural schematic diagram of the AOV-based signal processing device provided in an embodiment of the present invention.

[0024] Figure 6 This is the fourth structural schematic diagram of the AOV-based signal processing device provided in an embodiment of the present invention.

[0025] Figure 7 This is the fifth structural diagram of the AOV-based signal processing device provided in an embodiment of the present invention.

[0026] Figure 8 This is the sixth structural diagram of the AOV-based signal processing device provided in an embodiment of the present invention.

[0027] Fig. 9 This is one of the flowcharts of the AOV-based signal processing method provided in an embodiment of the present invention.

[0028] Fig.10 This is the second flowchart of the AOV-based signal processing method provided in an embodiment of the present invention.

[0029] Fig.11 It is a structural schematic diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0030] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0031] In related technologies, such as Figure 1 As shown in the figure, the implementation of AOV depends on the System on Chip (SOC) chip and the Microcontroller Unit (MCU) chip. The SOC chip and the MCU chip can exchange signals.

[0032] Please continue to see Figure 1 The SOC chip includes a normal power module and an abnormal power module. The normal power module is provided with an uninterruptible power I / O interface, which includes a power supply control pin ( Figure 1 The MCU chip is provided with an external trigger interface, which includes an external trigger pin ( Figure 1 The uninterruptible I / O interface is electrically connected to the external trigger interface.

[0033] See also Figure 2 , Figure 2 The arrows in the middle indicate the change in the level of the power supply control pin in each stage from the first stage to the sixth stage in the related art, and the arrows point to the horizontal direction (for example Figure 2 In the first, third, fourth and fifth stages of the power supply control pin, it means that the level on the power supply control pin has not changed, and the arrow points to the upward direction (for example Figure 2 The second stage in the process indicates that the level on the power supply control pin changes from low to high, and the arrow points diagonally downward (for example Figure 2 It can be seen that the level change on the power supply control pin in the second and sixth stages is special compared with the level change in other stages, and the main problem to be solved by this application occurs in the above-mentioned second stage (loss event), and in the case of solving the loss event problem in the second stage, the problem of the sixth stage can also be solved by adding other technical means. The following explains the problems caused by the level change on the power supply control pin in the second and sixth stages.

[0034] Combination Figure 1 and Figure 2 ,The power-on process (i.e. switching from sleep state to wake-up state) and power-off process (switching from wake-up state to sleep state) of the SOC chip in AOV mode can be divided into the following six stages.

[0035] The first stage: the SOC chip is in sleep state, the emergency module is powered off, the level on the power supply control pin is low, and the level of the external trigger pin on the MCU chip is low.

[0036] The second stage: at preset time intervals (similar to a heartbeat mechanism, for example, every 1 second), the SOC chip pulls up the level on the power control pin, so that the low level on the power control pin becomes a high level. In this case, the hardware in the SOC chip (including hardware components such as the power control pin and various pins) starts to power on.

[0037] During the hardware power-on process, if a new external trigger signal is loaded to the external trigger interface, the power supply control pin is already at a high level, so it cannot respond to the new external trigger signal. At the same time, since the SOC software is powered on only after the SOC hardware is powered on, it is also impossible to respond to the new external trigger signal based on the SOC software. As a result, although there is a new external trigger signal coming in, it cannot be responded to, resulting in the problem of event loss.

[0038] Phase 3: After the SOC hardware is powered on, the SOC software starts to power on.

[0039] When the SOC software starts to power on, it can start to receive external trigger signals and respond to them, and process the events corresponding to the signals. During this process, the SOC software will detect whether there is an external trigger (i.e. whether an external trigger signal is received) at a set time interval. If there is an external trigger, it will remain in the awake state; if there is no external trigger, it will enter the sleep state.

[0040] The fourth stage: After the SOC software is powered on, the SOC software enters the normal working state. During this period, the processing method of the external trigger is the same as the third stage above.

[0041] Stage 5: The SOC software detects that there is no external trigger within the set time interval and starts to power off. If an external trigger is received during this process, the processing method of the external trigger is similar to the above-mentioned stage 3. In the fifth stage, the level of the power supply control pin is still high.

[0042] Phase 6: The SOC software is powered off and the SOC hardware starts to be powered off. During this period, the level of the power supply control pin changes from high level to low level.

[0043] In the stage when the SOC hardware starts to power off, under normal circumstances, the SOC chip enters the sleep state after the end of this stage, and then after a preset time, the SOC chip pulls up the level on the power control pin again to enter the wake-up state. However, in the sixth stage, at the falling edge of the power control pin, since the level on the power control pin has begun to be pulled low, if an external trigger signal (such as a detection alarm or an active flow pull signal) is received at this time, it will respond to the received external trigger signal and pull up the level on the power control pin again, which will cause the SOC hardware to be powered on again before it is completely powered off. In this case, the power control pin may not change from a low level to a high level (because the level is pulled up again before it is pulled down to a low level), so it will not trigger the SOC software to restart. At this time, the SOC software has been powered off and entered the suspend process, so no matter how the external trigger is used, the SOC software cannot be started, and a crash occurs.

[0044] Combine the following Figure 3 The present invention introduces a signal processing device based on AOV provided in an embodiment of the present invention.

[0045] Figure 3 FIG. 1 is one of the structural schematic diagrams of the signal processing device based on AOV provided by the present invention. Figure 3 As shown, the AOV-based signal processing device 30 includes: an MCU chip 31 and a SOC chip 32 .

[0046] See also Figure 3, the MCU chip 31 includes multiple event detection interface groups 3110 and a first processing unit 3120.

[0047] In a specific implementation, one or more interfaces may be set in the multiple event detection interface groups 3110 .

[0048] See also Figure 3 The SOC chip 32 includes an extraordinary electrical module 321 , and the extraordinary electrical module 321 includes a plurality of event response interface groups 3211 and a second processing unit 3212 .

[0049] The multiple event response interface groups 3211 correspond one-to-one to the multiple event detection interface groups 3110 .

[0050] like Figure 3 As shown, each event detection interface group 3110 in the plurality of event detection interface groups 3110 is electrically connected to its corresponding event response interface group 3211 . In this case, electrical signals can be transmitted between each event detection interface group 3110 and its corresponding event response interface group 3211 .

[0051] The first processing unit 3120 is used to: when an event is detected, send the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the multiple event detection interface groups 3110. The sending of the event occurs during the period when the non-power module switches from the sleep state to the wake-up state in the AOV mode.

[0052] The second processing unit 3212 is used to detect multiple event response interface groups 3211, and when detecting that the first event response interface group receives an event, obtain the event.

[0053] In some embodiments, the first event detection interface group may be any one of a plurality of event detection interface groups.

[0054] In some embodiments, corresponding event detection interface groups can be set in advance for events of different types or different degrees of importance based on information such as the type of event and the degree of importance of the event. Each event is sent to the event response interface group corresponding to the event detection interface group in the SOC chip through its corresponding event detection interface group.

[0055] Based on the above-mentioned AOV-based signal processing device 30, in the AOV mode, during the process of switching from the sleep state to the wake-up state, after the level on the power control pin is pulled up to a high level, if an event occurs, the MCU chip can send the occurred event to the event response interface group corresponding to the event detection interface group in the SOC chip through one of the event detection interface groups among the multiple event detection interface groups. After the SOC chip switches from the sleep state to the wake-up state, the software in the non-power module 321 in the SOC chip has been powered on, and the second processing unit 3212 can obtain the event through the event response interface group, thereby solving the problem of event loss that is prone to occur when switching from the sleep state to the wake-up state in the AOV mode, and effectively preventing the occurrence of event loss in the AOV mode.

[0056] In some embodiments, Figure 4 As shown, the MCU chip 31 also includes: a first interface 312 for sending an interrupt signal (i.e., the above-mentioned externally triggered signal). The SOC chip 32 also includes a normal power module 322, and the normal power module 322 includes a second interface 3221 for receiving an interrupt signal. The non-normal power module 321 in the SOC chip also includes: a third interface 3213 for powering on it. In this case, the AOV signal processing device 30 also includes: a switch circuit 33.

[0057] like Figure 4 As shown, the first interface 312 , the second interface 3221 , and the third interface 3213 are all connected to the switch circuit 33 .

[0058] The second interface 3221 is electrically connected to the first interface 312 , in which case the second interface 3221 and the first interface 312 can communicate with each other.

[0059] The first interface 312 may be provided with a pin ( Figure 4 The function of this pin is equivalent to the external trigger pin introduced in the above-mentioned related art.

[0060] The second interface 3221 may be provided with a pin ( Figure 4 The function of this pin is equivalent to the power supply control pin described in the above-mentioned related art.

[0061] A pin may be set in the third interface 3213, and the pin set in the third interface 3213 may be a general purpose input output (GPIO) of any internal pull-up resistor PU (Pull-up resistors). GPIO is a function-reused pin derived from the inside of the chip.

[0062] See also Figure 4In the AOV mode, the non-critical mode 321 switches from the sleep state to the wake-up state, and the level on the third interface 3213 undergoes a first change from a low level to a high level. The switch circuit 33 switches from interruption to conduction after the above-mentioned first change occurs. When the switch circuit 33 is turned on, the communication between the first interface 312 and the second interface 3221 is interrupted.

[0063] It should be noted that when the switch circuit 33 is turned on, the signal link between the first interface 312 and the second interface 3221 is cut off through the internal circuit, for example, the first interface 312 and the second interface 3221 are grounded, and the third interface 3213 is not electrically connected to the first interface 312 and the second interface 3221 through the switch circuit 33.

[0064] See also Figure 4 In the AOV mode, the non-critical electrical module 321 switches from the awake state to the sleep state, and the level on the third interface 3213 undergoes a second change from a high level to a low level. The switch circuit 33 switches from on to off after the above-mentioned second change occurs. When the switch circuit 33 is interrupted, the first interface 312 and the second interface 3221 communicate normally.

[0065] In a specific implementation, the switch circuit 33 may be, for example, an analog switch, or a circuit capable of realizing an analog switch function.

[0066] For example, Figure 5 As shown, the switch circuit 33 may be, for example, an NMOS tube 331 .

[0067] See also Figure 5 , the drain of NMOS tube 331 ( Figure 5 The pin D in the figure is connected to the first interface 312 and the second interface 3221, and the gate of the NMOS tube 331 ( Figure 5 The pin G in the third interface 3213 is connected to the source of the NMOS tube 331 ( Figure 5 Pin S in the circuit is connected to ground.

[0068] The NMOS transistor may be, for example, an enhancement-type NMOS transistor, and the gate threshold voltage VGSth thereof may be as small as possible, for example, below 1V.

[0069] like Figure 5As shown, in the AOV mode, in the process of switching the non-power module 321 from the awake state to the sleep state, referring to the relevant description of the sixth stage in the above-mentioned related technology, the software in the non-power module 321 is powered off first, and then the hardware is powered off. In the process of hardware powering off, the level of the pin in the third interface 3213 changes from a high level to a low level. The decrease in the level on the pin causes the NMOS tube to slowly transition from being turned on (i.e., the D end and the S end of the NMOS tube are turned on) to being turned off. For the second interface 3221, the external trigger signal from the first interface 312 can be shielded during the conduction of the NMOS tube, so that the external trigger signal of the first interface 312 cannot be sent to the second interface 3221. Therefore, the second interface 3221 will not have a situation where the level on the pin has begun to decrease but has not been completely powered off, and is forced to be pulled high again. This can avoid the occurrence of the crash described in the above-mentioned related technology, and solve the problem of the crash that is prone to occur during the switching from the awake state to the sleep state in the AOV mode. After the NMOS tube is completely turned off, the communication between the first interface 312 and the second interface 3221 is restored to normal, and the second interface 3221 can normally receive the external trigger signal from the first interface 312 .

[0070] Please continue to see Figure 5 , during the hardware power-off process, the voltage on the gate of the NMOS tube 331 ( Figure 5 The voltage of the pin G in the first interface 312 can drop to 1V. At this time, the NMOS tube 331 is turned off and cannot shield the external trigger signal from the first interface 312. If the hardware power-off is not completed at this time, the level on the first interface 312 may be pulled up due to the external trigger signal, resulting in the level on the pin of the second interface 3221 being forced to be pulled up before it is completely powered off. There is still a risk of a crash. Based on this, in order to further reduce the risk of a crash during the switching from the wake-up state to the sleep state in the AOV mode, the interrupt signal sent by the first interface 312 can be delayed on the basis of setting the switch circuit 33, so as to further ensure that during the power-off process of the hardware of the non-power module 321, the level on the pin of the second interface 3221 will not be forced to be pulled up due to the interrupt signal, thereby further reducing the risk of a crash.

[0071] like Figure 6 As shown, the AOV-based signal processing device 30 may further include: a resistor-capacitance circuit (RC) delay circuit 34. The RC delay circuit 34 is connected to the third interface 3213 and is used to delay the power-off time of the third interface 3213.

[0072] Taking the switch circuit 33 as NMOS tube 331 as an example, Figure 5 and Figure 6As shown, the RC delay circuit 34 can be arranged between the third interface 3213 and the gate of the NMOS tube 331, so that the process of pulling down the voltage on the gate of the NMOS tube 331 is slowed down. In this case, the on time of the NMOS tube 331 in the process of slowly transitioning from on to off becomes longer, thereby ensuring that the NMOS tube is turned off after the hardware is completely powered off, thereby preventing the situation where the level on the pin of the second interface 3221 is forced to be pulled up before being pulled down.

[0073] In some embodiments, Figure 7 As shown, the RC delay circuit 34 can also be set at a position close to the second interface 3221 or on a pin of the second interface 3221 ( Figure 7 Only the case where the RC delay circuit 34 is arranged near the second interface 3221 is shown, so that the process of the level on the pin of the second interface 3221 being pulled up due to the interrupt signal is slowed down, so as to delay the interrupt signal. For example, if the interrupt signal 0.7VPP is a high level, the time for the pin of the second interface 3221 to go from 0 to 0.7VPP is 10ms, and after the RC delay circuit 34 is arranged, the time for the pin of the second interface 3221 to go from 0 to 0.7VPP is 20ms, thereby achieving the purpose of delaying the interrupt signal.

[0074] Next, the event detection interface group and the event response interface group in the embodiment of the present invention are introduced in detail.

[0075] In some embodiments, Figure 7 As shown, one interface can be set in each event detection interface group 3110 (see Figure 7 Each event response interface group 3211 may include one interface (see Figure 7 In this case, when the first processing unit 3120 detects an event, the event signal of the event can be sent to the second event interface in the first event response interface group through the first event interface in the first event detection interface group, and the second processing unit 3212 obtains the event when it detects that a certain second event interface receives the event signal of the event. The first event detection interface group corresponds to the first event response interface group.

[0076] In some embodiments, to further reduce the risk of lost events, such as Figure 8 As shown, each of the multiple event detection interface groups 3110 may include an event notification interface 31101 and an event confirmation interface 31102. Each of the multiple event response interface groups 3211 may include an event receiving interface 32111 and an event response interface 32112.

[0077] The plurality of event detection interface groups 3110 may include, for example, Figure 8 The event detection interface group A1, event detection interface group A2, ..., event detection interface group An in the event detection interface group A1, event detection interface group A2, ..., event detection interface group An, where n is a natural number and n is greater than 1. The multiple event response interface groups 3211 may include, for example Figure 8 The event response interface group B1, event response interface group B2, ..., event response interface group Bn in the first event detection interface group. The event detection interface group Am corresponds to the event response interface group Bm, where m is a natural number, and n≤m≤1. In this case, the first processing unit 3120 is used to: when an event is detected, send an event signal of the detected event to the event receiving interface in the first event response interface group through the event notification interface in the first event detection interface group.

[0078] The first event detection interface group may be any one of a plurality of event detection interface groups. For example, the first event detection interface group is Figure 8 In the event detection interface group A1, when an event is detected, the first processing unit 3120 generates an event signal of the event and sends the event signal of the event to the event receiving interface B11 in the event response interface group B1 through the event notification interface A11.

[0079] On the side of the second processing unit 3212, the second processing unit 3212 detects at regular intervals whether the event receiving interface in each event response interface group 3211 receives an event signal of an event. When it is detected that the event receiving interface in the first event response interface group receives an event signal of an event, the event is acquired.

[0080] For example, please see Figure 8 If the second processing unit 3212 detects that the event receiving interface B11 receives an event signal of an event, the event is acquired.

[0081] After the second processing unit 3212 obtains the event through the event receiving interface in the first event response interface group, it can respond to the MCU chip 31 as follows: the second processing unit 3212 can send a confirmation signal to the event confirmation interface in the first event detection interface group through the event response interface in the first event response interface group, thereby informing the MCU chip 31 that the event has been successfully obtained.

[0082] For example, please see Figure 8 After the second processing unit 3212 detects that the event receiving interface B11 receives the event signal of the event and obtains the event, it sends a confirmation signal to the event confirmation interface A12 through the event response interface B12 to inform the MCU chip 31 that the event has been successfully obtained.

[0083] For the first processing unit 3120 of the MCU chip 31, after sending the event signal of the event, it detects whether the event confirmation interface in the first event detection interface group receives the confirmation signal within a set time interval (which can be set by a technician in this field according to actual conditions). If the detection result is yes, that is, it is detected that the event confirmation interface in the first event detection interface group receives the confirmation signal within the set time interval, it is determined that the event is received successfully.

[0084] In some embodiments, for the first processing unit 3120 of the MCU chip 31, after sending the event signal of the event, if it is detected within a set time interval that the event confirmation interface in the first event detection interface group has not received the confirmation signal, it is determined that the event reception has failed. In this case, the first processing unit 3120 can determine the second event detection interface group from multiple event detection interface groups (the second event detection interface group is an event detection interface group different from the first event detection interface group), and send the event signal of the event to the event receiving interface in the second event response interface group through the event notification interface in the second event detection interface group; the second event response interface group corresponds to the second event detection interface group. This can further avoid the occurrence of lost events and reduce the risk of lost events.

[0085] For example, please see Figure 8 , after the first processing unit 3120 sends the event signal of the event to the event receiving interface B11 through the event notification interface A11, it detects that the event confirmation interface A12 receives the confirmation signal within the set time interval, in which case it is determined that the event is received successfully. If it is detected that the event confirmation interface A12 does not receive the confirmation signal within the set time interval, the event detection interface group A2 is determined in multiple event detection interface groups, and the event signal of the event is sent to the event receiving interface B21 in the event response interface group B2 through the event notification interface A21 in the event detection interface group A2. The method of confirming whether the event response interface group B2 has received the event signal of the event is the same as that of the event response interface group B1. If it is confirmed that the event response interface group B2 has not received the event signal of the event, another event response interface group can be selected from multiple event response interface groups to send the event signal of the event.

[0086] In some embodiments, the plurality of event detection interface groups 3110 include: at least one event detection interface group corresponding to each type of event in the plurality of types of events, and different event detection interface groups correspond to different types of events.

[0087] For example, multiple types of events include first-type events, second-type events, and third-type events. Figure 8, the event detection interface group A1 can correspond to the first type of event, each event detection interface group in the event detection interface groups A2~A3 can correspond to the second type of event, and each event detection interface group in the event detection interface groups A4~An can correspond to the third type of event.

[0088] Of course, it is understandable that the multiple categories of events listed above, including the first category of events, the second category of events and the third category of events, are merely exemplary. In specific implementations, the number of categories of multiple categories of events includes but is not limited to three.

[0089] In the case where there is at least one event detection interface group corresponding to each type of event in multiple types of events, and different types of events correspond to different event detection interface groups, the first processing unit 3120 generates an event signal of the event, including: the first processing unit 3120 generates a preset signal corresponding to the type of event according to the type of the event, and determines the preset signal as the event signal. That is, the first processing unit 3120 generates the same event signal for events of the same type. In this case, after generating the event signal of the event, the first processing unit 3120 is also used to: determine at least one target event detection interface group corresponding to the event in multiple event detection interface groups according to the type of the event, and send the event signal of the event through the target event detection interface group.

[0090] by Figure 8 Taking the AOV-based signal processing device 30 shown as an example, the implementation process of the six stages of the power-on process (i.e., switching from the sleep state to the awake state) and the power-off process (switching from the awake state to the sleep state) of the SOC chip 32 in the AOV mode is as follows.

[0091] Phase 1: See Figure 8 , the SOC chip 32 is in a dormant state, and the pins ( Figure 3 At this time, the abnormal power module 321 is powered off, the level on the third interface 3213 is low, and the switch circuit 33 is disconnected. In this case, the first interface 312 and the second interface 3221 communicate normally, and the second interface 3221 can receive the external trigger signal on the first interface 312.

[0092] The second stage: Since the state is switched every preset time in the AOV mode (from the sleep state to the awake state, or from the awake state to the sleep state), the low level on the pin of the second interface 3221 is pulled high during the switching from the sleep state to the awake state, and in this case the hardware of the SOC chip 32 starts to power on. The level on the third interface 3213 changes from a low level to a high level, the switch circuit 33 switches from interruption to conduction, and the communication state between the first interface 312 and the second interface 3221 switches from normal communication to communication interruption. Based on this, the second interface 3221 cannot receive the new external trigger signal (i.e., interrupt signal) loaded on the first interface 312.

[0093] If the first interface 312 sends an interrupt signal (i.e., an event signal of a certain event) to the second interface 3221 during the hardware power-on process, the signal may be sent to the SOC chip 32 in the following manner. Figure 8 , in the process of the level on the pin of the third interface 3213 being pulled high, if a new event occurs, the first processing unit 3120 generates an event signal of the event after detecting the event, such as 0101. Taking the first event detection interface group as the event detection interface group A1 as an example, the event signal is sent to the event receiving interface B11 in the event response interface group B1 through the event notification interface A11 in the event detection interface group A1. After the software in the SOC chip (i.e., the second processing unit 3212) is powered on, the second processing unit 3212 detects the level signal on the event receiving interface B11, obtains the level signal, and thus obtains the event. At this time, the second processing unit 3212 modifies the level on the event response interface B12 (for example, changing the low level to the high level, or changing the high level to the low level), and the level of the event confirmation interface A12 in the event detection interface group A1 also changes accordingly. When the MCU chip 31 detects the level change on the event confirmation interface A12 within the set time interval, it determines that the event has been successfully received by the SOC chip 32. In this case, the problem of being unable to respond to the event sent by the MCU chip 31 in this stage can be effectively avoided, and the occurrence of lost events can be effectively prevented. If the MCU chip 31 does not detect the level change on the event confirmation interface A12 within the set time interval, it can be determined that the event has not been successfully received by the SOC chip 32, and the event signal of the event can be reloaded on the event notification interface A21.

[0094] It should be noted that, since multiple event detection interface groups are provided, when multiple events occur externally, signals of different events can be loaded on event notification interfaces of different event detection interface groups. After the software in the SOC chip 32 is powered on, the event receiving interface in each event response interface group is detected at the same time.

[0095] Phase 3: After the hardware in the SOC chip 32 is powered on, the software in the SOC chip 32 (ie, the second processing unit 3212 ) starts to be powered on.

[0096] When the second processing unit 3212 starts to power on, the level on the third interface 3213 is high, the switch circuit 33 remains on, the communication between the first interface 312 and the second interface 3221 is interrupted, and the second processing unit 3212 obtains external events through multiple event response interface groups. The process of the second processing unit 3212 obtaining external events can refer to the above-mentioned process of obtaining events after the second processing unit 3212 is powered on, and it will not be repeated here. In this process, the second processing unit 3212 can detect whether there is an external event at regular intervals. If there is an external event, it remains in the awake state; if there is no external event, it starts to enter the sleep state.

[0097] The fourth stage: the second processing unit 3212 is powered on and enters a normal working state. In this stage, the switch circuit 33 remains turned on, and the communication between the first interface 312 and the second interface 3221 remains interrupted.

[0098] Phase 5: The second processing unit 3212 detects that there is no external event within the set time interval and starts to power down, that is, to enter the sleep state. In this phase, the switch circuit 33 remains turned on, and the communication between the first interface 312 and the second interface 3221 is interrupted.

[0099] Stage 6: After the second processing unit 3212 is powered off, the hardware in the SOC chip 32 begins to power off, and the level on the pin in the third interface 3213 changes from a high level to a low level. During this process, the switch circuit 33 switches from being on to being interrupted, and the communication interruption between the first interface 312 and the second interface 3221 switches to normal communication. When the switch circuit 33 has not yet completely switched to being interrupted, the communication between the first interface 312 and the second interface 3221 is still in a state of interrupted communication. In this case, even if an external trigger signal is loaded on the first interface 312, the pin of the second interface 3221 will not receive the external trigger signal during the power-off process. Therefore, during the power-off process of the pin of the second interface 3221, the voltage on the pin will not be pulled down and then forced to be pulled up, and the hardware in the emergency module 321 will not be completely powered off and then powered on again, thereby effectively avoiding the occurrence of a freeze problem.

[0100] The AOV-based signal processing device provided by the present invention comprises an MCU chip and a SOC chip; the MCU chip comprises a plurality of event detection interface groups and a first processing unit; the SOC chip comprises an extraordinary electrical module, the extraordinary electrical module comprises a plurality of event response interface groups corresponding to the plurality of event detection interface groups, and a second processing unit; when the first processing unit detects the occurrence of an event, the event is sent to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group in the plurality of event detection interface groups; wherein the sending of the above-mentioned event occurs during the period when the extraordinary electrical module switches from a dormant state to an awake state in the AOV mode; the second processing unit detects the plurality of event response interface groups, and obtains the event when it detects that the first event response interface group receives the event. It can be seen from this that the present invention notifies and obtains the events that occur in the device capable of entering the AOV mode by setting a plurality of event detection interface groups and a plurality of event response interface groups. In this case, the notification and acquisition of the events are no longer affected by the switching process between the awake state and the dormant state in the AOV mode, and can solve the problem of event loss that is easy to occur when switching from the dormant state to the awake state in the prior art after entering the AOV mode, and can prevent the occurrence of event loss in the AOV mode.

[0101] On the basis of solving the problem of loss events, the embodiment of the present invention can also effectively prevent the SOC chip from freezing during the hardware power-off stage in the AOV mode by setting a switching circuit between the MCU chip and the SOC chip, thereby optimizing the performance of the device in the AOV mode and bringing many conveniences to actual production and life.

[0102] The AOV-based signal processing method provided by the present invention is described below. The AOV-based signal processing method described below and the AOV-based signal processing device described above can refer to each other.

[0103] Fig. 9 1 is a method flow chart of a signal processing method based on AOV provided by an embodiment of the present invention. The method is applied to the SOC chip in the AOV signal processing device 30 in the above embodiment, and the method includes the following S910~S920.

[0104] S910: Detect multiple event response interface groups.

[0105] It is detected whether each event response interface group in the plurality of event response interface groups receives an event.

[0106] S920: When it is detected that the first event response interface group among multiple event response interface groups has received an event, the event is obtained; wherein, the event comes from the MCU chip, and when the MCU chip detects the occurrence of the event, the event is sent to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among multiple event detection interface groups; the sending of the above event occurs during the period when the non-critical electrical module switches from a sleep state to a wake-up state in the AOV mode.

[0107] In some embodiments, each event detection interface group in multiple event detection interface groups includes: an event notification interface and an event confirmation interface; each event response interface group in multiple event response interface groups includes: an event receiving interface and an event response interface; in case of detecting that a first event response interface group in the multiple event response interface groups receives an event, obtaining the event, including: in case of detecting that an event receiving interface in the first event response interface group receives an event signal of an event, obtaining the event; and, sending a confirmation signal to an event confirmation interface in the first event detection interface group through the event response interface in the first event response interface group.

[0108] Fig.10 1 is a method flow chart of a signal processing method based on AOV provided by an embodiment of the present invention. The method is applied to the MCU chip in the signal processing device 30 based on AOV in the above embodiment, and the method includes the following S1010~S1020.

[0109] S1010: Detect whether an event occurs.

[0110] S1020: When an event is detected, the event is sent to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among multiple event detection interface groups, so as to instruct the SOC chip to obtain the event when it is detected that the first event response interface group has received the event; the sending of the above event occurs during the period when the non-critical electrical module switches from a sleep state to a wake-up state in the AOV mode.

[0111] In some embodiments, each event detection interface group in multiple event detection interface groups includes: an event notification interface and an event confirmation interface; each event response interface group in multiple event response interface groups includes: an event receiving interface and an event response interface; when an event is detected, the event is sent to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group in the multiple event detection interface groups, including: when an event is detected, an event signal of the event is sent through the event notification interface in the first event detection interface group; when it is detected that the event confirmation interface in the first event detection interface group receives the event signal of the event within a set time interval, it is determined that the event reception is successful.

[0112] Fig.11 An example of a physical structure diagram of an electronic device is shown in FIG. Fig.11 As shown, the electronic device may include: a processor 1110, a communication interface 1120, a memory 1130 and a communication bus 1140, wherein the processor 1110, the communication interface 1120 and the memory 1130 communicate with each other through the communication bus 1140. The processor 1110 may call the logic instructions in the memory 1130 to execute the AOV signal processing method, which is applied to the SOC chip or MCU chip in the above-mentioned AOV-based signal processing device. When the method is applied to the SOC chip in the above-mentioned AOV-based signal processing device, the method includes: detecting multiple event response interface groups; obtaining the event when detecting that the first event response interface group in the multiple event response interface groups receives the event; wherein the event comes from the MCU chip, and when the MCU chip detects the occurrence of the event, the MCU chip sends the event to the first event response interface group in the SOC chip corresponding to the first event detection interface group through the first event detection interface group in the multiple event detection interface groups; wherein the sending of the above-mentioned event occurs during the period when the non-normal electrical module switches from the sleep state to the wake-up state in the AOV mode.

[0113] The method is applied to the MCU chip in the above-mentioned AOV-based signal processing device, and the method includes: detecting whether an event occurs; when an event is detected, sending the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through a first event detection interface group among multiple event detection interface groups, so as to instruct the SOC chip to obtain the event when detecting that the first event response interface group has received the event; wherein the sending of the above-mentioned event occurs during the period when the non-critical electrical module switches from a sleep state to a wake-up state in the AOV mode.

[0114] In addition, the logic instructions in the above-mentioned memory 1130 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0115] On the other hand, the present invention further provides a computer program product, the computer program product includes a computer program, the computer program can be stored on a computer-readable storage medium, when the computer program is executed by a processor, the computer can execute the AOV-based signal processing method provided by the above methods, the method is applied to the SOC chip or MCU chip in the above AOV-based signal processing device; The method is applied to the SOC chip in the above-mentioned AOV-based signal processing device, and the method includes: detecting multiple event response interface groups; obtaining the event when it is detected that the first event response interface group among the multiple event response interface groups has received an event; wherein the event comes from the MCU chip, and when the MCU chip detects the occurrence of the event, the MCU chip sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the multiple event detection interface groups; wherein the sending of the above-mentioned event occurs during the period when the non-critical electrical module switches from a sleep state to a wake-up state in the AOV mode.

[0116] The method is applied to the MCU chip in the above-mentioned AOV-based signal processing device, and the method includes: detecting whether an event occurs; when an event is detected, sending the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through a first event detection interface group among multiple event detection interface groups, so as to instruct the SOC chip to obtain the event when detecting that the first event response interface group has received the event; wherein the sending of the above-mentioned event occurs during the period when the non-critical electrical module switches from a sleep state to a wake-up state in the AOV mode.

[0117] In another aspect, the present invention further provides a computer-readable storage medium having a computer program stored thereon, which is implemented when the computer program is executed by a processor to execute the AOV-based signal processing method provided by the above methods, and the method is applied to the SOC chip or MCU chip in the above AOV-based signal processing device; The method is applied to the SOC chip in the above-mentioned AOV-based signal processing device, and the method includes: detecting multiple event response interface groups; obtaining the event when it is detected that the first event response interface group among the multiple event response interface groups has received an event; wherein the event comes from the MCU chip, and when the MCU chip detects the occurrence of the event, the MCU chip sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the multiple event detection interface groups; wherein the sending of the above-mentioned event occurs during the period when the non-critical electrical module switches from a sleep state to a wake-up state in the AOV mode.

[0118] The method is applied to the MCU chip in the above-mentioned AOV-based signal processing device, and the method includes: detecting whether an event occurs; when an event is detected, sending the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through a first event detection interface group among multiple event detection interface groups, so as to instruct the SOC chip to obtain the event when detecting that the first event response interface group has received the event; wherein the sending of the above-mentioned event occurs during the period when the non-critical electrical module switches from a sleep state to a wake-up state in the AOV mode.

[0119] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0120] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0121] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A signal processing device based on low-power full-time video recording AOV, characterized in that: include: Microcontroller unit MCU chip and system on chip SOC chip; The MCU chip includes a plurality of event detection interface groups and a first processing unit; The SOC chip includes an extraordinary electrical module, the extraordinary electrical module includes a plurality of event response interface groups corresponding one-to-one to the plurality of event detection interface groups, and a second processing unit; When the first processing unit detects the occurrence of an event, the first processing unit sends the event to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the multiple event detection interface groups; wherein the sending of the event occurs during the period when the non-normal power module switches from a sleep state to a wake-up state in the AOV mode; The second processing unit detects the plurality of event response interface groups, and acquires the event when detecting that the first event response interface group receives the event.

2. The AOV-based signal processing device according to claim 1, characterized in that: Also includes: Switching circuit; The MCU chip further includes: a first interface for sending an interrupt signal; the SOC chip further includes a normal power module, the normal power module includes a second interface for receiving the interrupt signal, and the non-normal power module further includes a third interface for powering on the module; The first interface, the second interface and the third interface are all connected to the switch circuit; In the AOV mode, the non-critical electrical module switches from a dormant state to a wake-up state, the level on the third interface undergoes a first change from a low level to a high level, the switch circuit switches from an interrupt to a conduction after the first change occurs, and the communication between the first interface and the second interface is interrupted when the switch circuit is conducted; In AOV mode, the non-critical electrical module switches from the awake state to the sleep state, the level on the third interface undergoes a second change from a high level to a low level, and the switch circuit switches from on to off after the second change occurs. When the switch circuit is interrupted, the first interface and the second interface communicate normally.

3. The AOV-based signal processing device according to claim 2, characterized in that: Also includes: An RC delay circuit is provided between the first interface and the second interface.

4. The AOV-based signal processing device according to claim 1, characterized in that: Each of the plurality of event detection interface groups includes: an event notification interface and an event confirmation interface; each of the plurality of event response interface groups includes: an event receiving interface and an event response interface; When the first processing unit detects the occurrence of an event, the first processing unit sends the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through a first event detection interface group among the multiple event detection interface groups, including: When the first processing unit detects the occurrence of the event, it sends an event signal of the event to the event receiving interface in the first event response interface group through the event notification interface in the first event detection interface group; when it is detected that the event confirmation interface in the first event detection interface group receives a confirmation signal within a set time interval, it determines that the event is received successfully; When the second processing unit detects that the first event response interface group receives the event, acquiring the event includes: The second processing unit obtains the event when it detects that the event receiving interface in the first event response interface group receives the event signal of the event; and sends the confirmation signal to the event confirmation interface in the first event detection interface group through the event response interface in the first event response interface group.

5. The AOV-based signal processing device according to claim 4, characterized in that: When the first processing unit detects the occurrence of an event, the first processing unit sends the event to a first event response interface group corresponding to the first event detection interface group in the SOC chip through a first event detection interface group among the multiple event detection interface groups, and further includes: The first processing unit determines a second event detection interface group from among the plurality of event detection interface groups when it is detected by the first processing unit within a set time interval that the event confirmation interface in the first event detection interface group has not received the confirmation signal; The first processing unit sends an event signal of the event to the event receiving interface in the second event response interface group through the event notification interface in the second event detection interface group; the second event response interface group corresponds to the second event detection interface group.

6. A signal processing method based on AOV, characterized in that: The SOC chip used in the AOV signal processing device according to any one of claims 1 to 5, the method comprising: Detecting multiple event response interface groups; When it is detected that the first event response interface group among the multiple event response interface groups has received an event, the event is obtained; wherein, the event comes from the MCU chip, and when the MCU chip detects the occurrence of the event, the event is sent to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among the multiple event detection interface groups; wherein the sending of the event occurs during the period when the non-normal electrical module switches from a sleep state to a wake-up state in the AOV mode.

7. The AOV-based signal processing method according to claim 6, characterized in that: Each of the plurality of event detection interface groups includes: an event notification interface and an event confirmation interface; each of the plurality of event response interface groups includes: an event receiving interface and an event response interface; The step of acquiring the event when detecting that the first event response interface group among the plurality of event response interface groups has received an event comprises: In case of detecting that the event receiving interface in the first event response interface group receives the event signal of the event, acquiring the event; and, The confirmation signal is sent to the event confirmation interface in the first event detection interface group through the event response interface in the first event response interface group.

8. A signal processing method based on AOV, characterized in that: The MCU chip used in the AOV signal processing device according to any one of claims 1 to 5, the method comprising: Detect whether an event has occurred; When an event is detected, the event is sent to the first event response interface group corresponding to the first event detection interface group in the SOC chip through the first event detection interface group among multiple event detection interface groups, so as to instruct the SOC chip to obtain the event when it is detected that the first event response interface group has received the event; wherein the sending of the event occurs during the period when the non-critical electrical module switches from a sleep state to a wake-up state in the AOV mode.

9. The AOV-based signal processing method according to claim 8, characterized in that: Each of the plurality of event detection interface groups includes: an event notification interface and an event confirmation interface; each of the plurality of event response interface groups includes: an event receiving interface and an event response interface; The method of, when an event is detected, sending the event to a first event response interface group in the SOC chip corresponding to the first event detection interface group through a first event detection interface group among the multiple event detection interface groups, comprises: When the occurrence of the event is detected, sending an event signal of the event through the event notification interface in the first event detection interface group; In the case where it is detected within a set time interval that the event confirmation interface in the first event detection interface group receives the event signal of the event, it is determined that the event is received successfully.

10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the AOV-based signal processing method according to any one of claims 6 to 7 or the AOV-based signal processing method according to any one of claims 8 to 9 is implemented.

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