Double-sided circuit board and manufacturing method thereof

Abstract

The invention discloses a double-sided circuit board and a manufacturing method thereof, and relates to the technical field of electronic circuit additive manufacturing. The manufacturing method comprises the following steps: preparing a laminated body; the laminated body comprises an insulating layer with a first surface and a second surface which are vertically opposite to each other, and a metal foil layer formed on the first surface of the insulating layer; a blind hole penetrating through the insulating layer and directly abutting against the metal foil layer is formed; forming a printed circuit pattern on the second surface of the insulating layer by using conductive slurry, and filling the blind hole to form a conductive column for realizing conductive interconnection between the printed circuit pattern and the metal foil layer; a plated circuit pattern is formed on the printed circuit pattern by electroplating, and an etched circuit pattern is formed by etching the metal foil layer. According to the method, the printing process and the etching process are combined, so that the production efficiency of the circuit board can be effectively improved, and the waste and pollution treatment cost is reduced.

Description

Technical Field

[0001] The present invention belongs to the technical field of electronic circuit additive manufacturing, and in particular relates to a double-sided circuit board and a manufacturing method thereof. Background Art

[0002] Double-sided or multi-layer circuit boards on the market are mostly produced and processed using chemical etching technology. Although the technology is mature and can meet the production and processing of higher-precision circuit patterns, it has low production efficiency, high environmental pollution, and high waste costs and pollution treatment costs. Summary of the invention

[0003] In view of this, an object of the present invention is to provide a circuit board and a method for manufacturing the same, so as to solve the problems of low production efficiency, high environmental pollution, high waste cost and high pollution treatment cost of traditional circuit board processes.

[0004] In some illustrative embodiments, the method for manufacturing the double-sided circuit board includes: preparing a stack; the stack includes: an insulating layer having a first side and a second side vertically opposite to each other, and a metal foil layer formed on the first side of the insulating layer; opening a blind hole that penetrates the insulating layer and reaches the metal foil layer; using a conductive paste to form a printed circuit pattern on the second side of the insulating layer, and filling the blind hole to form a conductive column that realizes conductive interconnection between the printed circuit pattern and the metal foil layer; electroplating on the printed circuit pattern to form a plated circuit pattern, and etching the metal foil layer to form an etched circuit pattern.

[0005] In some optional embodiments, the minimum line width and / or minimum line distance of the printed circuit pattern is greater than that of the etched circuit pattern.

[0006] In some optional embodiments, the laying density of the printed circuit pattern on the insulating layer is lower than that of the etched circuit pattern.

[0007] In some optional embodiments, the printed circuit pattern includes: at least two independent printed circuit units on the second surface of the insulating layer, and the printed circuit units are electrically connected to the metal foil layer through corresponding conductive pillars.

[0008] In some optional embodiments, before electroplating to form a plated circuit pattern on the printed circuit pattern, it also includes: using the stacked structure formed with the printed circuit pattern and the conductive column as a semi-process circuit board, and temporarily bonding two semi-process circuit boards on the surface where the metal foil layer is located to mask their respective metal foil layers.

[0009] In some optional embodiments, after forming plated circuit patterns on the printed circuit patterns exposed on both sides of the combined structure by electroplating, the semi-processed circuit board is separated and restored.

[0010] In some optional embodiments, temporary bonding of the two half-process circuit boards is achieved through an adhesive layer.

[0011] In some optional embodiments, the adhesive layer includes: a stacked first adhesive layer, a carrier layer and a second adhesive layer; wherein the structural strength of the carrier layer is greater than that of the first adhesive layer and / or the second adhesive layer; and the adhesion of the first adhesive layer and / or the second adhesive layer to the carrier layer is greater than the adhesion to the semi-process circuit board.

[0012] In some optional embodiments, the process of etching the metal foil layer to form an etched circuit pattern includes: forming a photoresist layer on the plated circuit pattern and the metal foil layer, and forming the etched circuit pattern by exposure, development, and etching, and finally stripping the film to remove the remaining photoresist layer on the plated circuit pattern and the metal foil layer.

[0013] In some optional embodiments, before the blind hole is opened through the insulating layer and reaches the metal foil layer, it also includes: forming a primer layer on the second surface of the insulating layer, and the blind hole penetrates the primer layer; wherein the primer layer is used to improve the adhesion of the conductive paste on the insulating layer.

[0014] In some optional embodiments, after electroplating on the printed circuit pattern to form a plated circuit pattern, and etching the metal foil layer to form an etched circuit pattern, it also includes: forming a covering layer on the etched circuit pattern and / or the plated circuit pattern; wherein the covering layer shields part or all of the etched circuit pattern and / or the plated circuit pattern.

[0015] Another object of the present invention is to provide a circuit board to solve the technical problems in the prior art.

[0016] In some illustrative embodiments, the double-sided circuit board is obtained by any of the manufacturing methods described above.

[0017] Compared with the prior art, this application has the following advantages:

[0018] The present invention can effectively improve the production efficiency of circuit boards and reduce waste and pollution treatment costs by combining the printing process with the etching process. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is an example of a process of a method for manufacturing a circuit board in an embodiment of the present invention;

[0020] Figure 2 This is a process example 1 of the method for manufacturing a circuit board in an embodiment of the present invention;

[0021] Figure 3 This is a second process example of the method for manufacturing a circuit board in an embodiment of the present invention;

[0022] Figure 4 This is an example of an island structure of a circuit board in an embodiment of the present invention. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0024] It should be noted that the various technical features in the embodiments of the present invention can be combined with each other without conflict.

[0025] The present invention discloses a method for manufacturing a circuit board. Specifically, Figure 1-4 As shown, Figure 1 This is an example of a process of a method for manufacturing a circuit board in an embodiment of the present invention; Figure 2 This is a process example 1 of the method for manufacturing a circuit board in an embodiment of the present invention; Figure 3 This is a second process example of the method for manufacturing a circuit board in an embodiment of the present invention; Figure 4 This is an example of an island structure of a circuit board in an embodiment of the present invention. The method for manufacturing the circuit board comprises:

[0026] Step S11, preparing a stacked body;

[0027] The laminate includes: an insulating layer 110 having a first surface and a second surface vertically opposite to each other, and a metal foil layer 210 formed on the first surface of the insulating layer 110;

[0028] The insulating layer 110 in the embodiment of the present invention may be a hard board or a soft board. The hard board includes but is not limited to: FR-4, CEM-1, 22F, CEM-3, wood, glass, plastic, PMMA (Acrylic), etc.; the soft board includes but is not limited to PET, PVC, PU, ​​PC, PP, PA, PI, CPI (transparent PI), TPE, TPU, TPV, etc.;

[0029] The metal foil layer 210 in the embodiment of the present invention includes, but is not limited to, gold, silver, copper, iron, aluminum, zinc, nickel, etc. The metal foil layer 210 may also include a conductive alloy material with the aforementioned materials as main components.

[0030] Optionally, the metal foil layer 210 may be formed on the insulating layer 110 by lamination or deposition (chemical deposition, evaporation or sputtering), etc., which is not limited in the present invention.

[0031] Optionally, for a laminate formed by laminating the metal foil layer 210 on the insulating layer 110 , a third adhesive layer 830 may be further provided between the insulating layer 110 and the metal foil layer 210 to ensure a tight bond between the two.

[0032] Step S12, opening a blind hole penetrating the insulating layer 110 and directly reaching the metal foil layer 210;

[0033] The blind hole in the embodiment of the present invention is not limited to being realized by mechanical drilling or laser drilling, and can be specifically etched from the second surface of the insulating layer 110 until the metal foil layer 210 is etched.

[0034] Optionally, for an embodiment of a laminate including a third adhesive layer, the blind hole also penetrates the third adhesive layer and reaches the metal foil layer 210 .

[0035] Optionally, after the blind hole processing is completed, it can also include: using a plasma plasma generator to clean the blind hole, so as to remove the residual insulating layer and / or the third adhesive layer, and expose the complete metal surface at the bottom of the blind hole as much as possible, so as to improve the reliability of subsequent conductive interconnection and reduce contact resistance.

[0036] Preferably, the temperature of the insulating layer and / or the third adhesive layer can be controlled to reach the glass transition temperature of the material, and then the blind hole cleaning process can be performed by plasma, which can effectively improve the removal effect of residual impurities.

[0037] Step S13, using a conductive paste to form a printed circuit pattern 310 on the second surface of the insulating layer 110, and filling blind holes to form conductive pillars 510 for achieving conductive interconnection between the printed circuit pattern 310 and the metal foil layer 210;

[0038] The printed circuit pattern 310 and the conductive pillar 510 may be formed by one printing process or may be formed separately by multiple printing processes, which is not limited in the present application.

[0039] Furthermore, when both are formed separately through multiple printings, the forming order of the conductive column 510 and the printed circuit pattern 310 can be reversed, depending on actual needs, that is, the hole can be plugged first and then the surface can be printed, or the surface can be printed first and then the hole can be plugged. This application does not impose any restrictions on this.

[0040] Optionally, the printing process used for the conductive paste in the embodiment of the present invention includes but is not limited to screen printing, direct writing printing, inkjet printing, etc.

[0041] Preferably, when the screen printing process is adopted, the printed circuit pattern 310 and the conductive column 510 can be formed separately through at least two printing processes, so that different printing parameters (such as the scraper pressure (degree of downward pressure) of screen printing) can be adjusted in the printing processes with different requirements for the printed circuit pattern 310 and the conductive column 510 to meet the surface forming and plugging forming quality.

[0042] The conductive paste in the embodiment of the present invention refers to a composite low-temperature conductive paste mainly composed of a conductive filler, a resin binder and a solvent. After the paste is fully cured, the solvent will fully evaporate, thereby converting it into a conductive film in which the conductive filler is bound by the resin film-forming material.

[0043] The conductive filler is not limited to one or at least two of metal particles, graphene, conductive carbon black, carbon nanotubes, and conductive particles such as core-shell structures; the metal particles are not limited to one or at least two of gold, silver, copper, iron, nickel, zinc, and silver-coated copper powder; the resin binder can be any resin on the market, including but not limited to one or at least two of epoxy resin, acrylic resin, naphthalene-containing epoxy resin, polyaromatic epoxy resin, multifunctional epoxy resin, bismaleimide resin, and polyimide resin. The present application does not limit the selection of solvents.

[0044] The curing method of the conductive paste in the embodiment of the present invention is not limited to thermosetting, photocuring, electromagnetic radiation or other curing methods, and a corresponding curing initiator can be selected or added according to actual needs.

[0045] In the process of applying curing conditions to the conductive paste, the insulating layer and / or the third adhesive layer may also be affected accordingly, resulting in shrinkage and expansion deformation of the insulating layer and / or the third adhesive layer. However, due to the presence of the metal foil layer tightly combined with the insulating layer / the third adhesive layer, the metal foil layer that is not affected by the curing conditions can effectively hinder the shrinkage and expansion of the insulating layer and / or the third adhesive layer, thereby ensuring the molding quality of the circuit board and reducing the difficulty of alignment compensation calculation in the corresponding process.

[0046] Step S14, electroplating to form a plated circuit pattern 410 on the printed circuit pattern 310;

[0047] The function of the plated circuit pattern 410 is mainly to improve one or more of the conductivity, stability, solderability, oxidation resistance, surface properties, etc. of the printed circuit pattern 310 .

[0048] In some embodiments, the metal foil layer 210 in the embodiments of the present invention can directly use a metal foil of a target thickness, so as to directly produce an etched circuit pattern 210E of a target thickness through a chemical etching process, and therefore, there is no need to increase the plating thickness of the surface of the metal foil layer 210; therefore, the metal foil layer 210 can be shielded before step S14 to prevent contact with the plating solution.

[0049] Since the printed circuit pattern needs to be electroplated to improve its conductivity and surface properties, if a thin metal foil is used to be thickened to the target thickness through the electroplating process, it is difficult to control the accuracy in actual production, mainly because the conductive materials on both sides are different, so the same parameters in the electroplating process are difficult to produce the same electroplating effect on both sides. During electroplating, the coating generation rate of the metal foil surface is often much higher than that of the printed circuit surface, and it is difficult to take into account the electroplating parameters of both sides in one electroplating process. If electroplating is performed separately, it is necessary to add cumbersome processes, which greatly reduces production efficiency and the actual cost is difficult to estimate. Therefore, in the embodiment of the present invention, by only electroplating the printed circuit pattern to form a plated circuit pattern, the thickness and other parameters of the plated circuit pattern can be effectively controlled.

[0050] Furthermore, since the printed circuit pattern 310 located on the second surface of the insulating layer 110 is conductively interconnected with the entire metal foil layer 210 located on the first surface of the insulating layer 110, the metal foil layer 210 can improve the conductivity of the printed circuit pattern 310, thereby effectively improving the electroplating efficiency of the printed circuit pattern 310 during the electroplating process; at the same time, since the metal foil layer 210 is attached to the entire surface of the insulating layer 110 and thus covers the area of ​​the printed circuit pattern 310, the resistance distribution difference of the printed circuit pattern 310 can be reduced, and the surface flatness of the plating layer (plated circuit pattern) can be improved;

[0051] Furthermore, if Figure 4 As shown, the entire metal foil layer 210 is completely conductively interconnected with the printed circuit pattern 310 on the other side, which can support the requirement that the printed circuit pattern 310 includes an island structure (i.e., at least two independent printed circuit units 31U on the second surface of the insulating layer 110, and the printed circuit units 31U are electrically connected to the metal foil layer 210 through corresponding conductive columns 510), without the need to design additional electroplating leads for the island structure, and at the same time, there is no need to add an additional process for removing the electroplating leads.

[0052] In some embodiments, the plated metal includes, but is not limited to, gold, silver, copper, iron, aluminum, zinc, nickel, and the like.

[0053] Step S15 , etching the metal foil layer 210 to form an etched circuit pattern 210E.

[0054] Among them, the etching treatment of the metal foil layer can be carried out by traditional chemical etching, that is, covering the metal foil layer with an anti-etching agent / film, and then obtaining an etched circuit pattern through processes such as exposure, development, etching, and film stripping. This is the prior art and this application will not elaborate on it.

[0055] In some embodiments, before etching the metal foil layer 210 to form the etched circuit pattern 210E, a temporary protection layer 900 may be used to shield the plated circuit pattern 410 to prevent the plated circuit pattern 410 from being affected by etching.

[0056] In some embodiments, the order of step S14 and step S15 may be reversed.

[0057] The present invention can effectively improve the production efficiency of circuit boards and reduce waste and pollution treatment costs by combining the printing process with the etching process.

[0058] The applicant has found that there is a phenomenon in many double-sided circuit boards on the market, that is, the circuit patterns on both sides of the double-sided circuit boards, the circuit patterns on one side are usually more complex and laid densely than the circuit patterns on the other side (that is, the circuit actually occupies more area within the specified range), while the side with a smaller laying density is mainly used as an auxiliary circuit on the other side. Therefore, in general, the side with a larger laying density has higher precision requirements for parameters such as line width / line spacing due to denser circuits, while the other side actually does not have high requirements for precision. Therefore, in the embodiments of the present invention, a metal foil layer can be used to obtain an etched circuit pattern with higher precision by etching, and a printed circuit pattern (and plated circuit pattern) with lower precision requirements can be formed by printing and electroplating, which does not affect the molding quality of such circuit boards, and is also applicable to the manufacturing method combining etching and printing in the embodiments of the present invention.

[0059] Furthermore, since the etching target is directed toward the side with a higher laying density, the amount of metal foil actually etched away is greatly reduced. While ensuring quality, the waste cost and pollution treatment cost can be effectively reduced.

[0060] In some embodiments, the minimum line width and / or minimum line distance of the printed circuit pattern 310 in the embodiments of the present invention is greater than that of the etched circuit pattern 210E.

[0061] In some embodiments, the printed circuit patterns 310 are laid out at a density lower than that of the etched circuit patterns 210E on the insulating layer 110 .

[0062] Optionally, the minimum line pitch and / or minimum line width of the etched circuit pattern 210E may be in the range of 1-100 μm, and the minimum line pitch and / or minimum line width of the printed circuit pattern 310 may be in the range of 2-200 μm.

[0063] Those skilled in the art should understand that although the two ranges overlap, the minimum line spacing and / or minimum line width of the etched circuit pattern can be selected to be smaller than the actual parameters of the minimum line spacing and / or minimum line width of the printed circuit pattern according to needs.

[0064] In some embodiments, before electroplating on the printed circuit pattern to form a plated circuit pattern, the method may further include:

[0065] The stacked structure formed with the printed circuit pattern 310 and the conductive pillar 510 is used as a half-process circuit board, and two half-process circuit boards are temporarily bonded together with the surface where the metal foil layer 210 is located, and the metal foil layers 210 of each are shielded;

[0066] Thus, after the plated circuit pattern 410 is formed on the printed circuit pattern 310 exposed on both sides of the combined structure by electroplating, the semi-processed circuit board is separated and restored.

[0067] After the electroplating process is completed, the two temporarily combined half-process circuit boards are separated and restored into two half-process circuit boards, thereby exposing the metal foil layer 210 so as to facilitate etching of the metal foil layer 210 .

[0068] In this embodiment, two half-process circuit boards are temporarily bonded together with the metal foil layer 210 on the surface thereof through the adhesive layer 800 to shield the respective metal foil layers 210 , thereby saving additional shielding materials and additional cleaning steps.

[0069] In some embodiments, temporary bonding of two half-process circuit boards can be achieved through an adhesive layer. Specifically, the adhesive layer 800 may include: a stacked first adhesive layer 810, a carrier layer 80A, and a second adhesive layer 820; wherein the structural strength of the carrier layer 80A is greater than the first adhesive layer 810 and / or the second adhesive layer 820; and the adhesion of the first adhesive layer 810 and / or the second adhesive layer 820 to the carrier layer 80A is greater than the adhesion to the half-process circuit board.

[0070] Through the design of the carrier layer and the double-sided adhesive layer and the adhesion between them, on the one hand, the problem that the single adhesive layer is difficult to peel off due to lack of structural strength is solved, making the adhesive layer easier to remove; on the other hand, the addition of a carrier layer with a certain structural strength is conducive to reducing bubbles between the colloid bonding surfaces, making the bonding surfaces tighter, and avoiding leakage of the plating liquid causing undesirable plating on the metal foil layer.

[0071] Optionally, the carrier layer includes but is not limited to a non-adhesive soft board or a hard board.

[0072] Among them, the surface of the metal foil layer of the separated semi-process circuit board may have residual glue due to the quality of the colloid, so the residual glue on the surface of the metal foil layer can be removed after the separation, thereby reducing the impact on the subsequent etching process.

[0073] Optionally, the process of separating two half-process circuit boards and exposing the metal foil layer in the embodiment of the present invention may include: after separating the two half-process circuit boards, micro-etching the metal foil layer to remove the residual glue on the metal foil layer. The micro-etching degree may be 0.1-3μm; preferably, the micro-etching degree may be 0.1-1μm.

[0074] Among them, the advantage of removing residual glue by micro-etching in this process compared with the Plasma plasma generator is that the entire surface of residual glue can be processed at the same time, which can effectively improve the removal efficiency.

[0075] In some embodiments, the process of etching the metal foil layer to form an etched circuit pattern may include: forming a photoresist layer on the plated circuit pattern and the metal foil layer, and forming an etched circuit pattern through exposure, development, and etching, and finally removing the remaining photoresist layer on the plated circuit pattern and the metal foil layer by stripping.

[0076] Among them, the photoresist layer in this embodiment is not limited to a positive or negative photoresist layer. Its purpose is to protect the plated circuit pattern during the etching stage, and the area of ​​the metal foil layer that is not the target pattern is etched away to obtain an etched circuit pattern, and finally remove the plated circuit pattern and all the remaining photoresist layers on the metal foil layer through a film stripping process.

[0077] In other embodiments, the temporary protection layer material for shielding the plated circuit pattern may also be other materials, not limited to the photoresist layer, as long as it can protect the plated circuit pattern during the etching process and can be removed after the etching is completed.

[0078] In some embodiments, before opening a blind hole penetrating the insulating layer and reaching the metal foil layer, the method further includes: forming a primer layer on the second surface of the insulating layer, wherein the blind hole penetrates the primer layer; wherein the primer layer is used to enhance the adhesion of the conductive paste on the insulating layer.

[0079] In some embodiments, after electroplating on the printed circuit pattern to form a plated circuit pattern, and etching the metal foil layer to form an etched circuit pattern, the method further includes: forming a covering layer (i.e., a first covering layer 710 and a second covering layer 720) on the etched circuit pattern and / or the plated circuit pattern. The covering layer shields part or all of the etched circuit pattern and / or the plated circuit pattern.

[0080] The area exposed by the covering layer of the etching circuit pattern and / or the plating circuit pattern is not limited to being used for gold fingers, pads, etc.

[0081] Optionally, the cover layer may be attached to the plated circuit pattern and the etched circuit pattern through a fourth adhesive layer and a fifth adhesive layer.

[0082] Another object of the present invention is to provide a circuit board, which can be obtained by any of the above-mentioned manufacturing methods.

[0083] In some embodiments, the circuit board in the embodiments of the present invention may include: an insulating layer 110, an etched circuit pattern 210E located on the first surface of the insulating layer 110, a printed circuit pattern 310 located on the second surface of the insulating layer 110, and a plated circuit pattern 410 attached to the surface of the printed circuit pattern 310; wherein the etched circuit pattern 210E is connected to the printed circuit pattern 310 on the other side through a conductive column 510 that penetrates the insulating layer 110, thereby realizing a double-sided board structure with conductive interconnection.

[0084] In some embodiments, a primer layer may be provided between the second surface of the insulating layer and the printed circuit pattern.

[0085] In some embodiments, covering layers (ie, a first covering layer 710 and a second covering layer 720 ) may be further provided on both sides of the insulating layer; wherein the covering layers cover a part or all of the etching circuit pattern and / or the plating circuit pattern.

[0086] In some embodiments, the minimum line width and / or minimum line distance of the printed circuit pattern 310 in the embodiments of the present invention is greater than that of the etched circuit pattern 210E.

[0087] In some embodiments, the printed circuit pattern is laid out on the insulating layer at a density lower than that of the etched circuit pattern.

[0088] The minimum line spacing and / or minimum line width of the etched circuit pattern may range from 1 to 100 μm, while the minimum line spacing and / or minimum line width of the printed circuit pattern may range from 2 to 200 μm. It should be understood by those skilled in the art that, although there is an overlap between the two ranges, the minimum line spacing and / or minimum line width of the etched circuit pattern may be selected to be smaller than the actual parameters of the minimum line spacing and / or minimum line width of the printed circuit pattern according to requirements.

[0089] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for manufacturing a double-sided circuit board, characterized in that: include: Prepare a layer of laminate; The laminated body comprises: an insulating layer having a first surface and a second surface vertically opposite to each other, and a metal foil layer formed on the first surface of the insulating layer; Opening a blind hole that penetrates the insulating layer and reaches the metal foil layer; Forming a printed circuit pattern on the second surface of the insulating layer using a conductive paste, and filling the blind hole to form a conductive column for realizing conductive interconnection between the printed circuit pattern and the metal foil layer; A plated circuit pattern is formed by electroplating on the printed circuit pattern, and an etched circuit pattern is formed by etching the metal foil layer.

2. The method according to claim 1, characterized in that: The minimum line width and / or minimum line spacing of the printed circuit pattern is greater than that of the etched circuit pattern; and / or, The laying density of the printed circuit pattern on the insulating layer is smaller than that of the etched circuit pattern.

3. The method according to claim 1, characterized in that: The printed circuit pattern includes: at least two printed circuit units that are independent of each other on the second surface of the insulating layer, and the printed circuit units are electrically connected to the metal foil layer through corresponding conductive pillars.

4. The method according to claim 1, characterized in that: Before electroplating on the printed circuit pattern to form a plated circuit pattern, the method further comprises: Using the laminated structure formed with the printed circuit pattern and the conductive pillars as a semi-processed circuit board, temporarily laminating two semi-processed circuit boards on the surface where the metal foil layer is located, and shielding the respective metal foil layers; and After forming plated circuit patterns on the printed circuit patterns exposed on both sides of the combined structure by electroplating, the semi-processed circuit board is separated and restored.

5. The manufacturing method according to claim 4, characterized in that: The temporary bonding of the two half-process circuit boards is achieved through the adhesive layer.

6. The method according to claim 5, characterized in that: The adhesive layer includes: a stacked first adhesive layer, a carrier layer and a second adhesive layer; wherein the structural strength of the carrier layer is greater than that of the first adhesive layer and / or the second adhesive layer; and the adhesion of the first adhesive layer and / or the second adhesive layer to the carrier layer is greater than the adhesion to the half-process circuit board.

7. The manufacturing method according to claim 1, characterized in that: The process of etching the metal foil layer to form an etching circuit pattern includes: A photoresist layer is formed on the plated circuit pattern and the metal foil layer, and the etched circuit pattern is formed by exposure, development and etching. Finally, the remaining photoresist layer on the plated circuit pattern and the metal foil layer is removed by stripping.

8. The manufacturing method according to claim 1, characterized in that: Before the blind hole is formed through the insulating layer and directly reaches the metal foil layer, the method further comprises: A primer layer is formed on the second surface of the insulating layer, and the blind hole penetrates the primer layer; wherein the primer layer is used to improve the adhesion of the conductive paste on the insulating layer.

9. The manufacturing method according to claim 1, characterized in that: After electroplating on the printed circuit pattern to form a plated circuit pattern, and etching the metal foil layer to form an etched circuit pattern, the method further comprises: A covering layer is formed on the etching circuit pattern and / or the plating circuit pattern; wherein the covering layer shields a part or the whole of the etching circuit pattern and / or the plating circuit pattern.

10. A double-sided circuit board, characterized in that: Obtained by the preparation method according to any one of claims 1 to 9.

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