Array substrate and display panel

Abstract

The invention discloses an array substrate and a display panel. The array substrate comprises a substrate layer, a gate drive circuit and a first isolation layer, the substrate layer is provided with a gate drive area and a display drive area, the gate drive area is located on the periphery of the display drive area, and the gate drive area is provided with a first sinking groove; the gate drive circuit is arranged in the first sinking groove; the first isolation layer is arranged in the first sinking groove and covers the gate drive circuit. The display panel comprises an opposite substrate and an array substrate, and the opposite substrate is opposite to the array substrate. According to the technical scheme, the TFT switching characteristic in the gate drive circuit can be effectively stabilized, and the situation that the display function is abnormal is reduced.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and specifically relates to an array substrate and a display panel. Background Art

[0002] In the display field, oxide semiconductor is known as an ideal semiconductor due to its low manufacturing cost and high mobility. However, due to its unique structural characteristics, the TFT (Thin Film Transistor) in the GOA (Gate On Array) area is particularly susceptible to external factors such as water vapor, causing TFT characteristics to drift and subthreshold swing to be abnormal, resulting in failure of TFT switching characteristics and display functional abnormalities. Summary of the invention

[0003] The purpose of the present application is to provide an array substrate that can effectively stabilize the TFT switching characteristics in a gate drive circuit and reduce display function abnormalities.

[0004] Other features and advantages of the present application will become apparent from the following detailed description, or may be learned in part by the practice of the present application.

[0005] According to one aspect of an embodiment of the present application, the present application provides an array substrate, the array substrate comprising:

[0006] A substrate layer, wherein the substrate layer is provided with a gate driving area and a display driving area, the gate driving area is located at the periphery of the display driving area, and the gate driving area is provided with a first sink groove;

[0007] A gate driving circuit, wherein the gate driving circuit is disposed in the first sink;

[0008] A first insulating layer is disposed in the first sink and covers the gate driving circuit.

[0009] In one aspect, the gate drive circuit includes a first drive layer and a second drive layer, the second drive layer and the first drive layer are stacked in the thickness direction of the substrate layer, the first drive layer and the second drive layer are electrically connected, and the first drive layer is arranged in the first groove.

[0010] In one aspect, the array substrate further comprises an isolation plate, the isolation plate is disposed between the first drive layer and the second drive layer, the isolation plate is provided with a plurality of wire holes, and the second drive layer and the first drive layer are electrically connected through the wire holes;

[0011] The first insulating layer is filled in the first sink and wraps the second driving layer.

[0012] In one aspect, the isolation plate is made of the same material as the substrate layer, the upper surface of the isolation plate is flush with the upper surface of the substrate layer, and the second driving layer is disposed on the upper surface of the isolation plate.

[0013] In one aspect, the depth of the first sink is h1, and the thickness of the substrate layer is h, then: h1≤h / 2.

[0014] In one aspect, the substrate layer is further provided with an electrostatic discharge area, and the electrostatic discharge area is provided with a second sink;

[0015] The array substrate also includes an electrostatic discharge structure, a second isolation layer and a wiring layer. The electrostatic discharge structure is arranged in the second sink groove, the second isolation layer covers the electrostatic discharge structure, the second isolation layer is provided with a wiring hole, the wiring layer is passed through the wiring hole and is electrically connected to the electrostatic discharge structure.

[0016] In one aspect, the second sink is disposed between the gate driving area and the display driving area;

[0017] Alternatively, the first sink groove is arranged on the left side and / or the right side of the display driving area, and the second sink groove is arranged on the upper side and / or the lower side of the display driving area.

[0018] In one aspect, the array substrate further comprises a sealant, the sealant is disposed on the substrate layer and on the same side as the first insulating layer, and the sealant is located on a side of the gate driving area away from the display driving area;

[0019] The height of the first insulating layer protruding from the surface of the substrate layer is H1, and the height of the sealant protruding from the surface of the substrate layer is H, then: H1<H is satisfied.

[0020] In one aspect, the array substrate further comprises a display driving circuit and a connecting line, the display driving circuit is arranged in the display driving area, and a connecting hole is arranged on a side of the first insulating layer close to the display driving area;

[0021] The connection wires are passed through the connection holes and are electrically connected to the gate driving circuit and the display driving circuit respectively. The gate driving circuit includes at least one oxide thin film transistor.

[0022] In addition, in order to solve the above-mentioned problem, the present application further provides a display panel, which includes an opposing substrate such as the array substrate described above, and the opposing substrate is opposite to the array substrate.

[0023] In the present application, the gate drive circuit is disposed in the first sink, and the gate drive circuit is covered by the first insulating layer to isolate the gate drive circuit from the external environment. In this way, it is difficult for water vapor in the external environment to enter the gate drive circuit, thereby reducing the influence of water vapor on the gate drive circuit. This stabilizes the TFT switching characteristics in the gate drive circuit and reduces the abnormality of the display function.

[0024] It should be understood that the above general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present application, and together with the specification are used to explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0026] Figure 1 The schematic diagram of the planar structure of the first sink groove set in the array substrate in the present application is schematically shown.

[0027] Figure 2 The cross-sectional structure diagram of the second sink groove provided in the array substrate in the present application is schematically shown.

[0028] Figure 3 A schematic plan view of another structure in which a second sink groove is arranged in the array substrate in the present application is schematically shown.

[0029] Figure 4 The schematic diagram shows a structure in which the gate driving circuit in the array substrate of the present application is arranged in the first sink.

[0030] Figure 5 The schematic diagram shows the structure of the gate drive circuit stacked in the first sink in the present application.

[0031] Figure 6 The application is schematically shown Figure 4 Schematic diagram of the enlarged structure of part A.

[0032] Figure 7 The schematic diagram of the planar layout of the gate driving circuit and the first sink in the present application is shown schematically.

[0033] Figure 8 The structural diagram of the display panel in the present application is schematically shown.

[0034] The following are the descriptions of the reference numerals:

[0035] 100, substrate layer; 200, gate drive circuit; 210, oxide thin film transistor; 300, first insulating layer; 310, second insulating layer; 301, connection hole; 400, insulating plate; 500, frame glue; 600, connection line; 700, opposing substrate; 800, display drive circuit; 810, electrostatic discharge structure; 900, display panel;

[0036] 101, gate driving area; 110, first sink groove; 102, display driving area; 120, second sink groove; 210, first driving layer; 220, second driving layer; 410, via hole; 710, color filter layer; 910, display area; 920, non-display area. DETAILED DESCRIPTION

[0037] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be more comprehensive and complete and fully convey the concept of the example embodiments to those skilled in the art.

[0038] Embodiment 1

[0039] See also Figures 1 to 4 As shown, the present application provides an array substrate, which includes: a substrate layer 100 , a gate driving circuit 200 and a first isolation layer 300 .

[0040] The substrate layer 100 is used to provide support, and the substrate layer 100 can be glass, sapphire or plastic. The substrate layer 100 is provided with a gate drive area 101 and a display drive area 102. The display drive area 102 is mainly provided with a circuit structure capable of controlling the display of the picture, such as a TFT switch that controls the display sub-pixel to be turned on in the display drive area. The display sub-pixel can be one of a red sub-pixel, a green sub-pixel or a blue sub-pixel, and the TFT switch controls the corresponding display sub-pixel to emit light. The gate drive area 101 is located around the display drive area 102, and the gate drive area 101 is provided with a first sink 110; the first sink 110 can be provided by etching or by laser.

[0041] The gate drive circuit 200 is arranged in the first sink 110; the gate drive circuit 200 is used to provide a scanning signal to the circuit structure of the display drive. The gate drive circuit 200 is entirely sunk into the first sink 110, and the first insulating layer 300 is arranged in the first sink 110 and covers the gate drive circuit 200. Through the covering of the first insulating layer 300, a relatively closed space can be formed in the first sink 110. In this way, a closed protection is formed for the gate drive circuit 200, and it is difficult for water vapor in the external environment to enter the first sink 110, reducing the erosion of water vapor on the gate drive circuit 200. The material of the first insulating layer 300 and the substrate layer 100 can be the same or different. The first insulating layer 300 can be glass, sapphire or plastic, and the first insulating layer 300 can also be glass glue.

[0042] In this embodiment, the gate driving circuit 200 is disposed in the first sink 110, and the gate driving circuit 200 is covered by the first insulating layer 300 to isolate the external environment from the gate driving circuit 200. In this way, it is difficult for water vapor in the external environment to enter the gate driving circuit 200, thereby reducing the influence of water vapor on the gate driving circuit 200. The switching characteristics of the TFT in the gate driving circuit 200 are stabilized, and the abnormality of the display function is reduced.

[0043] In addition, it should be noted that disposing the gate driving circuit 200 in the first sink 110 reduces the overall height of the array substrate, which is beneficial to the thinness and lightness of the display panel, and the display panel can be made thinner.

[0044] In the process of manufacturing the array substrate, a groove may be firstly formed in the gate driving area 101 of the substrate layer 100 to form a first sinking groove 110. Then, a gate driving circuit 200 is formed in the first sinking groove 110 by deposition and etching. Then, a first insulating layer 300 is provided in the first sinking groove 110. The first insulating layer 300 may be provided in a filling manner or in a covering manner at the notch of the first sinking groove 110. When the first insulating layer 300 is a soft material, a filling manner may be adopted; when the first insulating layer 300 is a hard material, the first insulating layer 300 is covered on the first sinking groove 110.

[0045] Generally, the gate drive circuit 200 is arranged in a flat pattern. In one embodiment of the present application, the gate drive circuit 200 includes a first drive layer 210 and a second drive layer 220, and the second drive layer 220 and the first drive layer 210 are stacked in the thickness direction of the substrate layer 100, that is, the second drive layer 220 and the first drive layer 210 are stacked up and down, and the first drive layer 210 and the second drive layer 220 are electrically connected, and the first drive layer 210 is arranged in the first sink 110. Therefore, it can be known that by stacking the first drive layer 210 and the second drive layer 220 up and down and arranging them in the vertical direction, the horizontally tiled space occupied by the gate drive circuit 200 is reduced. The gate drive circuit 200 is arranged at the edge of the array substrate. The above arrangement can reduce the position area of ​​the frame, which is conducive to achieving a narrow frame.

[0046] Furthermore, the gate drive circuit 200 can be configured to have more drive layers, such as three drive layers, which are also stacked in the thickness direction of the substrate layer 100, and the frame size can be further reduced. At the same time, the height of the gate drive circuit 200 is prevented from being too high, so that the protruding height of the gate drive circuit 200 on the substrate layer 100 is less than the height of the frame glue 500.

[0047] In one embodiment of the present application, the array substrate further includes an isolation plate 400, which has a certain hardness. The isolation plate 400 is disposed between the first drive layer 210 and the second drive layer 220. The isolation plate 400 can well separate the first drive layer 210 and the second drive layer 220, while isolating and protecting the first drive layer 210 and effectively supporting the second drive layer 220. The isolation plate 400 is provided with a plurality of wire holes 410, and the second drive layer 220 and the first drive layer 210 are electrically connected through the wire holes 410; through the wire holes 410, the first drive layer 210 and the second drive layer 220 are electrically connected, ensuring that the signal can be transmitted between the first drive layer 210 and the second drive layer 220. The first isolation layer 300 is filled in the first sink 110 and wraps the second drive layer 220. The line of the externally connected gate drive circuit 200 can pass through the first isolation layer 300 to achieve connection with the second drive layer 220.

[0048] Various oxide thin film transistors may be provided in the first drive layer 210, and the first drive layer 210 is provided in the first sink 110 to better protect the oxide thin film transistors in the first drive layer 210. Resistors and capacitors may be provided in the second drive layer 220, and the second drive layer 220 is less affected by water vapor, and the second drive layer 220 may be provided above the first drive layer 210. In addition, generally, the second drive layer 220 has more components and occupies a larger space, so the second drive layer 220 has a larger paving area than the first drive layer 210. The second drive layer 220 is wrapped by the first isolation layer 300, and the second drive layer 220 is also protected to a certain extent, reducing the damage to the second drive layer 220 by the external environment.

[0049] In one embodiment of the present application, the isolation plate 400 is made of the same material as the substrate layer 100, the upper surface of the isolation plate 400 is flush with the upper surface of the substrate layer 100, and the second drive layer 220 is arranged on the upper surface of the isolation plate 400. The isolation plate 400 can also be glass, sapphire or plastic. The paving area of ​​the second drive layer 220 is larger than the first drive layer 210, and the paving area of ​​the second drive layer 220 may exceed the edge of the isolation plate 400. Therefore, the isolation plate 400 is arranged flush with the upper surface of the substrate layer 100 to reduce the fault between the isolation plate 400 and the substrate layer 100, which is convenient for the arrangement of the second drive layer 220. That is, the second drive layer 220 can be deposited on a larger plane, ensuring that the second drive layer 220 is on the same plane, reducing the unevenness of the second drive layer 220 itself during the deposition process, and reducing the situation of fracture. The texture of the isolation plate 400 is relatively hard, and it has a certain supporting effect on the second drive layer 220.

[0050] In one embodiment of the present application, the depth of the first sinking groove 110 is h1, and the thickness of the substrate layer 100 is h, then: h1≤h / 2. To avoid the depth of the first sinking groove 110 being too deep, the depth of the first sinking groove 110 is controlled to be less than or equal to half of the thickness of the substrate layer 100, so that sufficient thickness is left at the bottom of the first sinking groove 110 to ensure that the substrate layer 100 is sufficiently hard at the position of the first sinking groove 110. The depth of the first sinking groove 110 can be: h1=h / 4, h1=h / 3 or h1=h / 2.

[0051] In one embodiment of the present application, the substrate layer 100 is also provided with an electrostatic discharge area, and the electrostatic discharge area is provided with a second sink 120; the array substrate also includes an electrostatic discharge structure 810, a second isolation layer 310 and a routing layer, the electrostatic discharge structure 810 is arranged in the second sink 120, the second isolation layer 310 covers the electrostatic discharge structure 810, the second isolation layer 310 is provided with a through hole, the routing layer is penetrated through the through hole, and is electrically connected to the electrostatic discharge structure 810. The electrostatic discharge structure 810 can perform tip discharge to reduce the impact of static electricity on various circuits or components. And through the second isolation layer 310, it can also play a certain isolation and shielding role, reducing the impact of the electrostatic discharge structure 810 on other circuits during the discharge process.

[0052] In the present application, there are at least two situations for the configuration of the electrostatic discharge structure 810 .

[0053] See also Figure 2 As shown, in the first case, the second sink 120 is arranged between the gate drive area 101 and the display drive area 102. Since the electrostatic discharge structure 810 is arranged in the second sink 120, it can be known that the electrostatic discharge structure 810 is arranged between the gate drive circuit 200 and the display drive circuit 800. In this way, the electrostatic discharge structure 810 is very close to the gate drive circuit 200 and the display drive circuit 800, and can well handle the static electricity from the gate drive circuit 200 and the display drive circuit 800. In addition, by setting the second isolation layer 310, the interference of the electrostatic discharge structure 810 on the gate drive circuit 200 and the display drive circuit 800 when releasing static electricity can also be reduced. The second isolation layer 310 can also be glass, sapphire or plastic, or glass glue. The second isolation layer 310 has a certain insulation effect, and even the second isolation layer 310 can also be a material layer with a shielding effect.

[0054] See also Figure 3 As shown, in the second case, the first sink groove 110 is arranged on the left or right side of the display driving area 102, and the second sink groove 120 is arranged on the upper side or the lower side of the display driving area 102. The second sink groove 120 is far away from the first sink groove 110, and the electrostatic discharge structure 810 is also far away from the gate driving structure. By increasing the distance, the influence of the electrostatic discharge structure 810 on the gate driving circuit 200 can also be reduced. In addition, the upper and lower positions of the display driving area 102 can be fully utilized, and the space occupied by the left and right positions can be reduced, which is further conducive to the realization of a narrow frame.

[0055] In addition, two first sink grooves 110 may be provided, and the two first sink grooves 110 are respectively provided on the left and right sides of the display driving area 102. Similarly, two gate driving circuits 200 may be provided, and the two gate driving circuits 200 are respectively provided on the left and right sides of the display driving area 102. Two second sink grooves 120 may be provided, and the two second sink grooves 120 are respectively provided on the upper side and the lower side of the display driving area 102. Two electrostatic discharge structures 810 are also provided, and the two electrostatic discharge structures 810 are respectively provided on the upper side and the lower side of the display driving area 102.

[0056] During the process of opening the first sinking tank 110 , the second sinking tank 120 may also be set simultaneously to improve the efficiency of the sinking. The second sinking tank 120 may be set in the same manner as the first sinking tank 110 .

[0057] In an embodiment of the present application, the array substrate further includes a sealant 500, which is disposed on the substrate layer 100 and on the same side as the first insulating layer 300. The sealant 500 is located on the side of the gate driving area 101 away from the display driving area 102. The sealant 500 can be used to achieve the opposite of the array substrate and the opposite substrate 700, and the opposite substrate 700 and the array substrate are pasted together. The sealant 500 can also seal the internal space of the display panel to a certain extent, preliminarily reducing the entry of water vapor from the external environment. On the basis of setting the sealant 500, the setting of the first insulating layer 300 is added, which further reduces the influence of water vapor on the gate driving circuit 200.

[0058] In addition, the frame glue 500 can be provided in two circles. By providing the inner and outer circles of the frame glue 500, the bonding strength between the array substrate and the opposing substrate 700 is improved, and the sealing effect can also be improved to reduce the entry of water vapor.

[0059] See also Figure 5 and Figure 6 As shown, the height of the first insulating layer 300 protruding from the surface of the substrate layer 100 is H1, and the height of the sealant 500 is H, which satisfies: H1<H. In other words, the protruding height of the first insulating layer 300 is relatively low, lower than the height of the sealant 500. By controlling the height of the first insulating layer 300, the height of the first insulating layer 300 is prevented from being too high, and the situation where the first insulating layer 300 presses against the upper substrate is reduced, which causes the sealant 500 to crack.

[0060] See also Figure 7As shown, in one embodiment of the present application, the array substrate further includes a display driving circuit 800 and a connecting wire 600. The display driving circuit 800 is disposed in the display driving area 102. A connecting hole 301 is disposed on one side of the first insulating layer 300 close to the display driving area 102. The connecting wire 600 passes through the connecting hole 301 and electrically connects the gate driving circuit 200 and the display driving circuit 800, respectively. The gate driving circuit 200 includes at least one oxide thin film transistor 210. The sealing protection of the gate driving circuit 200 in the present application mainly protects the oxide thin film transistor 210 and reduces the influence of water vapor on the oxide thin film transistor 210. Figure 7 It can also be seen that when the gate driving circuit 200 is divided into a first driving layer 210 and a second driving layer 220 arranged vertically, the via hole 410 connecting the first driving layer 210 and the second driving layer 220. The electrostatic discharge structure 810 has a small area, which is convenient for tip discharge, and the electrostatic discharge structure 810 can be distributed at intervals in the extension direction of the connecting line 600.

[0061] In order to explain the present application in detail, the manufacturing process of the array substrate is described as follows:

[0062] A first groove 110 and a second groove 120 are formed in the edge region of the surface of the substrate layer 100 , and the forming method may be a laser method.

[0063] The gate driving circuit 200 is deposited in the first sink 110 , and the electrostatic discharge structure 810 is deposited in the second sink 120 . The display driving circuit 800 is deposited in the display driving area 102 .

[0064] The first sink groove 110 is filled with glass glue above the gate drive circuit 200 to seal the gate drive circuit 200. The second sink groove 120 can also be filled with glass glue to seal the electrostatic discharge structure 810. The sealing of the first sink groove 110 and the sealing of the second sink groove 120 can be performed simultaneously.

[0065] An isolation plate 400 may be disposed on the first trough 110 and the second trough 120 , respectively. The isolation plate 400 has a high hardness and can play a good supporting role.

[0066] Then, a connection hole 301 is provided on the first insulating layer 300, and a connection line 600 is provided in the connection hole 301, and the gate driving circuit 200 and the display driving circuit 800 are connected through the connection line 600. A through hole can also be provided on the second insulating layer 310 at the same time, and a wiring layer is provided through the through hole, and the electrostatic discharge structure 810 is connected through the wiring layer, so that the connection between the electrostatic discharge structure 810 and other circuits can be realized.

[0067] A sealant 500 is disposed on one side of the first groove 110 away from the display driving circuit 800 . The sealant 500 surrounds a circle of the display driving circuit 800 . The frameant 500 can effectively bond the counter substrate 700 and the array substrate together in a counter manner.

[0068] Embodiment 2

[0069] See also Figure 1 and 6 As shown, the present application also provides a display panel, the display panel includes an opposing substrate 700 and an array substrate, and the opposing substrate 700 is opposite to the array substrate. Among them, the array substrate includes: a substrate layer 100, a gate driving circuit 200 and a first insulating layer 300. The substrate layer 100 is provided with a gate driving area 101 and a display driving area 102, and the display driving area 102 is mainly provided with a circuit structure capable of controlling the display of the picture. The gate driving area 101 is located around the display driving area 102, and the gate driving area 101 is provided with a first sink 110.

[0070] The gate drive circuit 200 is disposed in the first sink 110; the gate drive circuit 200 is used to provide a scanning signal to the display drive circuit structure. The gate drive circuit 200 is entirely sunken into the first sink 110, and the first insulating layer 300 is disposed in the first sink 110 and covers the gate drive circuit 200. Through the coverage of the first insulating layer 300, a relatively closed space can be formed in the first sink 110. A closed protection is formed for the gate drive circuit 200, and it is difficult for water vapor in the external environment to enter the first sink 110, thereby reducing the erosion of water vapor on the gate drive circuit 200.

[0071] The display panel of the present application may be a liquid crystal panel or an OLED (Organic Light-Emitting Diode) panel.

[0072] When the display panel is a liquid crystal panel, a color filter layer 700 is provided on the counter substrate 700, and the color filter layer 700 includes three colors: red, green, and blue. The liquid crystal layer is provided between the display driving circuit 800 and the color filter layer 700, and the display driving circuit 800 can control the deflection of the liquid crystal molecules by controlling the voltage of the electrode layers on both sides of the liquid crystal layer, thereby achieving light transmission or opacity. When the display panel is a liquid crystal panel, the substrate layer 100 is light-transmitting, so that the light of the backlight source can be emitted to the liquid crystal layer.

[0073] When the display panel is an OLED panel, an organic light-emitting layer is disposed between the opposing substrate 700 and the OLED, and the display driving circuit 800 controls the light emission of the organic light-emitting layer by controlling voltages at both sides of the organic light-emitting layer.

[0074] The display panel has a display area 910 and a non-display area 920 surrounding the display area 910 . The display driving circuit is arranged corresponding to the display area 910 , and the gate driving circuit 920 is arranged corresponding to the non-display area 920 .

[0075] In the display panel of this embodiment, the gate drive circuit 200 is disposed in the first sink 110, and the gate drive circuit 200 is covered by the first insulating layer 300 to isolate the external environment from the gate drive circuit 200. In this way, it is difficult for water vapor in the external environment to enter the gate drive circuit 200, thereby reducing the influence of water vapor on the gate drive circuit 200. The TFT switching characteristics in the gate drive circuit 200 are stabilized, and the display function abnormality is reduced. In addition, the gate drive circuit 200 is disposed in the first sink 110, which reduces the overall height of the array substrate, is conducive to the thinness of the display panel, and can make the display panel thinner.

[0076] Other specific implementations and beneficial effects of the display panel refer to the above-mentioned array substrate solution, which will not be described in detail here.

[0077] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary technical means in the art that are not disclosed in the present application.

[0078] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. An array substrate, characterized in that: The array substrate comprises: A substrate layer, wherein the substrate layer is provided with a gate driving area and a display driving area, the gate driving area is located at the periphery of the display driving area, and the gate driving area is provided with a first sink groove; A gate driving circuit, wherein the gate driving circuit is disposed in the first sink; A first insulating layer is disposed in the first sink and covers the gate driving circuit.

2. The array substrate according to claim 1, characterized in that: The gate driving circuit includes a first driving layer and a second driving layer, the second driving layer and the first driving layer are stacked in a thickness direction of the substrate layer, the first driving layer and the second driving layer are electrically connected, and the first driving layer is arranged in the first sink.

3. The array substrate according to claim 2, characterized in that: The array substrate further includes an isolation plate, the isolation plate is disposed between the first drive layer and the second drive layer, the isolation plate is provided with a plurality of wire holes, and the second drive layer and the first drive layer are electrically connected through the wire holes; The first insulating layer is filled in the first sink and wraps the second driving layer.

4. The array substrate according to claim 3, characterized in that: The isolation plate is made of the same material as the substrate layer, the upper surface of the isolation plate is flush with the upper surface of the substrate layer, and the second driving layer is arranged on the upper surface of the isolation plate.

5. The array substrate according to any one of claims 1 to 4, characterized in that: The depth of the first sink is h1, and the thickness of the substrate layer is h, then: h1≤h / 2.

6. The array substrate according to any one of claims 1 to 4, characterized in that: The substrate layer is also provided with an electrostatic discharge area, and the electrostatic discharge area is provided with a second sink; The array substrate also includes an electrostatic discharge structure, a second isolation layer and a wiring layer. The electrostatic discharge structure is arranged in the second sink groove, the second isolation layer covers the electrostatic discharge structure, the second isolation layer is provided with a wiring hole, the wiring layer is passed through the wiring hole and is electrically connected to the electrostatic discharge structure.

7. The array substrate according to claim 6, characterized in that: The second sink is disposed between the gate driving area and the display driving area; Alternatively, the first sink groove is arranged on the left side and / or the right side of the display driving area, and the second sink groove is arranged on the upper side and / or the lower side of the display driving area.

8. The array substrate according to claim 1, characterized in that: The array substrate further comprises a sealant, which is arranged on the substrate layer and on the same side as the first insulating layer, and is located on a side of the gate driving area away from the display driving area; The height of the first insulating layer protruding from the surface of the substrate layer is H1, and the height of the sealant protruding from the surface of the substrate layer is H, then: H1<H is satisfied.

9. The array substrate according to claim 1, characterized in that: The array substrate further comprises a display driving circuit and connecting wires, wherein the display driving circuit is arranged in the display driving area, and a connecting hole is arranged on one side of the first insulating layer close to the display driving area; The connection wires are passed through the connection holes and are electrically connected to the gate driving circuit and the display driving circuit respectively. The gate driving circuit includes at least one oxide thin film transistor.

10. A display panel, characterized in that: The display panel includes an opposing substrate such as the array substrate according to any one of claims 1 to 9, and the opposing substrate is opposite to the array substrate.

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