Display device

Abstract

A display device includes: a pixel circuit layer disposed on a substrate and including a plurality of sub-pixel circuits; the planarization layer is arranged on the pixel circuit layer; a first organic pattern disposed on the planarization layer, the first organic pattern having a first inclined surface inclined in a first direction, a second inclined surface inclined in a second direction different from the first direction, and an upper surface connecting the first inclined surface to the second inclined surface; a first light emitting diode including a first pixel electrode extending from an upper surface of the planarization layer to an upper surface of the first organic pattern along the first inclined surface; and a second light emitting diode including a second pixel electrode extending from an upper surface of the planarization layer to an upper surface of the first organic pattern along the second inclined surface.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2023-0131168 filed in the Korean Intellectual Property Office on September 27, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] One or more embodiments of the inventive concept are directed to a display device. Background Art

[0004] As display devices have become thinner and lighter and the range of use of display devices has gradually expanded, there is an increasing demand for display devices capable of delivering high-quality images. For example, a display device is provided inside a vehicle to provide images to a user sitting in a driver's seat or a passenger seat of the vehicle. Summary of the invention

[0005] One or more embodiments include a multi-view display device configured to display different images depending on the location of a user.

[0006] According to one or more embodiments, a display device includes: a pixel circuit layer, which is arranged on a substrate and includes a plurality of sub-pixel circuits; a planarization layer, which is arranged on the pixel circuit layer; a first organic pattern, which is arranged on the planarization layer, wherein the first organic pattern has a first inclined surface inclined in a first direction, a second inclined surface inclined in a second direction different from the first direction, and an upper surface connecting the first inclined surface to the second inclined surface; a first light-emitting diode, including a first pixel electrode extending from the upper surface of the planarization layer along the first inclined surface to the upper surface of the first organic pattern; and a second light-emitting diode, including a second pixel electrode extending from the upper surface of the planarization layer along the second inclined surface to the upper surface of the first organic pattern.

[0007] According to one or more embodiments, a display device includes: a pixel circuit layer, which is arranged on a substrate and includes a plurality of sub-pixel circuits; a planarization layer, which is arranged on the pixel circuit layer; a first organic pattern, which is arranged on the planarization layer, wherein the first organic pattern has a first inclined surface inclined in a first direction, a second inclined surface inclined in a second direction different from the first direction, and an upper surface connecting the first inclined surface to the second inclined surface; a second organic pattern, which is arranged on the planarization layer and is spaced apart from the first organic pattern in a third direction, wherein the second organic pattern has a third inclined surface inclined in the first direction, a fourth inclined surface inclined in the second direction, and an upper surface connecting the third inclined surface to the fourth inclined surface; a plurality of first sub-pixels, which overlap with the first organic pattern and are configured to emit light of a first color; and a plurality of second sub-pixels, which overlap with the second organic pattern and are configured to emit light of a second color different from the first color. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a schematic perspective view of a display device according to an embodiment of the inventive concept;

[0009] Figure 2 is along Figure 1 The line A-A' intercepts Figure 1 A schematic cross-sectional view of a display device;

[0010] Figure 3 is a schematic plan view of a display device according to an embodiment of the inventive concept;

[0011] Figure 4 is an equivalent circuit diagram of a sub-pixel of a display device according to an embodiment of the inventive concept;

[0012] Figure 5 and Figure 6 is an enlarged plan view of a portion of a display device according to one or more embodiments of the inventive concept;

[0013] Figure 7 is along Figure 5 The line C-C' intercepts Figure 5 A schematic cross-sectional view of a display device;

[0014] Figure 8 is a view for explaining a path of light emitted by a display device according to an embodiment of the inventive concept;

[0015] Fig. 9 is a view for explaining a dual-view display device according to an embodiment of the inventive concept;

[0016] Fig.10is a schematic enlarged plan view of a portion of a display device according to an embodiment of the inventive concept;

[0017] Fig.11 yes Fig.10 Along Fig.10 A schematic cross-sectional view of the display device taken along line DD';

[0018] Fig.12 is a view for explaining a path of light emitted by a display device according to an embodiment of the inventive concept;

[0019] Fig.13 are views for explaining a three-view display device according to an embodiment of the inventive concept; and

[0020] Fig.14 is a schematic diagram of a vehicle including a display device according to an embodiment of the inventive concept. DETAILED DESCRIPTION

[0021] The embodiments shown in the accompanying drawings will now be referred to in detail, wherein the same reference numerals represent the same elements throughout. In this regard, the embodiments of the present disclosure may have different forms and should not be construed as being limited to the descriptions set forth herein. As used herein, the term "and / or" includes any and all combinations of one or more related listed items. Throughout this disclosure, the expression "at least one of a, b, and c" means only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0022] Although terms such as "first" and "second" may be used to describe various elements, these elements must not be limited to the above terms. The above terms are used to distinguish one element from another.

[0023] As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0024] It will be understood that the terms “comprises,” “comprising,” “having,” and / or “having” as used herein specify the presence of stated features or elements, but do not preclude the addition of one or more other features or elements.

[0025] It will also be understood that when a layer, region or element is referred to as being “on” another layer, region or element, it can be directly or indirectly on the other layer, region or element. That is, for example, intervening layers, regions or elements may be present.

[0026] It will be understood that when a layer, region, or element is referred to as being "connected" to another layer, region, or element, the layer, region, or element may be "directly connected" to the other layer, region, or element, or may be "indirectly connected" to the other layer, region, or element, with other layers, regions, or elements interposed between the layer, region, or element and the other layer, region, or element. For example, it will be understood that when a layer, region, or element is referred to as being "electrically connected" to another layer, region, or element, the layer, region, or element may be "directly electrically connected" to the other layer, region, or element, or may be "indirectly electrically connected" to the other layer, region, or element, with other layers, regions, or elements interposed between the layer, region, or element and the other layer, region, or element.

[0027] In the present specification, "A and / or B" may mean A or B, or A and B. In the present specification, "at least one of A and B" may mean A or B, or A and B.

[0028] The x direction, the y direction, and the z direction are not limited to the three axes of the rectangular coordinate system. For example, the x direction, the y direction, and the z direction may be perpendicular to each other, or may represent different directions that are not perpendicular to each other.

[0029] The term "about" or "approximately" used in this specification to refer to any value may mean that the value is within a range generally accepted in the art due to measurement limitations or errors. For example, "about" may mean that the value is within a range of ±30%, ±20%, ±10% or ±5%.

[0030] In the case where a specific embodiment can be implemented differently, a specific process can be performed in an order different from the order described. For example, two processes described in succession can be performed substantially simultaneously and in a reverse order.

[0031] For convenience of explanation, the size of the elements in the drawings may be exaggerated or reduced. As an example, the size and thickness of each element shown in the drawings are presented for convenience of description, and therefore, the present disclosure is not necessarily limited thereto.

[0032] Figure 1 is a schematic perspective view of a display device 1 according to an embodiment of the inventive concept, and Figure 2 is along Figure 1 The line A-A' intercepts Figure 1 Schematic cross-sectional view of a display device 1 .

[0033] Reference Figure 1, the display device 1 according to the embodiment may include a display area DA and a peripheral area PA. The peripheral area PA may be arranged outside the display area DA and surround the display area DA. Various wirings and driving circuit parts configured to transmit electrical signals to the display area DA may be arranged in the peripheral area PA. The display device 1 may be configured to display an image by using light emitted from a plurality of sub-pixels P arranged in the display area DA.

[0034] Hereinafter, although an organic light emitting display device is used as an example to describe a display device, the display device according to the embodiment is not necessarily limited thereto. For example, the display device 1 may be an organic light emitting display, an inorganic light emitting display, or a quantum dot light emitting display.

[0035] The display device 1 may be implemented as various types of electronic devices. In the embodiment, although the display device 1 may be a display device for a vehicle, the display device according to the embodiment is not necessarily limited thereto.

[0036] like Figure 2 As shown in FIG, the display device 1 may include a display panel 10 and a cover window 20. The display panel 10 may include a substrate 100, a pixel circuit layer 200, a display element layer 300, an encapsulation layer 400, and a light blocking layer 500 sequentially stacked in a third direction (e.g., z direction or thickness direction).

[0037] The substrate 100 may include glass and / or a polymer resin. For example, the substrate 100 may include a x ) as a glass material with a main element, or a polymer resin of polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate and / or cellulose acetate propionate.

[0038] Combination Figure 2 , the pixel circuit layer 200 may be disposed on the substrate 100. The pixel circuit layer 200 may include a sub-pixel circuit PC (see Figure 4 ), wirings and insulating layers. Some wirings and insulating layers of the pixel circuit layer 200 may extend to the peripheral area PA.

[0039] The display element layer 300 may be disposed on the pixel circuit layer 200. The display element layer 300 may include display elements arranged in the display area DA. Each display element may be electrically connected to a corresponding sub-pixel circuit PC and form one sub-pixel with the corresponding sub-pixel circuit PC.

[0040] The encapsulation layer 400 may be disposed on the display element layer 300. The encapsulation layer 400 may encapsulate the display element in the display element layer 300. In an embodiment, the encapsulation layer 400 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. For example, the inorganic encapsulation layer may include aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), zinc oxide (ZnO x , which can be ZnO or ZnO 2 ), silicon oxide (SiO x ), silicon nitride (SiN x ) and silicon oxynitride (SiO x N y ). For example, the organic encapsulation layer may include a polymer material such as acrylic resin, epoxy resin, polyimide, and polyethylene. In an embodiment, the organic encapsulation layer may include acrylate.

[0041] The light blocking layer 500 may be disposed on the encapsulation layer 400. The light blocking layer 500 may partially absorb the light emitted by the display element layer 300 and limit the viewing angle of the display device 1. For example, the light blocking layer 500 may be configured to selectively transmit only a portion of the light and block the remaining light according to an angle formed by the light emitted by the display element layer 300 and a third direction (z direction) perpendicular to the front surface FS1 of the display device 1. The light blocking layer 500 may be arranged in the display area DA. The light blocking layer 500 may include a transmission area that transmits the light emitted by the display element layer 300.

[0042] The cover window 20 may be disposed on the display panel 10. In an embodiment, the cover window 20 may be attached to an element (such as a light blocking layer 500) below the cover window 20 using an optically transparent adhesive. The cover window 20 may be configured to protect the display panel 10. The cover window 20 may include at least one of glass, sapphire, and plastic. For example, the cover window 20 may be ultra-thin glass or colorless polyimide.

[0043] In some embodiments, the touch sensor layer may be further disposed between the encapsulation layer 400 and the light blocking layer 500, or between the light blocking layer 500 and the cover window 20. The touch sensor layer is a layer configured to sense a user's touch input using at least one of various touch methods such as a resistance method and a capacitance method.

[0044] Figure 3 is a schematic plan view of a display device 1 according to an embodiment of the inventive concept.

[0045] Reference Figure 3 , the display device 1 may include a display area DA and a peripheral area PA. Because various elements forming the display device 1 are disposed on the substrate 100, it can be understood that the substrate 100 includes the display area DA and the peripheral area PA. The display device 1 may be configured to display an image by using light emitted from a plurality of sub-pixels P arranged in the display area DA.

[0046] Each sub-pixel P may include a display element and a sub-pixel circuit PC electrically connected to the display element (see Figure 4 ). The display element may be an organic light emitting diode (OLED) or an inorganic light emitting diode. The display element may be configured to emit, for example, red light, green light, blue light, or white light. The sub-pixel circuit of each sub-pixel P may include a thin film transistor and a storage capacitor. The sub-pixel circuit PC may be connected to a scan line SL and a data line DL intersecting the scan line SL. In an embodiment, the scan line SL may extend in a first direction (x direction), and the data line DL may extend in a second direction (y direction).

[0047] The display element of each sub-pixel P can be configured to emit light by driving the sub-pixel circuit PC. For example, the display area DA can display a preset image by using the light emitted from the sub-pixel P. In this specification, a pixel can represent a minimum unit set of sub-pixels P configured to emit one of red light, green light, blue light, and white light. For example, a pixel may include a red sub-pixel, a green sub-pixel, and a blue sub-pixel. In some embodiments, a pixel may include a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel.

[0048] The peripheral area PA is an area in which the sub-pixels P are not arranged, and may be a non-display area in which no image is displayed. A printed circuit board and terminal components, etc. may be arranged in the peripheral area PA. The printed circuit board includes a built-in drive circuit component, a power line, and a drive circuit component configured to drive the sub-pixels P, and a driver integrated circuit (IC) is connected to the terminal component.

[0049] Figure 4 is an equivalent circuit diagram of a sub-pixel P of a display device according to an embodiment of the inventive concept.

[0050] Reference Figure 4 , the sub-pixel P may include a light emitting diode ED as a display element, and a sub-pixel circuit PC connected to the light emitting diode ED. The sub-pixel circuit PC may include a first thin film transistor T1, a second thin film transistor T2, and a storage capacitor Cst. The light emitting diode ED may be configured to emit, for example, red light, green light, and blue light, or to emit red light, green light, blue light, and white light.

[0051] The second thin film transistor T2 (also referred to as a switching thin film transistor) may be connected to the scan line SL and the data line DL. The second thin film transistor T2 may be configured to transmit a data voltage from the data line DL to the first thin film transistor T1 according to a switching voltage received from the scan line SL. The storage capacitor Cst may be connected to the second thin film transistor T2 and the driving voltage line PL. The storage capacitor Cst is configured to store a voltage corresponding to a difference between the data voltage transmitted from the second thin film transistor T2 and the first power voltage ELVDD supplied to the driving voltage line PL.

[0052] The first thin film transistor T1 (also referred to as a driving thin film transistor) may be connected to the driving voltage line PL and the storage capacitor Cst. The first thin film transistor T1 may be configured to control a driving current flowing through the organic light emitting diode ED according to a voltage stored in the storage capacitor Cst. The light emitting diode ED may be configured to emit light having a preset brightness corresponding to the driving current. An opposite electrode (e.g., a cathode) of the light emitting diode ED may be configured to receive a second power voltage ELVSS.

[0053] Although the reference Figure 4 It is described that the sub-pixel circuit PC includes two transistors and one capacitor, but the present embodiment is not necessarily limited thereto. The number of thin film transistors and the number of capacitors may vary depending on the design of the sub-pixel circuit PC.

[0054] Figure 5 and Figure 6 is an enlarged plan view of a portion of a display device 1 according to one or more embodiments of the inventive concept. Figure 5 and Figure 6 Schematically shows Figure 3 Area B of the display device 1 is shown in .

[0055] Reference Figure 5 The display device 1 may include a substrate 100 (see Figure 3 ). Figure 1 As described above, the display device 1 may include a display area DA and a peripheral area PA outside the display area DA (eg, see Figure 3 ). For example, the peripheral area PA at least partially surrounds the display area DA.

[0056] A plurality of pixels PX may be arranged in the display area DA. For example, the pixels PX may form an array in a first direction (x direction) and a second direction (y direction) in the display area DA. Each pixel PX may include a sub-pixel P configured to emit one of red light, green light, blue light, and white light (for example, see Figure 3 ). For example, in Figure 5FIG. 4 shows that the pixel PX includes two red sub-pixels Pr1 and Pr2, two green sub-pixels Pg1 and Pg2, and two blue sub-pixels Pb1 and Pb2. In an embodiment, the pixel PX may further include two white sub-pixels. Figure 5 The red sub-pixels Pr1 and Pr2, the green sub-pixels Pg1 and Pg2, and the blue sub-pixels Pb1 and Pb2 shown in FIG. 1 represent light emitting diodes ED (see FIG. Figure 4 )'s launch area.

[0057] A plurality of organic patterns may be disposed on the substrate 100. The organic patterns may include an organic insulating material (such as polyimide, polyamide, acrylic resin, benzocyclobutene, hexamethyldisiloxane (HMDSO) and / or phenolic resin). Each organic pattern may have two inclined surfaces ss1, ss2, ss3 and ss4 inclined in two different directions (see Figure 7 ), and arranged on two inclined surfaces ss1, ss2, ss3 and ss4 (see Figure 7 ) between the upper surfaces us1 and us2 (see Figure 7 ). The inclined surfaces ss1, ss2, ss3, and ss4 and the upper surfaces us1 and us2 of the organic pattern may have a rectangular shape whose length in the second direction (y direction) is greater than that in the first direction (x direction). The inclined surfaces ss1, ss2, ss3, and ss4 spaced apart from each other in the first direction (x direction) may be connected to each other through the upper surfaces us1 and us2.

[0058] The organic pattern may overlap the sub-pixel groups SG1, SG2, and SG3 including the sub-pixels P configured to emit light of the same color. The sub-pixels P disposed on one organic pattern may be configured to emit light of the same color.

[0059] For example, the first organic pattern 209p1 may overlap with the first subpixel group SG1 including the first red subpixel Pr1 and the second red subpixel Pr2 configured to emit red light, the second organic pattern 209p2 may overlap with the second subpixel group SG2 including the first blue subpixel Pb1 and the second blue subpixel Pb2 configured to emit blue light, and the third organic pattern 209p3 may overlap with the third subpixel group SG3 including the first green subpixel Pg1 and the second green subpixel Pg2 configured to emit green light.

[0060] The subpixels P in each of the subpixel groups SG1, SG2, and SG3 may be spaced apart from each other in the first direction (x direction). For example, the first red subpixel Pr1 and the second red subpixel Pr2 in the first subpixel group SG1 may be spaced apart from each other in the first direction (x direction), the first blue subpixel Pb1 and the second blue subpixel Pb2 in the second subpixel group SG2 may be spaced apart from each other in the first direction (x direction), and the first green subpixel Pg1 and the second green subpixel Pg2 in the third subpixel group SG3 may be spaced apart from each other in the first direction (x direction).

[0061] The first organic pattern 209p1 and the second organic pattern 209p2 may be separated from each other in the first direction (x direction). The first organic pattern 209p1 and the third organic pattern 209p3 may be separated from each other in the second direction (y direction). The first organic pattern 209p1 and the third organic pattern 209p3 may be alternately arranged along the second direction (y direction). The third organic pattern 209p3 and the second organic pattern 209p2 may be separated from each other in the first direction (x direction).

[0062] The first sub-pixel group SG1 and the second sub-pixel group SG2 may be separated from each other in the first direction (x direction). The first sub-pixel group SG1 and the third sub-pixel group SG3 may be separated from each other in the second direction (y direction). The first sub-pixel group SG1 and the third sub-pixel group SG3 may be alternately arranged in the second direction (y direction). The third sub-pixel group SG3 and the second sub-pixel group SG2 may be separated from each other in the first direction (x direction). That is, the first red sub-pixel Pr1 and the first green sub-pixel Pg1 may be separated from each other in the second direction (y direction), and the second red sub-pixel Pr2 and the second green sub-pixel Pg2 may be separated from each other in the second direction (y direction). The first blue sub-pixel Pb1 may be separated from the second red sub-pixel Pr2 and the second green sub-pixel Pg2 in the first direction (x direction).

[0063] One of the sub-pixels P included in each of the sub-pixel groups SG1, SG2, and SG3 may overlap with the inclined surfaces ss1, ss2, ss3, and ss4 on one side of the organic pattern, and another sub-pixel P included in each of the sub-pixel groups SG1, SG2, and SG3 may overlap with the inclined surfaces ss1, ss2, ss3, and ss4 on the other side of the organic pattern. For example, the first red sub-pixel Pr1, the first blue sub-pixel Pb1, and the first green sub-pixel Pg1 may overlap with the boundary surfaces of the left side (-x direction) (i.e., one side in the -x direction) of the first organic pattern 209p1, the second organic pattern 209p2, and the third organic pattern 209p3, respectively. The second red sub-pixel Pr2, the second blue sub-pixel Pb2, and the second green sub-pixel Pg2 may overlap with the boundary surfaces of the right side (+x direction) (i.e., one side in the +x direction) of the first organic pattern 209p1, the second organic pattern 209p2, and the third organic pattern 209p3, respectively.

[0064] The sub-pixels P (e.g., the first red sub-pixel Pr1, the first blue sub-pixel Pb1, and the first green sub-pixel Pg1) arranged on the boundary surface on the left side (-x direction) of the organic pattern can be observed by a user who is located on the left side (-x direction) obliquely relative to the third direction (z direction). The sub-pixels P (e.g., the second red sub-pixel Pr2, the second blue sub-pixel Pb2, and the second green sub-pixel Pg2) arranged on the boundary surface on the right side (+x direction) of the organic pattern can be observed by a user who is located on the right side (+x direction) obliquely relative to the third direction (z direction). For example, the third direction (z direction) is perpendicular to the upper surface of the substrate 100. Therefore, the display device 1 can be configured to display different images depending on the position of the user.

[0065] Reference Figure 6 , the organic pattern may extend in the second direction (y direction) and overlap with the pixels PX arranged in the same column. For example, each of the first organic pattern 209p1 and the second organic pattern 209p2 may extend in the second direction (y direction) to overlap with one or more pixels PX. The first organic pattern 209p1 and the second organic pattern 209p2 may be spaced apart from each other in the first direction (x direction).

[0066] The first organic pattern 209p1 may overlap one or more sub-pixel groups SG1 and SG3. For example, the first sub-pixel group SG1 and the third sub-pixel group SG3 may overlap the first organic pattern 209p1. The first sub-pixel group SG1 and the third sub-pixel group SG3 may be separated from each other in the second direction (y direction) and alternately arranged.

[0067] For example, the first organic pattern 209p1 may overlap the first red sub-pixel Pr1, the second red sub-pixel Pr2, the first green sub-pixel Pg1, and the second green sub-pixel Pg2. In this case, the first red sub-pixel Pr1 and the first green sub-pixel Pg1 may be separated from each other in the second direction (y direction), and the second red sub-pixel Pr2 and the second green sub-pixel Pg2 may be separated from each other in the second direction (y direction). The second organic pattern 209p2 may overlap the second sub-pixel group SG2. For example, the second organic pattern 209p2 may overlap the first blue sub-pixel Pb1 and the second blue sub-pixel Pb2.

[0068] The first red subpixel Pr1 and the first green subpixel Pg1 may overlap with the boundary surface on the left side (-x direction) of the first organic pattern 209p1, and the first blue subpixel Pb1 may overlap with the boundary surface on the left side (-x direction) of the second organic pattern 209p2. The second red subpixel Pr2 and the second green subpixel Pg2 may overlap with the boundary surface on the right side (+x direction) of the first organic pattern 209p1, and the second blue subpixel Pb2 may overlap with the boundary surface on the right side (+x direction) of the second organic pattern 209p2.

[0069] The first red sub-pixel Pr1, the first blue sub-pixel Pb1, and the first green sub-pixel Pg1 can be observed by a user located on the left side (-x direction) obliquely relative to the third direction (z direction). The second red sub-pixel Pr2, the second blue sub-pixel Pb2, and the second green sub-pixel Pg2 can be observed by a user located on the right side (+x direction) obliquely relative to the third direction (z direction). The third direction (z direction) is perpendicular to the upper surface of the substrate 100.

[0070] Figure 7 is along Figure 5 The line C-C' intercepts Figure 5 Schematic cross-sectional view of a display device 1 .

[0071] Reference Figure 7 , the display device 1 may include a substrate 100. Figure 1 As described, the display device 1 may include a display area DA and a peripheral area PA. In the display area DA, the pixel circuit layer 200, the display element layer 300, the encapsulation layer 400 and the light blocking layer 500 may be sequentially stacked on the substrate 100 in the third direction (z direction).

[0072] As described above, the substrate 100 may include a glass material or a polymer resin. The pixel circuit layer 200 may be disposed on the substrate 100. The pixel circuit layer 200 may include a plurality of sub-pixel circuits PCr1, PCr2, PCb1, and PCb2, and an insulating layer.

[0073] The buffer layer 201 may be disposed between the substrate 100 and the sub-pixel circuits PCr1, PCr2, PCb1, and PCb2. The buffer layer 201 may include an inorganic material (such as silicon oxide (SiO x ), silicon nitride (SiN x ) and / or silicon oxynitride (SiO x N y )). The buffer layer 201 may increase the flatness of the upper surface of the substrate 100 and prevent or reduce the penetration of impurities from the substrate 100 and the like into the semiconductor layer A.

[0074] Each of the sub-pixel circuits PCr1, PCr2, PCb1, and PCb2 may include a thin film transistor TFT and a storage capacitor. The thin film transistor TFT may include a semiconductor layer A, a gate electrode G, a source electrode S, and a drain electrode D, wherein the semiconductor layer A includes amorphous silicon, polycrystalline silicon, or an oxide semiconductor material. In order to ensure insulation between the semiconductor layer A and the gate electrode G, a gate insulating layer 203 may be provided between the semiconductor layer A and the gate electrode G. The gate insulating layer 203 includes an inorganic material (such as silicon oxide (SiO x ), silicon nitride (SiN x ) and / or silicon oxynitride (SiO x N y )).

[0075] An interlayer insulating layer 205 may be disposed on the gate electrode G, wherein the interlayer insulating layer 205 includes an inorganic material (such as silicon oxide (SiO x ), silicon nitride (SiN x ) and / or silicon oxynitride (SiO x N y )). The source electrode S and the drain electrode D may be disposed on the interlayer insulating layer 205. In some embodiments, one of the source electrode S and the drain electrode D may not exist.

[0076] Each of the gate electrode G, the source electrode S, and the drain electrode D may include various conductive materials. Each of the gate electrode G, the source electrode S, and the drain electrode D may have a single-layer structure or a multi-layer structure including at least one of molybdenum (Mo), aluminum (Al), copper (Cu), and titanium (Ti). In an embodiment, the gate electrode G may have a single Mo layer, and each of the source electrode S and the drain electrode D may have a three-layer structure including a titanium layer, an aluminum layer, and a titanium layer.

[0077] The planarization layer 207 may be disposed on the source electrode S and the drain electrode D, covering the sub-pixel circuits PCr1, PCr2, PCb1, and PCb2. The planarization layer 207 may include an organic material such as an acrylic resin, benzocyclobutene (BCB), or hexamethyldisiloxane (HMDSO). The planarization layer 207 may have a single-layer structure or a multi-layer structure.

[0078] The organic material layer 209 may be disposed on the pixel circuit layer 200. The organic material layer 209 may include a plurality of organic patterns including a first organic pattern 209p1 and a second organic pattern 209p2. The first organic pattern 209p1 may have a first inclined surface ss1, a second inclined surface ss2, and a first upper surface us1, wherein the first inclined surface ss1 is inclined in a fourth direction DR4 inclined relative to the upper surface of the substrate 100, the second inclined surface ss2 is inclined in a fifth direction DR5 different from the fourth direction DR4, and the first upper surface us1 connects the first inclined surface ss1 to the second inclined surface ss2. The first inclined surface ss1 and the second inclined surface ss2 may be separated from each other in the first direction (x direction), and the first upper surface us1 is between the first inclined surface ss1 and the second inclined surface ss2. The second organic pattern 209p2 may have a third inclined surface ss3, a fourth inclined surface ss4, and a second upper surface us2, wherein the third inclined surface ss3 is inclined in the fourth direction DR4, the fourth inclined surface ss4 is inclined in the fifth direction DR5, and the second upper surface us2 connects the third inclined surface ss3 to the fourth inclined surface ss4. The third inclined surface ss3 and the fourth inclined surface ss4 may be separated from each other in the first direction (x direction), and the second upper surface us2 is located between the third inclined surface ss3 and the fourth inclined surface ss4.

[0079] The first inclined surface ss1 of the first organic pattern 209p1 may form a first angle θ1 counterclockwise relative to the upper surface 207us of the planarization layer 207, and the second inclined surface ss2 may form a first angle θ1 clockwise relative to the upper surface 207us of the planarization layer 207. Similarly, the third inclined surface ss3 of the second organic pattern 209p2 may form a second angle θ2 counterclockwise relative to the upper surface 207us of the planarization layer 207, and the fourth inclined surface ss4 may form a second angle θ2 clockwise relative to the upper surface 207us of the planarization layer 207. The first angle θ1 and the second angle θ2 may be equal to or different from each other. For example, in an embodiment, the first angle θ1 and the second angle θ2 may be about 15° to about 60°. In some embodiments, the first angle θ1 and the second angle θ2 may be about 28°.

[0080] The first upper surface us1 of the first organic pattern 209p1 may have a first height h1 measured from the upper surface 207us of the planarization layer 207 along the third direction (z direction). The second upper surface us2 of the second organic pattern 209p2 may have a second height h2 measured from the upper surface 207us of the planarization layer 207 along the third direction (z direction). In an embodiment, the first height h1 and the second height h2 may be different from each other. For example, the first height h1 may be greater than the second height h2. The first height h1 and the second height h2 may be 10 μm or less.

[0081] In some embodiments, the organic material layer 209 may further include a third organic pattern 209p3 (see Figure 5 ). The third organic pattern 209p3 may have a fifth inclined surface, a sixth inclined surface, and a third upper surface, wherein the fifth inclined surface is inclined in the fourth direction DR4, the sixth inclined surface is inclined in the fifth direction DR5, and the third upper surface connects the fifth inclined surface to the sixth inclined surface. The third upper surface of the third organic pattern 209p3 may have a third height measured from the upper surface 207us of the planarization layer 207 along the third direction (z direction). In an embodiment, the third height may be different from the first height h1 and the second height h2. For example, the third height may be greater than the first height h1 and / or the second height h2. In some embodiments, the third height may be equal to the first height h1. The third height may be 10μm or less. The fifth inclined surface of the third organic pattern 209p3 may form a third angle counterclockwise relative to the upper surface 207us of the planarization layer 207, and the sixth inclined surface may form a third angle clockwise relative to the upper surface 207us of the planarization layer 207. The third angle may be equal to or different from the first angle θ1 and / or the second angle θ2.

[0082] The display element layer 300 may be disposed on the organic material layer 209. The display element layer 300 may include a plurality of light emitting diodes EDr1, EDr2, EDb1, and EDb2, and a bank layer BNL.

[0083] For example, each of the light emitting diodes EDr1 , EDr2 , EDb1 , and EDb2 may include a pixel electrode 310 , an opposing electrode 330 , and an emission layer 320 disposed between the pixel electrode 310 and the opposing electrode 330 .

[0084] The pixel electrode 310 may be a reflective electrode. In an embodiment, the pixel electrode 310 may include a reflective layer and a transparent or semi-transparent electrode layer on the reflective layer. The reflective layer may include silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr) or a compound thereof. The transparent or semi-transparent electrode layer may include at least one of indium tin oxide, indium zinc oxide, zinc oxide, indium oxide, indium gallium oxide and aluminum zinc oxide. In an embodiment, the pixel electrode 310 may have a three-layer structure of an indium tin oxide (ITO) layer, an Ag layer and an ITO layer.

[0085] The bank layer BNL may be disposed on the planarization layer 207 and the organic material layer 209 and cover the edge of the pixel electrode 310. The bank layer BNL may define openings OP that expose the upper surfaces of the pixel electrodes 310, respectively. The openings OP of the bank layer BNL may define an emission area EA of each sub-pixel. The bank layer BNL may cover the edge of the pixel electrode 310 and prevent arcing, etc., from occurring at the edge of the pixel electrode 310 by increasing the distance between the edge of the pixel electrode 310 and the edge of the opposite electrode 330. The bank layer BNL may be formed by spin coating, etc., using an organic insulating material such as polyimide, polyamide, acrylic resin, benzocyclobutene, hexamethyldisiloxane (HMDSO), and / or phenolic resin.

[0086] In an embodiment, the bank layer BNL may include a light blocking material and be provided in black. The light blocking material may include carbon nanotubes, a resin or paste containing a black dye (e.g., carbon black), metal particles (e.g., nickel, aluminum, molybdenum, and alloys thereof), metal oxide particles (e.g., chromium oxide), or metal nitride particles (e.g., chromium nitride). In the case where the bank layer BNL includes the light blocking material, external light reflection caused by a metal structure disposed under the bank layer BNL may be reduced.

[0087] In an embodiment, the organic material layer 209 may include the same material as that of the bank layer BNL. For example, the organic material layer 209 may include an organic insulating material such as polyimide, polyamide, acrylic resin, benzocyclobutene, hexamethyldisiloxane (HMDSO) and / or phenolic resin. In the case where the bank layer BNL includes a light blocking material, the organic material layer 209 may include a light blocking material.

[0088] The emission layer 320 may be disposed on the pixel electrode 310. The emission layer 320 may include an organic material including a fluorescent material or a phosphorescent material that emits blue light, green light, or red light. The organic material may include a low molecular weight organic material or a high molecular weight organic material. The emission layer 320 may be disposed inside the opening OP of the bank layer BNL to correspond to the pixel electrode 310.

[0089] The first common layer and / or the second common layer may be disposed below and above the emission layer 320, respectively. The first common layer is an element disposed below the emission layer 320, and may include, for example, a hole transport layer (HTL), or include an HTL and / or a hole injection layer (HIL). The second common layer is an element disposed on the emission layer 320, and may include an electron transport layer (ETL) and / or an electron injection layer (EIL). In some embodiments, the second common layer may not be provided.

[0090] Similar to the opposing electrode 330 described below, the first common layer and the second common layer may be an integrally formed common layer that completely covers the display area DA.

[0091] The opposite electrode 330 may be a cathode as an electron injection electrode. A metal, an alloy, a conductive compound or any combination thereof having a low work function may be used as a material for forming the opposite electrode 330. The opposite electrode 330 may be a transmissive electrode, a semi-transmissive electrode or a reflective electrode. The opposite electrode 330 may be integrally formed on the plurality of light emitting diodes EDr1, EDr2, EDb1 and EDb2, completely covering the display area DA.

[0092] The opposing electrode 330 may include lithium (Li), silver (Ag), magnesium (Mg), aluminum (Al), calcium (Ca), ytterbium (Yb), ITO, indium zinc oxide (IZO), or any combination thereof (such as aluminum lithium (Al-Li), magnesium indium (Mg-In), magnesium silver (Mg-Ag), silver ytterbium (Ag-Yb)). The opposing electrode 330 may have a single-layer structure or a multi-layer structure.

[0093] In an embodiment, a coating layer may also be provided on the opposite electrode 330. Based on the principle of constructive interference, the coating layer may improve the external luminous efficiency of the organic light emitting element. The coating layer may include a material having a refractive index of about 1.6 (relative to light having a wavelength of about 589 nm). The coating layer may be an organic coating layer including an organic material, an inorganic coating layer including an inorganic material, or a composite coating layer including an organic material and an inorganic material.

[0094] The first organic pattern 209p1 may overlap with the first sub-pixel group SG1. The first sub-pixel group SG1 may include a first red sub-pixel Pr1 and a second red sub-pixel Pr2. The first red sub-pixel Pr1 may include a first light-emitting diode EDr1 and a first sub-pixel circuit PCr1 electrically connected to the first light-emitting diode EDr1. The second red sub-pixel Pr2 may include a second light-emitting diode EDr2 and a second sub-pixel circuit PCr2 electrically connected to the second light-emitting diode EDr2. The first light-emitting diode EDr1 may be configured to emit light according to an electrical signal applied to the first sub-pixel circuit PCr1, and the second light-emitting diode EDr2 may be configured to emit light according to an electrical signal applied to the second sub-pixel circuit PCr2. For example, the first light-emitting diode EDr1 and the second light-emitting diode EDr2 may be configured to emit light according to different electrical signals.

[0095] The first light emitting diode EDr1 may be disposed on the first inclined surface ss1 of the first organic pattern 209p1. For example, the pixel electrode 310 of the first light emitting diode EDr1 may extend from the upper surface 207us of the planarization layer 207 to the first upper surface us1 of the first organic pattern 209p1 via the first inclined surface ss1 of the first organic pattern 209p1. The second light emitting diode EDr2 may be disposed on the second inclined surface ss2 of the first organic pattern 209p1. For example, the pixel electrode 310 of the second light emitting diode EDr2 may extend from the upper surface 207us of the planarization layer 207 to the first upper surface us1 of the first organic pattern 209p1 via the second inclined surface ss2 of the first organic pattern 209p1.

[0096] The second organic pattern 209p2 may overlap with the second sub-pixel group SG2. The second sub-pixel group SG2 may include a first blue sub-pixel Pb1 and a second blue sub-pixel Pb2. The first blue sub-pixel Pb1 may include a third light-emitting diode EDb1 and a third sub-pixel circuit PCb1 electrically connected to the third light-emitting diode EDb1. The second blue sub-pixel Pb2 may include a fourth light-emitting diode EDb2 and a fourth sub-pixel circuit PCb2 electrically connected to the fourth light-emitting diode EDb2. The third light-emitting diode EDb1 may be configured to emit light according to an electrical signal applied to the third sub-pixel circuit PCb1, and the fourth light-emitting diode EDb2 may be configured to emit light according to an electrical signal applied to the fourth sub-pixel circuit PCb2. The third light-emitting diode EDb1 and the fourth light-emitting diode EDb2 may be configured to emit light according to different electrical signals.

[0097] The third light emitting diode EDb1 may be disposed on the third inclined surface ss3 of the second organic pattern 209p2. For example, the pixel electrode 310 of the third light emitting diode EDb1 may extend from the upper surface 207us of the planarization layer 207 to the second upper surface us2 of the second organic pattern 209p2 via the third inclined surface ss3 of the second organic pattern 209p2. The fourth light emitting diode EDb2 may be disposed on the fourth inclined surface ss4 of the second organic pattern 209p2. The pixel electrode 310 of the fourth light emitting diode EDb2 may extend from the upper surface 207us of the planarization layer 207 to the second upper surface us2 of the second organic pattern 209p2 via the fourth inclined surface ss4 of the second organic pattern 209p2.

[0098] The bank layer BNL may define openings OP respectively overlapping the light emitting diodes EDr1, EDr2, EDb1, and EDb2. The openings OP corresponding to the light emitting diodes EDr1, EDr2, EDb1, and EDb2 may respectively overlap the first, second, third, and fourth inclined surfaces ss1, ss2, ss3, and ss4.

[0099] The first light emitting diode EDr1 and the second light emitting diode EDr2 may be configured to emit light of the same color. For example, the first light emitting diode EDr1 and the second light emitting diode EDr2 may be configured to emit red light. The third light emitting diode EDb1 and the fourth light emitting diode EDb2 may be configured to emit light of the same color. For example, the third light emitting diode EDb1 and the fourth light emitting diode EDb2 may be configured to emit blue light.

[0100] As reference Figure 5 As described, a third sub-pixel group SG3 overlapping the third organic pattern 209p3 may be arranged. The third sub-pixel group SG3 may include a first green sub-pixel Pg1 and a second green sub-pixel Pg2. The first green sub-pixel Pg1 may include a fifth light-emitting diode and a fifth sub-pixel circuit electrically connected to the fifth light-emitting diode. The second green sub-pixel Pg2 may include a sixth light-emitting diode and a sixth sub-pixel circuit electrically connected to the sixth light-emitting diode. The fifth light-emitting diode may be configured to emit light according to an electrical signal applied to the fifth sub-pixel circuit, and the sixth light-emitting diode may be configured to emit light according to an electrical signal applied to the sixth sub-pixel circuit. The fifth light-emitting diode and the sixth light-emitting diode may be configured to emit light according to different electrical signals.

[0101] The fifth light emitting diode may be disposed on the fifth inclined surface of the third organic pattern 209p3. For example, the pixel electrode 310 of the fifth light emitting diode may extend from the upper surface 207us of the planarization layer 207 to the third upper surface of the third organic pattern 209p3 via the fifth inclined surface of the third organic pattern 209p3. The pixel electrode 310 of the sixth light emitting diode may extend from the upper surface 207us of the planarization layer 207 to the third upper surface of the third organic pattern 209p3 via the sixth inclined surface of the third organic pattern 209p3.

[0102] In some embodiments, as shown in Figure 6 As described, a third sub-pixel group SG3 overlapping the first organic pattern 209p1 extending in the second direction (y direction) may be provided. In this case, the fifth light-emitting diode may be provided on the first inclined surface ss1 of the first organic pattern 209p1. The pixel electrode 310 of the fifth light-emitting diode may extend from the upper surface 207us of the planarization layer 207 to the first upper surface us1 of the first organic pattern 209p1 via the first inclined surface ss1 of the first organic pattern 209p1. The sixth light-emitting diode may be provided on the second inclined surface ss2 of the first organic pattern 209p1. For example, the pixel electrode 310 of the sixth light-emitting diode may extend from the upper surface 207us of the planarization layer 207 to the first upper surface us1 of the first organic pattern 209p1 via the second inclined surface ss2 of the first organic pattern 209p1.

[0103] Depending on the emission efficiency of the light-emitting diodes EDr1, EDr2, EDb1, and EDb2, the size of the opening OP of the bank layer BNL may be different. Therefore, the width (or area) of the emission area EA defined by the opening OP may be different from each other. For example, the width (or area) of the emission area EA of each of the third light-emitting diode EDb1 and the fourth light-emitting diode EDb2 configured to emit blue light may be smaller than the width (or area) of the emission area EA of each of the first light-emitting diode EDr1 and the second light-emitting diode EDr2 configured to emit red light.

[0104] The encapsulation layer 400 encapsulating the light emitting diodes EDr1, EDr2, EDb1, and EDb2 may be disposed on the display element layer 300. The encapsulation layer 400 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. For example, the inorganic encapsulation layer may include aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), zinc oxide (ZnO x , which can be ZnO or ZnO 2), silicon oxide (SiO x ), silicon nitride (SiN x ) and silicon oxynitride (SiO x N y ). For example, the organic encapsulation layer may include a polymer material (such as acrylic resin, epoxy resin, polyimide and / or polyethylene). In an embodiment, at least one organic encapsulation layer may include acrylate. Figure 7 As shown in FIG. 4 , the encapsulation layer 400 may include a first inorganic encapsulation layer 410, a second inorganic encapsulation layer 430, and an organic encapsulation layer 420 disposed between the first inorganic encapsulation layer 410 and the second inorganic encapsulation layer 430. The organic encapsulation layer 420 may cover uneven portions of the light emitting diodes EDr1, EDr2, EDb1, and EDb2 and provide a flat upper surface.

[0105] The light blocking layer 500 may be disposed on the encapsulation layer 400. The light blocking layer 500 may include a light blocking pattern 510 and an overcoat layer 520.

[0106] The light blocking pattern 510 may be disposed on the second inorganic encapsulation layer 430. The light blocking pattern 510 may include a light absorbing material and / or a low reflective material. The light blocking pattern 510 may define a light transmissive opening 510OP overlapping with the opening OP of the bank layer BNL. The main body portion of the light blocking pattern 510 may overlap with the main body portion of the bank layer BNL. The main body portion of the light blocking pattern 510 is distinguished from the light transmissive opening 510OP and represents a portion having a preset volume. Similarly, the main body portion of the bank layer BNL is distinguished from the opening OP and represents a portion having a preset volume.

[0107] The width (or area) of each of the plurality of light-transmitting openings 510OP may be changed by the width (or area) of the opening OP corresponding thereto. For example, the width (or area) of the light-transmitting opening 510OP overlapping the first red sub-pixel Pr1 may be greater than the width (or area) of the light-transmitting opening 510OP overlapping the first blue sub-pixel Pb1.

[0108] The body portion of the light blocking pattern 510 may define a light blocking area SHA that blocks light emitted by the light emitting diodes EDr1, EDr2, EDb1, and EDb2. The light transmission opening 510OP of the light blocking pattern 510 may define a transmission area TA through which light emitted by the light emitting diodes EDr1, EDr2, EDb1, and EDb2 may pass. Since the light transmission opening 510OP of the light blocking pattern 510 overlaps with the opening OP of the bank layer BNL, the transmission area TA may overlap with the emission area EA.

[0109] In this case, the pixel electrode 310 is inclined relative to the upper surface of the substrate 100, and the center of the transmission area TA may not coincide with the center of the emission area EA. For example, the center of the transmission area TA overlapping with the first light-emitting diode EDr1 may be located to the left (-x direction) of the center of the emission area EA of the first light-emitting diode EDr1. The center of the transmission area TA overlapping with the second light-emitting diode EDr2 may be located to the right (+x direction) of the center of the emission area EA of the second light-emitting diode EDr2. Similarly, the center of the transmission area TA overlapping with the third light-emitting diode EDb1 may be located to the left (-x direction) of the center of the emission area EA of the third light-emitting diode EDb1, and the center of the transmission area TA overlapping with the fourth light-emitting diode EDb2 may be located to the right (+x direction) of the center of the emission area EA of the fourth light-emitting diode EDb2.

[0110] In the case where light emitted by the light emitting diodes EDr1, EDr2, EDb1, and EDb2 has a preset angle, the emitted light may be absorbed by the light blocking pattern 510. Therefore, light emitted by some of the sub-pixels P may be blocked depending on the position of the user.

[0111] The overcoat 520 may be disposed on the light blocking pattern 510 to cover the light blocking pattern 510. The overcoat 520 may cover the light transmissive opening 510OP of the light blocking pattern 510 and provide a flat upper surface. The overcoat 520 may include a light transmissive organic material. For example, the overcoat 520 may include an acrylic resin (e.g., polymethyl methacrylate, polyacrylic acid, etc.), ethylhexyl acrylate, pentafluoropropyl acrylate, polyethylene glycol dimethacrylate, poly(ethylene glycol) dimethacrylate, or ethylene glycol dimethacrylate.

[0112] In an embodiment, the light blocking pattern 510 may include a plurality of layers. For example, the light blocking pattern 510 may include a first light blocking pattern and a second light blocking pattern. One or more light transmitting material layers may be disposed between the first light blocking pattern and the second light blocking pattern.

[0113] Figure 8 is a view for explaining a path of light emitted by the display device 1 according to an embodiment of the inventive concept, and Fig. 9 2 is a view for explaining a dual-view display apparatus 1 according to an embodiment of the inventive concept.

[0114] Reference Figure 8 The display device 1 may include a substrate 100 . The pixel circuit layer 200 may be disposed on the substrate 100 , wherein the pixel circuit layer 200 includes a first sub-pixel circuit PCr1 , a second sub-pixel circuit PCr2 , a buffer layer 201 , a gate insulating layer 203 , an interlayer insulating layer 205 , and a planarization layer 207 .

[0115] The first organic pattern 209p1 may be disposed on the pixel circuit layer 200. The first organic pattern 209p1 may have a first inclined surface ss1, a second inclined surface ss2, and a first upper surface us1. The first inclined surface ss1 is inclined in a fourth direction DR4 inclined relative to the upper surface of the substrate 100, and the second inclined surface ss2 is inclined in a fifth direction DR5 different from the fourth direction DR4. The first upper surface us1 connects the first inclined surface ss1 to the second inclined surface ss2. The first inclined surface ss1 of the first organic pattern 209p1 may form a first angle θ1 counterclockwise relative to the upper surface 207us of the planarization layer 207. The second inclined surface ss2 of the first organic pattern 209p1 may form a first angle θ1 clockwise relative to the upper surface 207us of the planarization layer 207. The first upper surface us1 of the first organic pattern 209p1 may have a first height h1 measured from the upper surface 207us of the planarization layer 207 in the third direction (z direction). The first height h1 may be 10 μm or less.

[0116] The display element layer 300 may be disposed on the planarization layer 207 and the first organic pattern 209p1. The display element layer 300 may include a first light emitting diode EDr1, a second light emitting diode EDr2, and a bank layer BNL.

[0117] Each of the first light emitting diode EDr1 and the second light emitting diode EDr2 may include a pixel electrode 310 , an opposing electrode 330 , and an emission layer 320 disposed between the pixel electrode 310 and the opposing electrode 330 .

[0118] The bank layer BNL may be disposed on the planarization layer 207 and the first organic pattern 209p1, covering the edge of the pixel electrode 310. The bank layer BNL may define openings OP that respectively expose the upper surfaces of the pixel electrodes 310. The openings OP of the bank layer BNL may define each sub-pixel P (see Figure 3 In an embodiment, the first organic pattern 209p1 may include the same material as that of the bank layer BNL.

[0119] The first organic pattern 209p1 may overlap with the first sub-pixel group SG1. The first sub-pixel group SG1 may include a first red sub-pixel Pr1 and a second red sub-pixel Pr2. The first red sub-pixel Pr1 may include a first light-emitting diode EDr1 and a first sub-pixel circuit PCr1 electrically connected to the first light-emitting diode EDr1. The second red sub-pixel Pr2 may include a second light-emitting diode EDr2 and a second sub-pixel circuit PCr2 electrically connected to the second light-emitting diode EDr2. The first light-emitting diode EDr1 and the second light-emitting diode EDr2 may be configured to emit light of the same color.

[0120] The first light emitting diode EDr1 may be disposed on the first inclined surface ss1 of the first organic pattern 209p1. For example, the pixel electrode 310 of the first light emitting diode EDr1 may extend from the upper surface 207us of the planarization layer 207 to the first upper surface us1 of the first organic pattern 209p1 via the first inclined surface ss1 of the first organic pattern 209p1. The second light emitting diode EDr2 may be disposed on the second inclined surface ss2 of the first organic pattern 209p1. For example, the pixel electrode 310 of the second light emitting diode EDr2 may extend from the upper surface 207us of the planarization layer 207 to the first upper surface us1 of the first organic pattern 209p1 via the second inclined surface ss2 of the first organic pattern 209p1.

[0121] When viewed in a direction perpendicular to the upper surface of the substrate 100 (e.g., in a plan view), the first inclined surface ss1 of the first organic pattern 209p1 may have a first width w1 measured along the first direction (x direction). In a plan view, the pixel electrode 310 of the first light emitting diode EDr1 may have a second width w2 measured along the first direction (x direction). The first width w1 may be smaller than the second width w2.

[0122] In a plan view, similar to the first inclined surface ss1, the second inclined surface ss2 of the second organic pattern 209p2 may have a first width w1 measured along the first direction (x direction). Similar to the pixel electrode 310 of the first light emitting diode EDr1, the pixel electrode 310 of the second light emitting diode EDr2 may have a second width w2 measured along the first direction (x direction).

[0123] In this case, the contact portion may be disposed on the upper surface 207us of the planarization layer 207. The contact portion connects the pixel electrode 310 of the first light emitting diode EDr1 to the first sub-pixel circuit PCr1. Similarly, the contact portion may be disposed on the upper surface 207us of the planarization layer 207, wherein the contact portion connects the pixel electrode 310 of the second light emitting diode EDr2 to the second sub-pixel circuit PCr2.

[0124] The opening OP of the bank layer BNL may overlap with the first inclined surface ss1 or the second inclined surface ss2. In an embodiment, the opening OP of the bank layer BNL may be disposed inside the first inclined surface ss1 and the second inclined surface ss2 when viewed on a plane.

[0125] The first inclined surface ss1 of the first organic pattern 209p1 forms a first angle θ1 counterclockwise with respect to the upper surface 207us of the planarization layer 207, and the first light L1 emitted from the pixel electrode 310 perpendicular to the first light emitting diode EDr1 may travel counterclockwise at the first angle θ1 relative to the third direction (z direction) perpendicular to the upper surface of the substrate 100. The second inclined surface ss2 of the first organic pattern 209p1 forms a first angle θ1 clockwise with respect to the upper surface 207us of the planarization layer 207, and the third light L3 emitted from the pixel electrode 310 perpendicular to the second light emitting diode EDr2 may travel clockwise at the first angle θ1 relative to the third direction (z direction) perpendicular to the upper surface of the substrate 100.

[0126] Therefore, the main light angles of the first light emitting diode EDr1 and the second light emitting diode EDr2 can be adjusted by adjusting the first angle θ1 according to the position of the user, and the position of the user can be the position of the driver's seat and the passenger seat of the vehicle. In the embodiment, the driver's seat and the passenger seat of the vehicle are relative to the front surface FS1 (see FIG. 1 ) perpendicular to the display device 1. Figure 2 ) when the third direction (z direction) is at ±45°, the first angle θ1 can be approximately 28°.

[0127] The main portion of the bank layer BNL may be disposed on the first upper surface us1 of the first organic pattern 209p1. The main portion of the bank layer BNL disposed between adjacent emission areas EA may have a third width w3. For example, the emission area EA of the first light emitting diode EDr1 and the emission area EA of the second light emitting diode EDr2 may be spaced apart from each other by the third width w3.

[0128] The encapsulation layer 400 may be disposed on the display element layer 300 , wherein the encapsulation layer 400 encapsulates the first light emitting diode EDr1 and the second light emitting diode EDr2 . The encapsulation layer 400 may include a first inorganic encapsulation layer 410 , a second inorganic encapsulation layer 430 , and an organic encapsulation layer 420 disposed between the first inorganic encapsulation layer 410 and the second inorganic encapsulation layer 430 .

[0129] The light blocking layer 500 may be disposed on the encapsulation layer 400. The light blocking layer 500 may include a light blocking pattern 510 and an overcoat 520. The light blocking pattern 510 may define a light transmissive opening 510OP overlapping with the opening OP of the bank layer BNL. A main portion of the light blocking pattern 510 may overlap with a main portion of the bank layer BNL. A main portion of the light blocking pattern 510 may define a light blocking area SHA. The light transmissive opening 510OP of the light blocking pattern 510 may define a transmissive area TA. A main portion of the light blocking pattern 510 disposed between adjacent transmissive areas TA may have a fourth width w4.

[0130] The light blocking pattern 510 may be configured to absorb a portion of the light emitted by the light emitting diodes EDr1 and EDr2. The second light L2 emitted obliquely to the right (+x direction) from the pixel electrode 310 of the first light emitting diode EDr1 may be absorbed by the main portion of the light blocking pattern 510. Similarly, the fourth light L4 emitted obliquely to the left (-x direction) from the pixel electrode 310 of the second light emitting diode EDr2 may be absorbed by the main portion of the light blocking pattern 510. Only the light emitted from the first light emitting diode EDr1 may pass through the transmission area TA defined by the first light blocking opening 510OP1, and only the light from the second light emitting diode EDr2 may pass through the transmission area TA defined by the second light blocking opening 510OP2. The viewing angle of the light emitted from the first light emitting diode EDr1 and the second light emitting diode EDr2 may be determined by adjusting the third width w3 of the bank layer BNL and the fourth width w4 of the light blocking pattern 510.

[0131] The overcoat 520 may be disposed on the light blocking pattern 510 to cover the light blocking pattern 510. The overcoat 520 may embed the light transmitting opening 510OP of the light blocking pattern 510 to provide a flat upper surface.

[0132] Reference Fig. 9 And combined with Figure 3 and Figure 7 , the display device 1 can be configured to provide a dual view of different images depending on the position of the user. For example, when the user's position belongs to the first observation area VA1 (the first observation area VA1 is located in the left (-x direction) oblique direction of the front surface FS1 of the display device 1), only the light emitted by the first red sub-pixel Pr1 among the multiple sub-pixels P in the first sub-pixel group SG1 can reach the user. On the contrary, when the user's position belongs to the second observation area VA2 (the second observation area VA2 is located in the right (+x direction) oblique direction of the front surface FS1 of the display device 1), only the light emitted by the second red sub-pixel Pr2 among the multiple sub-pixels P in the first sub-pixel group SG1 can reach the user.

[0133] In this case, among the lights emitted by the first red sub-pixel Pr1, the first light L1 emitted perpendicular to the pixel electrode 310 of the first light emitting diode EDr1 may have the strongest intensity. As described above, the direction of the first light L1 may be adjusted at the first angle θ1, which is an angle formed by the first inclined surface ss1 of the first organic pattern 209p1 and the upper surface 207us of the planarization layer 207. Among the lights emitted by the first red sub-pixel Pr1, the light emitted in the direction of the second observation area VA2 may be absorbed by the main body portion of the light blocking pattern 510.

[0134] Among the lights emitted by the second red sub-pixel Pr2, the third light L3 emitted perpendicular to the pixel electrode 310 of the second light emitting diode EDr2 may have the strongest intensity. The direction of the third light L3 may be adjusted at a first angle θ1, which is an angle formed by the second inclined surface ss2 of the first organic pattern 209p1 and the upper surface 207us of the planarization layer 207. Among the lights emitted by the second red sub-pixel Pr2, the light emitted in the direction of the first observation area VA1 may be absorbed by the main body portion of the light blocking pattern 510.

[0135] Therefore, the display device 1 may be configured to provide two different images to the first observation area VA1 and the second observation area VA2 .

[0136] Fig.10 is a schematic enlarged plan view of a portion of a display device 1 according to an embodiment of the inventive concept. Fig.10 Schematically shows Figure 3 Area B of the display device 1 is shown in .

[0137] Reference Fig.10 The display device 1 may include a substrate 100 (see Figure 3 ). A plurality of pixels PX may be arranged in a display area DA of the substrate 100 (see Figure 3 Each pixel PX may include a sub-pixel P configured to emit one of red light, green light, blue light, and white light (eg, see Figure 3 ). For example, in Fig.10 FIG. 4 shows that the pixel PX includes three red sub-pixels Pr1, Pr2 and Pr3, three green sub-pixels Pg1, Pg2 and Pg3, and three blue sub-pixels Pb1, Pb2 and Pb3. In an embodiment, the pixel PX may further include three white sub-pixels.

[0138] A plurality of organic patterns may be disposed on the substrate 100. Each of the organic patterns may have two inclined surfaces inclined in different directions and one upper surface disposed between the inclined surfaces.

[0139] The organic pattern may overlap with the sub-pixel groups SG1, SG2, and SG3 including the sub-pixels P configured to emit light of the same color. For example, the first organic pattern 209p1 may overlap with the first sub-pixel group SG1 including the first red sub-pixel Pr1, the second red sub-pixel Pr2, and the third red sub-pixel Pr3, the second organic pattern 209p2 may overlap with the second sub-pixel group SG2 including the first blue sub-pixel Pb1, the second blue sub-pixel Pb2, and the third blue sub-pixel Pb3, and the third organic pattern 209p3 may overlap with the third sub-pixel group SG3 including the first green sub-pixel Pg1, the second green sub-pixel Pg2, and the third green sub-pixel Pg3.

[0140] The subpixels P in each subpixel group SG1, SG2, and SG3 may be separated from each other in the first direction (x direction). For example, the first red subpixel Pr1, the second red subpixel Pr2, and the third red subpixel Pr3 in the first subpixel group SG1 may be separated from each other sequentially in the first direction (x direction), the first blue subpixel Pb1, the second blue subpixel Pb2, and the third blue subpixel Pb3 in the second subpixel group SG2 may be separated from each other sequentially in the first direction (x direction), and the first green subpixel Pg1, the second green subpixel Pg2, and the third green subpixel Pg3 in the third subpixel group SG3 may be separated from each other sequentially in the first direction (x direction).

[0141] The first organic pattern 209p1 and the second organic pattern 209p2 may be separated from each other in the first direction (x direction). Therefore, the first sub-pixel group SG1 and the second sub-pixel group SG2 may be separated from each other in the first direction (x direction).

[0142] The first organic pattern 209p1 and the third organic pattern 209p3 may be separated from each other in the second direction (y direction). Therefore, the first subpixel group SG1 and the third subpixel group SG3 may be separated from each other in the second direction (y direction). For example, the first red subpixel Pr1 and the first green subpixel Pg1 may be separated from each other in the second direction (y direction), the second red subpixel Pr2 and the second green subpixel Pg2 may be separated from each other in the second direction (y direction), and the third red subpixel Pr3 and the third green subpixel Pg3 may be separated from each other in the second direction (y direction).

[0143] One of the sub-pixels P included in each sub-pixel group SG1, SG2 and SG3 may overlap with the inclined surface on one side of the organic pattern, another sub-pixel P included in each sub-pixel group SG1, SG2 and SG3 may overlap with the inclined surface on the other side of the organic pattern, and yet another sub-pixel P may overlap with the upper surface of the organic pattern.

[0144] For example, the first red subpixel Pr1, the first blue subpixel Pb1, and the first green subpixel Pg1 may overlap with the boundary surface of the left side (-x direction) of the first organic pattern 209p1, the boundary surface of the left side (-x direction) of the second organic pattern 209p2, and the boundary surface of the left side (-x direction) of the third organic pattern 209p3, respectively. The second red subpixel Pr2, the second blue subpixel Pb2, and the second green subpixel Pg2 may overlap with the boundary surface of the right side (+x direction) of the first organic pattern 209p1, the boundary surface of the right side (+x direction) of the second organic pattern 209p2, and the boundary surface of the right side (+x direction) of the third organic pattern 209p3, respectively. The third red subpixel Pr3, the third blue subpixel Pb3, and the third green subpixel Pg3 may overlap with the upper surface of the first organic pattern 209p1, the upper surface of the second organic pattern 209p2, and the upper surface of the third organic pattern 209p3, respectively.

[0145] The sub-pixels P (e.g., the first red sub-pixel Pr1, the first blue sub-pixel Pb1, and the first green sub-pixel Pg1) arranged on the boundary surface on the left side (-x direction) of the organic pattern can be observed by a user who is located on the left side (-x direction) obliquely relative to the third direction (z direction) perpendicular to the upper surface of the substrate 100. The sub-pixels P (e.g., the second red sub-pixel Pr2, the second blue sub-pixel Pb2, and the second green sub-pixel Pg2) arranged on the boundary surface on the right side (+x direction) of the organic pattern can be observed by a user who is located on the right side (+x direction) obliquely relative to the third direction (z direction) perpendicular to the upper surface of the substrate 100. The sub-pixels P (e.g., the third red sub-pixel Pr3, the third blue sub-pixel Pb3, and the third green sub-pixel Pg3) arranged on the upper surface of the organic pattern can be observed by a user who is located in the third direction (z direction) perpendicular to the upper surface of the substrate 100. Therefore, the display device 1 can be configured to display different images depending on the position of the user.

[0146] In another embodiment, one organic pattern may extend in the second direction (y direction) and overlap with the pixels PX arranged in the same column. For example, each of the first organic pattern 209p1 and the second organic pattern 209p2 may extend in the second direction (y direction) to overlap with one or more pixels PX. The first organic pattern 209p1 and the second organic pattern 209p2 may be separated from each other in the first direction (x direction). In this case, the third sub-pixel group SG3 may overlap with the first organic pattern 209p1, and the first sub-pixel group SG1 and the third sub-pixel group SG3 may be alternately arranged in the second direction (y direction).

[0147] Fig.11 is along Fig.10The line D-D' intercepts Fig.10 Schematic cross-sectional view of a display device 1 . Fig.11 and Figure 7 Similar, but different in that: each of the first sub-pixel group SG1 and the second sub-pixel group SG2 includes three sub-pixels P (eg, see Figure 3 ). To the extent that details are not described, it can be assumed that the elements are at least similar to corresponding elements described in the previous figures.

[0148] In the display area DA, the pixel circuit layer 200 , the display element layer 300 , the encapsulation layer 400 , and the light blocking layer 500 may be sequentially stacked on the substrate 100 in the third direction (z direction).

[0149] The pixel circuit layer 200 may be disposed on the substrate 100 , and may include a plurality of sub-pixel circuits PCr1 , PCr2 , PCr3 , PCb1 , PCb2 , and PCb3 , a buffer layer 201 , a gate insulating layer 203 , an interlayer insulating layer 205 , and a planarization layer 207 .

[0150] The organic material layer 209 may be disposed on the pixel circuit layer 200. The organic material layer 209 may include a plurality of organic patterns including a first organic pattern 209p1 and a second organic pattern 209p2. The first organic pattern 209p1 may have a first inclined surface ss1, a second inclined surface ss2, and a first upper surface us1, wherein the first inclined surface ss1 is inclined in a fourth direction DR4 inclined relative to the upper surface of the substrate 100, the second inclined surface ss2 is inclined in a fifth direction DR5 different from the fourth direction DR4, and the first upper surface us1 connects the first inclined surface ss1 to the second inclined surface ss2. The second organic pattern 209p2 may have a third inclined surface ss3, a fourth inclined surface ss4, and a second upper surface us2, wherein the third inclined surface ss3 is inclined in the fourth direction DR4, the fourth inclined surface ss4 is inclined in the fifth direction DR5, and the second upper surface us2 connects the third inclined surface ss3 to the fourth inclined surface ss4.

[0151] The first inclined surface ss1 of the first organic pattern 209p1 may form a first angle θ1 counterclockwise with respect to the upper surface 207us of the planarization layer 207. The second inclined surface ss2 of the first organic pattern 209p1 may form a first angle θ1 clockwise with respect to the upper surface 207us of the planarization layer 207. The third inclined surface ss3 of the second organic pattern 209p2 may form a second angle θ2 counterclockwise with respect to the upper surface 207us of the planarization layer 207. The fourth inclined surface ss4 of the second organic pattern 209p2 may form a second angle θ2 clockwise with respect to the upper surface 207us of the planarization layer 207. The first angle θ1 and the second angle θ2 may be equal to or different from each other. In an embodiment, the first angle θ1 and the second angle θ2 may be about 15° to about 60°. In some embodiments, the first angle θ1 and the second angle θ2 may be about 28°.

[0152] The first upper surface us1 of the first organic pattern 209p1 may have a first height h1 measured from the upper surface 207us of the planarization layer 207 along the third direction (z direction). The second upper surface us2 of the second organic pattern 209p2 may have a second height h2 measured from the upper surface 207us of the planarization layer 207 along the third direction (z direction). In an embodiment, the first height h1 and the second height h2 may be different from each other. For example, the first height h1 may be greater than the second height h2. The first height h1 and the second height h2 may be 10 μm or less.

[0153] As reference Fig.10 As described, in an embodiment, the organic material layer 209 may further include a third organic pattern 209p3. The third organic pattern 209p3 may have a fifth inclined surface, a sixth inclined surface, and a third upper surface, wherein the fifth inclined surface is inclined in the fourth direction DR4, the sixth inclined surface is inclined in the fifth direction DR5, and the third upper surface connects the fifth inclined surface to the sixth inclined surface. The fifth inclined surface of the third organic pattern 209p3 may form a third angle counterclockwise relative to the upper surface 207us of the planarization layer 207, and the sixth inclined surface may form a third angle clockwise relative to the upper surface 207us of the planarization layer 207. The third angle may be equal to or different from the first angle θ1 and / or the second angle θ2. The third upper surface of the third organic pattern 209p3 may have a third height measured from the upper surface 207us of the planarization layer 207 along the third direction (z direction). In an embodiment, the third height may be different from the first height h1 and the second height h2. For example, the third height may be greater than the first height h1 and the second height h2. In an embodiment, the third height may be equal to the first height h1. The third height may be 10 μm or less.

[0154] The display element layer 300 may be disposed on the organic material layer 209. The display element layer 300 may include a plurality of light emitting diodes EDr1, EDr2, EDr3, EDb1, EDb2, and EDb3, and a bank layer BNL. Each of the light emitting diodes EDr1, EDr2, EDr3, EDb1, EDb2, and EDb3 may include a pixel electrode 310, an opposing electrode 330, and an emission layer 320 disposed between the pixel electrode 310 and the opposing electrode 330.

[0155] The bank layer BNL may be disposed on the planarization layer 207 and the organic material layer 209 to cover the edge of the pixel electrode 310. The bank layer BNL may define openings OP that respectively expose the upper surfaces of the pixel electrodes 310. The openings OP of the bank layer BNL may define an emission area EA of each sub-pixel P. In an embodiment, the organic material layer 209 may include the same material as that of the bank layer BNL.

[0156] The emission layer 320 may be disposed on the pixel electrode 310. The emission layer 320 may be disposed inside the opening OP of the bank layer BNL to correspond to the pixel electrode 310. The first common layer and the second common layer may be disposed under and over the emission layer 320, respectively.

[0157] The opposite electrode 330 may be disposed on the emission layer 320. The opposite electrode 330 may be integrally formed on the plurality of light emitting diodes EDr1, EDr2, EDr3, EDb1, EDb2, and EDb3 and completely cover the display area DA.

[0158] The first organic pattern 209p1 may overlap with the first sub-pixel group SG1. The first sub-pixel group SG1 may include a first red sub-pixel Pr1, a second red sub-pixel Pr2, and a third red sub-pixel Pr3. The first red sub-pixel Pr1 may include a first light-emitting diode EDr1 and a first sub-pixel circuit PCr1 electrically connected to the first light-emitting diode EDr1. The second red sub-pixel Pr2 may include a second light-emitting diode EDr2 and a second sub-pixel circuit PCr2 electrically connected to the second light-emitting diode EDr2. The third red sub-pixel Pr3 may include a fifth light-emitting diode EDr3 and a fifth sub-pixel circuit PCr3 electrically connected to the fifth light-emitting diode EDr3.

[0159] The first light emitting diode EDr1 may be disposed on the first inclined surface ss1 of the first organic pattern 209p1. For example, the pixel electrode 310 of the first light emitting diode EDr1 may extend from the upper surface 207us of the planarization layer 207 to the first upper surface us1 of the first organic pattern 209p1 via the first inclined surface ss1 of the first organic pattern 209p1. The second light emitting diode EDr2 may be disposed on the second inclined surface ss2 of the first organic pattern 209p1. For example, the pixel electrode 310 of the second light emitting diode EDr2 may extend from the upper surface 207us of the planarization layer 207 to the first upper surface us1 of the first organic pattern 209p1 via the second inclined surface ss2 of the first organic pattern 209p1. The fifth light emitting diode EDr3 may be disposed on the first upper surface us1 of the first organic pattern 209p1.

[0160] The first light emitting diode EDr1 may be configured to emit light according to an electrical signal applied to the first sub-pixel circuit PCr1, the second light emitting diode EDr2 may be configured to emit light according to an electrical signal applied to the second sub-pixel circuit PCr2, and the fifth light emitting diode EDr3 may be configured to emit light according to an electrical signal applied to the fifth sub-pixel circuit PCr3. For example, the first light emitting diode EDr1, the second light emitting diode EDr2, and the fifth light emitting diode EDr3 may be configured to emit light according to different electrical signals, and therefore, the first light emitting diode EDr1, the second light emitting diode EDr2, and the fifth light emitting diode EDr3 may emit light simultaneously or at different times.

[0161] The second organic pattern 209p2 may overlap with the second sub-pixel group SG2. The second sub-pixel group SG2 may include a first blue sub-pixel Pb1, a second blue sub-pixel Pb2, and a third blue sub-pixel Pb3. The first blue sub-pixel Pb1 may include a third light-emitting diode EDb1 and a third sub-pixel circuit PCb1 electrically connected to the third light-emitting diode EDb1. The second blue sub-pixel Pb2 may include a fourth light-emitting diode EDb2 and a fourth sub-pixel circuit PCb2 electrically connected to the fourth light-emitting diode EDb2. The third blue sub-pixel Pb3 may include a sixth light-emitting diode EDb3 and a sixth sub-pixel circuit PCb3 electrically connected to the sixth light-emitting diode EDb3.

[0162] The third light emitting diode EDb1 may be disposed on the third inclined surface ss3 of the second organic pattern 209p2. For example, the pixel electrode 310 of the third light emitting diode EDb1 may extend from the upper surface 207us of the planarization layer 207 to the second upper surface us2 of the second organic pattern 209p2 via the third inclined surface ss3 of the second organic pattern 209p2. The fourth light emitting diode EDb2 may be disposed on the fourth inclined surface ss4 of the second organic pattern 209p2. The pixel electrode 310 of the fourth light emitting diode EDb2 may extend from the upper surface 207us of the planarization layer 207 to the second upper surface us2 of the second organic pattern 209p2 via the fourth inclined surface ss4 of the second organic pattern 209p2. The pixel electrode 310 of the sixth light emitting diode EDb3 may be disposed on the second upper surface us2 of the second organic pattern 209p2.

[0163] The third light emitting diode EDb1 may be configured to emit light according to an electrical signal applied to the third sub-pixel circuit PCb1, the fourth light emitting diode EDb2 may be configured to emit light according to an electrical signal applied to the fourth sub-pixel circuit PCb2, and the sixth light emitting diode EDb3 may be configured to emit light according to an electrical signal applied to the sixth sub-pixel circuit PCb3. That is, the third light emitting diode EDb1, the fourth light emitting diode EDb2, and the sixth light emitting diode EDb3 may be configured to emit light according to different electrical signals, and therefore, the third light emitting diode EDb1, the fourth light emitting diode EDb2, and the sixth light emitting diode EDb3 may emit light simultaneously or at different times.

[0164] The bank layer BNL may define openings OP respectively overlapping the light emitting diodes EDr1, EDr2, EDr3, EDb1, EDb2, and EDb3. The openings OP may expose a central portion of the pixel electrode 310. The openings OP corresponding to the light emitting diodes EDr1, EDr2, EDb1, and EDb2 may respectively overlap the first inclined surface ss1, the second inclined surface ss2, the third inclined surface ss3, and the fourth inclined surface ss4.

[0165] The first light emitting diode EDr1, the second light emitting diode EDr2, and the fifth light emitting diode EDr3 can be configured to emit light of the same color. For example, the first light emitting diode EDr1, the second light emitting diode EDr2, and the fifth light emitting diode EDr3 can be configured to emit red light. The third light emitting diode EDb1, the fourth light emitting diode EDb2, and the sixth light emitting diode EDb3 can be configured to emit light of the same color. For example, the third light emitting diode EDb1, the fourth light emitting diode EDb2, and the sixth light emitting diode EDb3 can be configured to emit blue light.

[0166] The size of the opening OP of the bank layer BNL may be different depending on the emission efficiency of the light emitting diodes EDr1, EDr2, EDr3, EDb1, EDb2, and EDb3. Therefore, the widths (or areas) of the emission areas EA defined by the opening OP may be different from each other.

[0167] An encapsulation layer 400 encapsulating the light emitting diodes EDr1, EDr2, EDr3, EDb1, EDb2, and EDb3 may be disposed on the display element layer 300. The encapsulation layer 400 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. Fig.11 As shown in FIG. 4 , the encapsulation layer 400 may include a first inorganic encapsulation layer 410 , a second inorganic encapsulation layer 430 , and an organic encapsulation layer 420 disposed between the first inorganic encapsulation layer 410 and the second inorganic encapsulation layer 430 .

[0168] The light blocking layer 500 may be disposed on the encapsulation layer 400. The light blocking layer 500 may include a light blocking pattern 510 and an overcoat layer 520.

[0169] The light blocking pattern 510 may be disposed on the second inorganic encapsulation layer 430. The light blocking pattern 510 may include a light absorbing material and / or a low reflective material. The light blocking pattern 510 may define a light transmitting opening 510OP overlapping with the opening OP of the bank layer BNL. A main portion of the light blocking pattern 510 may overlap with a main portion of the bank layer BNL.

[0170] The body portion of the light blocking pattern 510 may define a light blocking area SHA that blocks light emitted by the light emitting diodes EDr1, EDr2, EDr3, EDb1, EDb2, and EDb3. The light transmission opening 510OP of the light blocking pattern 510 may define a transmission area TA through which light emitted by the light emitting diodes EDr1, EDr2, EDr3, EDb1, EDb2, and EDb3 may pass. Since the light transmission opening 510OP of the light blocking pattern 510 overlaps with the opening OP of the bank layer BNL, the transmission area TA may overlap with the emission area EA.

[0171] The overcoat 520 may be disposed on the light blocking pattern 510 to cover the light blocking pattern 510. The overcoat 520 may embed the light transmitting opening 510OP of the light blocking pattern 510 and provide a flat upper surface.

[0172] In an embodiment, the light blocking pattern 510 may include a plurality of layers. For example, the light blocking pattern 510 may include a first light blocking pattern and a second light blocking pattern. One or more light transmitting material layers may be disposed between the first light blocking pattern and the second light blocking pattern.

[0173] Fig.12is a view for explaining a path of light emitted by the display device 1 according to an embodiment of the inventive concept, and Fig.13 1 is a view for explaining a three-view display apparatus 1 according to an embodiment of the inventive concept.

[0174] Reference Fig.12 The display device 1 may include a substrate 100 . The pixel circuit layer 200 may be disposed on the substrate 100 , wherein the pixel circuit layer 200 includes a first sub-pixel circuit PCr1 , a second sub-pixel circuit PCr2 , a buffer layer 201 , a gate insulating layer 203 , an interlayer insulating layer 205 , and a planarization layer 207 .

[0175] The first organic pattern 209p1 may be disposed on the pixel circuit layer 200. The first organic pattern 209p1 may have a first inclined surface ss1, a second inclined surface ss2, and a first upper surface us1. The first inclined surface ss1 is inclined in a fourth direction DR4 inclined relative to the upper surface of the substrate 100, the second inclined surface ss2 is inclined in a fifth direction DR5 different from the fourth direction DR4, and the first upper surface us1 connects the first inclined surface ss1 to the second inclined surface ss2. The first inclined surface ss1 and the second inclined surface ss2 of the first organic pattern 209p1 may form a first angle θ1 relative to the upper surface 207us of the planarization layer 207. The first upper surface us1 of the first organic pattern 209p1 may have a first height h1 measured from the upper surface 207us of the planarization layer 207 along the third direction (z direction). The first height h1 may be 10 μm or less.

[0176] The display element layer 300 may be disposed on the planarization layer 207 and the first organic pattern 209p1. The display element layer 300 may include a first light emitting diode EDr1, a second light emitting diode EDr2, a fifth light emitting diode EDr3, and a bank layer BNL.

[0177] Each of the first light emitting diode EDr1 , the second light emitting diode EDr2 , and the fifth light emitting diode EDr3 may include a pixel electrode 310 , an opposing electrode 330 , and an emission layer 320 disposed between the pixel electrode 310 and the opposing electrode 330 .

[0178] The bank layer BNL may be disposed on the planarization layer 207 and the first organic pattern 209p1 to cover the edge of the pixel electrode 310. The bank layer BNL may define openings OP that respectively expose the upper surfaces of the pixel electrodes 310. The openings of the bank layer BNL may define an emission area EA of each sub-pixel P. In an embodiment, the first organic pattern 209p1 may include the same material as that of the bank layer BNL.

[0179] The first organic pattern 209p1 may overlap with the first sub-pixel group SG1. The first sub-pixel group SG1 may include a first red sub-pixel Pr1, a second red sub-pixel Pr2, and a third red sub-pixel Pr3. The first red sub-pixel Pr1 may include a first light-emitting diode EDr1 and a first sub-pixel circuit PCr1 electrically connected to the first light-emitting diode EDr1. The second red sub-pixel Pr2 may include a second light-emitting diode EDr2 and a second sub-pixel circuit PCr2 electrically connected to the second light-emitting diode EDr2. The third red sub-pixel Pr3 may include a fifth light-emitting diode EDr3 and a fifth sub-pixel circuit PCr3 electrically connected to the fifth light-emitting diode EDr3. The first light-emitting diode EDr1, the second light-emitting diode EDr2, and the fifth light-emitting diode EDr3 may be configured to emit light of the same color.

[0180] The first light emitting diode EDr1 may be disposed on the first inclined surface ss1 of the first organic pattern 209p1. For example, the pixel electrode 310 of the first light emitting diode EDr1 may extend from the upper surface 207us of the planarization layer 207 to the first upper surface us1 of the first organic pattern 209p1 via the first inclined surface ss1 of the first organic pattern 209p1. The second light emitting diode EDr2 may be disposed on the second inclined surface ss2 of the first organic pattern 209p1. For example, the pixel electrode 310 of the second light emitting diode EDr2 may extend from the upper surface 207us of the planarization layer 207 to the first upper surface us1 of the first organic pattern 209p1 via the second inclined surface ss2 of the first organic pattern 209p1. The fifth light emitting diode EDr3 may be disposed on the first upper surface us1 of the first organic pattern 209p1. For example, the pixel electrode 310 of the fifth light emitting diode EDr3 may be disposed on the first upper surface us1 of the first organic pattern 209p1.

[0181] In a plan view, the first inclined surface ss1 of the first organic pattern 209p1 may have a first width w1 measured along the first direction (x direction). In a plan view, the pixel electrode 310 of the first light emitting diode EDr1 may have a second width w2 measured along the first direction (x direction). The first width w1 may be smaller than the second width w2.

[0182] Likewise, when viewed in a plane, similar to the first inclined surface ss1, the second inclined surface ss2 of the first organic pattern 209p1 may have a first width w1 measured along the first direction (x direction). Similar to the pixel electrode 310 of the first light emitting diode EDr1, the pixel electrode 310 of the second light emitting diode EDr2 may have a second width w2 measured along the first direction (x direction).

[0183] In this case, the contact portion may be disposed on the upper surface 207us of the planarization layer 207. The contact portion connects the pixel electrode 310 of the first light emitting diode EDr1 to the first sub-pixel circuit PCr1. Similarly, the contact portion may be disposed on the upper surface 207us of the planarization layer 207, wherein the contact portion connects the pixel electrode 310 of the second light emitting diode EDr2 to the second sub-pixel circuit PCr2. The contact portion may be disposed on the first upper surface us1 of the first organic pattern 209p1, wherein the contact portion connects the pixel electrode 310 of the fifth light emitting diode EDr3 to the fifth sub-pixel circuit PCr3.

[0184] The first inclined surface ss1 of the first organic pattern 209p1 forms a first angle θ1 counterclockwise with respect to the upper surface 207us of the planarization layer 207, and the first light L1 emitted from the pixel electrode 310 perpendicular to the first light emitting diode EDr1 may travel counterclockwise at the first angle θ1 relative to the third direction (z direction) perpendicular to the upper surface of the substrate 100. The second inclined surface ss2 of the first organic pattern 209p1 forms a first angle θ1 clockwise with respect to the upper surface 207us of the planarization layer 207, and the third light L3 emitted from the pixel electrode 310 perpendicular to the second light emitting diode EDr2 may travel clockwise at the first angle θ1 relative to the third direction (z direction) perpendicular to the upper surface of the substrate 100. The fifth light L5 emitted from the pixel electrode 310 perpendicular to the fifth light emitting diode EDr3 may travel in the third direction (z direction) perpendicular to the upper surface of the substrate 100.

[0185] A main portion of the bank layer BNL may be disposed on the first upper surface us1 of the first organic pattern 209p1. A main portion of the bank layer BNL disposed between adjacent emission areas EA may have a third width w3.

[0186] The encapsulation layer 400 may be disposed on the display element layer 300 , wherein the encapsulation layer 400 encapsulates the first light emitting diode EDr1 , the second light emitting diode EDr2 , and the fifth light emitting diode EDr3 .

[0187] The encapsulation layer 400 may include a first inorganic encapsulation layer 410 , a second inorganic encapsulation layer 430 , and an organic encapsulation layer 420 disposed between the first inorganic encapsulation layer 410 and the second inorganic encapsulation layer 430 .

[0188] The light blocking layer 500 may be disposed on the encapsulation layer 400. The light blocking layer 500 may include a light blocking pattern 510 and an overcoat 520. The light blocking pattern 510 may define a light transmission opening 510OP overlapping with the opening OP of the bank layer BNL. A main portion of the light blocking pattern 510 may overlap with a main portion of the bank layer BNL. A main portion of the light blocking pattern 510 may define a light blocking area SHA. The light transmission opening 510OP of the light blocking pattern 510 may define a transmission area TA. A main portion of the light blocking pattern 510 disposed between adjacent transmission areas TA may have a fourth width w4 measured along the first direction (x direction).

[0189] The light blocking pattern 510 may be configured to absorb a portion of the light emitted by the light emitting diodes EDr1, EDr2, and EDr3. The second light L2 emitted from the first light emitting diode EDr1 in an oblique direction inclined to the right (+x direction) may be absorbed by the main body portion of the light blocking pattern 510. The fourth light L4 emitted from the second light emitting diode EDr2 in an oblique direction inclined to the left (-x direction) may be absorbed by the main body portion of the light blocking pattern 510. The sixth light L6 emitted from the fifth light emitting diode EDr3 in an oblique direction inclined to the left (-x direction) and the seventh light L7 emitted from the fifth light emitting diode EDr3 in an oblique direction inclined to the right (+x direction) may be absorbed by the main body portion of the light blocking pattern 510. Therefore, the viewing angle of the light emitted from the light emitting diodes EDr1, EDr2, and EDr3 may be determined by adjusting the third width w3 of the bank layer BNL and the fourth width w4 of the light blocking pattern 510.

[0190] The overcoat 520 may be disposed on the light blocking pattern 510 to cover the light blocking pattern 510. The overcoat 520 may embed the light transmitting opening 510OP of the light blocking pattern 510 and provide a flat upper surface.

[0191] Reference Fig.13 And combined with Figure 3 and Fig.11 , the display device 1 can be configured to realize three-viewing of different images according to the position of the user. The light emitted by the first red sub-pixel Pr1 among the plurality of sub-pixels P in the first sub-pixel group SG1 can reach only the first observation area VA1. The light emitted by the second red sub-pixel Pr2 among the plurality of sub-pixels P in the first sub-pixel group SG1 can reach only the second observation area VA2. The light emitted by the third red sub-pixel Pr3 among the plurality of sub-pixels P in the third sub-pixel group SG3 can reach only the third observation area VA3.

[0192] In this case, among the lights emitted by the first red sub-pixel Pr1, the first light L1 emitted perpendicular to the pixel electrode 310 of the first light emitting diode EDr1 may have the strongest intensity. As described above, the direction of the first light L1 may be adjusted via the first angle θ1, which is an angle formed by the first inclined surface ss1 of the first organic pattern 209p1 and the upper surface 207us of the planarization layer 207. Among the lights emitted by the first red sub-pixel Pr1, the light emitted in the direction of the second observation area VA2 may be absorbed by the light blocking pattern 510.

[0193] Among the lights emitted by the second red sub-pixel Pr2, the third light L3 emitted perpendicular to the pixel electrode 310 of the second light emitting diode EDr2 may have the strongest intensity. The direction of the third light L3 may be adjusted via the first angle θ1, which is an angle formed by the second inclined surface ss2 of the first organic pattern 209p1 and the upper surface 207us of the planarization layer 207. Among the lights emitted by the second red sub-pixel Pr2, the light emitted in the direction of the first observation area VA1 may be absorbed by the light blocking pattern 510.

[0194] Among the lights emitted by the third red subpixel Pr3, the fifth light L5 emitted perpendicular to the pixel electrode 310 of the fifth light emitting diode EDr3 may have the strongest intensity. The fifth light L5 may travel in a direction perpendicular to the front surface FS1 of the display device 1 (eg, z direction).

[0195] The third observation area VA3 may overlap a portion of the first observation area VA1 and a portion of the second observation area VA2. When light travels in a direction close to the direction perpendicular to the pixel electrode 310 of each light emitting diode EDr1, EDr2, and EDr3, the light intensity is strong, and when light travels obliquely to the perpendicular direction, the light intensity is weak. Therefore, the influence of the light emitting diodes EDr1, EDr2, and EDr3 on the area in the observation area that does not correspond to the relevant light may be insignificant.

[0196] Therefore, the display device 1 may be configured to provide three different images to the first observation area VA1 , the second observation area VA2 , and the third observation area VA3 .

[0197] Fig.14 is a schematic diagram of a vehicle including a display device according to an embodiment of the inventive concept.

[0198] Fig.14A vehicle display device 1500 is shown as a display device according to an embodiment. The vehicle display device 1500 may include a center information display (CID) 1510. The CID 1510 is located between the driver's seat and the passenger seat, and may provide different images to users located in the driver's seat, the passenger seat, and / or the back seat. For example, the CID 1510 may be configured to display navigation or vehicle operation information to a user located in the driver's seat, while synchronously displaying entertainment content to users located in the passenger seat and / or the back seat.

[0199] Despite Fig.14 1 and 2 describe that the CID 1510 is separated from the cluster display device in front of the driver's seat and the display device in front of the passenger seat, but the present embodiment is not necessarily limited thereto. The CID 1510 may be extended and integrally connected to the cluster display device in front of the driver's seat and the display device in front of the passenger seat.

[0200] According to an embodiment, a multi-view display device configured to display different images according to a user's position may be implemented. However, the scope of the present disclosure is not limited to this effect.

[0201] The description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope set forth in the appended claims.

Claims

1. A display device, wherein: The display device comprises: A pixel circuit layer, disposed on the substrate and comprising a plurality of sub-pixel circuits; A planarization layer, disposed on the pixel circuit layer; a first organic pattern disposed on the planarization layer, wherein the first organic pattern has a first inclined surface inclined in a first direction, a second inclined surface inclined in a second direction different from the first direction, and an upper surface connecting the first inclined surface to the second inclined surface; a first light emitting diode including a first pixel electrode extending from an upper surface of the planarization layer along the first inclined surface to the upper surface of the first organic pattern; and The second light emitting diode includes a second pixel electrode extending from the upper surface of the planarization layer along the second inclined surface to the upper surface of the first organic pattern.

2. The display device according to claim 1, wherein: The first light emitting diode and the second light emitting diode are configured to emit light of the same color.

3. The display device according to claim 2, wherein: The first light emitting diode and the second light emitting diode are configured to emit light according to different electrical signals from each other.

4. The display device according to claim 1, wherein: The display device further includes a bank layer disposed on the planarization layer and defining openings respectively overlapping the first pixel electrode and the second pixel electrode.

5. The display device according to claim 4, wherein: The display device further includes: an encapsulation layer, disposed on the first light emitting diode and the second light emitting diode; and A light blocking layer is disposed on the encapsulation layer, and defines a light-transmitting opening overlapping the opening of the bank layer in a plan view.

6. The display device according to claim 1, wherein: A first height in a thickness direction from the upper surface of the planarization layer to the upper surface of the first organic pattern is 10 μm or less.

7. The display device according to claim 1, in, The first pixel electrode and the second pixel electrode are spaced apart from each other in a third direction parallel to the upper surface of the substrate, wherein the width of the first inclined surface in the third direction is smaller than the width of the first pixel electrode in the third direction, and Wherein, a width of the second inclined surface in the third direction is smaller than a width of the second pixel electrode in the third direction.

8. The display device according to claim 1, wherein: The display device further includes a third light emitting diode including a third pixel electrode disposed on the upper surface of the first organic pattern.

9. The display device according to claim 8, wherein: The first light emitting diode, the second light emitting diode, and the third light emitting diode are configured to emit light of the same color as each other.

10. The display device according to claim 8, wherein: The first light emitting diode, the second light emitting diode, and the third light emitting diode are configured to emit light according to different electrical signals from each other.

11. A display device, wherein: The display device comprises: A pixel circuit layer, disposed on the substrate and comprising a plurality of sub-pixel circuits; A planarization layer, disposed on the pixel circuit layer; a first organic pattern disposed on the planarization layer, wherein the first organic pattern has a first inclined surface inclined in a first direction, a second inclined surface inclined in a second direction different from the first direction, and an upper surface connecting the first inclined surface to the second inclined surface; a second organic pattern disposed on the planarization layer and spaced apart from the first organic pattern in a third direction, wherein the second organic pattern has a third inclined surface inclined in the first direction, a fourth inclined surface inclined in the second direction, and an upper surface connecting the third inclined surface to the fourth inclined surface; a plurality of first sub-pixels overlapping the first organic pattern and configured to emit light of a first color; and A plurality of second sub-pixels overlap the second organic pattern and are configured to emit light of a second color different from the first color.

12. The display device according to claim 11, wherein: One of the plurality of first sub-pixels overlaps with the first inclined surface, another of the plurality of first sub-pixels overlaps with the second inclined surface, one of the plurality of second sub-pixels overlaps with the third inclined surface, and another of the plurality of second sub-pixels overlaps with the fourth inclined surface.

13. The display device according to claim 11, wherein: One of the plurality of first sub-pixels overlaps the upper surface of the first organic pattern, and one of the plurality of second sub-pixels overlaps the upper surface of the second organic pattern.

14. The display device according to claim 11, wherein: The plurality of first sub-pixels respectively include a plurality of first light emitting diodes, each of the plurality of first light emitting diodes includes a first pixel electrode, a first opposing electrode, and a first emission layer between the first pixel electrode and the first opposing electrode, The plurality of second sub-pixels respectively include a plurality of second light-emitting diodes, and the plurality of second light-emitting diodes each include a second pixel electrode, a second opposing electrode, and a second emission layer between the second pixel electrode and the second opposing electrode. wherein the first pixel electrode extends from the upper surface of the planarization layer along the first inclined surface or the second inclined surface to the upper surface of the first organic pattern, and The second pixel electrode extends from the upper surface of the planarization layer along the third inclined surface or the fourth inclined surface to the upper surface of the second organic pattern.

15. The display device according to claim 14, wherein: The display device further includes a bank layer, the bank layer being disposed on the planarization layer. The bank layer defines openings respectively overlapping the first pixel electrode and the second pixel electrode.

16. The display device according to claim 15, wherein: The display device further includes: an encapsulation layer, disposed on the plurality of first light emitting diodes and the plurality of second light emitting diodes; and A light blocking layer is disposed on the encapsulation layer and defines a light transmitting opening overlapping the opening of the bank layer in a plan view.

17. The display device according to claim 11, wherein: A first height in the thickness direction from the upper surface of the planarization layer to the upper surface of the first organic pattern is different from a second height in the thickness direction from the upper surface of the planarization layer to the upper surface of the second organic pattern.

18. The display device according to claim 11, wherein: Each of a first height in a thickness direction from an upper surface of the planarization layer to the upper surface of the first organic pattern and a second height in the thickness direction from the upper surface of the planarization layer to the upper surface of the second organic pattern is 10 μm or less.

19. The display device according to claim 11, wherein: The display device further includes: a third organic pattern spaced apart from the first organic pattern and the second organic pattern; and A plurality of third sub-pixels overlap the third organic pattern and are configured to emit light of a third color different from the first color and the second color.

20. The display device according to claim 11, wherein The plurality of first sub-pixels are spaced apart from each other in a third direction parallel to an upper surface of the substrate, the first organic pattern extends in a fourth direction intersecting the third direction, and the display device further includes a plurality of third sub-pixels overlapping the first organic pattern and spaced apart from the plurality of first sub-pixels in the fourth direction.

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