Display substrate and display device
Patent Information
- Application Number
- CN202280005230.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2022-12-23
- Publication Date
- 2025-03-28
- Estimated Expiration
- 2042-12-23
AI Technical Summary
The aperture ratio of existing VA mode liquid crystal display devices cannot be effectively improved, and the provision of common electrode strips will reduce the aperture ratio of the pixel unit.
Design a display substrate. By arranging a first display area and a second display area in a pixel unit and disposing discharge lines at intervals between the first display areas, the discharge lines are prevented from affecting the aperture ratio and the second display area is omitted. The common electrode strip uses the discharge line to fine-tune the voltage on the pixel electrode.
The aperture ratio of the display substrate is increased, and the voltage adjustment capability is enhanced through the setting of discharge lines, thereby improving the transmittance and yield of the product.
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Figure CN119731590A_ABST
Abstract
Description
Display substrate and display device Technical Field
[0001] Embodiments of the present disclosure relate to a display substrate and a display device. Background Art
[0002] With the continuous development of display technology, display devices are increasingly being used in various electronic products. Currently, display devices mainly include organic light-emitting diode (OLED) displays and liquid crystal displays (LCD). OLED displays typically include an anode, a cathode, and an organic light-emitting layer disposed between the anode and cathode. The OLED generates current through the anode and cathode to drive the organic light-emitting layer for light display.
[0003] On the other hand, a liquid crystal display (LCD) device typically includes a display substrate equipped with a thin-film transistor array, an opposing substrate disposed opposite the display substrate, and a liquid crystal layer located between the display substrate and the opposing substrate. LCDs can generate an electric field through pixel electrodes in the display substrate to change the rotational orientation of liquid crystal molecules in the liquid crystal layer, and can be used in conjunction with polarizers to achieve display. Based on the electric field drive method, LCDs can be divided into vertical LCDs (e.g., VA mode) driven by a vertical electric field and horizontal LCDs (e.g., IPS or ADS mode) driven by a horizontal electric field.
[0004] Summary of the Invention
[0005] The present disclosure provides a display substrate and a display device. The display substrate further includes a base substrate, a plurality of pixel units, and a plurality of data lines. The plurality of pixel units are arrayed on the base substrate along a first direction and a second direction. The plurality of data lines are arranged along the first direction, and each data line extends along the second direction. Each pixel unit is located between two adjacent data lines. Each pixel unit includes a gate structure extending along the first direction, a first display area located on a first side of the gate structure, and a second display area located on a second side of the gate structure. The first display area includes at least two domains spaced apart in the first direction and a first gap located between the at least two domains and extending along the second direction. The second display area includes at least two domains spaced apart in the first direction and a second gap located between the at least two domains and extending along the second direction. Each pixel unit further includes a discharge line and a common electrode strip. The discharge line includes a first conductive portion and a second conductive portion. The first conductive portion extends along the second direction and is located at the first gap. The second conductive portion extends along the second direction and is located at the second gap. The common electrode strip is located at an edge of the first display area adjacent to the data line. No common electrode strip is provided at an edge of the second display area adjacent to the data line. Thus, the display substrate is provided with discharge lines at the first interval of the first display area and the second interval of the second display area, thereby preventing the discharge lines from affecting the aperture ratio of the pixel unit, and furthermore, the voltage on the pixel electrode can be fine-tuned through the discharge lines, thereby eliminating the common electrode strips in the second display area, thereby improving the aperture ratio of the display substrate.
[0006] At least one embodiment of the present disclosure provides a display substrate, comprising: a base substrate; a plurality of pixel units arranged in an array along a first direction and a second direction on the base substrate; and a plurality of data lines arranged along the first direction, each of the data lines extending along the second direction, each of the pixel units located between two adjacent data lines, each of the pixel units including a gate structure extending along the first direction, a first display area located on a first side of the gate structure, and a second display area located on a second side of the gate structure; the first display area including at least two domains spaced apart in the first direction and a first gap located between the at least two domains and extending along the second direction, the second display area including at least two domains spaced apart in the first direction and a second gap located between the at least two domains and extending along the second direction; each of the pixel units further including a discharge line and a common electrode strip, the discharge line including a first conductive portion and a second conductive portion, the first conductive portion extending along the second direction and located at the first gap, the second conductive portion extending along the second direction and located at the second gap, the common electrode strip located at an edge of the first display area adjacent to the data line, and no common electrode strip is provided at an edge of the second display area adjacent to the data line.
[0007] For example, in the display substrate provided in an embodiment of the present disclosure, the size of the effective light-emitting area of the first display area in the first direction is smaller than the size of the effective light-emitting area of the second display area in the first direction.
[0008] For example, in the display substrate provided in one embodiment of the present disclosure, the at least two domains of the first display area include a first domain, a second domain, a third domain and a fourth domain, the first domain and the second domain are located on both sides of the first interval and are arranged opposite to each other, and the third domain and the fourth domain are located on both sides of the first interval and are arranged opposite to each other; the at least two domains of the second display area include a fifth domain, a sixth domain, a seventh domain and an eighth domain, the fifth domain and the sixth domain are located on both sides of the second interval and are arranged opposite to each other, and the seventh domain and the eighth domain are located on both sides of the second interval and are arranged opposite to each other.
[0009] For example, in the display substrate provided in an embodiment of the present disclosure, each of the pixel units further includes: a first pixel electrode; a second pixel electrode; a first control transistor, including a gate, a first electrode, and a second electrode; and a second control transistor, including a gate, a first electrode, and a second electrode; the gate of the first control transistor and the gate of the second control transistor are respectively connected to the gate structure, the first electrode of the first control transistor and the first electrode of the second control transistor are respectively connected to the data line, the second electrode of the first control transistor is connected to the first pixel electrode, and the second electrode of the second control transistor is connected to the second pixel electrode.
[0010] For example, in the display substrate provided in one embodiment of the present disclosure, each of the pixel units further includes: a discharge transistor, including a gate, a first electrode and a second electrode, the gate of the discharge transistor is connected to the gate structure, the first electrode of the discharge transistor is connected to the discharge line, and the second electrode of the discharge transistor is connected to the second pixel electrode.
[0011] For example, in the display substrate provided in one embodiment of the present disclosure, each of the pixel units further includes: a vertical common electrode line, the orthographic projection of the vertical common electrode line on the base substrate overlaps with the orthographic projection of the first conductive portion on the base substrate and the orthographic projection of the second conductive portion on the base substrate.
[0012] For example, in a display substrate provided in an embodiment of the present disclosure, the vertical common electrode line and the gate structure are located in a first conductive layer, the discharge line and the data line are located in a second conductive layer, and the second conductive layer is located on a side of the first conductive layer away from the base substrate.
[0013] For example, in the display substrate provided in one embodiment of the present disclosure, each of the pixel units further includes: a first capacitor, including a first electrode plate and a second electrode plate, the second electrode plate is located on the side of the first electrode plate away from the base substrate, and the second electrode plate is connected to the second pole of the first control transistor.
[0014] For example, in the display substrate provided in one embodiment of the present disclosure, the first display area further includes: a horizontal common electrode line, connected to the first electrode plate, the first display area includes two common electrode strips, respectively located at two edges of the first display area close to two adjacent data lines, and the two common electrode strips are connected to the horizontal common electrode line.
[0015] For example, in the display substrate provided in one embodiment of the present disclosure, each of the pixel units further includes: a second capacitor, including a third electrode block and a fourth electrode block, the second electrode block is located on the side of the first electrode block away from the base substrate, the second electrode of the second control transistor and the second electrode of the discharge transistor are connected to the second electrode block, and the vertical common electrode line is connected to the third electrode block.
[0016] For example, in a display substrate provided in an embodiment of the present disclosure, a first spacing region and a second spacing region are respectively provided between the first electrode block and two adjacent data lines, and the first spacing region and the second spacing region are light-transmitting regions.
[0017] For example, in the display substrate provided by an embodiment of the present disclosure, the first spacing area and the second spacing area are not provided with common electrode lines.
[0018] For example, in a display substrate provided in an embodiment of the present disclosure, the discharge line further includes a discharge connecting portion connecting the first conductive portion and the second conductive portion; an orthographic projection of the discharge connecting portion on the base substrate surrounds an orthographic projection of the third electrode block on the base substrate.
[0019] For example, in the display substrate provided in an embodiment of the present disclosure, the gate structures of the two adjacent pixel units in the first direction are connected and jointly form a gate line extending along the first direction, and there is an overlapping area between the gate line and the data line between the two adjacent pixel units; in the overlapping area, the gate line includes a hollow portion and a first connecting portion and a second connecting portion located on both sides of the hollow portion in the second direction, and the orthographic projection of the hollow portion on the base substrate overlaps with the orthographic projection of the data line on the base substrate.
[0020] For example, in a display substrate provided in an embodiment of the present disclosure, the hollow portion includes a first edge and a second edge, the first edge and the second edge are respectively located on both sides of the data line in the first direction, the distance between the first edge and the data line is in the range of 3-10 microns, and the distance between the second edge and the data line is in the range of 3-10 microns.
[0021] For example, in a display substrate provided in an embodiment of the present disclosure, the discharge line further includes a discharge connection portion connecting the first conductive portion and the second conductive portion; an orthographic projection of the discharge connection portion on the base substrate overlaps with an orthographic projection of the gate structure on the base substrate.
[0022] For example, in the display substrate provided in an embodiment of the present disclosure, the shape of the orthographic projection of the connecting portion on the base substrate includes a hypotenuse, and the angle between the extension direction of the hypotenuse and the first direction or the second direction is in the range of 20-70 degrees.
[0023] For example, in the display substrate provided in an embodiment of the present disclosure, the angle between the extension direction of the oblique side and the first direction or the second direction is in the range of 40-50 degrees.
[0024] At least one embodiment of the present disclosure further provides a display device, comprising any one of the display substrates described above. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, rather than limiting the present disclosure.
[0026] 1A-1B are electric field simulation diagrams of a liquid crystal display device;
[0027] FIG2 is a schematic plan view of a display substrate provided in one embodiment of the present disclosure;
[0028] FIG3 is a schematic plan view of a pixel unit in a display substrate provided by an embodiment of the present disclosure;
[0029] FIG4A shows a partially enlarged schematic diagram of a pixel unit in a display substrate;
[0030] FIG4B shows a partially enlarged schematic diagram of a pixel unit in a display substrate provided by an embodiment of the present disclosure;
[0031] FIG5 is a plan view of a pixel unit in another display substrate provided by an embodiment of the present disclosure;
[0032] FIG6 is a plan view of a pixel unit in another display substrate provided by an embodiment of the present disclosure; and
[0033] FIG7 is a schematic diagram of a display device provided in accordance with an embodiment of the present disclosure. DETAILED DESCRIPTION
[0034] To make the purpose, technical solutions, and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.
[0035] Unless otherwise defined, the technical or scientific terms used in this disclosure should have the usual meanings understood by persons of ordinary skill in the field to which this disclosure belongs. The words "first", "second" and similar terms used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.
[0036] Unless otherwise defined, the features such as “parallel”, “perpendicular” and “identical” used in the embodiments of the present disclosure include situations such as “parallel”, “perpendicular” and “identical” in a strict sense, as well as situations such as “approximately parallel”, “approximately perpendicular” and “approximately identical” that contain a certain error. For example, the above-mentioned “approximately” may mean that the difference between the compared objects is 10% of the average value of the compared objects, or within 5%. When the number of a component or element is not specifically indicated below in the embodiments of the present disclosure, it means that the component or element may be one or more, or may be understood as at least one. “At least one” refers to one or more, and “plurality” refers to at least two.
[0037] According to the electric field driving method, liquid crystal display devices can generally be divided into vertical liquid crystal display devices driven by a vertical electric field (i.e., VA mode) and horizontal liquid crystal display devices driven by a horizontal electric field (i.e., IPS or ADS mode). During the research, the inventors of the present application noticed that VA mode liquid crystal display devices combined with COA (Color filter On Array) technology not only have a greater advantage in contrast compared to ADS and IPS mode liquid crystal display devices, but also have a greater advantage in aperture ratio compared to ADS and IPS mode liquid crystal display devices. However, in actual products, due to reasons such as pixel unit domain division, the actual aperture ratio of VA mode liquid crystal display devices is not significantly higher than that of ADS and IPS mode liquid crystal display devices.
[0038] On the other hand, in order to increase the aperture ratio, conventional VA mode liquid crystal display devices will set common electrode strips on both sides of the data line to absorb the electric field of the data line, thereby reducing the impact of the data line on the voltage on the pixel electrode, thereby achieving electric field shielding; at the same time, the common electrode strips and the data line can be used together as a shading structure, so that there is no need to set a black matrix on the data line.
[0039] Figures 1A-1B are electric field simulation diagrams for a liquid crystal display device. As shown in Figure 1, when common electrode strips are placed near data lines, the voltage equipotential lines near the pixel electrodes become much more sparse; in other words, the pull exerted by the data lines on the pixel electrodes is also much smaller. However, the inventors of this application have noted that the placement of common electrode strips reduces the aperture ratio of the pixel unit.
[0040] To further enhance the transmittance advantage of a VA-mode liquid crystal display device and simultaneously increase product yield, embodiments of the present disclosure provide a display substrate and a display device. The display substrate further includes a base substrate, a plurality of pixel units, and a plurality of data lines. The plurality of pixel units are arrayed on the base substrate along a first direction and a second direction. The plurality of data lines are arranged along the first direction, each extending along a second direction. Each pixel unit is located between two adjacent data lines. Each pixel unit includes a gate structure extending along the first direction, a first display region located on a first side of the gate structure, and a second display region located on a second side of the gate structure. The first display region includes at least two domains spaced apart in the first direction and a first gap located between the at least two domains and extending along the second direction. The second display region includes at least two domains spaced apart in the first direction and a second gap located between the at least two domains and extending along the second direction. Each pixel unit further includes a discharge line and a common electrode strip. The discharge line includes a first conductive portion and a second conductive portion. The first conductive portion extends along the second direction and is located at the first gap. The second conductive portion extends along the second direction and is located at the second gap. The common electrode strip is located at an edge of the first display region adjacent to the data line. No common electrode strip is provided at an edge of the second display region adjacent to the data line. Thus, the display substrate is provided with discharge lines at the first interval of the first display area and the second interval of the second display area, thereby preventing the discharge lines from affecting the aperture ratio of the pixel unit, and furthermore, the voltage on the pixel electrode can be fine-tuned through the discharge lines, thereby eliminating the common electrode strips in the second display area, thereby improving the aperture ratio of the display substrate.
[0041] Hereinafter, the display substrate and the display device provided by the embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
[0042] An embodiment of the present disclosure provides a display substrate. FIG2 is a plan view schematic diagram of a display substrate provided by an embodiment of the present disclosure; FIG3 is a plan view schematic diagram of a pixel unit in a display substrate provided by an embodiment of the present disclosure.
[0043] As shown in Figures 2 and 3, the display substrate 100 further includes a base substrate 110, a plurality of pixel units 120, and a plurality of data lines 130. The plurality of pixel units 120 are arrayed on the base substrate 110 along a first direction and a second direction. The plurality of data lines 130 are arranged along the first direction, with each data line 130 extending along the second direction. Each pixel unit 120 is located between two adjacent data lines 130. Each pixel unit 120 includes a gate structure 121 extending along the first direction, a first display region 120A located on a first side of the gate structure 121, and a second display region 120B located on a second side of the gate structure 121. The first display region 120A includes at least two domains 140 spaced apart in the first direction and a first space S1 extending along the second direction between the at least two domains 140. The second display region 120B includes at least two domains 150 spaced apart in the first direction and a second space S2 extending along the second direction between the at least two domains 150. On one hand, the display substrate can further improve the aperture ratio by setting a first display area and a second display area in a pixel unit, with the first display area being a bright display area and the second display area being a dark display area. Thus, when the first display area and the second display area are displayed together as a pixel unit, the display substrate can further improve the aperture ratio. On the other hand, by setting multiple domains in a pixel unit, the display substrate can improve the viewing angle.
[0044] As shown in Figures 2 and 3, each pixel unit 120 also includes a discharge line 122 and a common electrode bar 123. The discharge line 122 includes a first conductive portion 122A and a second conductive portion 122B. The first conductive portion 122A extends along the second direction and is located at the first interval S1. The second conductive portion 122B extends along the second direction and is located at the second interval S2. The common electrode bar 123 is located at the edge of the first display area 120A adjacent to the data line 130. The common electrode bar 123 is not provided at the edge of the second display area 120B adjacent to the data line 130.
[0045] In the embodiment of the present disclosure, the display substrate is provided with discharge lines at the first interval of the first display area and the second interval of the second display area, thereby preventing the discharge lines from affecting the aperture ratio of the pixel unit; on the other hand, since the pixel unit is provided with the discharge line and the second display area can be used as a dark display area, the display substrate can also fine-tune the voltage on the pixel electrode through the discharge line to compensate for the pulling of the pixel electrode in the second display area by the data line, thereby eliminating the common electrode strip in the second display area, thereby improving the aperture ratio of the display substrate.
[0046] In some examples, the base substrate may be a glass substrate, a plastic substrate, or a quartz substrate; the base substrate may be a rigid substrate or a flexible substrate.
[0047] In some examples, the material of the data line may include metal materials such as molybdenum, aluminum, copper, and silver.
[0048] In some examples, the first direction and the second direction are different directions; for example, the first direction and the second direction may be perpendicular to each other. Of course, the embodiments of the present disclosure include but are not limited to this, and the first direction and the second direction may also intersect.
[0049] In some examples, the size of the common electrode strips in the first direction ranges from 2 to 4 micrometers. Of course, the embodiments of the present disclosure include but are not limited to this.
[0050] In some examples, as shown in Figures 2 and 3, because the common electrode strips are eliminated from the second display area 120B, the effective light-emitting area of the first display area 120A is smaller in the first direction than the effective light-emitting area of the second display area 120B. Therefore, the aperture ratio of the second display area is greater than that of the first display area.
[0051] In some examples, as shown in Figures 2 and 3, each pixel unit 120 further includes a first pixel electrode 161, a second pixel electrode 162, a first control transistor T1, and a second control transistor T2; the first control transistor T1 includes a gate, a first electrode, and a second electrode; the second control transistor T2 includes a gate, a first electrode, and a second electrode; the gates of the first control transistor T1 and the second control transistor T2 are respectively connected to the gate structure 121, the first electrode of the first control transistor T1 and the first electrode of the second control transistor T2 are respectively connected to the data line 130, the second electrode of the first control transistor T1 is connected to the first pixel electrode 161, and the second electrode of the second control transistor T2 is connected to the second pixel electrode 162. Thus, the first display area and the second display area in each pixel unit can be displayed in common.
[0052] In some examples, as shown in Figures 2 and 3, each pixel unit 120 further includes a discharge transistor T3, which includes a gate, a first electrode, and a second electrode. The gate of the discharge transistor T3 is connected to the gate structure 121, the first electrode of the discharge transistor T3 is connected to the discharge line 122, and the second electrode of the discharge transistor T3 is connected to the second pixel electrode 162. Thus, the display substrate can discharge the second pixel electrode through the discharge line and the discharge transistor, thereby adjusting the voltage on the second pixel electrode.
[0053] In some examples, as shown in Figures 2 and 3, at least two domains 140 of the first display area 120A include a first domain 141, a second domain 142, a third domain 143 and a fourth domain 144; the first domain 141 and the second domain 142 are located on both sides of the first interval and are opposite to each other, and the third domain 143 and the fourth domain 144 are located on both sides of the first interval and are opposite to each other; at least two domains 150 of the second display area 120B include a fifth domain 155, a sixth domain 156, a seventh domain 157 and an eighth domain 158, the fifth domain 155 and the sixth domain 156 are located on both sides of the second interval and are opposite to each other, and the seventh domain 157 and the eighth domain 158 are located on both sides of the second interval and are opposite to each other.
[0054] In some examples, as shown in Figures 2 and 3, the first display area 120A further includes a transverse common electrode strip 124 located on a side of the third and fourth domains 143 and 144 away from the first and second domains 141 and 142. Thus, the display substrate can reduce the resistance of the common electrode through the transverse common electrode strip. It should be noted that the transverse common electrode strip can also be considered to be located between two adjacent pixel units in the second direction.
[0055] In some examples, as shown in Figures 2 and 3, each pixel unit 120 further includes a vertical common electrode line 125; the orthographic projection of the vertical common electrode line 125 on the base substrate 110 overlaps with the orthographic projection of the first conductive portion 122A on the base substrate 110 and the orthographic projection of the second conductive portion 122B on the base substrate 110. Thus, the display substrate can be provided with vertical common electrode lines in the areas and locations occupied by the discharge lines, thereby reducing the resistance of the common electrode lines and improving the uniformity of the voltage on the common electrode lines. Furthermore, the aforementioned vertical common electrode lines do not affect the aperture ratio of the pixel units. It should be noted that the aforementioned common electrode strips, horizontal common electrode strips, and vertical common electrode lines are all parts of the common electrode lines and are used to transmit common electrode signals.
[0056] To better illustrate the relationship between the vertical common electrode lines and the discharge lines, Figure 4A shows a partially enlarged schematic diagram of a pixel unit in a display substrate, and Figure 4B shows a partially enlarged schematic diagram of a pixel unit in a display substrate provided by an embodiment of the present disclosure. Both Figures 4A and 4B show the first display area of the previous pixel unit and the second display area of the next pixel unit.
[0057] As shown in FIG4A , the second display area 120B belonging to the next pixel unit is also provided with a common electrode line 123. As shown in FIG4B , the second display area 120B belonging to the next pixel unit does not have the common electrode line 123. It can be seen that the aperture ratio of the display substrate shown in FIG4B is improved.
[0058] As shown in Figure 4A , the discharge line 122 extends along the second direction. As shown in Figure 4B , the orthographic projection of the vertical common electrode line 125 on the base substrate 110 overlaps with both the orthographic projection of the first conductive portion 122A and the orthographic projection of the second conductive portion 122B on the base substrate 110. This indicates that the display substrate shown in Figure 4B can be provided with vertical common electrode lines in the areas and locations occupied by the discharge lines, thereby reducing the resistance of the common electrode lines and improving the voltage uniformity across the common electrode lines. Furthermore, these vertical common electrode lines do not affect the aperture ratio of the pixel units.
[0059] In some examples, as shown in Figures 2 and 3, since the orthographic projection of the vertical common electrode line 125 on the base substrate 110 overlaps with the orthographic projection of the first conductive portion 122A on the base substrate 110 and the orthographic projection of the second conductive portion 122B on the base substrate 110, the vertical common electrode 125 may also include a third conductive portion corresponding to the first conductive portion 122A and a fourth conductive portion corresponding to the second conductive portion 122B; the third conductive portion is located in the first interval, and the fourth conductive portion is located in the second interval.
[0060] In some examples, the size of the vertical common electrode line 125 in the first direction ranges from 5 to 9 micrometers. Of course, the embodiments of the present disclosure include but are not limited to the above.
[0061] In some examples, as shown in Figures 2 and 3, the vertical common electrode line 125 and the gate structure 121 are located in the first conductive layer 210, the discharge line 122 and the data line 130 are located in the second conductive layer 220, and the second conductive layer is located on the side of the first conductive layer 210 away from the base substrate 110; that is, the discharge line 122 is at least partially located on the side of the vertical common electrode line 125 away from the base substrate 110.
[0062] For example, the first conductive layer 210 may be a gate layer, and the second conductive layer 220 may be a source / drain metal layer.
[0063] In some examples, as shown in Figures 2 and 3 , each pixel unit 120 further includes a first capacitor 126 comprising a first electrode plate 126A and a second electrode plate 126B. The second electrode plate 126B is located on a side of the first electrode plate 126A away from the substrate 110 , and is connected to the second electrode of the first control transistor T1 . Thus, the first display area can utilize the first capacitor to store the drive signal.
[0064] In some examples, as shown in Figures 2 and 3, the first display area 120A further includes a horizontal common electrode line 127 connected to the first electrode plate 126A; the first display area 120A includes two common electrode bars 123, which are respectively located at two edges of the first display area 120A near two adjacent data lines 130, and the two common electrode bars 123 are connected to the horizontal common electrode line 127. On the one hand, the horizontal common electrode line can apply a common electrode signal to the first electrode block, and on the other hand, the common electrode line can also use the first electrode block to reduce the resistance of the common electrode line. It should be noted that the above-mentioned common electrode bars, horizontal common electrode bars, vertical common electrode lines, and horizontal common electrode lines are all parts of the common electrode lines, which are used to transmit common electrode signals.
[0065] In some examples, as shown in FIG. 2 and FIG. 3 , the vertical common electrode 125 is connected to the horizontal common electrode 127 at the end of the first interval S1 .
[0066] In some examples, as shown in FIG2 and FIG3 , the discharge line 122 further includes a discharge connection portion 122C connecting the first conductive portion 122A and the second conductive portion 122B; the orthographic projection of the discharge connection portion 122C on the base substrate 110 surrounds the orthographic projection of the first electrode block 126A on the base substrate 110 .
[0067] In some examples, as shown in FIG. 2 and FIG. 3 , an orthographic projection of the discharge connection portion 122C on the base substrate 110 overlaps with an orthographic projection of the gate structure 121 on the base substrate 110 .
[0068] In some examples, each pixel unit 120 also includes a second capacitor 128, the second capacitor 128 includes a third electrode block 128A and a fourth electrode block 128B, the fourth electrode block 128B is located on the side of the third electrode block 128A away from the substrate 110; the second electrode of the second control transistor T2 and the second electrode of the discharge transistor T3 are connected to the fourth electrode block 128B, and the vertical common electrode line 125 is connected to the third electrode block 128A, thereby providing a common electrode signal to the third electrode block 128A.
[0069] In some examples, as shown in FIG. 2 and FIG. 3 , the vertical common electrode line 125 and the third electrode block 128A are both located in the first conductive layer 210 and can be formed by using the same conductive material through the same patterning process.
[0070] In some examples, as shown in FIG. 2 and FIG. 3 , the fourth electrode block 128B and the discharge line 122 may be located in the second conductive layer 220 and may be formed by using the same conductive material through the same patterning process.
[0071] In some examples, as shown in Figures 2 and 3, a first spacer 191 and a second spacer 192 are respectively provided between the third electrode block 128A and two adjacent data lines 130. The first spacer 191 and the second spacer 192 are light-transmitting areas. In conventional designs, similar to the first electrode block, common electrode structures extending along a first direction are formed on the left and right sides of the third electrode block. This allows the third electrode block to receive common electrode signals and also reduces the resistance of the common electrode lines. However, such a design reduces the aperture ratio. Therefore, the display substrate provided in the embodiments of the present disclosure utilizes the first and second spacers as light-transmitting areas to increase the aperture ratio.
[0072] In some examples, as shown in FIG. 2 and FIG. 3 , the first spacer 191 and the second spacer 192 are not provided with a common electrode line.
[0073] As shown in FIG4A , in order to provide a common electrode signal to the third electrode block 128A, a common electrode structure extending along the first direction is formed on the left and right sides of the third electrode block 128A; as shown in FIG4B , since the third electrode block 128A is connected to the vertical common electrode line 125, the vertical common electrode line 125 can provide a common electrode signal to the third electrode block 128A, thereby eliminating the common electrode structure on the left and right sides of the third electrode block 128A, thereby improving the aperture ratio.
[0074] Figure 5 is a schematic plan view of another pixel unit in a display substrate according to an embodiment of the present disclosure. Unlike the pixel unit shown in Figure 3 , the orthographic projection of the discharge connection portion 122C of the discharge wire 122 onto the base substrate 110 includes a hypotenuse 1235. The angle between the extension direction of the hypotenuse 1235 and the first or second direction ranges from 20 to 70 degrees. This allows the discharge connection portion to be routed diagonally during winding, thereby reducing its length and lowering its resistance.
[0075] In some examples, as shown in FIG. 5 , the angle between the extension direction of the oblique edge 1235 and the first direction or the second direction is in the range of 40-50 degrees.
[0076] In some examples, as shown in FIG5 , the distance between the orthographic projection of the discharge connection portion 122C on the base substrate 110 and the orthographic projection of the fourth electrode block 128B on the base substrate 110 is in the range of 3-12 μm, thereby ensuring that exposure and etching can separate the discharge connection portion and the fourth electrode block.
[0077] In some examples, as shown in FIG5 , a distance D1 between the orthographic projection of the discharge connection portion 122C on the base substrate 110 and the upper edge of the orthographic projection of the fourth electrode block 128B on the base substrate 110, and a distance D2 between the orthographic projection of the discharge connection portion 122C and the left edge of the orthographic projection of the fourth electrode block 128B on the base substrate 110 are both in the range of 3-12 μm, thereby ensuring that exposure and etching can separate the discharge connection portion and the fourth electrode block.
[0078] FIG6 is a planar schematic diagram of a pixel unit in another display substrate provided by an embodiment of the present disclosure. As shown in FIG6 , the gate structures 121 of two adjacent pixel units 120 in a first direction are connected and together form a gate line 1210 extending along the first direction. The gate line 1210 and the data line 130 between the two adjacent pixel units 120 have an overlapping region. In this overlapping region, the gate line 1210 includes a hollow portion 1212 and a first connecting portion 1213 and a second connecting portion 1214 located on both sides of the hollow portion 1212 in a second direction. The orthographic projection of the hollow portion 1212 on the base substrate 110 overlaps with the orthographic projection of the data line 130 on the base substrate 110. As a result, the gate line 1210 is bifurcated into two connecting portions in the region overlapping with the data line 130. In this case, when one of the two connecting portions is disconnected, the other can continue to transmit the gate signal, thereby improving the product yield of the display substrate. On the other hand, when one of the two connecting parts is short-circuited, for example, short-circuited with the data line, both ends of the connecting part can be cut off. At this time, the other connecting part can still transmit the gate signal, thereby achieving convenient maintenance.
[0079] It should be noted that in the overlapping area of the gate line and the data line, in order to reduce the overlapping capacitance, the gate line is designed to be thinner, for example, the line width is only 5-15 microns; at this time, the gate line is prone to defects such as broken wires in the overlapping area. In addition, in the overlapping area, the gate line and the data line are also prone to short circuits. In a conventional design, the gate line is only a single conductor in the overlapping area. When the above-mentioned broken wires or short circuits occur, one or several pixel units can only be repaired as dark spots by cutting or welding. However, the display substrate provided by the embodiment of the present disclosure bifurcates the gate line into two connecting parts by providing a hollow portion in the overlapping area, thereby improving the product yield on the one hand, and on the other hand, the pixel unit can be repaired so that it can display normally, thereby improving product quality.
[0080] In some examples, as shown in FIG6 , the hollow portion 1212 includes a first edge 1212A and a second edge 1212B, with the first edge 1212A and the second edge 1212B respectively located on opposite sides of the data line 130 in the first direction. The distance between the first edge 1212A and the data line 130 is in the range of 3-10 microns, and the distance between the second edge 1212B and the data line 130 is in the range of 3-10 microns. As a result, the first and second connecting portions also extend beyond the data line by 3-10 microns, respectively, facilitating cutting, such as by laser cutting.
[0081] At least one embodiment of the present disclosure further provides a display device. Figure 7 is a schematic diagram of a display device provided by one embodiment of the present disclosure. As shown in Figure 7, the display device 300 includes the aforementioned liquid crystal display device 100. Thus, the display device has technical effects corresponding to the beneficial technical effects of the liquid crystal display device it includes.
[0082] For example, the display device may be an electronic product with a display function, such as a television, a monitor, an electronic picture frame, an electronic photo frame, a navigator, a notebook computer, a tablet computer, or a smart phone.
[0083] There are a few points to note:
[0084] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure, and other structures may refer to conventional designs.
[0085] (2) Unless there is any conflict, the features of the same embodiment and different embodiments of the present disclosure may be combined with each other.
[0086] The above are only specific embodiments of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this disclosure should be included in the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.
Claims
1. A display substrate, comprising: substrate; A plurality of pixel units are arranged in an array along a first direction and a second direction on the substrate; as well as A plurality of data lines are arranged along the first direction, and each of the data lines extends along the second direction. Each pixel unit is located between two adjacent data lines, and each pixel unit includes a gate structure extending along the first direction, a first display area located on a first side of the gate structure, and a second display area located on a second side of the gate structure; The first display area includes at least two domains spaced apart in the first direction and a first interval located between the at least two domains and extending along the second direction; the second display area includes at least two domains spaced apart in the first direction and a second interval located between the at least two domains and extending along the second direction; Each of the pixel units further includes a discharge line and a common electrode strip, the discharge line includes a first conductive portion and a second conductive portion, the first conductive portion extends along the second direction and is located at the first interval, the second conductive portion extends along the second direction and is located at the second interval, the common electrode strip is located at an edge of the first display area adjacent to the data line, and no common electrode strip is provided at an edge of the second display area adjacent to the data line.
2. The display substrate according to claim 1, wherein A size of an effective light emitting area of the first display area in the first direction is smaller than a size of an effective light emitting area of the second display area in the first direction.
3. The display substrate according to claim 1, wherein The at least two domains of the first display area include a first domain, a second domain, a third domain, and a fourth domain, the first domain and the second domain are located on both sides of the first interval and are opposite to each other, and the third domain and the fourth domain are located on both sides of the first interval and are opposite to each other; The at least two domains of the second display area include a fifth domain, a sixth domain, a seventh domain and an eighth domain. The fifth domain and the sixth domain are located on both sides of the second interval and are opposite to each other. The seventh domain and the eighth domain are located on both sides of the second interval and are opposite to each other.
4. The display substrate according to any one of claims 1 to 3, wherein: Each of the pixel units further includes: a first pixel electrode; a second pixel electrode; A first control transistor comprising a gate, a first electrode, and a second electrode; and A second control transistor comprising a gate, a first electrode, and a second electrode; In which, the gate of the first control transistor and the gate of the second control transistor are respectively connected to the gate structure, the first electrode of the first control transistor and the first electrode of the second control transistor are respectively connected to the data line, the second electrode of the first control transistor is connected to the first pixel electrode, and the second electrode of the second control transistor is connected to the second pixel electrode.
5. The display substrate according to claim 4, wherein: Each of the pixel units further includes: A discharge transistor comprising a gate, a first electrode and a second electrode, The gate of the discharge transistor is connected to the gate structure, the first electrode of the discharge transistor is connected to the discharge line, and the second electrode of the discharge transistor is connected to the second pixel electrode. The display substrate according to claim 5 , wherein: Each of the pixel units further includes: vertical common electrode line, The orthographic projection of the vertical common electrode line on the base substrate overlaps with both the orthographic projection of the first conductive portion on the base substrate and the orthographic projection of the second conductive portion on the base substrate.
7. The display substrate according to claim 6, wherein: The vertical common electrode line and the gate structure are located in a first conductive layer, the discharge line and the data line are located in a second conductive layer, and the second conductive layer is located on a side of the first conductive layer away from the base substrate.
8. The display substrate according to claim 6, wherein: Each of the pixel units further includes: The first capacitor includes a first electrode plate and a second electrode plate, The second electrode plate is located on a side of the first electrode plate away from the substrate, and the second electrode plate is connected to the second electrode of the first control transistor.
9. The display substrate according to claim 8, wherein: The first display area further includes: A transverse common electrode line connected to the first electrode plate, The first display area includes two common electrode strips, which are respectively located at two edges of the first display area close to two adjacent data lines, and the two common electrode strips are connected to the transverse common electrode lines.
10. The display substrate according to claim 6, wherein: Each of the pixel units further includes: The second capacitor includes a third electrode block and a fourth electrode block, The second electrode block is located on a side of the first electrode block away from the substrate, the second electrode of the second control transistor and the second electrode of the discharge transistor are connected to the second electrode block, and the vertical common electrode line is connected to the third electrode block.
11. The display substrate according to claim 10, wherein: A first spacing region and a second spacing region are respectively provided between the first electrode block and two adjacent data lines. The first spacing region and the second spacing region are light-transmitting regions.
12. The display substrate according to claim 11, wherein: No common electrode line is provided in the first spacing area and the second spacing area.
13. The display substrate according to claim 10, wherein: The discharge line further includes a discharge connecting portion connecting the first conductive portion and the second conductive portion; The orthographic projection of the discharge connection portion on the base substrate surrounds the orthographic projection of the third electrode block on the base substrate.
14. The display substrate according to any one of claims 1 to 13, wherein: The gate structures of two adjacent pixel units in the first direction are connected to form a gate line extending along the first direction, and there is an overlapping area between the gate line and the data line between the two adjacent pixel units; In the overlapping area, the gate line includes a hollow portion and a first connecting portion and a second connecting portion located on both sides of the hollow portion in the second direction, and the orthographic projection of the hollow portion on the base substrate overlaps with the orthographic projection of the data line on the base substrate.
15. The display substrate according to claim 14, wherein: The hollow portion includes a first edge and a second edge, wherein the first edge and the second edge are respectively located on both sides of the data line in the first direction. The distance between the first edge and the data line is in the range of 3-10 micrometers, and the distance between the second edge and the data line is in the range of 3-10 micrometers.
16. The display substrate according to any one of claims 1 to 15, wherein: The discharge line further includes a discharge connecting portion connecting the first conductive portion and the second conductive portion; An orthographic projection of the discharge connection portion on the base substrate overlaps with an orthographic projection of the gate structure on the base substrate.
17. The display substrate according to claim 16, wherein: The shape of the orthographic projection of the connecting portion on the base substrate includes a hypotenuse, and the angle between the extending direction of the hypotenuse and the first direction or the second direction is in the range of 20-70 degrees.
18. The display substrate according to claim 17, wherein: The angle between the extending direction of the hypotenuse and the first direction or the second direction is in the range of 40-50 degrees.
19. A display device comprising the display substrate according to any one of claims 1 to 18.
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