A multi-quick charging protocol compatible quick charging protocol control device

Abstract

The application discloses a multi-fast charging protocol compatible fast charging protocol control device, wherein a Type-C controller is connected with a measured fast charging power supply and a main DSP controller, and a control mode of PD2.0 and PD3.0 fast charging protocols of the measured fast charging power supply is realized; ADC1 and ADC2 are connected with the measured fast charging power supply and the main DSP controller respectively, the main DSP controller is connected with an electronic load, and a control mode of ID identification of the measured fast charging power supply is realized; DAC1 and DAC2 are connected with the measured fast charging power supply and the main DSP controller respectively, the main DSP controller is connected with the electronic load, and a control mode of QC2.0 and QC3.0 fast charging protocols of the measured fast charging power supply is realized; a Timer is connected with the main DSP controller and the measured fast charging power supply, and a control mode of AFC, FCP and SCP fast charging protocols of the measured fast charging power supply is realized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of charging, in particular to a fast charging protocol control device compatible with multiple fast charging protocols. BACKGROUND

[0002] Electronic load has been widely used in the power supply industry, and is an essential part of power supply industry test automation. However, electronic load can only control the load conditions of the power supply under test, and can only adapt to traditional fixed output power supplies, and it is difficult to meet the test requirements of fast charging power supplies. Fast charging power supplies need to control the output state of fast charging power supplies through various protocols.

[0003] There are many popular fast charging protocols on the market, and they are constantly being updated. The application of power supply testing has a strong universality requirement, which needs to be compatible with most communication protocols, which poses a severe challenge to fast charging electronic load. SUMMARY

[0004] Technical purpose: In view of the defects in the prior art, the present application discloses a fast charging protocol control device compatible with multiple fast charging protocols, which realizes the matching and communication of the measured fast charging power supply based on multiple fast charging protocols when the electronic load is used to test the output characteristics of the measured fast charging power supply, realizes the control of the output voltage and current characteristics of the measured fast charging power supply, and detects the protocol type and adjustable mode supported by the measured fast charging power supply.

[0005] Technical scheme: In order to achieve the above technical purpose, the present application adopts the following technical scheme.

[0006] A fast charging protocol control device compatible with multiple fast charging protocols, comprising a main DSP controller, ADC1, ADC2, ADC3, DAC1, DAC2, Timer, UART, Type-C controller supporting PD protocol, voltage signal conditioning circuit and electronic load; the Type-C controller is connected with the measured fast charging power supply and the main DSP controller, and is used to realize the control mode of the PD2.0, PD3.0 fast charging protocol of the measured fast charging power supply; the ADC1 and the ADC2 are connected with the measured fast charging power supply and the main DSP controller respectively, the main DSP controller is connected with the electronic load, and is used to realize the control mode of ID identification of the measured fast charging power supply; the DAC1 and the DAC2 are connected with the measured fast charging power supply and the main DSP controller respectively, the main DSP controller is connected with the electronic load, and is used to realize the control mode of the QC2.0, QC3.0 fast charging protocol of the measured fast charging power supply; the Timer is connected with the main DSP controller and the measured fast charging power supply, and is used to realize the control mode of the AFC, FCP, SCP fast charging protocol of the measured fast charging power supply; the UART is connected with the main DSP controller and the measured fast charging power supply, and is used to realize the control mode of the UFCS fast charging protocol of the measured fast charging power supply.

[0007] Further, the main DSP controller is connected with the electronic load through the CAN bus, and the main DSP controller controls the Type-C controller supporting the PD protocol through the IIC bus, and the CCl signal terminal and the CC2 signal terminal of the Type-C controller are connected with the CCl signal terminal and the CC2 signal terminal of the measured fast charging power supply one by one.

[0008] Further, in the control mode of the PD2.0 and PD3.0 fast charging protocol, the main DSP controller sends an instruction to the Type-C controller supporting the PD protocol through the IIC bus, so that the Type-C controller communicates with the measured fast charging power supply through the CCl signal terminal and the CC2 signal terminal, and inquires whether the measured fast charging power supply supports the PD2.0 or PD3.0 fast charging protocol. The Type-C controller supporting the PD protocol transmits information to the main DSP controller through the IIC bus, and the main DSP controller determines whether the output specification of the measured fast charging power supply required by the electronic load matches the information according to the information. If the output specification matches the information, the main DSP controller commands the Type-C controller supporting the PD protocol to communicate with the measured fast charging power supply through the IIC bus, so that the measured fast charging power supply adjusts its output state to the specified output state of the electronic load, that is, the output voltage and the maximum output current of the measured fast charging power supply are controlled, and the PD2.0 or PD3.0 fast charging protocol control of the measured fast charging power supply is completed.

[0009] Further, the ADC1 is connected with the measured fast charging power supply, and is used for receiving a first analog signal output by the D+ signal terminal of the measured fast charging power supply. The ADC1 outputs a first digital signal to the main DSP controller after performing analog-to-digital conversion on the first analog signal. The ADC2 is connected with the measured fast charging power supply, and is used for receiving a second analog signal output by the D- signal terminal of the measured fast charging power supply. The ADC2 outputs a second digital signal to the main DSP controller after performing analog-to-digital conversion on the second analog signal. The main DSP controller completes voltage detection of the D+ signal terminal and the D- signal terminal of the measured fast charging power supply through the ADC1 and the ADC2, and realizes ID identification of the measured fast charging power supply according to the voltage detection result.

[0010] Further, in the control mode of the ID identification, the main DSP controller performs analog-to-digital conversion on the first analog signal of the D+ signal terminal of the measured fast charging power supply through the ADC1 to obtain a first digital signal V_D+. The main DSP controller performs analog-to-digital conversion on the second analog signal of the D- signal terminal of the measured fast charging power supply through the ADC2 to obtain a second digital signal V_D-. The main DSP controller uploads the first digital signal V_D+ and the second digital signal V_D- to the electronic load through the CAN bus, and performs ID legality judgment on the first digital signal V_D+ and the second digital signal V_D- according to the preset maximum value and minimum value.

[0011] Further, the DAC1 is connected with the main DSP controller, used for receiving the third digital signal of the main DSP controller, outputting the third analog signal after digital-to-analog conversion, and controlling the D+ signal end of the measured fast charging power supply; the DAC2 is connected with the main DSP controller, used for receiving the fourth digital signal of the main DSP controller, outputting the fourth analog signal after digital-to-analog conversion, and controlling the D- signal end of the measured fast charging power supply; the main DSP controller completes the adjustment of the D+ signal end and the D- signal end of the measured fast charging power supply through the control of the DAC1 and the DAC2, and realizes the analysis and control of the QC2.0 and QC3.0 fast charging protocols.

[0012] Further, in the control mode of the QC2.0 or QC3.0 fast charging protocol, the electronic load obtains the fast charging protocol matched with the measured fast charging power supply, that is, QC2.0 or QC3.0, and obtains the output voltage combination of the D+ and D- signals according to the set measured power supply output voltage and maximum output current, and notifies the main DSP controller through the CAN bus; the main DSP controller controls the voltage of the D+ signal end to the corresponding value obtained by table lookup through the DAC1, and controls the voltage of the D- signal end to the corresponding value obtained by table lookup through the DAC2, so as to make the measured fast charging power supply output the set voltage and maximum current, and complete the QC2.0 or QC3.0 fast charging protocol control.

[0013] Further, one end of the Timer is connected with the main DSP controller, and the other end is connected with the D- signal end of the measured fast charging power supply; in the control mode of the AFC, FCP and SCP fast charging protocols, the electronic load obtains the fast charging protocol matched with the measured fast charging power supply, that is, AFC, FCP or SCP, and obtains the command word according to the set measured power supply output voltage and maximum output current according to the protocol content table lookup; the main DSP controller encodes the control of the Timer to control the D- signal end of the measured fast charging power supply to receive the preset pulse.

[0014] Further, the UART is connected with the main DSP controller, the D+ signal end of the measured fast charging power supply and the D- signal end of the measured fast charging power supply; the main DSP controller completes the serial communication with the measured fast charging power supply through the UART, and completes the analysis and control of the UFCS fast charging protocol; in the UFCS fast charging protocol control mode, the main DSP controller enables the UART to perform serial communication with the measured fast charging power supply; the electronic load obtains the UFCS fast charging protocol matched with the measured fast charging power supply, and transmits the voltage and maximum output current required to be output by the measured power supply to the main DSP controller through the CAN bus; the main DSP controller transmits the voltage and maximum output current to the measured fast charging power supply through the UART; and the measured fast charging power supply adjusts the output voltage and maximum output current according to the protocol.

[0015] Advantages:

[0016] 1、The application can support PD2.0, PD3.0, QC2.0, QC3.0, PE1.0, PE2.0, AFC, FCP, SCP, UFCS and other fast charging protocols;

[0017] 2、The application can support PD2.0, PD3.0, QC2.0, QC3.0, PE1.0, PE2.0, AFC, FCP, SCP, UFCS and other fast charging protocols;

[0018] 3、The application can support PD2.0, PD3.0, QC2.0, QC3.0, PE1.0, PE2.0, AFC, FCP, SCP, UFCS and other fast charging protocols; BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 A multi-fast charging protocol compatible fast charging protocol control device structure schematic diagram for an embodiment of the application;

[0020] Figure 2 A Type-C controller principle diagram supporting a PD protocol for an embodiment of the application;

[0021] Figure 3 A PE fast charging protocol control example diagram for an embodiment of the application;

[0022] Figure 4 AFC, FCP, SCP fast charging protocol control example diagram for an embodiment of the application. DETAILED DESCRIPTION

[0023] In order to enable the personnel in the technical field to better understand the scheme of the present application, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by the person of ordinary skill in the art without making creative labor fall within the scope of protection of the present application.

[0024] It should be noted that the terms used herein are only intended to describe specific embodiments, and are not intended to limit the exemplary embodiments according to the present application. As used herein, the singular form is intended to include the plural form unless the context clearly indicates otherwise, and it should be understood that when the terms "comprise" and / or "include" are used in the specification, there is a feature, step, operation, device, component and / or their combination.

[0025] As shown in the accompanying Figure 1As shown, the multi-fast charging protocol compatible fast charging protocol control device of the embodiment includes a main DSP controller, ADC1, ADC2, ADC3, DAC1, DAC2, Timer, UART, a Type-C controller supporting PD protocol, a voltage signal conditioning circuit, and an electronic load. The Type-C controller is connected with the measured fast charging power supply and the main DSP controller, and is used to realize the control mode of the PD2.0 and PD3.0 fast charging protocols of the measured fast charging power supply. The ADC1 and ADC2 are connected with the measured fast charging power supply and the main DSP controller respectively, and the main DSP controller is connected with the electronic load, and is used to realize the control mode of the ID identification of the measured fast charging power supply. The DAC1 and DAC2 are connected with the measured fast charging power supply and the main DSP controller respectively, and the main DSP controller is connected with the electronic load, and is used to realize the control mode of the QC2.0 and QC3.0 fast charging protocols of the measured fast charging power supply. The Timer is connected with the main DSP controller and the measured fast charging power supply, and is used to realize the control mode of the AFC, FCP, and SCP fast charging protocols of the measured fast charging power supply. The UART is connected with the main DSP controller and the measured fast charging power supply, and is used to realize the control mode of the UFCS fast charging protocol of the measured fast charging power supply.

[0026] Specifically, the ADC1, ADC2, ADC3, DAC1, DAC2, Timer, UART, Type-C controller, and voltage signal conditioning circuit are connected with the measured fast charging power supply. The voltage signal conditioning circuit is connected with the main DSP controller through the ADC3. The main DSP controller is connected with the ADC1, ADC2, ADC3, DAC1, DAC2, Timer, UART, Type-C controller, and electronic load. The ADC1, ADC2, DC1, DAC2, Timer, and UART are connected with the main DSP controller through an internal bus. The main DSP controller is connected with the electronic load through a CAN bus. The main DSP controller controls the Type-C controller supporting PD protocol through an IIC bus. The CCl signal terminal and CC2 signal terminal of the Type-C controller are connected with the CCl signal terminal and CC2 signal terminal of the measured fast charging power supply one by one, and the Type-C controller supporting PD protocol is used to complete the analysis and control of the PD2.0 and PD3.0 fast charging protocols of the measured fast charging power supply.

[0027] As shown in FIG. 2, the multi-fast charging protocol compatible fast charging protocol control device of the embodiment includes a main DSP controller, ADC1, ADC2, ADC3, DAC1, DAC2, Timer, UART, a Type-C controller supporting PD protocol, a voltage signal conditioning circuit, and an electronic load. Figure 2As shown, in the control mode of the PD2.0 and PD3.0 fast charging protocol, the main DSP controller sends instructions to the Type-C controller supporting the PD protocol through the IIC bus, so that the Type-C controller supporting the PD protocol communicates with the measured fast charging power supply through the CC1 signal terminal and the CC2 signal terminal, queries whether the measured fast charging power supply supports the PD2.0 or PD3.0 fast charging protocol, and if so, queries which output specifications are supported by the measured fast charging power supply. The Type-C controller supporting the PD protocol transmits these information to the main DSP controller through the IIC bus, and the main DSP controller determines whether the output specification of the measured fast charging power supply required by the electronic load matches the above information according to these information, that is, the output specification of the measured fast charging power supply is set by the electronic load, and the output voltage of the measured fast charging power supply is controlled through the fast charging protocol. If it matches, the Type-C controller supporting the PD protocol is commanded to communicate with the measured fast charging power supply through the IIC bus, so that the measured fast charging power supply adjusts its output state to the specified output state of the electronic load, that is, the output voltage and the maximum output current of the measured fast charging power supply are controlled, and the PD2.0 or PD3.0 fast charging protocol control of the measured fast charging power supply is completed. The output voltage and the maximum output current of the measured fast charging power supply correspond to the output specification of the measured fast charging power supply, such as 5V / 3A, 12V / 2A, etc.

[0028] As shown in the accompanying drawings Figure 2 The Type-C controller includes a control chip U1, and the model of the control chip U1 is FUSB302B. The pin 1 and the pin 14 of the control chip U1 are connected, which are used to connect the CC2 signal terminal. The pin 10 and the pin 11 of the control chip U1 are connected, which are used to connect the CC1 signal terminal. The pin 2 of the control chip U1 outputs the VBUS signal, the pin 6 and the pin 7 of the control chip U1 output the SCL signal and the SDA signal respectively, and the pin 5 of the control chip U1 outputs the INT signal. The Type-C controller communicates with the main DSP controller through the IIC bus, that is, through the three signals of the INT signal, the SCL signal and the SDA signal.

[0029] The ADC1 is an analog-to-digital conversion module, which is connected with the measured fast charging power supply and used to receive a first analog signal output by the D+ signal terminal of the measured fast charging power supply. The ADC1 outputs a first digital signal to the main DSP controller after performing analog-to-digital conversion on the first analog signal. The ADC2 is an analog-to-digital conversion module, which is connected with the measured fast charging power supply and used to receive a second analog signal output by the D- signal terminal of the measured fast charging power supply. The ADC2 outputs a second digital signal to the main DSP controller after performing analog-to-digital conversion on the second analog signal. The main DSP controller completes voltage detection of the D+ signal terminal and the D- signal terminal of the measured fast charging power supply through the ADC1 and the ADC2, and realizes ID identification of the measured fast charging power supply according to the voltage detection result.

[0030] In the control mode of ID identification, the main DSP controller converts the first analog signal of the D+ signal end of the measured fast charging power supply through ADC1 to obtain the voltage of the D+ signal end, that is, the first digital signal V_D+; the main DSP controller converts the second analog signal of the D- signal end of the measured fast charging power supply through ADC2 to obtain the voltage of the D- signal end, that is, the second digital signal V_D-; the main DSP controller uploads the first digital signal V_D+ and the second digital signal V_D- to the electronic load through the CAN bus, and the electronic load displays the size of the first digital signal V_D+ and the second digital signal V_D- on the human-computer interface in real time, and can also perform ID legality judgment on the first digital signal V_D+ and the second digital signal V_D- according to the preset maximum value and minimum value, and can also upload to the host computer software for ID legality judgment. ID legality judgment is to measure whether the voltage combination on D+ and D- is consistent with the corresponding combination of the preset ID. The corresponding combination of the preset ID can be the voltage combination provided by the manufacturer.

[0031] DAC1 is a digital-to-analog conversion module connected with the main DSP controller, used to receive the third digital signal of the main DSP controller, output the third analog signal after digital-to-analog conversion, and control the D+ signal end of the measured fast charging power supply; DAC2 is a digital-to-analog conversion module connected with the main DSP controller, used to receive the fourth digital signal of the main DSP controller, output the fourth analog signal after digital-to-analog conversion, and control the D- signal end of the measured fast charging power supply; the main DSP controller controls DAC1 and DAC2 to complete the adjustment of the D+ signal end and the D- signal end of the measured fast charging power supply, and realizes the analysis and control of QC2.0 and QC3.0 fast charging protocol.

[0032] In the control mode of QC2.0 or QC3.0 fast charging protocol, the electronic load obtains the matched fast charging protocol of the measured fast charging power supply, that is, QC2.0 or QC3.0, from the human-computer interface or the host computer software, and according to the set output voltage and maximum output current of the measured power supply, obtains the output voltage combination of D+ and D- signal according to the protocol content table, and then notifies the main DSP controller through the CAN bus. The main DSP controller controls the voltage of the D+ signal end to the corresponding value obtained by looking up the table through DAC1, and controls the voltage of the D- signal end to the corresponding value obtained by looking up the table through DAC2, so as to make the measured fast charging power supply output the set voltage and maximum current, and complete the QC2.0 or QC3.0 fast charging protocol control. The output voltage combination is as follows:

[0033]

[0034] Timer is a timer, one end with the main DSP controller connection, the other end with the measured fast charging power D- signal end, ADC2, DAC2, UART connection;

[0035] As shown in the accompanying Figure 4 The main DSP controller through the operation of Timer, to complete the D- signal end output level and duration control, that is, through the D- signal end communication, to achieve AFC, FCP, SCP fast charging protocol encoding and control.

[0036] AFC, FCP, SCP fast charging protocol control mode, electronic load from human machine interface or host computer software to control the measured fast charging power matched fast charging protocol, namely AFC, FCP or SCP, and according to the set of measured power output voltage and maximum output current, according to the protocol content table command word, by the main DSP controller through the control of Timer encoding, control the D- signal end of the measured fast charging power to receive the preset pulse. Each bit of the command word is high, output high level of 160uS, each bit of the command word is low, output low level of 160uS, the main DSP controller completes the encoding work of Timer, and decodes Timer, every detects high level of 160uS is decoded as 1, every detects low level of 160uS is decoded as 0, and the synchronization signal of data is 40uS pulse. That is, the main DSP controller controls the output of Timer, uses 40uS pulse to determine the start and end of communication, every output a bit 1, pull high D- signal end level of 160uS, every output a bit 0, pull low D- signal end level of 160uS. Timer output is digital signal, only high and low level two states, Timer can detect and control the duration. As shown in the accompanying Figure 4 The main DSP controller encodes and decodes Timer. Figure 4 The process of Timer is shown.

[0037] UART and the main DSP controller, the measured fast charging power D+ signal end, the measured fast charging power D- signal end connection, the main DSP controller through the UART to complete the serial communication with the measured fast charging power, complete the UFCS fast charging protocol analysis and control.

[0038] In the UFCS fast charging protocol control mode, the main DSP controller enables the UART, and communicates with the measured fast charging power supply through the D+ signal terminal and the D- signal terminal. The electronic load obtains the UFCS fast charging protocol matched by the measured fast charging power supply from the man-machine interface or the upper computer software, and transmits the voltage and the maximum output current required by the measured power supply to the main DSP controller through the CAN bus. The main DSP controller transmits the voltage and the maximum output current to the measured fast charging power supply through the UART. The measured fast charging power supply adjusts the output voltage and the maximum output current according to the protocol. The UART is a digital signal TTL level, and only has two distinctions of high level and low level. The UART belongs to a serial communication protocol, and automatically encodes and decodes according to a fixed baud rate.

[0039] The electronic load is connected with the main DSP controller, the man-machine interface and the upper computer software. The electronic load receives the fast charging protocol selection information and the output voltage and the maximum output current input by the man-machine interface or the upper computer software, and transmits the information to the main DSP controller through the CAN bus. The main DSP controller completes the matching and control of the fast charging protocol.

[0040] As shown in the accompanying Figure 3 The electronic load also realizes the analysis and control of the PE1.0 or PE2.0 fast charging protocol through the time sequence control of the pull-in current and the unloading current. Figure 3 The accompanying

[0041] In the control mode of the PE1.0 or PE2.0 fast charging protocol, the electronic load obtains the fast charging protocol matched by the measured fast charging power supply from the man-machine interface or the upper computer software, that is, PE1.0 or PE2.0. According to the set output voltage and the maximum output current of the measured power supply, the current pulse waveform required by the electronic load is obtained according to the protocol content table. Then, the electronic load works in the CC mode, and simulates the waveform according to the current pulse waveform obtained by the table lookup.

[0042] The electronic load is connected with the upper computer software through the RS232 communication interface and the SCPI protocol, receives the instructions of the upper computer software, realizes the load of various working modes and specified parameters of the electronic load, and feeds back the measured electrical parameters and working states to the upper computer software, so as to realize the remote control of the electronic load, the electrical parameter monitoring, the linkage of the electronic load and other instruments, and the automatic detection of the measured power supply.

[0043] The voltage signal conditioning circuit is connected with the measured fast charging power supply and the ADC 3, and is used for collecting the voltage V_Bus of the measured fast charging power supply. The voltage V_Bus of the measured fast charging power supply is amplified by the voltage signal conditioning circuit and then an output voltage reference value Vf is output. The Vf is sent to the ADC 3 for analog-digital conversion, the voltage measurement is completed, and the closed loop confirmation of the fast charging protocol adjustment result is realized. The ADC 3 is an analog-digital converter. That is, the ADC 3 and the voltage signal conditioning circuit detect the output voltage of the measured fast charging power supply, confirm whether the control instruction of the fast charging protocol is effectively completed, and realize the closed loop control. The voltage signal conditioning circuit can be a resistance voltage sampling circuit, which is an existing technical means and will not be described here.

[0044] The Type-C controller is realized by the chip U1, the model of the chip U1 is FUSB302B, the circuit connection diagram is as shown in Figure 2 The chip U1 completes the PD2.0 or PD3.0 fast charging protocol analysis and control on the measured fast charging power supply through the CC1 and the CC2, and transmits the information of the measured fast charging power supply to the main DSP controller through the IIC bus, and receives the matched fast charging protocol and the control information of the output specification of the measured fast charging power supply from the main DSP controller.

[0045] In some embodiments of the application, the ADC1, the ADC2, the ADC3, the DAC1, the DAC2, the Timer and the UART are all peripheral devices embedded in an MCU. The MCU can adopt an STM32G431CBTX of an ST company. The analog inputs of the ADC1, the ADC2 and the ADC3 in the peripheral devices are input pins and present a high resistance state. The analog outputs of the DAC1 and the DAC2 can be disabled and set to a high resistance state. The Timer can be used as an input or an output. Its output state can be disabled and set to a high resistance state. The RX pin of the UART is an input pin and presents a high resistance state. The TX pin of the UART is an output pin, and its output state can be disabled and set to a high resistance state.

[0046] The electronic load can work in CC, CV, CP, CR and other modes as generally understood, which will not be described here.

[0047] The multi-fast charging protocol compatible fast charging protocol control device in the application can be embedded in the electronic load, communicates with the electronic load through the CAN bus, and then forms a complete fast charging electronic load. The fast charging electronic load can not only test the output characteristics of the measured fast charging power supply, but also can flexibly scan and detect the output capability and working condition of the measured fast charging power supply, so as to realize the systematic detection and closed loop control of the measured fast charging power supply.

[0048] The above merely describes the preferred embodiments of the present application, and it should be pointed out that those skilled in the art can make several improvements and refinements without departing from the principles of the present application, and these improvements and refinements should also be considered as the protection scope of the present application.

Claims

1. A fast charging protocol control device compatible with multiple fast charging protocols, characterized in that, The system includes a main DSP controller, ADC1, ADC2, ADC3, DAC1, DAC2, a timer, a UART, a Type-C controller supporting the PD protocol, a voltage signal conditioning circuit, and an electronic load. The Type-C controller connects to the fast-charging power supply under test and the main DSP controller to implement the PD2.0 and PD3.0 fast charging protocol control modes of the fast-charging power supply under test. ADC1 and ADC2 are connected to the fast-charging power supply under test and the main DSP controller, respectively. The main DSP controller is connected to the electronic load to implement the ID recognition control mode of the fast-charging power supply under test. DAC1 and DAC2 are connected to the fast-charging power supply under test and the main DSP controller, respectively. The main DSP controller is connected to the electronic load to implement the QC2.0 and QC3.0 fast charging protocol control modes of the fast-charging power supply under test. The timer connects to the main DSP controller and the fast-charging power supply under test to implement the AFC, FCP, and SCP fast charging protocol control modes of the fast-charging power supply under test. The UART connects to the main DSP controller and the fast-charging power supply under test to implement the UFCS fast charging protocol control mode of the fast-charging power supply under test. ADC1 is connected to the fast charging power supply under test and is used to receive the first analog signal output from the D+ signal terminal of the fast charging power supply under test. After performing analog-to-digital conversion on the first analog signal, ADC1 outputs the first digital signal to the main DSP controller. ADC2 is connected to the fast charging power supply under test and is used to receive the second analog signal output from the D- signal terminal of the fast charging power supply under test. After performing analog-to-digital conversion on the second analog signal, ADC2 outputs the second digital signal to the main DSP controller. The main DSP controller completes voltage detection of the D+ and D- signal terminals of the fast charging power supply under test through ADC1 and ADC2, and realizes ID identification of the fast charging power supply under test based on the voltage detection results. In the ID recognition control mode, the main DSP controller performs analog-to-digital conversion on the first analog signal at the D+ signal terminal of the fast charging power supply under test through ADC1 to obtain the first digital signal V_D+; the main DSP controller performs analog-to-digital conversion on the second analog signal at the D- signal terminal of the fast charging power supply under test through ADC2 to obtain the second digital signal V_D-. The main DSP controller uploads the first digital signal V_D+ and the second digital signal V_D- to the electronic load through the CAN bus, and performs ID validity judgment on the first digital signal V_D+ and the second digital signal V_D- based on the preset maximum and minimum values.

2. The fast charging protocol control device compatible with multiple fast charging protocols according to claim 1, characterized in that: The main DSP controller is connected to the electronic load via the CAN bus. The main DSP controller controls the Type-C controller that supports the PD protocol via the IIC bus. The CC1 and CC2 signal terminals of the Type-C controller are connected one-to-one with the CC1 and CC2 signal terminals of the fast charging power supply under test.

3. A fast charging protocol control device compatible with multiple fast charging protocols according to claim 2, characterized in that: In the control mode of PD2.0 and PD3.0 fast charging protocols, the main DSP controller sends instructions to the Type-C controller that supports the PD protocol via the IIC bus, instructing it to communicate with the fast charging power supply under test through the CC1 and CC2 signal terminals to check whether it supports the PD2.0 or PD3.0 fast charging protocol. The Type-C controller that supports the PD protocol transmits the information to the main DSP controller via the IIC bus. The main DSP controller determines whether the output specifications of the fast charging power supply under test required by the electronic load match the information. If they match, it commands the Type-C controller that supports the PD protocol to communicate with the fast charging power supply under test via the IIC bus, instructing the fast charging power supply under test to adjust its output state to the output state specified by the electronic load, that is, to control the output voltage and maximum output current of the fast charging power supply under test, thereby completing the PD2.0 or PD3.0 fast charging protocol control of the fast charging power supply under test.

4. A fast charging protocol control device compatible with multiple fast charging protocols according to claim 1, characterized in that: DAC1 is connected to the main DSP controller and is used to receive the third digital signal from the main DSP controller. After digital-to-analog conversion, it outputs the third analog signal to control the D+ signal terminal of the fast charging power supply under test. DAC2 is also connected to the main DSP controller and is used to receive the fourth digital signal from the main DSP controller. After digital-to-analog conversion, it outputs the fourth analog signal to control the D- signal terminal of the fast charging power supply under test. The main DSP controller adjusts the D+ and D- signal terminals of the fast charging power supply under test by controlling DAC1 and DAC2, thereby realizing the parsing and control of QC2.0 and QC3.0 fast charging protocols.

5. A fast charging protocol control device compatible with multiple fast charging protocols according to claim 4, characterized in that: In the control mode of QC2.0 or QC3.0 fast charging protocol, the electronic load acquires the fast charging protocol matched to the tested power supply, i.e., QC2.0 or QC3.

0. Based on the set output voltage and maximum output current of the tested power supply, it looks up the output voltage combination of D+ and D- signals according to the protocol content and notifies the main DSP controller via the CAN bus. The main DSP controller controls the voltage of the D+ signal terminal to the corresponding value obtained from the lookup table through DAC1, and controls the voltage of the D- signal terminal to the corresponding value obtained from the lookup table through DAC2. In this way, the tested power supply outputs the set voltage and maximum current, completing the control of the QC2.0 or QC3.0 fast charging protocol.

6. A fast charging protocol control device compatible with multiple fast charging protocols according to claim 1, characterized in that: One end of the timer is connected to the main DSP controller, and the other end is connected to the D-signal terminal of the fast charging power supply under test. Under the control modes of AFC, FCP, and SCP fast charging protocols, the electronic load acquires the fast charging protocol matched to the fast charging power supply under test, i.e., AFC, FCP, or SCP. Based on the set output voltage and maximum output current of the power supply under test, the main DSP controller encodes the command word obtained by looking up the table according to the protocol content, and controls the D-signal terminal of the fast charging power supply under test to receive preset pulses.

7. A fast charging protocol control device compatible with multiple fast charging protocols according to claim 1, characterized in that: The UART is connected to the main DSP controller, the D+ signal terminal of the fast charging power supply under test, and the D- signal terminal of the fast charging power supply under test. The main DSP controller completes serial communication with the fast charging power supply under test through the UART to complete the parsing and control of the UFCS fast charging protocol. In the UFCS fast charging protocol control mode, the main DSP controller enables the UART and communicates with the fast charging power supply under test via serial port. The electronic load acquires the UFCS fast charging protocol matched to the fast charging power supply under test and transmits the required output voltage and maximum output current of the power supply under test to the main DSP controller through the CAN bus. The main DSP controller then transmits this information to the fast charging power supply under test through the UART, and the fast charging power supply under test adjusts its output voltage and maximum output current according to the protocol.

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